./Ultimate.py --spec ../sv-benchmarks/c/properties/valid-memsafety.prp --file ../sv-benchmarks/c/list-simple/sll2n_insert_unequal.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 8fc3dc66 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerMemDerefMemtrack.xml -i ../sv-benchmarks/c/list-simple/sll2n_insert_unequal.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 383c6933c6ab916f651364224af1d774f30e162ad506fd2f28fe7f76c4487ba3 --- Real Ultimate output --- This is Ultimate 0.3.0-?-8fc3dc6-m [2025-03-17 12:18:32,139 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-03-17 12:18:32,179 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2025-03-17 12:18:32,185 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-03-17 12:18:32,186 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-03-17 12:18:32,204 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-03-17 12:18:32,205 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-03-17 12:18:32,205 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-03-17 12:18:32,205 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-03-17 12:18:32,205 INFO L153 SettingsManager]: * Use memory slicer=true [2025-03-17 12:18:32,205 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-03-17 12:18:32,205 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-03-17 12:18:32,205 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * Use SBE=true [2025-03-17 12:18:32,206 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * sizeof long=4 [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * Bitprecise bitfields=true [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2025-03-17 12:18:32,206 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * sizeof long double=12 [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Use constant arrays=true [2025-03-17 12:18:32,207 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-17 12:18:32,207 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-03-17 12:18:32,207 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 383c6933c6ab916f651364224af1d774f30e162ad506fd2f28fe7f76c4487ba3 [2025-03-17 12:18:32,434 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-03-17 12:18:32,442 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-03-17 12:18:32,444 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-03-17 12:18:32,445 INFO L270 PluginConnector]: Initializing CDTParser... [2025-03-17 12:18:32,445 INFO L274 PluginConnector]: CDTParser initialized [2025-03-17 12:18:32,447 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/list-simple/sll2n_insert_unequal.i [2025-03-17 12:18:33,622 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7dc67d7c/09d2c89fe07f4b6a9083d7820c4c601c/FLAG1e862c81b [2025-03-17 12:18:33,914 INFO L384 CDTParser]: Found 1 translation units. [2025-03-17 12:18:33,915 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/list-simple/sll2n_insert_unequal.i [2025-03-17 12:18:33,929 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7dc67d7c/09d2c89fe07f4b6a9083d7820c4c601c/FLAG1e862c81b [2025-03-17 12:18:34,204 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e7dc67d7c/09d2c89fe07f4b6a9083d7820c4c601c [2025-03-17 12:18:34,206 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-03-17 12:18:34,208 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-03-17 12:18:34,210 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-03-17 12:18:34,211 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-03-17 12:18:34,215 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-03-17 12:18:34,216 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,217 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7e4be6fa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34, skipping insertion in model container [2025-03-17 12:18:34,217 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,248 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-03-17 12:18:34,426 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 12:18:34,436 INFO L200 MainTranslator]: Completed pre-run [2025-03-17 12:18:34,471 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-03-17 12:18:34,490 INFO L204 MainTranslator]: Completed translation [2025-03-17 12:18:34,491 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34 WrapperNode [2025-03-17 12:18:34,491 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-03-17 12:18:34,492 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-03-17 12:18:34,492 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-03-17 12:18:34,492 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-03-17 12:18:34,496 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,503 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,520 INFO L138 Inliner]: procedures = 128, calls = 37, calls flagged for inlining = 7, calls inlined = 7, statements flattened = 141 [2025-03-17 12:18:34,521 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-03-17 12:18:34,521 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-03-17 12:18:34,521 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-03-17 12:18:34,521 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-03-17 12:18:34,527 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,527 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,530 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,551 INFO L175 MemorySlicer]: Split 20 memory accesses to 3 slices as follows [2, 5, 13]. 65 percent of accesses are in the largest equivalence class. The 3 initializations are split as follows [2, 1, 0]. The 6 writes are split as follows [0, 1, 5]. [2025-03-17 12:18:34,552 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,552 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,557 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,558 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,559 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,560 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,561 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-03-17 12:18:34,562 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-03-17 12:18:34,562 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-03-17 12:18:34,562 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-03-17 12:18:34,563 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (1/1) ... [2025-03-17 12:18:34,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-03-17 12:18:34,575 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:34,588 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-03-17 12:18:34,591 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-03-17 12:18:34,606 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-03-17 12:18:34,606 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-03-17 12:18:34,606 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-03-17 12:18:34,606 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-03-17 12:18:34,607 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-03-17 12:18:34,607 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-03-17 12:18:34,607 INFO L130 BoogieDeclarations]: Found specification of procedure node_create [2025-03-17 12:18:34,607 INFO L138 BoogieDeclarations]: Found implementation of procedure node_create [2025-03-17 12:18:34,607 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-03-17 12:18:34,607 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-03-17 12:18:34,607 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-03-17 12:18:34,607 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-03-17 12:18:34,607 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#0 [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#1 [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#2 [2025-03-17 12:18:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-03-17 12:18:34,609 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-03-17 12:18:34,609 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2025-03-17 12:18:34,609 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-03-17 12:18:34,609 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-03-17 12:18:34,707 INFO L256 CfgBuilder]: Building ICFG [2025-03-17 12:18:34,709 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-03-17 12:18:34,933 INFO L1322 $ProcedureCfgBuilder]: dead code at ProgramPoint L619: call ULTIMATE.dealloc(main_~#s~0#1.base, main_~#s~0#1.offset);havoc main_~#s~0#1.base, main_~#s~0#1.offset; [2025-03-17 12:18:34,956 INFO L1322 $ProcedureCfgBuilder]: dead code at ProgramPoint L578: havoc myexit_~s#1;havoc myexit_#in~s#1;assume { :end_inline_myexit } true; [2025-03-17 12:18:34,974 INFO L? ?]: Removed 111 outVars from TransFormulas that were not future-live. [2025-03-17 12:18:34,975 INFO L307 CfgBuilder]: Performing block encoding [2025-03-17 12:18:34,985 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-03-17 12:18:34,985 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-03-17 12:18:34,985 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 12:18:34 BoogieIcfgContainer [2025-03-17 12:18:34,985 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-03-17 12:18:34,987 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-03-17 12:18:34,987 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-03-17 12:18:34,990 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-03-17 12:18:34,990 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 17.03 12:18:34" (1/3) ... [2025-03-17 12:18:34,991 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@165344e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 17.03 12:18:34, skipping insertion in model container [2025-03-17 12:18:34,991 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.03 12:18:34" (2/3) ... [2025-03-17 12:18:34,991 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@165344e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 17.03 12:18:34, skipping insertion in model container [2025-03-17 12:18:34,991 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.03 12:18:34" (3/3) ... [2025-03-17 12:18:34,992 INFO L128 eAbstractionObserver]: Analyzing ICFG sll2n_insert_unequal.i [2025-03-17 12:18:35,001 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:None NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-03-17 12:18:35,003 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG sll2n_insert_unequal.i that has 2 procedures, 97 locations, 1 initial locations, 5 loop locations, and 39 error locations. [2025-03-17 12:18:35,030 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-03-17 12:18:35,038 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=None, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@38e48e81, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-03-17 12:18:35,038 INFO L334 AbstractCegarLoop]: Starting to check reachability of 39 error locations. [2025-03-17 12:18:35,041 INFO L276 IsEmpty]: Start isEmpty. Operand has 97 states, 54 states have (on average 1.9444444444444444) internal successors, (105), 93 states have internal predecessors, (105), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:35,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2025-03-17 12:18:35,044 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:35,044 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2025-03-17 12:18:35,044 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting node_createErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:35,047 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:35,047 INFO L85 PathProgramCache]: Analyzing trace with hash -337682830, now seen corresponding path program 1 times [2025-03-17 12:18:35,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:35,052 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [852422772] [2025-03-17 12:18:35,053 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:35,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:35,114 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-17 12:18:35,136 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 12:18:35,137 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:35,137 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:35,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:18:35,289 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:35,289 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [852422772] [2025-03-17 12:18:35,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [852422772] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:35,290 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:35,290 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-17 12:18:35,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1081204727] [2025-03-17 12:18:35,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:35,295 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-17 12:18:35,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:35,313 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 12:18:35,313 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:18:35,315 INFO L87 Difference]: Start difference. First operand has 97 states, 54 states have (on average 1.9444444444444444) internal successors, (105), 93 states have internal predecessors, (105), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 2 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:18:35,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:35,345 INFO L93 Difference]: Finished difference Result 103 states and 114 transitions. [2025-03-17 12:18:35,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 12:18:35,347 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 2 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2025-03-17 12:18:35,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:35,353 INFO L225 Difference]: With dead ends: 103 [2025-03-17 12:18:35,353 INFO L226 Difference]: Without dead ends: 100 [2025-03-17 12:18:35,355 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:18:35,357 INFO L435 NwaCegarLoop]: 104 mSDtfsCounter, 5 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 206 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:35,360 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 206 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:18:35,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2025-03-17 12:18:35,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 94. [2025-03-17 12:18:35,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 52 states have (on average 1.9038461538461537) internal successors, (99), 90 states have internal predecessors, (99), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:35,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 103 transitions. [2025-03-17 12:18:35,418 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 103 transitions. Word has length 6 [2025-03-17 12:18:35,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:35,418 INFO L471 AbstractCegarLoop]: Abstraction has 94 states and 103 transitions. [2025-03-17 12:18:35,418 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 2 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:18:35,418 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 103 transitions. [2025-03-17 12:18:35,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2025-03-17 12:18:35,418 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:35,418 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2025-03-17 12:18:35,419 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-03-17 12:18:35,419 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting node_createErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:35,419 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:35,419 INFO L85 PathProgramCache]: Analyzing trace with hash -331158601, now seen corresponding path program 1 times [2025-03-17 12:18:35,419 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:35,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147881117] [2025-03-17 12:18:35,420 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:35,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:35,430 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-17 12:18:35,444 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 12:18:35,444 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:35,444 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:35,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:18:35,532 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:35,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147881117] [2025-03-17 12:18:35,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [147881117] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:35,532 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:35,532 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-17 12:18:35,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1949545132] [2025-03-17 12:18:35,532 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:35,533 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-17 12:18:35,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:35,533 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 12:18:35,533 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:18:35,533 INFO L87 Difference]: Start difference. First operand 94 states and 103 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:18:35,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:35,616 INFO L93 Difference]: Finished difference Result 92 states and 101 transitions. [2025-03-17 12:18:35,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 12:18:35,616 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2025-03-17 12:18:35,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:35,617 INFO L225 Difference]: With dead ends: 92 [2025-03-17 12:18:35,617 INFO L226 Difference]: Without dead ends: 92 [2025-03-17 12:18:35,617 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:18:35,619 INFO L435 NwaCegarLoop]: 94 mSDtfsCounter, 2 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 156 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:35,619 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 156 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:18:35,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2025-03-17 12:18:35,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2025-03-17 12:18:35,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 52 states have (on average 1.8653846153846154) internal successors, (97), 88 states have internal predecessors, (97), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:35,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 101 transitions. [2025-03-17 12:18:35,626 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 101 transitions. Word has length 6 [2025-03-17 12:18:35,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:35,627 INFO L471 AbstractCegarLoop]: Abstraction has 92 states and 101 transitions. [2025-03-17 12:18:35,627 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:18:35,627 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 101 transitions. [2025-03-17 12:18:35,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2025-03-17 12:18:35,627 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:35,627 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2025-03-17 12:18:35,627 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-03-17 12:18:35,628 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting node_createErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:35,629 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:35,629 INFO L85 PathProgramCache]: Analyzing trace with hash -331158602, now seen corresponding path program 1 times [2025-03-17 12:18:35,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:35,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888841006] [2025-03-17 12:18:35,629 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:35,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:35,639 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-03-17 12:18:35,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-03-17 12:18:35,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:35,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:35,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:18:35,672 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:35,672 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888841006] [2025-03-17 12:18:35,672 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1888841006] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:35,672 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:35,672 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-03-17 12:18:35,672 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182736009] [2025-03-17 12:18:35,672 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:35,673 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-17 12:18:35,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:35,673 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 12:18:35,673 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:18:35,673 INFO L87 Difference]: Start difference. First operand 92 states and 101 transitions. Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:18:35,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:35,739 INFO L93 Difference]: Finished difference Result 90 states and 99 transitions. [2025-03-17 12:18:35,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 12:18:35,740 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2025-03-17 12:18:35,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:35,740 INFO L225 Difference]: With dead ends: 90 [2025-03-17 12:18:35,740 INFO L226 Difference]: Without dead ends: 90 [2025-03-17 12:18:35,741 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:18:35,741 INFO L435 NwaCegarLoop]: 94 mSDtfsCounter, 2 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:35,741 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 152 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:18:35,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2025-03-17 12:18:35,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2025-03-17 12:18:35,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 52 states have (on average 1.8269230769230769) internal successors, (95), 86 states have internal predecessors, (95), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:35,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 99 transitions. [2025-03-17 12:18:35,745 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 99 transitions. Word has length 6 [2025-03-17 12:18:35,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:35,746 INFO L471 AbstractCegarLoop]: Abstraction has 90 states and 99 transitions. [2025-03-17 12:18:35,746 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-03-17 12:18:35,746 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 99 transitions. [2025-03-17 12:18:35,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2025-03-17 12:18:35,746 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:35,746 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:35,746 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-03-17 12:18:35,747 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr33REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:35,747 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:35,747 INFO L85 PathProgramCache]: Analyzing trace with hash -1366141961, now seen corresponding path program 1 times [2025-03-17 12:18:35,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:35,747 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319012543] [2025-03-17 12:18:35,747 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:35,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:35,754 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-03-17 12:18:35,762 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 12:18:35,762 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:35,763 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:35,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:18:35,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:35,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319012543] [2025-03-17 12:18:35,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [319012543] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:35,845 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:35,845 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 12:18:35,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [738902875] [2025-03-17 12:18:35,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:35,846 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-17 12:18:35,846 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:35,847 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 12:18:35,847 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:35,847 INFO L87 Difference]: Start difference. First operand 90 states and 99 transitions. Second operand has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-17 12:18:35,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:35,966 INFO L93 Difference]: Finished difference Result 89 states and 98 transitions. [2025-03-17 12:18:35,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 12:18:35,966 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2025-03-17 12:18:35,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:35,967 INFO L225 Difference]: With dead ends: 89 [2025-03-17 12:18:35,967 INFO L226 Difference]: Without dead ends: 89 [2025-03-17 12:18:35,967 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:35,968 INFO L435 NwaCegarLoop]: 89 mSDtfsCounter, 2 mSDsluCounter, 209 mSDsCounter, 0 mSdLazyCounter, 178 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 298 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 178 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:35,968 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 298 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 178 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:18:35,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2025-03-17 12:18:35,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2025-03-17 12:18:35,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 52 states have (on average 1.8076923076923077) internal successors, (94), 85 states have internal predecessors, (94), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:35,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 98 transitions. [2025-03-17 12:18:35,972 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 98 transitions. Word has length 12 [2025-03-17 12:18:35,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:35,972 INFO L471 AbstractCegarLoop]: Abstraction has 89 states and 98 transitions. [2025-03-17 12:18:35,972 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-17 12:18:35,973 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 98 transitions. [2025-03-17 12:18:35,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2025-03-17 12:18:35,973 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:35,973 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:35,973 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-03-17 12:18:35,973 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr34REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:35,974 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:35,974 INFO L85 PathProgramCache]: Analyzing trace with hash -1366141960, now seen corresponding path program 1 times [2025-03-17 12:18:35,974 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:35,974 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341690196] [2025-03-17 12:18:35,974 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:35,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:35,981 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-03-17 12:18:35,985 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-03-17 12:18:35,986 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:35,986 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:36,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:18:36,131 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:36,131 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341690196] [2025-03-17 12:18:36,131 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [341690196] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:36,132 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:36,132 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 12:18:36,132 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2022784773] [2025-03-17 12:18:36,134 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:36,134 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-17 12:18:36,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:36,135 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 12:18:36,135 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:36,135 INFO L87 Difference]: Start difference. First operand 89 states and 98 transitions. Second operand has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-17 12:18:36,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:36,235 INFO L93 Difference]: Finished difference Result 88 states and 97 transitions. [2025-03-17 12:18:36,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 12:18:36,235 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2025-03-17 12:18:36,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:36,236 INFO L225 Difference]: With dead ends: 88 [2025-03-17 12:18:36,236 INFO L226 Difference]: Without dead ends: 88 [2025-03-17 12:18:36,236 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:36,236 INFO L435 NwaCegarLoop]: 89 mSDtfsCounter, 1 mSDsluCounter, 225 mSDsCounter, 0 mSdLazyCounter, 157 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 314 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:36,236 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 314 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 157 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:18:36,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2025-03-17 12:18:36,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2025-03-17 12:18:36,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 52 states have (on average 1.7884615384615385) internal successors, (93), 84 states have internal predecessors, (93), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:36,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 97 transitions. [2025-03-17 12:18:36,240 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 97 transitions. Word has length 12 [2025-03-17 12:18:36,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:36,240 INFO L471 AbstractCegarLoop]: Abstraction has 88 states and 97 transitions. [2025-03-17 12:18:36,240 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 5 states have internal predecessors, (10), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-03-17 12:18:36,241 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 97 transitions. [2025-03-17 12:18:36,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2025-03-17 12:18:36,241 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:36,241 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:36,241 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-03-17 12:18:36,241 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr31REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:36,242 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:36,242 INFO L85 PathProgramCache]: Analyzing trace with hash -1611264788, now seen corresponding path program 1 times [2025-03-17 12:18:36,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:36,242 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [848519128] [2025-03-17 12:18:36,242 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:36,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:36,253 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-03-17 12:18:36,260 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-03-17 12:18:36,260 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:36,260 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:36,338 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2025-03-17 12:18:36,339 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:36,339 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [848519128] [2025-03-17 12:18:36,339 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [848519128] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:36,339 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [575438365] [2025-03-17 12:18:36,339 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:36,339 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:36,339 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:36,341 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:36,343 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-03-17 12:18:36,405 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-03-17 12:18:36,432 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-03-17 12:18:36,432 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:36,432 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:36,434 INFO L256 TraceCheckSpWp]: Trace formula consists of 247 conjuncts, 5 conjuncts are in the unsatisfiable core [2025-03-17 12:18:36,438 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:36,477 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-03-17 12:18:36,477 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:18:36,515 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2025-03-17 12:18:36,515 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [575438365] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 12:18:36,515 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 12:18:36,515 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 5 [2025-03-17 12:18:36,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6250364] [2025-03-17 12:18:36,515 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 12:18:36,516 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-17 12:18:36,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:36,516 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 12:18:36,517 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:18:36,518 INFO L87 Difference]: Start difference. First operand 88 states and 97 transitions. Second operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2025-03-17 12:18:36,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:36,533 INFO L93 Difference]: Finished difference Result 93 states and 103 transitions. [2025-03-17 12:18:36,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:18:36,535 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 24 [2025-03-17 12:18:36,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:36,535 INFO L225 Difference]: With dead ends: 93 [2025-03-17 12:18:36,535 INFO L226 Difference]: Without dead ends: 93 [2025-03-17 12:18:36,535 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:18:36,536 INFO L435 NwaCegarLoop]: 94 mSDtfsCounter, 3 mSDsluCounter, 93 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 187 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:36,536 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 187 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:18:36,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2025-03-17 12:18:36,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2025-03-17 12:18:36,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 56 states have (on average 1.7321428571428572) internal successors, (97), 88 states have internal predecessors, (97), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:36,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 103 transitions. [2025-03-17 12:18:36,543 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 103 transitions. Word has length 24 [2025-03-17 12:18:36,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:36,543 INFO L471 AbstractCegarLoop]: Abstraction has 93 states and 103 transitions. [2025-03-17 12:18:36,544 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2025-03-17 12:18:36,544 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 103 transitions. [2025-03-17 12:18:36,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2025-03-17 12:18:36,544 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:36,544 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:36,552 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-03-17 12:18:36,745 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2025-03-17 12:18:36,745 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr31REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:36,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:36,745 INFO L85 PathProgramCache]: Analyzing trace with hash 2142120392, now seen corresponding path program 2 times [2025-03-17 12:18:36,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:36,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298553685] [2025-03-17 12:18:36,746 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 12:18:36,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:36,767 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 36 statements into 2 equivalence classes. [2025-03-17 12:18:36,791 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 36 of 36 statements. [2025-03-17 12:18:36,791 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 12:18:36,791 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:37,289 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-03-17 12:18:37,289 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:37,289 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [298553685] [2025-03-17 12:18:37,289 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [298553685] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:37,289 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [84283365] [2025-03-17 12:18:37,289 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-03-17 12:18:37,289 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:37,289 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:37,293 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:37,297 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-03-17 12:18:37,373 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 36 statements into 2 equivalence classes. [2025-03-17 12:18:37,411 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 36 of 36 statements. [2025-03-17 12:18:37,411 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-03-17 12:18:37,411 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:37,415 INFO L256 TraceCheckSpWp]: Trace formula consists of 342 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-03-17 12:18:37,417 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:37,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:18:37,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-03-17 12:18:37,466 WARN L873 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| Int)) (and (<= (+ |node_create_~temp~0#1.base| 1) |c_#StackHeapBarrier|) (= |c_#valid| (store |c_old(#valid)| |node_create_~temp~0#1.base| (select |c_#valid| |node_create_~temp~0#1.base|))))) is different from true [2025-03-17 12:18:37,534 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:18:37,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:37,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-03-17 12:18:37,602 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:18:37,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:37,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-03-17 12:18:37,690 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:18:37,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:37,693 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:37,693 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-17 12:18:37,693 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [84283365] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:37,693 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-17 12:18:37,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [11] total 13 [2025-03-17 12:18:37,694 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [682454154] [2025-03-17 12:18:37,694 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:37,694 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-17 12:18:37,694 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:37,694 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 12:18:37,695 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=146, Unknown=1, NotChecked=24, Total=210 [2025-03-17 12:18:37,695 INFO L87 Difference]: Start difference. First operand 93 states and 103 transitions. Second operand has 7 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:37,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:37,785 INFO L93 Difference]: Finished difference Result 95 states and 105 transitions. [2025-03-17 12:18:37,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 12:18:37,787 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 36 [2025-03-17 12:18:37,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:37,787 INFO L225 Difference]: With dead ends: 95 [2025-03-17 12:18:37,787 INFO L226 Difference]: Without dead ends: 95 [2025-03-17 12:18:37,788 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=168, Unknown=1, NotChecked=26, Total=240 [2025-03-17 12:18:37,788 INFO L435 NwaCegarLoop]: 77 mSDtfsCounter, 17 mSDsluCounter, 140 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 217 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 122 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:37,788 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 217 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 122 Unchecked, 0.1s Time] [2025-03-17 12:18:37,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2025-03-17 12:18:37,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 91. [2025-03-17 12:18:37,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 56 states have (on average 1.6964285714285714) internal successors, (95), 86 states have internal predecessors, (95), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:37,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 101 transitions. [2025-03-17 12:18:37,791 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 101 transitions. Word has length 36 [2025-03-17 12:18:37,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:37,792 INFO L471 AbstractCegarLoop]: Abstraction has 91 states and 101 transitions. [2025-03-17 12:18:37,792 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:37,792 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 101 transitions. [2025-03-17 12:18:37,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2025-03-17 12:18:37,792 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:37,792 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:37,799 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2025-03-17 12:18:37,997 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2025-03-17 12:18:37,997 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr32REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:37,997 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:37,997 INFO L85 PathProgramCache]: Analyzing trace with hash 2142120393, now seen corresponding path program 1 times [2025-03-17 12:18:37,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:37,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166412789] [2025-03-17 12:18:37,998 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:37,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:38,014 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-17 12:18:38,036 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-17 12:18:38,038 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:38,039 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:38,509 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-17 12:18:38,509 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:38,509 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1166412789] [2025-03-17 12:18:38,509 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1166412789] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:38,509 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [967945951] [2025-03-17 12:18:38,509 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:38,510 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:38,510 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:38,511 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:38,513 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-03-17 12:18:38,585 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 36 statements into 1 equivalence classes. [2025-03-17 12:18:38,625 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 36 of 36 statements. [2025-03-17 12:18:38,625 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:38,625 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:38,627 INFO L256 TraceCheckSpWp]: Trace formula consists of 342 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-03-17 12:18:38,629 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:38,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-03-17 12:18:38,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-03-17 12:18:38,669 WARN L873 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| Int)) (and (<= (+ |node_create_~temp~0#1.base| 1) |c_#StackHeapBarrier|) (= (store |c_old(#length)| |node_create_~temp~0#1.base| (select |c_#length| |node_create_~temp~0#1.base|)) |c_#length|))) is different from true [2025-03-17 12:18:38,717 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:18:38,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:38,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-03-17 12:18:38,790 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:18:38,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:38,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-03-17 12:18:38,874 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:18:38,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:38,891 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:38,892 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-17 12:18:38,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [967945951] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:38,892 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-17 12:18:38,892 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [10] total 14 [2025-03-17 12:18:38,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036216619] [2025-03-17 12:18:38,892 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:38,892 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-03-17 12:18:38,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:38,893 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-03-17 12:18:38,893 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=169, Unknown=1, NotChecked=26, Total=240 [2025-03-17 12:18:38,893 INFO L87 Difference]: Start difference. First operand 91 states and 101 transitions. Second operand has 7 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:38,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:38,992 INFO L93 Difference]: Finished difference Result 93 states and 103 transitions. [2025-03-17 12:18:38,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-03-17 12:18:38,992 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 36 [2025-03-17 12:18:38,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:38,993 INFO L225 Difference]: With dead ends: 93 [2025-03-17 12:18:38,993 INFO L226 Difference]: Without dead ends: 93 [2025-03-17 12:18:38,993 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=194, Unknown=1, NotChecked=28, Total=272 [2025-03-17 12:18:38,994 INFO L435 NwaCegarLoop]: 77 mSDtfsCounter, 17 mSDsluCounter, 191 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 268 SdHoareTripleChecker+Invalid, 257 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 120 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:38,994 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 268 Invalid, 257 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 136 Invalid, 0 Unknown, 120 Unchecked, 0.1s Time] [2025-03-17 12:18:38,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2025-03-17 12:18:38,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 89. [2025-03-17 12:18:38,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 56 states have (on average 1.6607142857142858) internal successors, (93), 84 states have internal predecessors, (93), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:38,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 99 transitions. [2025-03-17 12:18:38,997 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 99 transitions. Word has length 36 [2025-03-17 12:18:38,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:38,997 INFO L471 AbstractCegarLoop]: Abstraction has 89 states and 99 transitions. [2025-03-17 12:18:38,997 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:38,998 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 99 transitions. [2025-03-17 12:18:38,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2025-03-17 12:18:38,998 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:38,998 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:39,005 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2025-03-17 12:18:39,198 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:39,199 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr29REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:39,199 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:39,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1284573617, now seen corresponding path program 1 times [2025-03-17 12:18:39,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:39,199 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313741991] [2025-03-17 12:18:39,199 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:39,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:39,210 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-03-17 12:18:39,217 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-03-17 12:18:39,217 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:39,217 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:39,441 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-03-17 12:18:39,441 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:39,441 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313741991] [2025-03-17 12:18:39,441 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1313741991] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:39,441 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1049930952] [2025-03-17 12:18:39,441 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:39,441 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:39,441 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:39,443 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:39,445 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-03-17 12:18:39,531 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-03-17 12:18:39,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-03-17 12:18:39,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:39,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:39,646 INFO L256 TraceCheckSpWp]: Trace formula consists of 359 conjuncts, 37 conjuncts are in the unsatisfiable core [2025-03-17 12:18:39,656 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:39,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:18:39,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2025-03-17 12:18:39,760 WARN L873 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| Int)) (and (= |c_#valid| (store |c_old(#valid)| |node_create_~temp~0#1.base| (select |c_#valid| |node_create_~temp~0#1.base|))) (= 0 (select |c_old(#valid)| |node_create_~temp~0#1.base|)))) is different from true [2025-03-17 12:18:39,796 INFO L349 Elim1Store]: treesize reduction 32, result has 36.0 percent of original size [2025-03-17 12:18:39,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 24 [2025-03-17 12:18:39,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-03-17 12:18:39,808 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 6 not checked. [2025-03-17 12:18:39,808 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:18:39,857 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1049930952] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:39,857 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-03-17 12:18:39,857 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 19 [2025-03-17 12:18:39,857 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1045011522] [2025-03-17 12:18:39,857 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-03-17 12:18:39,858 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2025-03-17 12:18:39,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:39,858 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2025-03-17 12:18:39,858 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=330, Unknown=1, NotChecked=36, Total=420 [2025-03-17 12:18:39,858 INFO L87 Difference]: Start difference. First operand 89 states and 99 transitions. Second operand has 20 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 4 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2025-03-17 12:18:40,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:40,240 INFO L93 Difference]: Finished difference Result 106 states and 119 transitions. [2025-03-17 12:18:40,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-03-17 12:18:40,240 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 4 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 39 [2025-03-17 12:18:40,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:40,241 INFO L225 Difference]: With dead ends: 106 [2025-03-17 12:18:40,241 INFO L226 Difference]: Without dead ends: 106 [2025-03-17 12:18:40,241 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=655, Unknown=1, NotChecked=52, Total=812 [2025-03-17 12:18:40,241 INFO L435 NwaCegarLoop]: 69 mSDtfsCounter, 152 mSDsluCounter, 497 mSDsCounter, 0 mSdLazyCounter, 576 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 152 SdHoareTripleChecker+Valid, 566 SdHoareTripleChecker+Invalid, 693 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 576 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 111 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:40,241 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [152 Valid, 566 Invalid, 693 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 576 Invalid, 0 Unknown, 111 Unchecked, 0.3s Time] [2025-03-17 12:18:40,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2025-03-17 12:18:40,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 91. [2025-03-17 12:18:40,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 58 states have (on average 1.6724137931034482) internal successors, (97), 86 states have internal predecessors, (97), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:40,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 103 transitions. [2025-03-17 12:18:40,248 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 103 transitions. Word has length 39 [2025-03-17 12:18:40,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:40,249 INFO L471 AbstractCegarLoop]: Abstraction has 91 states and 103 transitions. [2025-03-17 12:18:40,249 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 2.6315789473684212) internal successors, (50), 17 states have internal predecessors, (50), 4 states have call successors, (4), 2 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2025-03-17 12:18:40,249 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 103 transitions. [2025-03-17 12:18:40,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2025-03-17 12:18:40,249 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:40,249 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:40,256 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2025-03-17 12:18:40,450 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:40,450 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr30REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:40,451 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:40,451 INFO L85 PathProgramCache]: Analyzing trace with hash 1284573618, now seen corresponding path program 1 times [2025-03-17 12:18:40,451 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:40,451 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446330740] [2025-03-17 12:18:40,451 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:40,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:40,462 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-03-17 12:18:40,474 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-03-17 12:18:40,474 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:40,474 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:40,866 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 19 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-03-17 12:18:40,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:40,866 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446330740] [2025-03-17 12:18:40,866 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1446330740] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:40,866 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [159524967] [2025-03-17 12:18:40,866 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:40,866 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:40,866 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:40,868 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:40,870 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-03-17 12:18:40,938 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-03-17 12:18:41,023 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-03-17 12:18:41,023 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:41,023 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:41,029 INFO L256 TraceCheckSpWp]: Trace formula consists of 359 conjuncts, 67 conjuncts are in the unsatisfiable core [2025-03-17 12:18:41,032 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:41,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:18:41,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:18:41,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2025-03-17 12:18:41,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2025-03-17 12:18:41,226 WARN L873 $PredicateComparison]: unable to prove that (and (exists ((|v_ULTIMATE.start_sll_insert_~head#1.base_BEFORE_CALL_4| Int)) (= (select (select |c_#memory_$Pointer$#1.offset| |v_ULTIMATE.start_sll_insert_~head#1.base_BEFORE_CALL_4|) 0) 0)) (exists ((|node_create_~temp~0#1.base| Int)) (and (= (store |c_old(#length)| |node_create_~temp~0#1.base| (select |c_#length| |node_create_~temp~0#1.base|)) |c_#length|) (= 0 (select |c_old(#valid)| |node_create_~temp~0#1.base|))))) is different from true [2025-03-17 12:18:41,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:18:41,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2025-03-17 12:18:41,271 INFO L349 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2025-03-17 12:18:41,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2025-03-17 12:18:41,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-03-17 12:18:41,319 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 6 not checked. [2025-03-17 12:18:41,319 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:18:41,463 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [159524967] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:41,463 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-03-17 12:18:41,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13] total 22 [2025-03-17 12:18:41,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1741935814] [2025-03-17 12:18:41,464 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-03-17 12:18:41,464 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2025-03-17 12:18:41,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:41,464 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2025-03-17 12:18:41,465 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=578, Unknown=1, NotChecked=48, Total=702 [2025-03-17 12:18:41,465 INFO L87 Difference]: Start difference. First operand 91 states and 103 transitions. Second operand has 23 states, 20 states have (on average 2.6) internal successors, (52), 19 states have internal predecessors, (52), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2025-03-17 12:18:42,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:42,032 INFO L93 Difference]: Finished difference Result 113 states and 124 transitions. [2025-03-17 12:18:42,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-03-17 12:18:42,033 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 20 states have (on average 2.6) internal successors, (52), 19 states have internal predecessors, (52), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 39 [2025-03-17 12:18:42,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:42,033 INFO L225 Difference]: With dead ends: 113 [2025-03-17 12:18:42,033 INFO L226 Difference]: Without dead ends: 113 [2025-03-17 12:18:42,034 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=137, Invalid=1056, Unknown=1, NotChecked=66, Total=1260 [2025-03-17 12:18:42,034 INFO L435 NwaCegarLoop]: 71 mSDtfsCounter, 145 mSDsluCounter, 571 mSDsCounter, 0 mSdLazyCounter, 790 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 642 SdHoareTripleChecker+Invalid, 907 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 790 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 114 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:42,035 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [145 Valid, 642 Invalid, 907 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 790 Invalid, 0 Unknown, 114 Unchecked, 0.4s Time] [2025-03-17 12:18:42,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2025-03-17 12:18:42,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 98. [2025-03-17 12:18:42,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 64 states have (on average 1.59375) internal successors, (102), 92 states have internal predecessors, (102), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:42,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2025-03-17 12:18:42,038 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 108 transitions. Word has length 39 [2025-03-17 12:18:42,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:42,038 INFO L471 AbstractCegarLoop]: Abstraction has 98 states and 108 transitions. [2025-03-17 12:18:42,038 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 20 states have (on average 2.6) internal successors, (52), 19 states have internal predecessors, (52), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2025-03-17 12:18:42,039 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2025-03-17 12:18:42,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2025-03-17 12:18:42,039 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:42,039 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:42,046 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2025-03-17 12:18:42,239 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2025-03-17 12:18:42,240 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:42,240 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:42,240 INFO L85 PathProgramCache]: Analyzing trace with hash 1167077377, now seen corresponding path program 1 times [2025-03-17 12:18:42,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:42,240 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251970171] [2025-03-17 12:18:42,240 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:42,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:42,251 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-03-17 12:18:42,256 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-03-17 12:18:42,256 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:42,256 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:42,280 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:42,281 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:42,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251970171] [2025-03-17 12:18:42,281 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251970171] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:42,281 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:42,281 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 12:18:42,282 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [620740159] [2025-03-17 12:18:42,282 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:42,282 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-03-17 12:18:42,282 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:42,282 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-03-17 12:18:42,282 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:18:42,282 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:42,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:42,292 INFO L93 Difference]: Finished difference Result 99 states and 109 transitions. [2025-03-17 12:18:42,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-03-17 12:18:42,292 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 40 [2025-03-17 12:18:42,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:42,293 INFO L225 Difference]: With dead ends: 99 [2025-03-17 12:18:42,293 INFO L226 Difference]: Without dead ends: 99 [2025-03-17 12:18:42,293 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-03-17 12:18:42,293 INFO L435 NwaCegarLoop]: 91 mSDtfsCounter, 0 mSDsluCounter, 81 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 172 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:42,293 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 172 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:18:42,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2025-03-17 12:18:42,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2025-03-17 12:18:42,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 65 states have (on average 1.5846153846153845) internal successors, (103), 93 states have internal predecessors, (103), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:42,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 109 transitions. [2025-03-17 12:18:42,299 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 109 transitions. Word has length 40 [2025-03-17 12:18:42,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:42,299 INFO L471 AbstractCegarLoop]: Abstraction has 99 states and 109 transitions. [2025-03-17 12:18:42,299 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:42,299 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 109 transitions. [2025-03-17 12:18:42,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2025-03-17 12:18:42,301 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:42,301 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:42,301 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-03-17 12:18:42,301 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:42,302 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:42,302 INFO L85 PathProgramCache]: Analyzing trace with hash 1819661416, now seen corresponding path program 1 times [2025-03-17 12:18:42,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:42,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [848735299] [2025-03-17 12:18:42,302 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:42,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:42,312 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-17 12:18:42,319 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-17 12:18:42,319 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:42,319 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:42,374 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2025-03-17 12:18:42,374 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:42,374 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [848735299] [2025-03-17 12:18:42,374 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [848735299] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:42,374 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:42,374 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 12:18:42,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834810790] [2025-03-17 12:18:42,375 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:42,376 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-17 12:18:42,376 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:42,376 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 12:18:42,376 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:42,377 INFO L87 Difference]: Start difference. First operand 99 states and 109 transitions. Second operand has 6 states, 5 states have (on average 4.6) internal successors, (23), 5 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:42,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:42,457 INFO L93 Difference]: Finished difference Result 98 states and 108 transitions. [2025-03-17 12:18:42,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 12:18:42,458 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.6) internal successors, (23), 5 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 41 [2025-03-17 12:18:42,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:42,460 INFO L225 Difference]: With dead ends: 98 [2025-03-17 12:18:42,460 INFO L226 Difference]: Without dead ends: 98 [2025-03-17 12:18:42,460 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:42,461 INFO L435 NwaCegarLoop]: 78 mSDtfsCounter, 10 mSDsluCounter, 191 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:42,461 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 269 Invalid, 165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:18:42,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2025-03-17 12:18:42,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2025-03-17 12:18:42,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 65 states have (on average 1.5692307692307692) internal successors, (102), 92 states have internal predecessors, (102), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:42,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2025-03-17 12:18:42,466 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 108 transitions. Word has length 41 [2025-03-17 12:18:42,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:42,466 INFO L471 AbstractCegarLoop]: Abstraction has 98 states and 108 transitions. [2025-03-17 12:18:42,466 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.6) internal successors, (23), 5 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:42,466 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2025-03-17 12:18:42,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2025-03-17 12:18:42,466 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:42,466 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:42,466 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-03-17 12:18:42,466 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:42,467 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:42,467 INFO L85 PathProgramCache]: Analyzing trace with hash 1819661417, now seen corresponding path program 1 times [2025-03-17 12:18:42,467 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:42,467 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125764484] [2025-03-17 12:18:42,467 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:42,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:42,480 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-03-17 12:18:42,489 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-03-17 12:18:42,489 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:42,489 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:42,549 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:42,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:42,550 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [125764484] [2025-03-17 12:18:42,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [125764484] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:42,550 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:42,550 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-03-17 12:18:42,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1858507983] [2025-03-17 12:18:42,550 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:42,550 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:18:42,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:42,551 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:18:42,551 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 12:18:42,551 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:42,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:42,566 INFO L93 Difference]: Finished difference Result 101 states and 109 transitions. [2025-03-17 12:18:42,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:18:42,567 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 41 [2025-03-17 12:18:42,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:42,567 INFO L225 Difference]: With dead ends: 101 [2025-03-17 12:18:42,567 INFO L226 Difference]: Without dead ends: 101 [2025-03-17 12:18:42,567 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:18:42,568 INFO L435 NwaCegarLoop]: 86 mSDtfsCounter, 62 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 191 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:42,568 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [62 Valid, 191 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:18:42,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2025-03-17 12:18:42,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 97. [2025-03-17 12:18:42,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 64 states have (on average 1.5625) internal successors, (100), 91 states have internal predecessors, (100), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:42,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 106 transitions. [2025-03-17 12:18:42,573 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 106 transitions. Word has length 41 [2025-03-17 12:18:42,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:42,573 INFO L471 AbstractCegarLoop]: Abstraction has 97 states and 106 transitions. [2025-03-17 12:18:42,573 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:42,573 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 106 transitions. [2025-03-17 12:18:42,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2025-03-17 12:18:42,574 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:42,574 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:42,574 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-03-17 12:18:42,574 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr29REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:42,574 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:42,574 INFO L85 PathProgramCache]: Analyzing trace with hash 574070434, now seen corresponding path program 1 times [2025-03-17 12:18:42,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:42,574 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871699208] [2025-03-17 12:18:42,574 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:42,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:42,584 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-03-17 12:18:42,589 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-03-17 12:18:42,590 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:42,590 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:42,672 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:42,672 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:42,672 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871699208] [2025-03-17 12:18:42,672 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [871699208] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:42,672 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:42,672 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 12:18:42,672 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [365062382] [2025-03-17 12:18:42,672 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:42,673 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-03-17 12:18:42,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:42,673 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-03-17 12:18:42,673 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:18:42,673 INFO L87 Difference]: Start difference. First operand 97 states and 106 transitions. Second operand has 5 states, 5 states have (on average 4.0) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:42,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:42,694 INFO L93 Difference]: Finished difference Result 98 states and 105 transitions. [2025-03-17 12:18:42,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 12:18:42,695 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.0) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 42 [2025-03-17 12:18:42,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:42,695 INFO L225 Difference]: With dead ends: 98 [2025-03-17 12:18:42,696 INFO L226 Difference]: Without dead ends: 98 [2025-03-17 12:18:42,696 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2025-03-17 12:18:42,696 INFO L435 NwaCegarLoop]: 83 mSDtfsCounter, 55 mSDsluCounter, 186 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:42,696 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [55 Valid, 269 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:18:42,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2025-03-17 12:18:42,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 94. [2025-03-17 12:18:42,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 63 states have (on average 1.5238095238095237) internal successors, (96), 88 states have internal predecessors, (96), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:42,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 102 transitions. [2025-03-17 12:18:42,699 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 102 transitions. Word has length 42 [2025-03-17 12:18:42,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:42,699 INFO L471 AbstractCegarLoop]: Abstraction has 94 states and 102 transitions. [2025-03-17 12:18:42,699 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.0) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:42,699 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 102 transitions. [2025-03-17 12:18:42,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2025-03-17 12:18:42,700 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:42,701 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:42,701 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-03-17 12:18:42,701 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:42,701 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:42,701 INFO L85 PathProgramCache]: Analyzing trace with hash 616315184, now seen corresponding path program 1 times [2025-03-17 12:18:42,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:42,701 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [575099081] [2025-03-17 12:18:42,701 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:42,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:42,712 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 43 statements into 1 equivalence classes. [2025-03-17 12:18:42,716 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 43 of 43 statements. [2025-03-17 12:18:42,717 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:42,717 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:42,748 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:42,748 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:42,748 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [575099081] [2025-03-17 12:18:42,748 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [575099081] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:42,749 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:42,749 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 12:18:42,749 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1781252506] [2025-03-17 12:18:42,749 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:42,749 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:18:42,749 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:42,749 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:18:42,749 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 12:18:42,750 INFO L87 Difference]: Start difference. First operand 94 states and 102 transitions. Second operand has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:42,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:42,802 INFO L93 Difference]: Finished difference Result 93 states and 101 transitions. [2025-03-17 12:18:42,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:18:42,803 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 43 [2025-03-17 12:18:42,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:42,803 INFO L225 Difference]: With dead ends: 93 [2025-03-17 12:18:42,803 INFO L226 Difference]: Without dead ends: 93 [2025-03-17 12:18:42,805 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 12:18:42,805 INFO L435 NwaCegarLoop]: 83 mSDtfsCounter, 0 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 177 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:42,805 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 177 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:18:42,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2025-03-17 12:18:42,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2025-03-17 12:18:42,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 63 states have (on average 1.507936507936508) internal successors, (95), 87 states have internal predecessors, (95), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:42,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 101 transitions. [2025-03-17 12:18:42,808 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 101 transitions. Word has length 43 [2025-03-17 12:18:42,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:42,808 INFO L471 AbstractCegarLoop]: Abstraction has 93 states and 101 transitions. [2025-03-17 12:18:42,808 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:42,808 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 101 transitions. [2025-03-17 12:18:42,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2025-03-17 12:18:42,808 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:42,808 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:42,808 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-03-17 12:18:42,809 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr26REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:42,809 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:42,809 INFO L85 PathProgramCache]: Analyzing trace with hash 616315185, now seen corresponding path program 1 times [2025-03-17 12:18:42,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:42,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457957359] [2025-03-17 12:18:42,809 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:42,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:42,822 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 43 statements into 1 equivalence classes. [2025-03-17 12:18:42,827 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 43 of 43 statements. [2025-03-17 12:18:42,831 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:42,831 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:43,023 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 11 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-17 12:18:43,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:43,023 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457957359] [2025-03-17 12:18:43,024 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [457957359] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:43,024 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [70724689] [2025-03-17 12:18:43,024 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:43,024 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:43,024 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:43,026 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:43,027 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-03-17 12:18:43,110 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 43 statements into 1 equivalence classes. [2025-03-17 12:18:43,171 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 43 of 43 statements. [2025-03-17 12:18:43,171 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:43,171 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:43,172 INFO L256 TraceCheckSpWp]: Trace formula consists of 375 conjuncts, 31 conjuncts are in the unsatisfiable core [2025-03-17 12:18:43,174 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:43,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2025-03-17 12:18:43,216 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:43,216 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-17 12:18:43,216 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [70724689] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:43,216 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-17 12:18:43,216 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [11] total 13 [2025-03-17 12:18:43,216 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263173831] [2025-03-17 12:18:43,216 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:43,216 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:18:43,217 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:43,217 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:18:43,217 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=155, Unknown=0, NotChecked=0, Total=182 [2025-03-17 12:18:43,217 INFO L87 Difference]: Start difference. First operand 93 states and 101 transitions. Second operand has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:43,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:43,258 INFO L93 Difference]: Finished difference Result 92 states and 100 transitions. [2025-03-17 12:18:43,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-03-17 12:18:43,258 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 43 [2025-03-17 12:18:43,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:43,259 INFO L225 Difference]: With dead ends: 92 [2025-03-17 12:18:43,259 INFO L226 Difference]: Without dead ends: 92 [2025-03-17 12:18:43,259 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=155, Unknown=0, NotChecked=0, Total=182 [2025-03-17 12:18:43,260 INFO L435 NwaCegarLoop]: 83 mSDtfsCounter, 0 mSDsluCounter, 126 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 209 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:43,260 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 209 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:18:43,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2025-03-17 12:18:43,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2025-03-17 12:18:43,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 63 states have (on average 1.492063492063492) internal successors, (94), 86 states have internal predecessors, (94), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:43,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 100 transitions. [2025-03-17 12:18:43,264 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 100 transitions. Word has length 43 [2025-03-17 12:18:43,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:43,264 INFO L471 AbstractCegarLoop]: Abstraction has 92 states and 100 transitions. [2025-03-17 12:18:43,264 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.0) internal successors, (21), 4 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:43,264 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 100 transitions. [2025-03-17 12:18:43,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2025-03-17 12:18:43,265 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:43,265 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:43,275 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-03-17 12:18:43,466 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2025-03-17 12:18:43,466 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:43,466 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:43,466 INFO L85 PathProgramCache]: Analyzing trace with hash 1925901564, now seen corresponding path program 1 times [2025-03-17 12:18:43,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:43,466 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113758332] [2025-03-17 12:18:43,466 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:43,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:43,479 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-03-17 12:18:43,485 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-03-17 12:18:43,485 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:43,485 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:43,591 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2025-03-17 12:18:43,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:43,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113758332] [2025-03-17 12:18:43,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [113758332] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:43,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:43,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 12:18:43,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924056818] [2025-03-17 12:18:43,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:43,592 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-17 12:18:43,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:43,592 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 12:18:43,592 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:43,592 INFO L87 Difference]: Start difference. First operand 92 states and 100 transitions. Second operand has 6 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:43,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:43,665 INFO L93 Difference]: Finished difference Result 91 states and 99 transitions. [2025-03-17 12:18:43,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 12:18:43,666 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 44 [2025-03-17 12:18:43,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:43,666 INFO L225 Difference]: With dead ends: 91 [2025-03-17 12:18:43,666 INFO L226 Difference]: Without dead ends: 91 [2025-03-17 12:18:43,666 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:43,666 INFO L435 NwaCegarLoop]: 76 mSDtfsCounter, 2 mSDsluCounter, 201 mSDsCounter, 0 mSdLazyCounter, 135 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 277 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 135 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:43,667 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 277 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 135 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:18:43,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2025-03-17 12:18:43,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2025-03-17 12:18:43,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 63 states have (on average 1.4761904761904763) internal successors, (93), 85 states have internal predecessors, (93), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:43,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 99 transitions. [2025-03-17 12:18:43,668 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 99 transitions. Word has length 44 [2025-03-17 12:18:43,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:43,669 INFO L471 AbstractCegarLoop]: Abstraction has 91 states and 99 transitions. [2025-03-17 12:18:43,669 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2025-03-17 12:18:43,669 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 99 transitions. [2025-03-17 12:18:43,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-03-17 12:18:43,669 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:43,669 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:43,669 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-03-17 12:18:43,669 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:43,670 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:43,670 INFO L85 PathProgramCache]: Analyzing trace with hash -339501192, now seen corresponding path program 1 times [2025-03-17 12:18:43,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:43,670 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876960020] [2025-03-17 12:18:43,670 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:43,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:43,684 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-03-17 12:18:43,689 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-03-17 12:18:43,690 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:43,690 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:43,731 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2025-03-17 12:18:43,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:43,732 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876960020] [2025-03-17 12:18:43,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1876960020] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:43,732 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:43,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-03-17 12:18:43,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1520454570] [2025-03-17 12:18:43,732 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:43,733 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-03-17 12:18:43,733 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:43,734 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-03-17 12:18:43,734 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-03-17 12:18:43,734 INFO L87 Difference]: Start difference. First operand 91 states and 99 transitions. Second operand has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:43,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:43,804 INFO L93 Difference]: Finished difference Result 102 states and 111 transitions. [2025-03-17 12:18:43,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-03-17 12:18:43,804 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 46 [2025-03-17 12:18:43,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:43,805 INFO L225 Difference]: With dead ends: 102 [2025-03-17 12:18:43,805 INFO L226 Difference]: Without dead ends: 102 [2025-03-17 12:18:43,805 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-03-17 12:18:43,805 INFO L435 NwaCegarLoop]: 58 mSDtfsCounter, 63 mSDsluCounter, 61 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:43,805 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 119 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-03-17 12:18:43,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2025-03-17 12:18:43,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 89. [2025-03-17 12:18:43,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 63 states have (on average 1.4444444444444444) internal successors, (91), 83 states have internal predecessors, (91), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:43,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 97 transitions. [2025-03-17 12:18:43,807 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 97 transitions. Word has length 46 [2025-03-17 12:18:43,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:43,808 INFO L471 AbstractCegarLoop]: Abstraction has 89 states and 97 transitions. [2025-03-17 12:18:43,808 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:43,808 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 97 transitions. [2025-03-17 12:18:43,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-03-17 12:18:43,808 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:43,808 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:43,808 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-03-17 12:18:43,809 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:43,809 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:43,809 INFO L85 PathProgramCache]: Analyzing trace with hash -339501191, now seen corresponding path program 1 times [2025-03-17 12:18:43,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:43,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1942298019] [2025-03-17 12:18:43,809 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:43,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:43,821 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-03-17 12:18:43,827 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-03-17 12:18:43,829 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:43,829 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:43,927 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2025-03-17 12:18:43,927 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:43,927 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1942298019] [2025-03-17 12:18:43,927 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1942298019] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:43,927 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:43,928 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-03-17 12:18:43,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781885821] [2025-03-17 12:18:43,928 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:43,928 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-03-17 12:18:43,928 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:43,928 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-03-17 12:18:43,928 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2025-03-17 12:18:43,929 INFO L87 Difference]: Start difference. First operand 89 states and 97 transitions. Second operand has 6 states, 4 states have (on average 6.0) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:43,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:43,978 INFO L93 Difference]: Finished difference Result 89 states and 97 transitions. [2025-03-17 12:18:43,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-03-17 12:18:43,979 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 4 states have (on average 6.0) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 46 [2025-03-17 12:18:43,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:43,979 INFO L225 Difference]: With dead ends: 89 [2025-03-17 12:18:43,979 INFO L226 Difference]: Without dead ends: 89 [2025-03-17 12:18:43,980 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2025-03-17 12:18:43,980 INFO L435 NwaCegarLoop]: 62 mSDtfsCounter, 62 mSDsluCounter, 83 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:43,980 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 145 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-03-17 12:18:43,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2025-03-17 12:18:43,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 87. [2025-03-17 12:18:43,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 63 states have (on average 1.4126984126984128) internal successors, (89), 81 states have internal predecessors, (89), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:43,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 95 transitions. [2025-03-17 12:18:43,982 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 95 transitions. Word has length 46 [2025-03-17 12:18:43,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:43,982 INFO L471 AbstractCegarLoop]: Abstraction has 87 states and 95 transitions. [2025-03-17 12:18:43,982 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 4 states have (on average 6.0) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:43,983 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 95 transitions. [2025-03-17 12:18:43,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-17 12:18:43,983 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:43,983 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:43,986 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-03-17 12:18:43,987 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:43,987 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:43,987 INFO L85 PathProgramCache]: Analyzing trace with hash 568008875, now seen corresponding path program 1 times [2025-03-17 12:18:43,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:43,987 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92134234] [2025-03-17 12:18:43,987 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:43,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:43,998 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-17 12:18:44,004 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-17 12:18:44,004 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:44,004 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:44,120 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:44,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:44,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92134234] [2025-03-17 12:18:44,120 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [92134234] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:44,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [723796434] [2025-03-17 12:18:44,120 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:44,120 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:44,121 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:44,123 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:44,124 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-03-17 12:18:44,234 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-17 12:18:44,270 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-17 12:18:44,270 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:44,270 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:44,272 INFO L256 TraceCheckSpWp]: Trace formula consists of 424 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-03-17 12:18:44,275 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:44,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2025-03-17 12:18:44,322 WARN L873 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| Int)) (and (= |c_#valid| (store |c_old(#valid)| |node_create_~temp~0#1.base| (select |c_#valid| |node_create_~temp~0#1.base|))) (= 0 (select |c_old(#valid)| |node_create_~temp~0#1.base|)))) is different from true [2025-03-17 12:18:44,353 INFO L349 Elim1Store]: treesize reduction 32, result has 36.0 percent of original size [2025-03-17 12:18:44,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 24 [2025-03-17 12:18:44,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-03-17 12:18:44,375 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-03-17 12:18:44,375 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-17 12:18:44,375 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [723796434] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:44,375 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-17 12:18:44,375 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [7] total 11 [2025-03-17 12:18:44,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [527955257] [2025-03-17 12:18:44,375 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:44,375 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2025-03-17 12:18:44,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:44,376 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-03-17 12:18:44,376 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=92, Unknown=1, NotChecked=18, Total=132 [2025-03-17 12:18:44,376 INFO L87 Difference]: Start difference. First operand 87 states and 95 transitions. Second operand has 9 states, 8 states have (on average 4.375) internal successors, (35), 8 states have internal predecessors, (35), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:44,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:44,512 INFO L93 Difference]: Finished difference Result 128 states and 142 transitions. [2025-03-17 12:18:44,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-03-17 12:18:44,512 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 8 states have (on average 4.375) internal successors, (35), 8 states have internal predecessors, (35), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 49 [2025-03-17 12:18:44,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:44,513 INFO L225 Difference]: With dead ends: 128 [2025-03-17 12:18:44,513 INFO L226 Difference]: Without dead ends: 128 [2025-03-17 12:18:44,513 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=130, Unknown=1, NotChecked=22, Total=182 [2025-03-17 12:18:44,513 INFO L435 NwaCegarLoop]: 53 mSDtfsCounter, 63 mSDsluCounter, 207 mSDsCounter, 0 mSdLazyCounter, 252 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 260 SdHoareTripleChecker+Invalid, 441 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 252 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 177 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:44,514 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 260 Invalid, 441 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 252 Invalid, 0 Unknown, 177 Unchecked, 0.1s Time] [2025-03-17 12:18:44,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2025-03-17 12:18:44,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 91. [2025-03-17 12:18:44,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 85 states have internal predecessors, (96), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:44,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 102 transitions. [2025-03-17 12:18:44,517 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 102 transitions. Word has length 49 [2025-03-17 12:18:44,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:44,517 INFO L471 AbstractCegarLoop]: Abstraction has 91 states and 102 transitions. [2025-03-17 12:18:44,518 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 4.375) internal successors, (35), 8 states have internal predecessors, (35), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:44,518 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 102 transitions. [2025-03-17 12:18:44,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-17 12:18:44,518 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:44,518 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:44,525 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-03-17 12:18:44,719 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:44,719 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:44,719 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:44,719 INFO L85 PathProgramCache]: Analyzing trace with hash 568008876, now seen corresponding path program 1 times [2025-03-17 12:18:44,719 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:44,719 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060581660] [2025-03-17 12:18:44,719 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:44,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:44,734 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-17 12:18:44,742 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-17 12:18:44,742 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:44,742 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:45,069 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 11 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-17 12:18:45,070 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:45,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060581660] [2025-03-17 12:18:45,070 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2060581660] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:45,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [405980760] [2025-03-17 12:18:45,070 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:45,070 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:45,070 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:45,072 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:45,074 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-03-17 12:18:45,177 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-17 12:18:45,215 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-17 12:18:45,215 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:45,215 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:45,217 INFO L256 TraceCheckSpWp]: Trace formula consists of 424 conjuncts, 43 conjuncts are in the unsatisfiable core [2025-03-17 12:18:45,220 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:45,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-03-17 12:18:45,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2025-03-17 12:18:45,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2025-03-17 12:18:45,441 WARN L873 $PredicateComparison]: unable to prove that (and (exists ((|node_create_~temp~0#1.base| Int)) (and (= (store |c_old(#length)| |node_create_~temp~0#1.base| (select |c_#length| |node_create_~temp~0#1.base|)) |c_#length|) (= 0 (select |c_old(#valid)| |node_create_~temp~0#1.base|)))) (exists ((|v_ULTIMATE.start_main_~#s~0#1.offset_BEFORE_CALL_8| Int) (|v_ULTIMATE.start_main_~#s~0#1.base_BEFORE_CALL_6| Int)) (let ((.cse0 (select (select |c_#memory_$Pointer$#1.offset| |v_ULTIMATE.start_main_~#s~0#1.base_BEFORE_CALL_6|) |v_ULTIMATE.start_main_~#s~0#1.offset_BEFORE_CALL_8|))) (and (<= .cse0 0) (<= 0 (+ .cse0 4)))))) is different from true [2025-03-17 12:18:45,490 INFO L349 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2025-03-17 12:18:45,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2025-03-17 12:18:45,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2025-03-17 12:18:45,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-03-17 12:18:45,656 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:18:45,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 32 [2025-03-17 12:18:45,733 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 6 not checked. [2025-03-17 12:18:45,734 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:18:45,943 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [405980760] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:45,943 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-03-17 12:18:45,943 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13] total 26 [2025-03-17 12:18:45,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809890941] [2025-03-17 12:18:45,944 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-03-17 12:18:45,944 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2025-03-17 12:18:45,944 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:45,944 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-03-17 12:18:45,944 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=800, Unknown=1, NotChecked=56, Total=930 [2025-03-17 12:18:45,945 INFO L87 Difference]: Start difference. First operand 91 states and 102 transitions. Second operand has 27 states, 25 states have (on average 2.68) internal successors, (67), 24 states have internal predecessors, (67), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (5), 5 states have call predecessors, (5), 3 states have call successors, (5) [2025-03-17 12:18:46,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:46,816 INFO L93 Difference]: Finished difference Result 128 states and 142 transitions. [2025-03-17 12:18:46,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-03-17 12:18:46,816 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 25 states have (on average 2.68) internal successors, (67), 24 states have internal predecessors, (67), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (5), 5 states have call predecessors, (5), 3 states have call successors, (5) Word has length 49 [2025-03-17 12:18:46,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:46,817 INFO L225 Difference]: With dead ends: 128 [2025-03-17 12:18:46,817 INFO L226 Difference]: Without dead ends: 128 [2025-03-17 12:18:46,818 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=194, Invalid=1971, Unknown=1, NotChecked=90, Total=2256 [2025-03-17 12:18:46,818 INFO L435 NwaCegarLoop]: 51 mSDtfsCounter, 133 mSDsluCounter, 907 mSDsCounter, 0 mSdLazyCounter, 1134 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 134 SdHoareTripleChecker+Valid, 958 SdHoareTripleChecker+Invalid, 1273 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 132 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:46,818 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [134 Valid, 958 Invalid, 1273 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1134 Invalid, 0 Unknown, 132 Unchecked, 0.5s Time] [2025-03-17 12:18:46,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2025-03-17 12:18:46,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 95. [2025-03-17 12:18:46,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 74 states have (on average 1.337837837837838) internal successors, (99), 89 states have internal predecessors, (99), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:46,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 105 transitions. [2025-03-17 12:18:46,821 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 105 transitions. Word has length 49 [2025-03-17 12:18:46,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:46,822 INFO L471 AbstractCegarLoop]: Abstraction has 95 states and 105 transitions. [2025-03-17 12:18:46,822 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 25 states have (on average 2.68) internal successors, (67), 24 states have internal predecessors, (67), 3 states have call successors, (3), 2 states have call predecessors, (3), 4 states have return successors, (5), 5 states have call predecessors, (5), 3 states have call successors, (5) [2025-03-17 12:18:46,822 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 105 transitions. [2025-03-17 12:18:46,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-17 12:18:46,822 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:46,822 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:46,833 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-03-17 12:18:47,027 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2025-03-17 12:18:47,027 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:47,028 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:47,028 INFO L85 PathProgramCache]: Analyzing trace with hash 678362957, now seen corresponding path program 1 times [2025-03-17 12:18:47,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:47,028 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190529954] [2025-03-17 12:18:47,028 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:47,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:47,040 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-17 12:18:47,046 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-17 12:18:47,046 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:47,046 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:47,194 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2025-03-17 12:18:47,194 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:47,194 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1190529954] [2025-03-17 12:18:47,194 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1190529954] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:47,194 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-03-17 12:18:47,194 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-03-17 12:18:47,194 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1085328657] [2025-03-17 12:18:47,194 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:47,195 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-03-17 12:18:47,195 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:47,195 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-03-17 12:18:47,195 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-03-17 12:18:47,195 INFO L87 Difference]: Start difference. First operand 95 states and 105 transitions. Second operand has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:47,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:47,391 INFO L93 Difference]: Finished difference Result 135 states and 151 transitions. [2025-03-17 12:18:47,391 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-03-17 12:18:47,391 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 49 [2025-03-17 12:18:47,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:47,392 INFO L225 Difference]: With dead ends: 135 [2025-03-17 12:18:47,392 INFO L226 Difference]: Without dead ends: 135 [2025-03-17 12:18:47,392 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2025-03-17 12:18:47,393 INFO L435 NwaCegarLoop]: 79 mSDtfsCounter, 56 mSDsluCounter, 431 mSDsCounter, 0 mSdLazyCounter, 427 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 510 SdHoareTripleChecker+Invalid, 432 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 427 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:47,393 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 510 Invalid, 432 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 427 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-17 12:18:47,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2025-03-17 12:18:47,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 98. [2025-03-17 12:18:47,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 92 states have internal predecessors, (105), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:47,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 111 transitions. [2025-03-17 12:18:47,398 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 111 transitions. Word has length 49 [2025-03-17 12:18:47,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:47,398 INFO L471 AbstractCegarLoop]: Abstraction has 98 states and 111 transitions. [2025-03-17 12:18:47,398 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:47,398 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 111 transitions. [2025-03-17 12:18:47,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-03-17 12:18:47,399 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:47,399 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:47,399 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-03-17 12:18:47,399 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:47,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:47,399 INFO L85 PathProgramCache]: Analyzing trace with hash 678362958, now seen corresponding path program 1 times [2025-03-17 12:18:47,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:47,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921236543] [2025-03-17 12:18:47,399 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:47,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:47,411 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-17 12:18:47,417 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-17 12:18:47,417 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:47,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:47,579 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 11 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-17 12:18:47,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:47,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921236543] [2025-03-17 12:18:47,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1921236543] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:47,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1073140158] [2025-03-17 12:18:47,580 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:47,581 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:47,581 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:47,582 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:47,584 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-03-17 12:18:47,686 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-03-17 12:18:47,722 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-03-17 12:18:47,722 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:47,722 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:47,724 INFO L256 TraceCheckSpWp]: Trace formula consists of 427 conjuncts, 45 conjuncts are in the unsatisfiable core [2025-03-17 12:18:47,736 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:47,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-03-17 12:18:47,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-03-17 12:18:47,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:18:47,991 INFO L173 IndexEqualityManager]: detected equality via solver [2025-03-17 12:18:47,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 12:18:47,995 INFO L173 IndexEqualityManager]: detected equality via solver [2025-03-17 12:18:47,996 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:18:47,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 12 [2025-03-17 12:18:48,034 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2025-03-17 12:18:48,034 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-03-17 12:18:48,034 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1073140158] provided 1 perfect and 0 imperfect interpolant sequences [2025-03-17 12:18:48,034 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-03-17 12:18:48,034 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [11] total 21 [2025-03-17 12:18:48,034 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [678480291] [2025-03-17 12:18:48,034 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-03-17 12:18:48,034 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2025-03-17 12:18:48,034 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:48,035 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2025-03-17 12:18:48,035 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=372, Unknown=0, NotChecked=0, Total=420 [2025-03-17 12:18:48,035 INFO L87 Difference]: Start difference. First operand 98 states and 111 transitions. Second operand has 12 states, 10 states have (on average 3.3) internal successors, (33), 11 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:48,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:48,241 INFO L93 Difference]: Finished difference Result 135 states and 151 transitions. [2025-03-17 12:18:48,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-03-17 12:18:48,241 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 10 states have (on average 3.3) internal successors, (33), 11 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 49 [2025-03-17 12:18:48,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:48,242 INFO L225 Difference]: With dead ends: 135 [2025-03-17 12:18:48,242 INFO L226 Difference]: Without dead ends: 135 [2025-03-17 12:18:48,242 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=448, Unknown=0, NotChecked=0, Total=506 [2025-03-17 12:18:48,242 INFO L435 NwaCegarLoop]: 86 mSDtfsCounter, 99 mSDsluCounter, 390 mSDsCounter, 0 mSdLazyCounter, 324 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 476 SdHoareTripleChecker+Invalid, 327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 324 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:48,242 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [99 Valid, 476 Invalid, 327 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 324 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-03-17 12:18:48,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2025-03-17 12:18:48,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 91. [2025-03-17 12:18:48,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 70 states have (on average 1.3571428571428572) internal successors, (95), 85 states have internal predecessors, (95), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:48,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 101 transitions. [2025-03-17 12:18:48,244 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 101 transitions. Word has length 49 [2025-03-17 12:18:48,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:48,244 INFO L471 AbstractCegarLoop]: Abstraction has 91 states and 101 transitions. [2025-03-17 12:18:48,244 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 10 states have (on average 3.3) internal successors, (33), 11 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2025-03-17 12:18:48,244 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 101 transitions. [2025-03-17 12:18:48,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2025-03-17 12:18:48,245 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:48,245 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:48,251 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-03-17 12:18:48,449 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:48,449 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:48,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:48,449 INFO L85 PathProgramCache]: Analyzing trace with hash -1983323341, now seen corresponding path program 1 times [2025-03-17 12:18:48,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:48,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374924755] [2025-03-17 12:18:48,449 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:48,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:48,463 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 53 statements into 1 equivalence classes. [2025-03-17 12:18:48,469 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 53 of 53 statements. [2025-03-17 12:18:48,469 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:48,469 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:48,764 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 11 proven. 7 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-03-17 12:18:48,765 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:48,765 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374924755] [2025-03-17 12:18:48,765 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [374924755] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:48,765 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1262353541] [2025-03-17 12:18:48,765 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:48,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:48,765 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:48,767 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:48,768 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-03-17 12:18:48,877 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 53 statements into 1 equivalence classes. [2025-03-17 12:18:48,909 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 53 of 53 statements. [2025-03-17 12:18:48,909 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:48,909 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:48,910 INFO L256 TraceCheckSpWp]: Trace formula consists of 432 conjuncts, 23 conjuncts are in the unsatisfiable core [2025-03-17 12:18:48,912 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:48,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:48,939 WARN L873 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| Int)) (and (= |c_#valid| (store |c_old(#valid)| |node_create_~temp~0#1.base| (select |c_#valid| |node_create_~temp~0#1.base|))) (not (= |node_create_~temp~0#1.base| 0)))) is different from true [2025-03-17 12:18:48,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:48,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:49,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 9 [2025-03-17 12:18:49,112 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:49,112 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:18:49,315 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1262353541] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:49,315 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-03-17 12:18:49,315 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 8] total 22 [2025-03-17 12:18:49,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110373995] [2025-03-17 12:18:49,315 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-03-17 12:18:49,315 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2025-03-17 12:18:49,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:49,316 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-03-17 12:18:49,316 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=582, Unknown=1, NotChecked=48, Total=702 [2025-03-17 12:18:49,316 INFO L87 Difference]: Start difference. First operand 91 states and 101 transitions. Second operand has 22 states, 22 states have (on average 3.0454545454545454) internal successors, (67), 20 states have internal predecessors, (67), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) [2025-03-17 12:18:49,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:49,833 INFO L93 Difference]: Finished difference Result 100 states and 105 transitions. [2025-03-17 12:18:49,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-03-17 12:18:49,833 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 3.0454545454545454) internal successors, (67), 20 states have internal predecessors, (67), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) Word has length 53 [2025-03-17 12:18:49,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:49,834 INFO L225 Difference]: With dead ends: 100 [2025-03-17 12:18:49,834 INFO L226 Difference]: Without dead ends: 100 [2025-03-17 12:18:49,834 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 278 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=261, Invalid=1722, Unknown=1, NotChecked=86, Total=2070 [2025-03-17 12:18:49,835 INFO L435 NwaCegarLoop]: 34 mSDtfsCounter, 192 mSDsluCounter, 503 mSDsCounter, 0 mSdLazyCounter, 738 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 192 SdHoareTripleChecker+Valid, 537 SdHoareTripleChecker+Invalid, 838 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 738 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 86 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:49,835 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [192 Valid, 537 Invalid, 838 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 738 Invalid, 0 Unknown, 86 Unchecked, 0.3s Time] [2025-03-17 12:18:49,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2025-03-17 12:18:49,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 87. [2025-03-17 12:18:49,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 66 states have (on average 1.3333333333333333) internal successors, (88), 81 states have internal predecessors, (88), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:49,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 94 transitions. [2025-03-17 12:18:49,839 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 94 transitions. Word has length 53 [2025-03-17 12:18:49,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:49,839 INFO L471 AbstractCegarLoop]: Abstraction has 87 states and 94 transitions. [2025-03-17 12:18:49,839 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 3.0454545454545454) internal successors, (67), 20 states have internal predecessors, (67), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) [2025-03-17 12:18:49,839 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 94 transitions. [2025-03-17 12:18:49,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2025-03-17 12:18:49,840 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:49,840 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:49,847 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2025-03-17 12:18:50,040 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2025-03-17 12:18:50,041 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:50,041 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:50,042 INFO L85 PathProgramCache]: Analyzing trace with hash -1883889999, now seen corresponding path program 1 times [2025-03-17 12:18:50,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:50,042 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006519572] [2025-03-17 12:18:50,042 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:50,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:50,053 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-03-17 12:18:50,067 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-03-17 12:18:50,068 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:50,068 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:50,780 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 19 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-03-17 12:18:50,780 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:50,780 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1006519572] [2025-03-17 12:18:50,780 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1006519572] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:50,780 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [131855158] [2025-03-17 12:18:50,781 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:50,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:50,781 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:50,782 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:50,784 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-03-17 12:18:50,900 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-03-17 12:18:50,934 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-03-17 12:18:50,934 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:50,934 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:50,936 INFO L256 TraceCheckSpWp]: Trace formula consists of 452 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-03-17 12:18:50,937 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:51,073 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:51,073 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:18:51,219 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-03-17 12:18:51,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [131855158] provided 0 perfect and 2 imperfect interpolant sequences [2025-03-17 12:18:51,219 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-03-17 12:18:51,219 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 8, 8] total 37 [2025-03-17 12:18:51,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817832639] [2025-03-17 12:18:51,219 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-03-17 12:18:51,220 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2025-03-17 12:18:51,220 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:18:51,220 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2025-03-17 12:18:51,220 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=1235, Unknown=0, NotChecked=0, Total=1332 [2025-03-17 12:18:51,221 INFO L87 Difference]: Start difference. First operand 87 states and 94 transitions. Second operand has 37 states, 36 states have (on average 2.3055555555555554) internal successors, (83), 34 states have internal predecessors, (83), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) [2025-03-17 12:18:52,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:18:52,035 INFO L93 Difference]: Finished difference Result 88 states and 92 transitions. [2025-03-17 12:18:52,035 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-03-17 12:18:52,035 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 2.3055555555555554) internal successors, (83), 34 states have internal predecessors, (83), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) Word has length 54 [2025-03-17 12:18:52,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:18:52,036 INFO L225 Difference]: With dead ends: 88 [2025-03-17 12:18:52,036 INFO L226 Difference]: Without dead ends: 88 [2025-03-17 12:18:52,037 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=286, Invalid=3020, Unknown=0, NotChecked=0, Total=3306 [2025-03-17 12:18:52,037 INFO L435 NwaCegarLoop]: 41 mSDtfsCounter, 89 mSDsluCounter, 873 mSDsCounter, 0 mSdLazyCounter, 1268 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 89 SdHoareTripleChecker+Valid, 914 SdHoareTripleChecker+Invalid, 1275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1268 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-03-17 12:18:52,037 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [89 Valid, 914 Invalid, 1275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1268 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-03-17 12:18:52,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2025-03-17 12:18:52,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 80. [2025-03-17 12:18:52,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 63 states have (on average 1.2698412698412698) internal successors, (80), 74 states have internal predecessors, (80), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:18:52,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 86 transitions. [2025-03-17 12:18:52,039 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 86 transitions. Word has length 54 [2025-03-17 12:18:52,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:18:52,039 INFO L471 AbstractCegarLoop]: Abstraction has 80 states and 86 transitions. [2025-03-17 12:18:52,039 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 36 states have (on average 2.3055555555555554) internal successors, (83), 34 states have internal predecessors, (83), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) [2025-03-17 12:18:52,039 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 86 transitions. [2025-03-17 12:18:52,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2025-03-17 12:18:52,040 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:18:52,040 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:18:52,047 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2025-03-17 12:18:52,240 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2025-03-17 12:18:52,240 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:18:52,241 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:18:52,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1883889979, now seen corresponding path program 1 times [2025-03-17 12:18:52,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:18:52,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244144548] [2025-03-17 12:18:52,241 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:52,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:18:52,252 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-03-17 12:18:52,262 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-03-17 12:18:52,262 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:52,262 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:53,350 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 21 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-03-17 12:18:53,350 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:18:53,350 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244144548] [2025-03-17 12:18:53,350 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [244144548] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:18:53,350 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2069118098] [2025-03-17 12:18:53,350 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:18:53,351 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:18:53,351 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:18:53,352 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:18:53,361 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-03-17 12:18:53,481 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-03-17 12:18:53,525 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-03-17 12:18:53,525 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:18:53,525 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:18:53,527 INFO L256 TraceCheckSpWp]: Trace formula consists of 451 conjuncts, 118 conjuncts are in the unsatisfiable core [2025-03-17 12:18:53,530 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:18:53,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-03-17 12:18:53,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:18:53,804 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2025-03-17 12:18:53,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 13 [2025-03-17 12:18:53,819 INFO L349 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2025-03-17 12:18:53,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2025-03-17 12:18:53,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-03-17 12:18:53,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2025-03-17 12:18:54,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 19 [2025-03-17 12:18:54,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 3 [2025-03-17 12:18:54,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 12:18:54,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-03-17 12:18:54,271 INFO L349 Elim1Store]: treesize reduction 21, result has 44.7 percent of original size [2025-03-17 12:18:54,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 29 [2025-03-17 12:18:54,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2025-03-17 12:18:54,282 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-03-17 12:18:54,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 52 [2025-03-17 12:18:54,293 INFO L349 Elim1Store]: treesize reduction 8, result has 77.1 percent of original size [2025-03-17 12:18:54,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 36 [2025-03-17 12:18:54,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2025-03-17 12:18:54,498 INFO L349 Elim1Store]: treesize reduction 35, result has 48.5 percent of original size [2025-03-17 12:18:54,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 60 [2025-03-17 12:18:54,508 INFO L349 Elim1Store]: treesize reduction 51, result has 25.0 percent of original size [2025-03-17 12:18:54,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 30 [2025-03-17 12:18:54,628 INFO L349 Elim1Store]: treesize reduction 25, result has 26.5 percent of original size [2025-03-17 12:18:54,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 123 treesize of output 107 [2025-03-17 12:18:54,644 INFO L349 Elim1Store]: treesize reduction 25, result has 26.5 percent of original size [2025-03-17 12:18:54,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 138 treesize of output 140 [2025-03-17 12:18:54,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2025-03-17 12:18:54,702 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2025-03-17 12:18:54,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2025-03-17 12:18:54,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 315 treesize of output 239 [2025-03-17 12:18:54,970 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 243 treesize of output 195 [2025-03-17 12:18:55,309 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:18:55,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 192 treesize of output 120 [2025-03-17 12:18:55,327 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:18:55,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 114 treesize of output 132 [2025-03-17 12:18:56,708 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-03-17 12:18:56,709 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:19:00,262 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2069118098] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:19:00,263 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-03-17 12:19:00,263 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 27] total 56 [2025-03-17 12:19:00,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30599249] [2025-03-17 12:19:00,263 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-03-17 12:19:00,263 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2025-03-17 12:19:00,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:19:00,263 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2025-03-17 12:19:00,264 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=4154, Unknown=78, NotChecked=0, Total=4422 [2025-03-17 12:19:00,264 INFO L87 Difference]: Start difference. First operand 80 states and 86 transitions. Second operand has 57 states, 54 states have (on average 1.7037037037037037) internal successors, (92), 48 states have internal predecessors, (92), 5 states have call successors, (5), 4 states have call predecessors, (5), 6 states have return successors, (6), 6 states have call predecessors, (6), 5 states have call successors, (6) [2025-03-17 12:19:03,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:19:03,590 INFO L93 Difference]: Finished difference Result 89 states and 94 transitions. [2025-03-17 12:19:03,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2025-03-17 12:19:03,590 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 54 states have (on average 1.7037037037037037) internal successors, (92), 48 states have internal predecessors, (92), 5 states have call successors, (5), 4 states have call predecessors, (5), 6 states have return successors, (6), 6 states have call predecessors, (6), 5 states have call successors, (6) Word has length 54 [2025-03-17 12:19:03,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:19:03,591 INFO L225 Difference]: With dead ends: 89 [2025-03-17 12:19:03,591 INFO L226 Difference]: Without dead ends: 89 [2025-03-17 12:19:03,592 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1860 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=486, Invalid=8556, Unknown=78, NotChecked=0, Total=9120 [2025-03-17 12:19:03,593 INFO L435 NwaCegarLoop]: 45 mSDtfsCounter, 123 mSDsluCounter, 1368 mSDsCounter, 0 mSdLazyCounter, 1862 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 123 SdHoareTripleChecker+Valid, 1413 SdHoareTripleChecker+Invalid, 1875 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 1862 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-03-17 12:19:03,593 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [123 Valid, 1413 Invalid, 1875 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 1862 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-03-17 12:19:03,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2025-03-17 12:19:03,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 78. [2025-03-17 12:19:03,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 63 states have (on average 1.2380952380952381) internal successors, (78), 72 states have internal predecessors, (78), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:19:03,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 84 transitions. [2025-03-17 12:19:03,595 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 84 transitions. Word has length 54 [2025-03-17 12:19:03,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:19:03,595 INFO L471 AbstractCegarLoop]: Abstraction has 78 states and 84 transitions. [2025-03-17 12:19:03,595 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 54 states have (on average 1.7037037037037037) internal successors, (92), 48 states have internal predecessors, (92), 5 states have call successors, (5), 4 states have call predecessors, (5), 6 states have return successors, (6), 6 states have call predecessors, (6), 5 states have call successors, (6) [2025-03-17 12:19:03,595 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 84 transitions. [2025-03-17 12:19:03,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2025-03-17 12:19:03,595 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:19:03,595 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:19:03,603 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-03-17 12:19:03,796 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2025-03-17 12:19:03,796 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:19:03,796 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:19:03,796 INFO L85 PathProgramCache]: Analyzing trace with hash 1728836086, now seen corresponding path program 1 times [2025-03-17 12:19:03,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:19:03,796 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [639833819] [2025-03-17 12:19:03,796 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:19:03,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:19:03,811 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 55 statements into 1 equivalence classes. [2025-03-17 12:19:03,821 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 55 of 55 statements. [2025-03-17 12:19:03,821 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:19:03,821 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:19:04,606 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-03-17 12:19:04,606 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:19:04,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [639833819] [2025-03-17 12:19:04,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [639833819] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:19:04,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [103000913] [2025-03-17 12:19:04,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:19:04,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:19:04,607 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:19:04,608 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:19:04,609 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-03-17 12:19:04,732 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 55 statements into 1 equivalence classes. [2025-03-17 12:19:04,851 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 55 of 55 statements. [2025-03-17 12:19:04,852 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:19:04,852 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:19:04,854 INFO L256 TraceCheckSpWp]: Trace formula consists of 445 conjuncts, 86 conjuncts are in the unsatisfiable core [2025-03-17 12:19:04,857 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:19:04,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:19:05,035 INFO L349 Elim1Store]: treesize reduction 21, result has 38.2 percent of original size [2025-03-17 12:19:05,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 17 [2025-03-17 12:19:05,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 21 [2025-03-17 12:19:05,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2025-03-17 12:19:05,392 INFO L349 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2025-03-17 12:19:05,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2025-03-17 12:19:05,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 33 [2025-03-17 12:19:05,858 INFO L349 Elim1Store]: treesize reduction 29, result has 37.0 percent of original size [2025-03-17 12:19:05,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 39 [2025-03-17 12:19:05,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 33 [2025-03-17 12:19:06,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2025-03-17 12:19:06,046 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:19:06,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 54 [2025-03-17 12:19:06,202 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-03-17 12:19:06,202 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:19:07,238 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [103000913] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:19:07,238 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-03-17 12:19:07,238 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 47 [2025-03-17 12:19:07,238 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [592292686] [2025-03-17 12:19:07,239 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2025-03-17 12:19:07,239 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2025-03-17 12:19:07,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-03-17 12:19:07,239 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2025-03-17 12:19:07,240 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=2992, Unknown=20, NotChecked=0, Total=3192 [2025-03-17 12:19:07,240 INFO L87 Difference]: Start difference. First operand 78 states and 84 transitions. Second operand has 47 states, 45 states have (on average 1.8888888888888888) internal successors, (85), 41 states have internal predecessors, (85), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2025-03-17 12:19:08,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-03-17 12:19:08,935 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2025-03-17 12:19:08,935 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-03-17 12:19:08,935 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 45 states have (on average 1.8888888888888888) internal successors, (85), 41 states have internal predecessors, (85), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 55 [2025-03-17 12:19:08,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-03-17 12:19:08,936 INFO L225 Difference]: With dead ends: 82 [2025-03-17 12:19:08,936 INFO L226 Difference]: Without dead ends: 82 [2025-03-17 12:19:08,937 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 834 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=404, Invalid=5896, Unknown=20, NotChecked=0, Total=6320 [2025-03-17 12:19:08,937 INFO L435 NwaCegarLoop]: 43 mSDtfsCounter, 79 mSDsluCounter, 1072 mSDsCounter, 0 mSdLazyCounter, 1265 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 1115 SdHoareTripleChecker+Invalid, 1277 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 1265 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-03-17 12:19:08,937 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 1115 Invalid, 1277 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 1265 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-03-17 12:19:08,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2025-03-17 12:19:08,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 78. [2025-03-17 12:19:08,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 63 states have (on average 1.2222222222222223) internal successors, (77), 72 states have internal predecessors, (77), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-03-17 12:19:08,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2025-03-17 12:19:08,939 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 55 [2025-03-17 12:19:08,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-03-17 12:19:08,940 INFO L471 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2025-03-17 12:19:08,940 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 45 states have (on average 1.8888888888888888) internal successors, (85), 41 states have internal predecessors, (85), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2025-03-17 12:19:08,940 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2025-03-17 12:19:08,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2025-03-17 12:19:08,940 INFO L210 NwaCegarLoop]: Found error trace [2025-03-17 12:19:08,940 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-03-17 12:19:08,948 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-03-17 12:19:09,141 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2025-03-17 12:19:09,141 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_LEAK, ULTIMATE.startErr2ASSERT_VIOLATIONMEMORY_FREE (and 36 more)] === [2025-03-17 12:19:09,141 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-03-17 12:19:09,141 INFO L85 PathProgramCache]: Analyzing trace with hash 1984523833, now seen corresponding path program 1 times [2025-03-17 12:19:09,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-03-17 12:19:09,141 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942193001] [2025-03-17 12:19:09,141 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:19:09,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-03-17 12:19:09,151 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 58 statements into 1 equivalence classes. [2025-03-17 12:19:09,164 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 58 of 58 statements. [2025-03-17 12:19:09,164 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:19:09,164 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:19:10,119 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 21 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-03-17 12:19:10,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-03-17 12:19:10,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942193001] [2025-03-17 12:19:10,120 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [942193001] provided 0 perfect and 1 imperfect interpolant sequences [2025-03-17 12:19:10,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1188194849] [2025-03-17 12:19:10,120 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-03-17 12:19:10,120 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-03-17 12:19:10,120 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-03-17 12:19:10,122 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-03-17 12:19:10,122 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-03-17 12:19:10,249 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 58 statements into 1 equivalence classes. [2025-03-17 12:19:10,322 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 58 of 58 statements. [2025-03-17 12:19:10,322 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-03-17 12:19:10,322 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-03-17 12:19:10,324 INFO L256 TraceCheckSpWp]: Trace formula consists of 460 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-03-17 12:19:10,327 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-03-17 12:19:10,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2025-03-17 12:19:10,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 3 [2025-03-17 12:19:10,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-03-17 12:19:10,559 INFO L349 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2025-03-17 12:19:10,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2025-03-17 12:19:10,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2025-03-17 12:19:10,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2025-03-17 12:19:10,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 11 [2025-03-17 12:19:10,871 INFO L349 Elim1Store]: treesize reduction 37, result has 19.6 percent of original size [2025-03-17 12:19:10,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 205 treesize of output 162 [2025-03-17 12:19:10,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 143 treesize of output 98 [2025-03-17 12:19:10,889 INFO L349 Elim1Store]: treesize reduction 77, result has 34.7 percent of original size [2025-03-17 12:19:10,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 111 treesize of output 45 [2025-03-17 12:19:10,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 64 [2025-03-17 12:19:10,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 48 [2025-03-17 12:19:11,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 27 [2025-03-17 12:19:11,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 20 [2025-03-17 12:19:11,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-03-17 12:19:11,157 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 19 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-03-17 12:19:11,157 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-03-17 12:19:11,634 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:19:11,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 51 [2025-03-17 12:19:11,646 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:19:11,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 95 [2025-03-17 12:19:11,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2025-03-17 12:19:11,657 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:19:11,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 31 [2025-03-17 12:19:11,671 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:19:11,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 55 [2025-03-17 12:19:11,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2025-03-17 12:19:11,938 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse14 (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse6 (+ |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| 4)) (.cse12 (= |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| .cse14))) (let ((.cse2 (not .cse12)) (.cse7 (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int)) (let ((.cse19 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407))) (let ((.cse20 (store (select .cse19 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse6 v_ArrVal_2410))) (or (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store .cse19 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| .cse20) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (= (select .cse20 |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|))))))))) (let ((.cse1 (and (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse15 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407))) (store .cse15 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse15 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse6 v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) .cse2) .cse7 (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse16 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407))) (store .cse16 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse16 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse6 v_ArrVal_2410))) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) .cse12) (or .cse12 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= (select (store (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse6 v_ArrVal_2410) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|)))) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (let ((.cse17 (let ((.cse18 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407))) (store .cse18 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse18 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse6 v_ArrVal_2410))))) (or (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse17 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse17 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0))))) (.cse4 (= |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.offset| (select (select |c_#memory_$Pointer$#1.offset| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (.cse0 (= |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| .cse14)) (.cse10 (and (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (forall ((v_ArrVal_2407 (Array Int Int)) (v_arrayElimCell_99 Int)) (let ((.cse13 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407))) (or (= (select (select .cse13 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|) (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse13 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (or .cse12 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_99 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (= (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|))))))) (and (or .cse0 .cse1) (or .cse2 (let ((.cse3 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int) (v_arrayElimCell_99 Int)) (let ((.cse8 (let ((.cse9 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407))) (store .cse9 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse9 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse6 v_ArrVal_2410))))) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse8 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse8 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))) (and (or .cse3 .cse4) (or .cse3 .cse0) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse5 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407))) (store .cse5 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse5 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse6 v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) .cse7))) (or .cse1 .cse4) (or .cse4 .cse10) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (forall ((v_ArrVal_2407 (Array Int Int))) (let ((.cse11 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407))) (or (= (select (select .cse11 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|) (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse11 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))))) (or .cse0 .cse10) (or .cse2 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (= (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~snd_to_last~0#1.base| v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) .cse12)))))) is different from false [2025-03-17 12:19:12,959 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse18 (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse12 (= |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| .cse18)) (.cse9 (+ |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| 4))) (let ((.cse5 (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int)) (let ((.cse19 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407))) (let ((.cse20 (store (select .cse19 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))) (or (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store .cse19 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| .cse20) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (= |c_ULTIMATE.start_main_~uneq~0#1| (select .cse20 |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))))) (.cse2 (not .cse12))) (let ((.cse1 (= .cse18 |c_ULTIMATE.start_sll_insert_~last~0#1.base|)) (.cse3 (and (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_99 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) .cse12) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (forall ((v_ArrVal_2407 (Array Int Int)) (v_arrayElimCell_99 Int)) (let ((.cse17 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407))) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse17 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (forall ((v_arrayElimCell_100 Int)) (= (select (select .cse17 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|))))))))) (.cse6 (= (select (select |c_#memory_$Pointer$#1.offset| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) |c_ULTIMATE.start_sll_insert_~last~0#1.offset|)) (.cse0 (and (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (let ((.cse13 (let ((.cse14 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407))) (store .cse14 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse14 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))))) (or (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse13 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse13 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0))) (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (store (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) .cse12) .cse5 (or .cse12 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse15 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407))) (store .cse15 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse15 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (or .cse2 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse16 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407))) (store .cse16 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse16 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))))) (and (or .cse0 .cse1) (or .cse2 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) (or .cse3 .cse1) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (forall ((v_ArrVal_2407 (Array Int Int))) (let ((.cse4 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407))) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse4 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (forall ((v_arrayElimCell_100 Int)) (= (select (select .cse4 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|))))))) (or .cse2 (let ((.cse7 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int) (v_arrayElimCell_99 Int)) (let ((.cse10 (let ((.cse11 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407))) (store .cse11 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse11 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))))) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse10 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse10 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))) (and .cse5 (or .cse6 .cse7) (or .cse7 .cse1) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse8 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407))) (store .cse8 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse8 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0)))))) (or .cse6 .cse3) (or .cse6 .cse0) (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_~last~0#1.base| v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) .cse12)))))) is different from false [2025-03-17 12:19:13,169 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse13 (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse9 (+ |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| 4)) (.cse3 (= |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| .cse13))) (let ((.cse6 (not .cse3)) (.cse10 (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int)) (let ((.cse19 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407))) (let ((.cse20 (store (select .cse19 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))) (or (forall ((v_arrayElimCell_100 Int)) (= (select (select (store .cse19 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| .cse20) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select .cse20 |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))))))) (let ((.cse0 (and (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= (select (select (let ((.cse15 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407))) (store .cse15 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse15 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|))) .cse6) (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (store (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) .cse3) (or .cse3 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse16 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407))) (store .cse16 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse16 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0)))) .cse10 (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (let ((.cse17 (let ((.cse18 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407))) (store .cse18 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse18 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))))) (or (forall ((v_arrayElimCell_100 Int)) (= (select (select .cse17 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse17 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))))) (.cse4 (and (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (forall ((v_ArrVal_2407 (Array Int Int)) (v_arrayElimCell_99 Int)) (let ((.cse14 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407))) (or (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse14 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse14 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_99 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) .cse3))) (.cse2 (= |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| .cse13)) (.cse1 (= |c_ULTIMATE.start_sll_insert_#t~mem8#1.offset| (select (select |c_#memory_$Pointer$#1.offset| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)))) (and (or .cse0 .cse1) (or .cse0 .cse2) (or .cse3 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) (or .cse1 .cse4) (or .cse4 .cse2) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int))) (let ((.cse5 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407))) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse5 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse5 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (or .cse6 (let ((.cse7 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int) (v_arrayElimCell_99 Int)) (let ((.cse11 (let ((.cse12 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407))) (store .cse12 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse12 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))))) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse11 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= (select (select .cse11 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|)))))) (and (or .cse7 .cse2) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (= (select (select (let ((.cse8 (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407))) (store .cse8 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse8 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse9 v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|)))) (or .cse1 .cse7) .cse10))) (or .cse6 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| |c_ULTIMATE.start_sll_insert_#t~mem8#1.base| v_ArrVal_2407) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))))) is different from false [2025-03-17 12:19:13,300 INFO L349 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2025-03-17 12:19:13,300 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2025-03-17 12:19:13,318 INFO L349 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2025-03-17 12:19:13,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2025-03-17 12:19:13,354 INFO L349 Elim1Store]: treesize reduction 4, result has 63.6 percent of original size [2025-03-17 12:19:13,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2025-03-17 12:19:13,386 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse14 (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse6 (= |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| .cse14)) (.cse11 (+ |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| 4)) (.cse5 (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_sll_insert_~head#1.base|) |c_ULTIMATE.start_sll_insert_~head#1.offset|))) (let ((.cse9 (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int)) (let ((.cse21 (store |c_#memory_int#2| .cse5 v_ArrVal_2407))) (let ((.cse20 (store (select .cse21 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse11 v_ArrVal_2410))) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select .cse20 |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store .cse21 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| .cse20) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))))))) (.cse7 (not .cse6))) (let ((.cse0 (and (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int)) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (store (select (store |c_#memory_int#2| .cse5 v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse11 v_ArrVal_2410) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0))) .cse6) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (let ((.cse16 (let ((.cse17 (store |c_#memory_int#2| .cse5 v_ArrVal_2407))) (store .cse17 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse17 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse11 v_ArrVal_2410))))) (or (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse16 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse16 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))) .cse9 (or .cse6 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse18 (store |c_#memory_int#2| .cse5 v_ArrVal_2407))) (store .cse18 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse18 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse11 v_ArrVal_2410))) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse19 (store |c_#memory_int#2| .cse5 v_ArrVal_2407))) (store .cse19 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse19 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse11 v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) .cse7))) (.cse3 (and (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (forall ((v_ArrVal_2407 (Array Int Int)) (v_arrayElimCell_99 Int)) (let ((.cse15 (store |c_#memory_int#2| .cse5 v_ArrVal_2407))) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse15 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse15 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (or .cse6 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_99 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| .cse5 v_ArrVal_2407) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))) (.cse2 (and (= |c_ULTIMATE.start_sll_insert_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) (= |c_ULTIMATE.start_sll_insert_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|))) (.cse1 (= .cse14 .cse5))) (and (or .cse0 .cse1) (or .cse0 .cse2) (or .cse3 .cse2) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int))) (let ((.cse4 (store |c_#memory_int#2| .cse5 v_ArrVal_2407))) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse4 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (forall ((v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse4 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))) (or .cse6 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| .cse5 v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (or .cse3 .cse1) (or .cse7 (let ((.cse8 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int) (v_arrayElimCell_99 Int)) (let ((.cse12 (let ((.cse13 (store |c_#memory_int#2| .cse5 v_ArrVal_2407))) (store .cse13 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse13 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse11 v_ArrVal_2410))))) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse12 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse12 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))) (and (or .cse2 .cse8) (or .cse1 .cse8) .cse9 (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse10 (store |c_#memory_int#2| .cse5 v_ArrVal_2407))) (store .cse10 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base| (store (select .cse10 |c_ULTIMATE.start_sll_insert_~new_node~0#1.base|) .cse11 v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))))))) (or .cse7 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| .cse5 v_ArrVal_2407) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |c_ULTIMATE.start_sll_insert_~new_node~0#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))))) is different from false [2025-03-17 12:19:13,704 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse17 (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse3 (select (select |c_#memory_$Pointer$#1.base| |c_ULTIMATE.start_sll_insert_~head#1.base|) |c_ULTIMATE.start_sll_insert_~head#1.offset|)) (.cse12 (= |c_ULTIMATE.start_sll_insert_#t~ret7#1.base| .cse17))) (let ((.cse6 (not .cse12)) (.cse9 (forall ((|v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25| Int)) (or (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int)) (let ((.cse20 (store |c_#memory_int#2| .cse3 v_ArrVal_2407))) (let ((.cse19 (store (select .cse20 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) (+ 4 |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) v_ArrVal_2410))) (or (= (select .cse19 |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|) (forall ((v_arrayElimCell_100 Int)) (= (select (select (store .cse20 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base| .cse19) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|)))))))))))) (let ((.cse4 (and (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_99 Int)) (or (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| .cse3 v_ArrVal_2407) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)))) .cse12) (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_100 Int) (v_arrayElimCell_99 Int)) (let ((.cse18 (store |c_#memory_int#2| .cse3 v_ArrVal_2407))) (or (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse18 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse18 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))))) (.cse1 (= .cse17 .cse3)) (.cse0 (and (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25| Int) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) (= (select (select (let ((.cse13 (store |c_#memory_int#2| .cse3 v_ArrVal_2407))) (store .cse13 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base| (store (select .cse13 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) (+ 4 |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|))) .cse6) (or .cse12 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25| Int) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (let ((.cse14 (store |c_#memory_int#2| .cse3 v_ArrVal_2407))) (store .cse14 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base| (store (select .cse14 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) (+ 4 |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) v_ArrVal_2410))) v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|)))) (or .cse12 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25| Int) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int)) (or (= (select (store (select (store |c_#memory_int#2| .cse3 v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) (+ 4 |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) v_ArrVal_2410) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|)))) .cse9 (forall ((|v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25| Int)) (or (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_99 Int)) (let ((.cse15 (let ((.cse16 (store |c_#memory_int#2| .cse3 v_ArrVal_2407))) (store .cse16 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base| (store (select .cse16 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) (+ 4 |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) v_ArrVal_2410))))) (or (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse15 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (forall ((v_arrayElimCell_100 Int)) (= (select (select .cse15 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|))))) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0))))))) (.cse5 (and (= |c_ULTIMATE.start_sll_insert_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) (= |c_ULTIMATE.start_sll_insert_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|)))) (and (or .cse0 .cse1) (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_100 Int)) (let ((.cse2 (store |c_#memory_int#2| .cse3 v_ArrVal_2407))) (or (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse2 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse2 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (or .cse4 .cse5) (or .cse6 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_arrayElimCell_100 Int)) (or (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| .cse3 v_ArrVal_2407) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|))))) (or .cse6 (let ((.cse7 (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25| Int) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int) (v_arrayElimCell_99 Int)) (let ((.cse10 (let ((.cse11 (store |c_#memory_int#2| .cse3 v_ArrVal_2407))) (store .cse11 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base| (store (select .cse11 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) (+ 4 |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) v_ArrVal_2410))))) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select .cse10 v_arrayElimCell_99) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) (= (select (select .cse10 v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|)))))) (and (or .cse7 .cse1) (forall ((|v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25| Int)) (or (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) (forall ((|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0) (forall ((v_ArrVal_2407 (Array Int Int)) (v_ArrVal_2410 Int) (v_arrayElimCell_100 Int)) (= (select (select (let ((.cse8 (store |c_#memory_int#2| .cse3 v_ArrVal_2407))) (store .cse8 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base| (store (select .cse8 |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) (+ 4 |v_ULTIMATE.start_sll_insert_~new_node~0#1.offset_25|) v_ArrVal_2410))) v_arrayElimCell_100) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) |c_ULTIMATE.start_main_~uneq~0#1|)))))) .cse9 (or .cse7 .cse5)))) (or (forall ((v_ArrVal_2407 (Array Int Int)) (|v_ULTIMATE.start_main_~ptr~0#1.offset_31| Int)) (or (< |c_ULTIMATE.start_sll_insert_#t~ret7#1.offset| |v_ULTIMATE.start_main_~ptr~0#1.offset_31|) (= |c_ULTIMATE.start_main_~uneq~0#1| (select (select (store |c_#memory_int#2| .cse3 v_ArrVal_2407) |c_ULTIMATE.start_sll_insert_#t~ret7#1.base|) |v_ULTIMATE.start_main_~ptr~0#1.offset_31|)) (< |v_ULTIMATE.start_main_~ptr~0#1.offset_31| 0))) .cse12) (or .cse4 .cse1) (or .cse0 .cse5)))))) is different from false [2025-03-17 12:19:19,969 WARN L286 SmtUtils]: Spent 6.03s on a formula simplification. DAG size of input: 799 DAG size of output: 751 (called from [L 346] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.arrays.Elim1Store.elim1) [2025-03-17 12:19:19,969 INFO L349 Elim1Store]: treesize reduction 240, result has 87.0 percent of original size [2025-03-17 12:19:19,970 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 16 select indices, 16 select index equivalence classes, 0 disjoint index pairs (out of 120 index pairs), introduced 17 new quantified variables, introduced 137 case distinctions, treesize of input 2816 treesize of output 3901 [2025-03-17 12:19:20,432 INFO L224 Elim1Store]: Index analysis took 124 ms [2025-03-17 12:19:25,554 WARN L286 SmtUtils]: Spent 5.11s on a formula simplification that was a NOOP. DAG size: 1251 (called from [L 346] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.arrays.Elim1Store.elim1) [2025-03-17 12:19:25,554 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-03-17 12:19:25,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 25 select indices, 25 select index equivalence classes, 0 disjoint index pairs (out of 300 index pairs), introduced 25 new quantified variables, introduced 300 case distinctions, treesize of input 2821 treesize of output 5105 [2025-03-17 12:19:26,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2466 treesize of output 2460 [2025-03-17 12:19:27,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2508 treesize of output 2496 [2025-03-17 12:19:29,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2508 treesize of output 2504 [2025-03-17 12:19:30,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2516 treesize of output 2514 [2025-03-17 12:19:31,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2538 treesize of output 2532 [2025-03-17 12:19:32,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2532 treesize of output 2528 [2025-03-17 12:19:33,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2576 treesize of output 2564 [2025-03-17 12:19:35,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2564 treesize of output 2562 [2025-03-17 12:19:36,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2562 treesize of output 2560 [2025-03-17 12:19:37,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2560 treesize of output 2558 [2025-03-17 12:19:38,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2558 treesize of output 2554 [2025-03-17 12:19:39,781 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2578 treesize of output 2572 [2025-03-17 12:19:40,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2572 treesize of output 2570 [2025-03-17 12:19:42,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2594 treesize of output 2588 [2025-03-17 12:19:43,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2636 treesize of output 2624 [2025-03-17 12:19:44,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2636 treesize of output 2634 [2025-03-17 12:19:45,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2646 treesize of output 2642 [2025-03-17 12:19:46,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2642 treesize of output 2638 [2025-03-17 12:19:48,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2686 treesize of output 2674 [2025-03-17 12:19:49,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2686 treesize of output 2682 [2025-03-17 12:19:50,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2706 treesize of output 2700