/root/.sdkman/candidates/java/21.0.5-tem/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata ./data -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline_IcfgBuilder.xml -s ../benchexec/../../../trunk/examples/settings/default/gemcutter/svcomp-Reach-32bit-GemCutter_Default.epf --preprocessor.replace.while.statements.and.if-then-else.statements false -i ../../../trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.3.0-dev-4cc0a57-m [2025-04-14 16:04:24,107 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-04-14 16:04:24,148 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../benchexec/../../../trunk/examples/settings/default/gemcutter/svcomp-Reach-32bit-GemCutter_Default.epf [2025-04-14 16:04:24,151 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-04-14 16:04:24,151 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-04-14 16:04:24,174 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-04-14 16:04:24,175 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-04-14 16:04:24,175 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-04-14 16:04:24,175 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-04-14 16:04:24,175 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-04-14 16:04:24,175 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-04-14 16:04:24,175 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-04-14 16:04:24,175 INFO L153 SettingsManager]: * Use SBE=true [2025-04-14 16:04:24,177 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-04-14 16:04:24,177 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-04-14 16:04:24,177 INFO L153 SettingsManager]: * sizeof long=4 [2025-04-14 16:04:24,177 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-04-14 16:04:24,177 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-04-14 16:04:24,177 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * sizeof long double=12 [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * Use constant arrays=true [2025-04-14 16:04:24,178 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-04-14 16:04:24,178 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-14 16:04:24,179 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-14 16:04:24,179 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Commutativity condition synthesis=NECESSARY_AND_SUFFICIENT [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2025-04-14 16:04:24,179 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2025-04-14 16:04:24,180 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2025-04-14 16:04:24,180 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.boogie.preprocessor: Replace while statements and if-then-else statements -> false [2025-04-14 16:04:24,395 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-04-14 16:04:24,403 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-04-14 16:04:24,405 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-04-14 16:04:24,406 INFO L270 PluginConnector]: Initializing CDTParser... [2025-04-14 16:04:24,408 INFO L274 PluginConnector]: CDTParser initialized [2025-04-14 16:04:24,409 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt.wvr.c [2025-04-14 16:04:25,669 INFO L538 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/08f436f0f/4ad50fbc956247e3bbd9a8586f3297eb/FLAG751b6fa67 [2025-04-14 16:04:25,862 INFO L389 CDTParser]: Found 1 translation units. [2025-04-14 16:04:25,862 INFO L178 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt.wvr.c [2025-04-14 16:04:25,871 INFO L432 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/08f436f0f/4ad50fbc956247e3bbd9a8586f3297eb/FLAG751b6fa67 [2025-04-14 16:04:26,670 INFO L440 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/08f436f0f/4ad50fbc956247e3bbd9a8586f3297eb [2025-04-14 16:04:26,672 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-04-14 16:04:26,673 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2025-04-14 16:04:26,674 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-04-14 16:04:26,674 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-04-14 16:04:26,677 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-04-14 16:04:26,677 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:26,678 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@18d28b4e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26, skipping insertion in model container [2025-04-14 16:04:26,678 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:26,691 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-04-14 16:04:26,870 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt.wvr.c[4345,4358] [2025-04-14 16:04:26,882 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-14 16:04:26,891 INFO L200 MainTranslator]: Completed pre-run [2025-04-14 16:04:26,934 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-bad-buffer-mult-alt.wvr.c[4345,4358] [2025-04-14 16:04:26,942 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-14 16:04:26,952 INFO L204 MainTranslator]: Completed translation [2025-04-14 16:04:26,952 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26 WrapperNode [2025-04-14 16:04:26,952 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-04-14 16:04:26,953 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-04-14 16:04:26,953 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-04-14 16:04:26,953 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-04-14 16:04:26,959 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:26,965 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:26,994 INFO L138 Inliner]: procedures = 25, calls = 59, calls flagged for inlining = 17, calls inlined = 21, statements flattened = 293 [2025-04-14 16:04:26,994 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-04-14 16:04:26,995 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-04-14 16:04:26,995 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-04-14 16:04:26,995 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-04-14 16:04:27,002 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,002 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,010 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,011 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,020 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,025 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,026 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,026 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,030 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-04-14 16:04:27,030 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-04-14 16:04:27,030 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-04-14 16:04:27,035 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-04-14 16:04:27,039 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (1/1) ... [2025-04-14 16:04:27,042 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-14 16:04:27,052 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:27,064 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-04-14 16:04:27,066 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-04-14 16:04:27,085 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-04-14 16:04:27,085 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2025-04-14 16:04:27,085 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2025-04-14 16:04:27,085 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2025-04-14 16:04:27,085 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2025-04-14 16:04:27,085 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2025-04-14 16:04:27,085 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2025-04-14 16:04:27,085 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2025-04-14 16:04:27,085 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2025-04-14 16:04:27,085 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2025-04-14 16:04:27,086 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2025-04-14 16:04:27,086 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2025-04-14 16:04:27,086 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2025-04-14 16:04:27,086 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-04-14 16:04:27,086 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-04-14 16:04:27,086 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-04-14 16:04:27,086 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2025-04-14 16:04:27,087 WARN L225 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2025-04-14 16:04:27,173 INFO L256 CfgBuilder]: Building ICFG [2025-04-14 16:04:27,175 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-04-14 16:04:27,515 INFO L303 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2025-04-14 16:04:27,515 INFO L307 CfgBuilder]: Performing block encoding [2025-04-14 16:04:27,745 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-04-14 16:04:27,745 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2025-04-14 16:04:27,745 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 14.04 04:04:27 BoogieIcfgContainer [2025-04-14 16:04:27,745 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-04-14 16:04:27,747 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-04-14 16:04:27,747 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-04-14 16:04:27,750 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-04-14 16:04:27,750 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.04 04:04:26" (1/3) ... [2025-04-14 16:04:27,750 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70576ade and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 04:04:27, skipping insertion in model container [2025-04-14 16:04:27,750 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.04 04:04:26" (2/3) ... [2025-04-14 16:04:27,750 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@70576ade and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.04 04:04:27, skipping insertion in model container [2025-04-14 16:04:27,750 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 14.04 04:04:27" (3/3) ... [2025-04-14 16:04:27,751 INFO L128 eAbstractionObserver]: Analyzing ICFG popl20-bad-buffer-mult-alt.wvr.c [2025-04-14 16:04:27,761 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-04-14 16:04:27,762 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG popl20-bad-buffer-mult-alt.wvr.c that has 5 procedures, 45 locations, 46 edges, 1 initial locations, 6 loop locations, and 1 error locations. [2025-04-14 16:04:27,763 INFO L490 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2025-04-14 16:04:27,813 INFO L143 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2025-04-14 16:04:27,839 INFO L125 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-14 16:04:27,839 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2025-04-14 16:04:27,839 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:27,842 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2025-04-14 16:04:27,843 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2025-04-14 16:04:27,910 INFO L177 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2025-04-14 16:04:27,922 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2025-04-14 16:04:27,929 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@52b69d79, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-14 16:04:27,929 INFO L341 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2025-04-14 16:04:28,951 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:28,951 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:28,951 INFO L139 ounterexampleChecker]: Examining path program with hash -1049743907, occurence #1 [2025-04-14 16:04:28,951 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:04:28,951 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:28,955 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:28,956 INFO L85 PathProgramCache]: Analyzing trace with hash 1025655716, now seen corresponding path program 1 times [2025-04-14 16:04:28,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:28,961 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753048445] [2025-04-14 16:04:28,961 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:28,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:29,032 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 140 statements into 1 equivalence classes. [2025-04-14 16:04:29,240 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 140 of 140 statements. [2025-04-14 16:04:29,241 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:29,241 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:29,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-14 16:04:29,844 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:29,846 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1753048445] [2025-04-14 16:04:29,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1753048445] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:04:29,847 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:04:29,847 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-14 16:04:29,848 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1354294863] [2025-04-14 16:04:29,849 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:04:29,855 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-04-14 16:04:29,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:29,869 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-04-14 16:04:29,870 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-04-14 16:04:29,870 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:29,871 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:29,872 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.25) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:29,872 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:30,019 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:30,019 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-04-14 16:04:30,019 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:30,019 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:30,020 INFO L139 ounterexampleChecker]: Examining path program with hash -1049743907, occurence #2 [2025-04-14 16:04:30,020 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:04:30,020 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 2 [2025-04-14 16:04:30,020 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:04:30,020 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 4 [2025-04-14 16:04:30,030 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:30,030 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 8 [2025-04-14 16:04:30,030 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:30,031 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 12 [2025-04-14 16:04:30,031 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:30,031 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 16 [2025-04-14 16:04:30,031 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:30,031 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 64 [2025-04-14 16:04:30,109 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:30,109 INFO L85 PathProgramCache]: Analyzing trace with hash 311457979, now seen corresponding path program 1 times [2025-04-14 16:04:30,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:04:30,111 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138920844] [2025-04-14 16:04:30,111 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:30,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:30,130 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 65 statements into 1 equivalence classes. [2025-04-14 16:04:30,172 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 65 of 65 statements. [2025-04-14 16:04:30,172 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:30,172 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:30,391 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:30,392 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:04:30,392 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2138920844] [2025-04-14 16:04:30,392 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2138920844] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:04:30,392 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:04:30,392 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-04-14 16:04:30,393 INFO L172 ounterexampleChecker]: Successfully proved commutativity at non-minimality point 64. Constructing proof automaton... [2025-04-14 16:04:30,393 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:04:30,394 INFO L311 artialOrderCegarLoop]: Commutativity proof succeeded, skipping feasibility check. [2025-04-14 16:04:30,394 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-04-14 16:04:30,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SMTINTERPOL [2025-04-14 16:04:30,394 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-04-14 16:04:30,394 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-04-14 16:04:30,394 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:30,397 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:30,397 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.75) internal successors, (47), 4 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:30,397 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:30,397 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:30,507 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:30,508 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:30,508 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-04-14 16:04:30,508 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:30,508 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:30,508 INFO L139 ounterexampleChecker]: Examining path program with hash -1049743907, occurence #3 [2025-04-14 16:04:30,508 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:04:30,508 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 2 [2025-04-14 16:04:30,508 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:04:30,509 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 5 [2025-04-14 16:04:30,509 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:30,509 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 9 [2025-04-14 16:04:30,509 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:30,509 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 13 [2025-04-14 16:04:30,509 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:30,509 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 17 [2025-04-14 16:04:30,509 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:30,509 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 65 [2025-04-14 16:04:30,552 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:30,552 INFO L85 PathProgramCache]: Analyzing trace with hash 192415925, now seen corresponding path program 1 times [2025-04-14 16:04:30,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:04:30,552 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1281237495] [2025-04-14 16:04:30,552 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:30,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:30,565 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 66 statements into 1 equivalence classes. [2025-04-14 16:04:30,585 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 66 of 66 statements. [2025-04-14 16:04:30,585 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:30,585 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:30,782 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:30,782 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:04:30,782 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1281237495] [2025-04-14 16:04:30,782 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1281237495] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:30,782 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1529267875] [2025-04-14 16:04:30,782 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:30,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:30,806 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 66 statements into 1 equivalence classes. [2025-04-14 16:04:30,857 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 66 of 66 statements. [2025-04-14 16:04:30,857 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:30,857 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:30,860 INFO L256 TraceCheckSpWp]: Trace formula consists of 372 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-04-14 16:04:30,868 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:30,985 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:30,986 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1529267875] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:30,986 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:04:30,986 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2025-04-14 16:04:30,986 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:04:30,986 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 70 [2025-04-14 16:04:31,025 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:31,025 INFO L85 PathProgramCache]: Analyzing trace with hash -690094204, now seen corresponding path program 1 times [2025-04-14 16:04:31,026 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:04:31,026 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900844868] [2025-04-14 16:04:31,026 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:31,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:31,038 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 71 statements into 1 equivalence classes. [2025-04-14 16:04:31,054 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 71 of 71 statements. [2025-04-14 16:04:31,055 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:31,055 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:31,224 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:31,224 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:04:31,224 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900844868] [2025-04-14 16:04:31,224 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1900844868] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:31,224 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1518514310] [2025-04-14 16:04:31,224 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:31,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:31,236 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 71 statements into 1 equivalence classes. [2025-04-14 16:04:31,258 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 71 of 71 statements. [2025-04-14 16:04:31,258 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:31,258 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:31,260 INFO L256 TraceCheckSpWp]: Trace formula consists of 388 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-04-14 16:04:31,262 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:31,358 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:31,358 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1518514310] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:31,358 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:04:31,358 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2025-04-14 16:04:31,358 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:04:31,359 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 78 [2025-04-14 16:04:31,424 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:31,424 INFO L85 PathProgramCache]: Analyzing trace with hash 172503773, now seen corresponding path program 1 times [2025-04-14 16:04:31,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:04:31,424 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335130992] [2025-04-14 16:04:31,424 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:31,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:31,441 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-04-14 16:04:31,461 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-04-14 16:04:31,461 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:31,461 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:31,656 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:31,656 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:04:31,656 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335130992] [2025-04-14 16:04:31,656 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1335130992] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:31,656 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1828390035] [2025-04-14 16:04:31,656 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:31,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:31,672 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-04-14 16:04:31,699 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-04-14 16:04:31,699 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:31,699 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:31,702 INFO L256 TraceCheckSpWp]: Trace formula consists of 418 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-04-14 16:04:31,706 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:31,848 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:31,848 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1828390035] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:31,848 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:04:31,849 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 7 [2025-04-14 16:04:31,849 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:04:31,849 INFO L162 ounterexampleChecker]: Commutativity condition check at non-minimality point 108 is hopeless, skipping. [2025-04-14 16:04:31,849 INFO L162 ounterexampleChecker]: Commutativity condition check at non-minimality point 117 is hopeless, skipping. [2025-04-14 16:04:31,849 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 138 [2025-04-14 16:04:31,849 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:31,849 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:04:31,849 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:31,849 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:31,849 INFO L85 PathProgramCache]: Analyzing trace with hash -406802771, now seen corresponding path program 1 times [2025-04-14 16:04:31,849 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:31,850 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1926333474] [2025-04-14 16:04:31,850 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:31,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:31,873 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-04-14 16:04:31,917 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-04-14 16:04:31,917 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:31,917 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:32,290 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:32,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:32,291 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1926333474] [2025-04-14 16:04:32,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1926333474] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:32,291 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [914029546] [2025-04-14 16:04:32,291 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:32,291 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:32,291 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:32,293 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:04:32,295 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-04-14 16:04:32,388 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-04-14 16:04:32,470 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-04-14 16:04:32,470 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:32,471 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:32,474 INFO L256 TraceCheckSpWp]: Trace formula consists of 684 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-04-14 16:04:32,476 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:32,585 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:32,585 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:04:32,733 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-14 16:04:32,734 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [914029546] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:04:32,734 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:04:32,734 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 13 [2025-04-14 16:04:32,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210715777] [2025-04-14 16:04:32,734 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:04:32,735 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2025-04-14 16:04:32,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:32,736 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-04-14 16:04:32,736 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2025-04-14 16:04:32,736 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:32,736 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:32,736 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 10.076923076923077) internal successors, (131), 13 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:32,736 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:32,736 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:32,736 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:32,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:32,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:32,929 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:32,936 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2025-04-14 16:04:33,133 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3,SelfDestructingSolverStorable2,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5 [2025-04-14 16:04:33,133 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:33,133 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:33,134 INFO L139 ounterexampleChecker]: Examining path program with hash -1049743907, occurence #4 [2025-04-14 16:04:33,134 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:04:33,134 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 3 [2025-04-14 16:04:33,134 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:04:33,134 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 7 [2025-04-14 16:04:33,134 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:33,134 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 11 [2025-04-14 16:04:33,134 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:33,134 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 15 [2025-04-14 16:04:33,134 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:33,134 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 19 [2025-04-14 16:04:33,134 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:33,134 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 67 [2025-04-14 16:04:33,176 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:33,176 INFO L85 PathProgramCache]: Analyzing trace with hash -787829291, now seen corresponding path program 1 times [2025-04-14 16:04:33,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:04:33,176 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562399120] [2025-04-14 16:04:33,176 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:33,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:33,191 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 68 statements into 1 equivalence classes. [2025-04-14 16:04:33,217 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 68 of 68 statements. [2025-04-14 16:04:33,217 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:33,217 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:33,405 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-04-14 16:04:33,406 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:04:33,406 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [562399120] [2025-04-14 16:04:33,406 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [562399120] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:33,406 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [237514185] [2025-04-14 16:04:33,406 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:33,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:33,417 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 68 statements into 1 equivalence classes. [2025-04-14 16:04:33,437 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 68 of 68 statements. [2025-04-14 16:04:33,437 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:33,437 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:33,439 INFO L256 TraceCheckSpWp]: Trace formula consists of 390 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-04-14 16:04:33,441 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:33,610 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-04-14 16:04:33,611 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [237514185] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:33,611 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:04:33,611 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2025-04-14 16:04:33,611 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:04:33,611 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 72 [2025-04-14 16:04:33,634 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:33,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1936322774, now seen corresponding path program 1 times [2025-04-14 16:04:33,634 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:04:33,634 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1238696960] [2025-04-14 16:04:33,634 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:33,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:33,645 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 73 statements into 1 equivalence classes. [2025-04-14 16:04:33,660 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 73 of 73 statements. [2025-04-14 16:04:33,660 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:33,660 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:33,845 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-04-14 16:04:33,846 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:04:33,846 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1238696960] [2025-04-14 16:04:33,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1238696960] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:33,846 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1840248177] [2025-04-14 16:04:33,846 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:33,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:33,857 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 73 statements into 1 equivalence classes. [2025-04-14 16:04:33,876 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 73 of 73 statements. [2025-04-14 16:04:33,876 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:33,876 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:33,878 INFO L256 TraceCheckSpWp]: Trace formula consists of 406 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-04-14 16:04:33,879 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:34,046 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-04-14 16:04:34,047 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1840248177] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:34,047 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:04:34,047 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2025-04-14 16:04:34,047 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:04:34,047 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 80 [2025-04-14 16:04:34,105 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:34,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1613313233, now seen corresponding path program 1 times [2025-04-14 16:04:34,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:04:34,105 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378199739] [2025-04-14 16:04:34,105 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:34,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:34,117 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-04-14 16:04:34,134 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-04-14 16:04:34,134 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:34,134 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:34,320 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-04-14 16:04:34,320 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:04:34,320 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378199739] [2025-04-14 16:04:34,320 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [378199739] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:34,320 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1130944459] [2025-04-14 16:04:34,321 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:04:34,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:34,332 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-04-14 16:04:34,351 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-04-14 16:04:34,352 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:34,352 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:34,353 INFO L256 TraceCheckSpWp]: Trace formula consists of 436 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-04-14 16:04:34,355 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:34,545 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-04-14 16:04:34,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1130944459] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:34,545 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:04:34,546 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 11 [2025-04-14 16:04:34,546 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:04:34,546 INFO L162 ounterexampleChecker]: Commutativity condition check at non-minimality point 110 is hopeless, skipping. [2025-04-14 16:04:34,546 INFO L162 ounterexampleChecker]: Commutativity condition check at non-minimality point 119 is hopeless, skipping. [2025-04-14 16:04:34,546 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 140 [2025-04-14 16:04:34,546 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:34,546 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:04:34,546 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:34,546 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:34,546 INFO L85 PathProgramCache]: Analyzing trace with hash 2087268676, now seen corresponding path program 2 times [2025-04-14 16:04:34,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:34,546 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293396188] [2025-04-14 16:04:34,547 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-14 16:04:34,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:34,564 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 144 statements into 2 equivalence classes. [2025-04-14 16:04:34,593 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 140 of 144 statements. [2025-04-14 16:04:34,593 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-04-14 16:04:34,593 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:35,422 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2025-04-14 16:04:35,423 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:35,423 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293396188] [2025-04-14 16:04:35,423 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [293396188] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:04:35,423 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:04:35,423 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2025-04-14 16:04:35,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1955207424] [2025-04-14 16:04:35,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:04:35,425 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2025-04-14 16:04:35,427 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:35,427 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2025-04-14 16:04:35,428 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2025-04-14 16:04:35,428 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:35,428 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:35,428 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 8.142857142857142) internal successors, (114), 14 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:35,428 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:35,428 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:35,428 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:35,428 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:35,656 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:35,656 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:35,657 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:35,657 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:04:35,657 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,SelfDestructingSolverStorable11,SelfDestructingSolverStorable12,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable14,SelfDestructingSolverStorable15 [2025-04-14 16:04:35,657 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:35,657 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:35,657 INFO L139 ounterexampleChecker]: Examining path program with hash 1871609448, occurence #1 [2025-04-14 16:04:35,657 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:04:35,657 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:35,657 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:35,658 INFO L85 PathProgramCache]: Analyzing trace with hash 614045246, now seen corresponding path program 3 times [2025-04-14 16:04:35,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:35,658 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885065720] [2025-04-14 16:04:35,658 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-04-14 16:04:35,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:35,672 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 116 statements into 4 equivalence classes. [2025-04-14 16:04:35,686 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 62 of 116 statements. [2025-04-14 16:04:35,687 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-04-14 16:04:35,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:35,892 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2025-04-14 16:04:35,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:35,892 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [885065720] [2025-04-14 16:04:35,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [885065720] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:04:35,892 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:04:35,892 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-04-14 16:04:35,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351309832] [2025-04-14 16:04:35,892 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:04:35,892 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-04-14 16:04:35,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:35,893 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-04-14 16:04:35,893 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-04-14 16:04:35,893 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:35,893 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:35,893 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.285714285714286) internal successors, (65), 7 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:35,893 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:35,893 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:35,893 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:35,893 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:04:35,893 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:36,457 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:36,457 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:36,457 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:36,457 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:04:36,457 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:36,457 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-04-14 16:04:36,457 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:36,457 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:36,457 INFO L139 ounterexampleChecker]: Examining path program with hash -124082569, occurence #1 [2025-04-14 16:04:36,458 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:04:36,458 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:36,458 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:36,458 INFO L85 PathProgramCache]: Analyzing trace with hash -734072013, now seen corresponding path program 4 times [2025-04-14 16:04:36,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:36,458 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427331237] [2025-04-14 16:04:36,458 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-04-14 16:04:36,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:36,475 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 134 statements into 2 equivalence classes. [2025-04-14 16:04:36,509 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 134 of 134 statements. [2025-04-14 16:04:36,509 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-04-14 16:04:36,509 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:37,161 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 39 proven. 23 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-04-14 16:04:37,161 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:37,161 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427331237] [2025-04-14 16:04:37,162 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1427331237] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:37,162 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1379616465] [2025-04-14 16:04:37,162 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-04-14 16:04:37,162 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:37,162 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:37,163 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:04:37,165 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-04-14 16:04:37,267 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 134 statements into 2 equivalence classes. [2025-04-14 16:04:37,339 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 134 of 134 statements. [2025-04-14 16:04:37,339 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-04-14 16:04:37,339 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:37,342 INFO L256 TraceCheckSpWp]: Trace formula consists of 612 conjuncts, 16 conjuncts are in the unsatisfiable core [2025-04-14 16:04:37,345 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:37,873 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 22 proven. 23 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2025-04-14 16:04:37,873 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:04:37,889 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2025-04-14 16:04:38,274 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 30 proven. 15 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2025-04-14 16:04:38,274 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1379616465] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:04:38,274 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:04:38,274 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12, 12] total 38 [2025-04-14 16:04:38,275 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1821961158] [2025-04-14 16:04:38,275 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:04:38,275 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2025-04-14 16:04:38,275 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:38,276 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2025-04-14 16:04:38,276 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=356, Invalid=1126, Unknown=0, NotChecked=0, Total=1482 [2025-04-14 16:04:38,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:38,276 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:38,277 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 39 states have (on average 8.025641025641026) internal successors, (313), 38 states have internal predecessors, (313), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:38,277 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:38,277 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:38,277 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:38,277 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:04:38,277 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:38,277 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:40,541 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:40,542 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:40,542 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:40,542 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:40,542 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:40,542 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:40,554 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2025-04-14 16:04:40,742 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2025-04-14 16:04:40,743 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:40,743 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:40,743 INFO L139 ounterexampleChecker]: Examining path program with hash -210243983, occurence #1 [2025-04-14 16:04:40,743 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:04:40,743 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:40,743 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:40,743 INFO L85 PathProgramCache]: Analyzing trace with hash 1940254525, now seen corresponding path program 5 times [2025-04-14 16:04:40,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:40,743 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303952849] [2025-04-14 16:04:40,743 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-04-14 16:04:40,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:40,763 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 180 statements into 8 equivalence classes. [2025-04-14 16:04:41,284 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) and asserted 180 of 180 statements. [2025-04-14 16:04:41,284 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2025-04-14 16:04:41,284 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:41,682 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 261 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2025-04-14 16:04:41,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:41,682 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1303952849] [2025-04-14 16:04:41,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1303952849] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:04:41,682 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:04:41,682 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-04-14 16:04:41,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [229534491] [2025-04-14 16:04:41,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:04:41,683 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2025-04-14 16:04:41,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:41,683 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-04-14 16:04:41,683 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2025-04-14 16:04:41,683 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:41,683 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:41,684 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 12.0) internal successors, (132), 11 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:41,684 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:41,684 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:41,684 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:41,684 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:41,684 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:41,684 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:41,684 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:42,776 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:42,776 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:42,776 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:42,776 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:42,776 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:42,776 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:42,776 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:42,777 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-04-14 16:04:42,777 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:42,777 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:42,777 INFO L139 ounterexampleChecker]: Examining path program with hash 883570472, occurence #1 [2025-04-14 16:04:42,777 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:04:42,777 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:42,777 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:42,777 INFO L85 PathProgramCache]: Analyzing trace with hash -1252688569, now seen corresponding path program 6 times [2025-04-14 16:04:42,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:42,777 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494873572] [2025-04-14 16:04:42,777 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-04-14 16:04:42,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:42,789 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 96 statements into 7 equivalence classes. [2025-04-14 16:04:42,825 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) and asserted 67 of 96 statements. [2025-04-14 16:04:42,825 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2025-04-14 16:04:42,825 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:43,226 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2025-04-14 16:04:43,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:43,226 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1494873572] [2025-04-14 16:04:43,226 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1494873572] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:43,226 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2141500499] [2025-04-14 16:04:43,226 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-04-14 16:04:43,226 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:43,226 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:43,229 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:04:43,230 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-04-14 16:04:43,321 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 96 statements into 7 equivalence classes. [2025-04-14 16:04:43,359 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) and asserted 67 of 96 statements. [2025-04-14 16:04:43,359 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2025-04-14 16:04:43,359 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:43,361 INFO L256 TraceCheckSpWp]: Trace formula consists of 412 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-04-14 16:04:43,363 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:43,686 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2025-04-14 16:04:43,686 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:04:44,014 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked. [2025-04-14 16:04:44,015 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2141500499] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:04:44,015 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:04:44,015 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 26 [2025-04-14 16:04:44,015 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [361011608] [2025-04-14 16:04:44,015 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:04:44,015 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2025-04-14 16:04:44,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:44,016 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-04-14 16:04:44,016 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=596, Unknown=0, NotChecked=0, Total=702 [2025-04-14 16:04:44,016 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:44,016 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:44,016 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 4.925925925925926) internal successors, (133), 26 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:44,016 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:44,016 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:44,016 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:44,016 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:44,016 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:44,016 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:44,016 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:44,016 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:46,483 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:46,483 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:46,483 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:46,483 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:46,483 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:46,483 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:46,483 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:46,483 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:46,489 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2025-04-14 16:04:46,684 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:46,684 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:46,684 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:46,684 INFO L139 ounterexampleChecker]: Examining path program with hash -134856273, occurence #1 [2025-04-14 16:04:46,684 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:04:46,684 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:46,685 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:46,685 INFO L85 PathProgramCache]: Analyzing trace with hash -102661023, now seen corresponding path program 7 times [2025-04-14 16:04:46,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:46,685 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305429143] [2025-04-14 16:04:46,685 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-04-14 16:04:46,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:46,709 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 222 statements into 1 equivalence classes. [2025-04-14 16:04:46,758 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 222 of 222 statements. [2025-04-14 16:04:46,758 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:46,758 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:47,390 INFO L134 CoverageAnalysis]: Checked inductivity of 436 backedges. 135 proven. 72 refuted. 0 times theorem prover too weak. 229 trivial. 0 not checked. [2025-04-14 16:04:47,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:47,391 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [305429143] [2025-04-14 16:04:47,391 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [305429143] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:47,391 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2015135534] [2025-04-14 16:04:47,391 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-04-14 16:04:47,391 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:47,391 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:47,393 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:04:47,394 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-04-14 16:04:47,514 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 222 statements into 1 equivalence classes. [2025-04-14 16:04:47,607 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 222 of 222 statements. [2025-04-14 16:04:47,607 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:04:47,607 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:47,611 INFO L256 TraceCheckSpWp]: Trace formula consists of 988 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-04-14 16:04:47,613 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:47,786 INFO L134 CoverageAnalysis]: Checked inductivity of 436 backedges. 198 proven. 3 refuted. 0 times theorem prover too weak. 235 trivial. 0 not checked. [2025-04-14 16:04:47,786 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:04:47,968 INFO L134 CoverageAnalysis]: Checked inductivity of 436 backedges. 158 proven. 43 refuted. 0 times theorem prover too weak. 235 trivial. 0 not checked. [2025-04-14 16:04:47,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2015135534] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:04:47,969 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:04:47,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 8, 8] total 27 [2025-04-14 16:04:47,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965369675] [2025-04-14 16:04:47,969 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:04:47,969 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2025-04-14 16:04:47,969 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:47,970 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-04-14 16:04:47,970 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=114, Invalid=588, Unknown=0, NotChecked=0, Total=702 [2025-04-14 16:04:47,970 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:47,970 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:47,970 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 8.222222222222221) internal successors, (222), 27 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:47,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:48,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:48,282 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2025-04-14 16:04:48,476 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:48,476 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:48,476 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:48,476 INFO L139 ounterexampleChecker]: Examining path program with hash -134856273, occurence #2 [2025-04-14 16:04:48,476 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:04:48,476 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 8 [2025-04-14 16:04:48,476 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:04:48,476 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 13 [2025-04-14 16:04:48,477 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:48,477 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 17 [2025-04-14 16:04:48,477 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:48,477 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 21 [2025-04-14 16:04:48,477 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:48,477 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 25 [2025-04-14 16:04:48,477 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:48,477 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 221 [2025-04-14 16:04:48,477 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:48,477 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:04:48,477 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:48,477 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:48,477 INFO L85 PathProgramCache]: Analyzing trace with hash 1605054954, now seen corresponding path program 8 times [2025-04-14 16:04:48,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:48,478 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249513829] [2025-04-14 16:04:48,478 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-14 16:04:48,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:48,500 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 224 statements into 2 equivalence classes. [2025-04-14 16:04:48,557 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 224 of 224 statements. [2025-04-14 16:04:48,557 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-14 16:04:48,557 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:49,006 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 173 proven. 67 refuted. 0 times theorem prover too weak. 206 trivial. 0 not checked. [2025-04-14 16:04:49,007 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:49,007 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249513829] [2025-04-14 16:04:49,007 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1249513829] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:49,007 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1589894960] [2025-04-14 16:04:49,007 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-14 16:04:49,007 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:49,007 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:49,009 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:04:49,010 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-04-14 16:04:49,134 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 224 statements into 2 equivalence classes. [2025-04-14 16:04:49,231 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 224 of 224 statements. [2025-04-14 16:04:49,231 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-14 16:04:49,232 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:49,236 INFO L256 TraceCheckSpWp]: Trace formula consists of 1006 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-04-14 16:04:49,239 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:49,446 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 238 proven. 6 refuted. 0 times theorem prover too weak. 202 trivial. 0 not checked. [2025-04-14 16:04:49,446 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:04:49,623 INFO L134 CoverageAnalysis]: Checked inductivity of 446 backedges. 171 proven. 73 refuted. 0 times theorem prover too weak. 202 trivial. 0 not checked. [2025-04-14 16:04:49,624 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1589894960] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:04:49,624 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:04:49,624 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 24 [2025-04-14 16:04:49,624 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357917750] [2025-04-14 16:04:49,624 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:04:49,624 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2025-04-14 16:04:49,624 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:49,625 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2025-04-14 16:04:49,625 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=412, Unknown=0, NotChecked=0, Total=552 [2025-04-14 16:04:49,625 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:49,625 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:49,625 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 8.25) internal successors, (198), 24 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:49,625 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:49,773 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:49,780 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2025-04-14 16:04:49,974 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:49,974 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:49,974 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:49,974 INFO L139 ounterexampleChecker]: Examining path program with hash -134856273, occurence #3 [2025-04-14 16:04:49,974 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:04:49,974 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 8 [2025-04-14 16:04:49,974 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:04:49,974 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 14 [2025-04-14 16:04:49,975 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:49,975 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 18 [2025-04-14 16:04:49,975 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:49,975 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 22 [2025-04-14 16:04:49,975 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:49,975 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 26 [2025-04-14 16:04:49,975 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:49,975 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 222 [2025-04-14 16:04:49,975 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:49,975 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:04:49,975 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:49,975 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:49,975 INFO L85 PathProgramCache]: Analyzing trace with hash -469643181, now seen corresponding path program 9 times [2025-04-14 16:04:49,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:49,976 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566290459] [2025-04-14 16:04:49,976 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-04-14 16:04:49,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:49,999 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 225 statements into 7 equivalence classes. [2025-04-14 16:04:50,138 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) and asserted 162 of 225 statements. [2025-04-14 16:04:50,139 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2025-04-14 16:04:50,139 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:50,756 INFO L134 CoverageAnalysis]: Checked inductivity of 450 backedges. 38 proven. 177 refuted. 0 times theorem prover too weak. 235 trivial. 0 not checked. [2025-04-14 16:04:50,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:50,756 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [566290459] [2025-04-14 16:04:50,757 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [566290459] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:50,757 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1176878397] [2025-04-14 16:04:50,757 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-04-14 16:04:50,757 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:50,757 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:50,759 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:04:50,760 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-04-14 16:04:50,891 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 225 statements into 7 equivalence classes. [2025-04-14 16:04:51,072 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) and asserted 162 of 225 statements. [2025-04-14 16:04:51,072 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2025-04-14 16:04:51,072 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:51,079 INFO L256 TraceCheckSpWp]: Trace formula consists of 786 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-04-14 16:04:51,082 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:51,678 INFO L134 CoverageAnalysis]: Checked inductivity of 450 backedges. 195 proven. 20 refuted. 0 times theorem prover too weak. 235 trivial. 0 not checked. [2025-04-14 16:04:51,678 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:04:52,129 INFO L134 CoverageAnalysis]: Checked inductivity of 450 backedges. 14 proven. 201 refuted. 0 times theorem prover too weak. 235 trivial. 0 not checked. [2025-04-14 16:04:52,129 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1176878397] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:04:52,129 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:04:52,129 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 38 [2025-04-14 16:04:52,129 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802412430] [2025-04-14 16:04:52,130 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:04:52,130 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2025-04-14 16:04:52,130 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:52,131 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2025-04-14 16:04:52,131 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=262, Invalid=1144, Unknown=0, NotChecked=0, Total=1406 [2025-04-14 16:04:52,131 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:52,131 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:52,131 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 6.526315789473684) internal successors, (248), 38 states have internal predecessors, (248), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:52,131 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:52,391 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:04:52,399 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2025-04-14 16:04:52,592 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:52,592 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:52,592 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:52,593 INFO L139 ounterexampleChecker]: Examining path program with hash -134856273, occurence #4 [2025-04-14 16:04:52,593 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:04:52,593 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 8 [2025-04-14 16:04:52,593 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:04:52,593 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 15 [2025-04-14 16:04:52,593 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:52,593 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 19 [2025-04-14 16:04:52,593 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:52,593 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 23 [2025-04-14 16:04:52,593 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:52,593 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 27 [2025-04-14 16:04:52,593 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:52,593 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 223 [2025-04-14 16:04:52,593 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:52,593 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:04:52,593 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:52,593 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:52,593 INFO L85 PathProgramCache]: Analyzing trace with hash -360775926, now seen corresponding path program 10 times [2025-04-14 16:04:52,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:52,594 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390379052] [2025-04-14 16:04:52,594 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-04-14 16:04:52,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:52,618 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 226 statements into 2 equivalence classes. [2025-04-14 16:04:52,675 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 226 of 226 statements. [2025-04-14 16:04:52,675 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-04-14 16:04:52,675 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:53,656 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 254 proven. 89 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2025-04-14 16:04:53,656 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:53,656 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390379052] [2025-04-14 16:04:53,656 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1390379052] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:04:53,656 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1434628195] [2025-04-14 16:04:53,656 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-04-14 16:04:53,656 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:04:53,656 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:04:53,658 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:04:53,659 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-04-14 16:04:53,789 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 226 statements into 2 equivalence classes. [2025-04-14 16:04:53,880 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 226 of 226 statements. [2025-04-14 16:04:53,880 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-04-14 16:04:53,880 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:53,884 INFO L256 TraceCheckSpWp]: Trace formula consists of 1024 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-04-14 16:04:53,888 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:04:55,098 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 270 proven. 15 refuted. 0 times theorem prover too weak. 170 trivial. 0 not checked. [2025-04-14 16:04:55,098 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:04:55,857 INFO L325 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2025-04-14 16:04:55,858 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2025-04-14 16:04:56,022 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 132 proven. 153 refuted. 0 times theorem prover too weak. 170 trivial. 0 not checked. [2025-04-14 16:04:56,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1434628195] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:04:56,022 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:04:56,022 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 15, 15] total 49 [2025-04-14 16:04:56,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1587912805] [2025-04-14 16:04:56,022 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:04:56,023 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 49 states [2025-04-14 16:04:56,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:56,025 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-04-14 16:04:56,025 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=337, Invalid=2015, Unknown=0, NotChecked=0, Total=2352 [2025-04-14 16:04:56,025 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:56,025 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:56,026 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 49 states, 49 states have (on average 8.428571428571429) internal successors, (413), 49 states have internal predecessors, (413), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:04:56,026 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:56,442 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:04:56,443 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:04:56,451 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-04-14 16:04:56,643 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2025-04-14 16:04:56,643 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:56,643 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:56,644 INFO L139 ounterexampleChecker]: Examining path program with hash -134856273, occurence #5 [2025-04-14 16:04:56,644 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:04:56,644 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 9 [2025-04-14 16:04:56,644 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:04:56,644 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 18 [2025-04-14 16:04:56,644 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:56,644 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 22 [2025-04-14 16:04:56,644 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:56,644 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 26 [2025-04-14 16:04:56,644 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:56,644 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 30 [2025-04-14 16:04:56,644 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:56,644 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 226 [2025-04-14 16:04:56,644 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:04:56,644 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:04:56,644 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:56,645 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:56,645 INFO L85 PathProgramCache]: Analyzing trace with hash 227847100, now seen corresponding path program 11 times [2025-04-14 16:04:56,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:56,645 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394729976] [2025-04-14 16:04:56,645 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-04-14 16:04:56,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:56,667 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 229 statements into 7 equivalence classes. [2025-04-14 16:04:57,067 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) and asserted 229 of 229 statements. [2025-04-14 16:04:57,067 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2025-04-14 16:04:57,067 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:04:57,640 INFO L134 CoverageAnalysis]: Checked inductivity of 476 backedges. 148 proven. 0 refuted. 0 times theorem prover too weak. 328 trivial. 0 not checked. [2025-04-14 16:04:57,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:04:57,640 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394729976] [2025-04-14 16:04:57,640 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [394729976] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:04:57,640 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:04:57,640 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-04-14 16:04:57,640 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504381108] [2025-04-14 16:04:57,640 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:04:57,641 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-04-14 16:04:57,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:04:57,642 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-04-14 16:04:57,642 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2025-04-14 16:04:57,642 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:57,642 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:04:57,643 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 15.2) internal successors, (76), 5 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:04:57,643 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:04:58,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:04:58,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:04:58,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:04:58,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:04:58,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:04:58,288 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-04-14 16:04:58,288 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:04:58,288 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:04:58,288 INFO L139 ounterexampleChecker]: Examining path program with hash -1566689597, occurence #1 [2025-04-14 16:04:58,288 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:04:58,288 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:04:58,289 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:04:58,289 INFO L85 PathProgramCache]: Analyzing trace with hash 799762282, now seen corresponding path program 12 times [2025-04-14 16:04:58,289 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:04:58,289 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [17552125] [2025-04-14 16:04:58,289 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-04-14 16:04:58,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:04:58,322 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 327 statements into 9 equivalence classes. [2025-04-14 16:04:59,078 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) and asserted 327 of 327 statements. [2025-04-14 16:04:59,078 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2025-04-14 16:04:59,078 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:01,460 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 472 proven. 274 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2025-04-14 16:05:01,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:05:01,461 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [17552125] [2025-04-14 16:05:01,461 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [17552125] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:01,461 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [581565473] [2025-04-14 16:05:01,461 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-04-14 16:05:01,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:05:01,461 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:05:01,463 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:05:01,464 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-04-14 16:05:01,627 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 327 statements into 9 equivalence classes. [2025-04-14 16:05:06,404 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) and asserted 327 of 327 statements. [2025-04-14 16:05:06,405 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2025-04-14 16:05:06,405 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:06,415 INFO L256 TraceCheckSpWp]: Trace formula consists of 1387 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-04-14 16:05:06,418 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:06,989 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 205 proven. 28 refuted. 0 times theorem prover too weak. 551 trivial. 0 not checked. [2025-04-14 16:05:06,989 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:05:07,579 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 39 proven. 194 refuted. 0 times theorem prover too weak. 551 trivial. 0 not checked. [2025-04-14 16:05:07,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [581565473] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:05:07,579 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:05:07,579 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 19, 19] total 72 [2025-04-14 16:05:07,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1913443751] [2025-04-14 16:05:07,579 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:05:07,580 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 72 states [2025-04-14 16:05:07,580 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:05:07,581 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2025-04-14 16:05:07,582 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=808, Invalid=4304, Unknown=0, NotChecked=0, Total=5112 [2025-04-14 16:05:07,582 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:07,582 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:05:07,582 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 72 states, 72 states have (on average 6.75) internal successors, (486), 72 states have internal predecessors, (486), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:07,582 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:07,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:07,841 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:07,841 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:07,841 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:07,841 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:07,841 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:07,852 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-04-14 16:05:08,041 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2025-04-14 16:05:08,041 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:05:08,042 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:05:08,042 INFO L139 ounterexampleChecker]: Examining path program with hash -1566689597, occurence #2 [2025-04-14 16:05:08,042 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:05:08,042 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 9 [2025-04-14 16:05:08,042 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:08,042 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 20 [2025-04-14 16:05:08,042 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:08,042 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 24 [2025-04-14 16:05:08,042 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:08,042 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 28 [2025-04-14 16:05:08,042 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:08,042 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 32 [2025-04-14 16:05:08,042 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:08,042 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 291 [2025-04-14 16:05:08,061 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:08,062 INFO L85 PathProgramCache]: Analyzing trace with hash -680071502, now seen corresponding path program 1 times [2025-04-14 16:05:08,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:08,062 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1687258378] [2025-04-14 16:05:08,062 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:08,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:08,092 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 292 statements into 1 equivalence classes. [2025-04-14 16:05:08,165 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 292 of 292 statements. [2025-04-14 16:05:08,166 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:08,166 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:09,235 INFO L134 CoverageAnalysis]: Checked inductivity of 765 backedges. 252 proven. 113 refuted. 0 times theorem prover too weak. 400 trivial. 0 not checked. [2025-04-14 16:05:09,236 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:09,236 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1687258378] [2025-04-14 16:05:09,236 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1687258378] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:09,236 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1509115704] [2025-04-14 16:05:09,236 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:09,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:09,272 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 292 statements into 1 equivalence classes. [2025-04-14 16:05:09,356 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 292 of 292 statements. [2025-04-14 16:05:09,356 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:09,356 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:09,361 INFO L256 TraceCheckSpWp]: Trace formula consists of 1268 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-04-14 16:05:09,364 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:09,940 INFO L134 CoverageAnalysis]: Checked inductivity of 765 backedges. 320 proven. 45 refuted. 0 times theorem prover too weak. 400 trivial. 0 not checked. [2025-04-14 16:05:09,940 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1509115704] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:09,940 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:09,940 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 41 [2025-04-14 16:05:09,941 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:09,941 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 296 [2025-04-14 16:05:09,971 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:09,971 INFO L85 PathProgramCache]: Analyzing trace with hash 629512002, now seen corresponding path program 1 times [2025-04-14 16:05:09,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:09,971 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981030354] [2025-04-14 16:05:09,971 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:09,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:09,998 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 297 statements into 1 equivalence classes. [2025-04-14 16:05:10,096 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 297 of 297 statements. [2025-04-14 16:05:10,097 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:10,097 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:10,975 INFO L134 CoverageAnalysis]: Checked inductivity of 768 backedges. 320 proven. 70 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2025-04-14 16:05:10,975 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:10,975 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981030354] [2025-04-14 16:05:10,975 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [981030354] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:10,975 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1010662118] [2025-04-14 16:05:10,975 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:10,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:11,004 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 297 statements into 1 equivalence classes. [2025-04-14 16:05:11,089 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 297 of 297 statements. [2025-04-14 16:05:11,089 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:11,089 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:11,094 INFO L256 TraceCheckSpWp]: Trace formula consists of 1283 conjuncts, 22 conjuncts are in the unsatisfiable core [2025-04-14 16:05:11,098 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:11,652 INFO L134 CoverageAnalysis]: Checked inductivity of 768 backedges. 354 proven. 36 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2025-04-14 16:05:11,652 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1010662118] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:11,652 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:11,652 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 36 [2025-04-14 16:05:11,652 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:11,652 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 299 [2025-04-14 16:05:11,652 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:11,652 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 303 [2025-04-14 16:05:11,652 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:11,652 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 305 [2025-04-14 16:05:11,701 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:11,701 INFO L85 PathProgramCache]: Analyzing trace with hash -870971283, now seen corresponding path program 1 times [2025-04-14 16:05:11,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:11,701 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1234116555] [2025-04-14 16:05:11,701 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:11,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:11,738 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 306 statements into 1 equivalence classes. [2025-04-14 16:05:11,820 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 306 of 306 statements. [2025-04-14 16:05:11,821 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:11,821 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:12,716 INFO L134 CoverageAnalysis]: Checked inductivity of 772 backedges. 320 proven. 70 refuted. 0 times theorem prover too weak. 382 trivial. 0 not checked. [2025-04-14 16:05:12,716 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:12,716 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1234116555] [2025-04-14 16:05:12,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1234116555] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:12,716 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [41186145] [2025-04-14 16:05:12,716 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:12,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:12,756 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 306 statements into 1 equivalence classes. [2025-04-14 16:05:12,871 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 306 of 306 statements. [2025-04-14 16:05:12,871 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:12,871 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:12,876 INFO L256 TraceCheckSpWp]: Trace formula consists of 1311 conjuncts, 22 conjuncts are in the unsatisfiable core [2025-04-14 16:05:12,880 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:13,462 INFO L134 CoverageAnalysis]: Checked inductivity of 772 backedges. 354 proven. 36 refuted. 0 times theorem prover too weak. 382 trivial. 0 not checked. [2025-04-14 16:05:13,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [41186145] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:13,462 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:13,462 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 36 [2025-04-14 16:05:13,462 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:13,462 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 315 [2025-04-14 16:05:13,493 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:13,493 INFO L85 PathProgramCache]: Analyzing trace with hash 1522334477, now seen corresponding path program 1 times [2025-04-14 16:05:13,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:13,493 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408799737] [2025-04-14 16:05:13,493 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:13,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:13,521 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 316 statements into 1 equivalence classes. [2025-04-14 16:05:13,633 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 316 of 316 statements. [2025-04-14 16:05:13,634 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:13,634 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:14,428 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 320 proven. 70 refuted. 0 times theorem prover too weak. 394 trivial. 0 not checked. [2025-04-14 16:05:14,428 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:14,428 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1408799737] [2025-04-14 16:05:14,428 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1408799737] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:14,428 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [251927316] [2025-04-14 16:05:14,428 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:14,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:14,459 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 316 statements into 1 equivalence classes. [2025-04-14 16:05:14,552 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 316 of 316 statements. [2025-04-14 16:05:14,552 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:14,552 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:14,557 INFO L256 TraceCheckSpWp]: Trace formula consists of 1349 conjuncts, 22 conjuncts are in the unsatisfiable core [2025-04-14 16:05:14,561 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:15,153 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 354 proven. 36 refuted. 0 times theorem prover too weak. 394 trivial. 0 not checked. [2025-04-14 16:05:15,153 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [251927316] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:15,153 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:15,153 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 36 [2025-04-14 16:05:15,154 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:15,154 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 326 [2025-04-14 16:05:15,154 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:15,154 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:05:15,154 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:05:15,154 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:15,154 INFO L85 PathProgramCache]: Analyzing trace with hash 105046026, now seen corresponding path program 13 times [2025-04-14 16:05:15,154 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:05:15,154 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1693011441] [2025-04-14 16:05:15,154 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-04-14 16:05:15,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:15,183 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 329 statements into 1 equivalence classes. [2025-04-14 16:05:15,269 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 329 of 329 statements. [2025-04-14 16:05:15,269 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:15,269 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:16,260 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 320 proven. 70 refuted. 0 times theorem prover too weak. 411 trivial. 0 not checked. [2025-04-14 16:05:16,260 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:05:16,260 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1693011441] [2025-04-14 16:05:16,260 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1693011441] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:16,260 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [810068414] [2025-04-14 16:05:16,260 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-04-14 16:05:16,260 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:05:16,261 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:05:16,262 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:05:16,263 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-04-14 16:05:16,468 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 329 statements into 1 equivalence classes. [2025-04-14 16:05:16,579 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 329 of 329 statements. [2025-04-14 16:05:16,579 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:16,579 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:16,585 INFO L256 TraceCheckSpWp]: Trace formula consists of 1405 conjuncts, 22 conjuncts are in the unsatisfiable core [2025-04-14 16:05:16,592 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:17,121 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 358 proven. 36 refuted. 0 times theorem prover too weak. 407 trivial. 0 not checked. [2025-04-14 16:05:17,121 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:05:17,600 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 239 proven. 155 refuted. 0 times theorem prover too weak. 407 trivial. 0 not checked. [2025-04-14 16:05:17,600 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [810068414] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:05:17,600 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:05:17,600 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19] total 53 [2025-04-14 16:05:17,601 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546527548] [2025-04-14 16:05:17,601 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:05:17,601 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2025-04-14 16:05:17,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:05:17,602 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2025-04-14 16:05:17,602 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=2232, Unknown=0, NotChecked=0, Total=2862 [2025-04-14 16:05:17,602 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:17,602 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:05:17,603 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 54 states have (on average 7.092592592592593) internal successors, (383), 53 states have internal predecessors, (383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:17,603 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:17,923 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:05:17,931 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2025-04-14 16:05:18,124 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable32,SelfDestructingSolverStorable33,SelfDestructingSolverStorable34,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2025-04-14 16:05:18,124 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:05:18,124 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:05:18,125 INFO L139 ounterexampleChecker]: Examining path program with hash -1566689597, occurence #3 [2025-04-14 16:05:18,125 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:05:18,125 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 10 [2025-04-14 16:05:18,125 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:18,125 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 21 [2025-04-14 16:05:18,125 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:18,125 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 25 [2025-04-14 16:05:18,125 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:18,125 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 29 [2025-04-14 16:05:18,125 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:18,125 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 33 [2025-04-14 16:05:18,125 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:18,125 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 292 [2025-04-14 16:05:18,141 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:18,142 INFO L85 PathProgramCache]: Analyzing trace with hash 334628432, now seen corresponding path program 1 times [2025-04-14 16:05:18,142 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:18,142 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118299897] [2025-04-14 16:05:18,142 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:18,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:18,171 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 293 statements into 1 equivalence classes. [2025-04-14 16:05:18,243 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 293 of 293 statements. [2025-04-14 16:05:18,243 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:18,243 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:19,072 INFO L134 CoverageAnalysis]: Checked inductivity of 774 backedges. 252 proven. 113 refuted. 0 times theorem prover too weak. 409 trivial. 0 not checked. [2025-04-14 16:05:19,072 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:19,072 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118299897] [2025-04-14 16:05:19,072 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1118299897] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:19,072 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1246147581] [2025-04-14 16:05:19,072 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:19,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:19,100 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 293 statements into 1 equivalence classes. [2025-04-14 16:05:19,185 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 293 of 293 statements. [2025-04-14 16:05:19,186 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:19,186 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:19,191 INFO L256 TraceCheckSpWp]: Trace formula consists of 1277 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-04-14 16:05:19,195 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:19,726 INFO L134 CoverageAnalysis]: Checked inductivity of 774 backedges. 320 proven. 45 refuted. 0 times theorem prover too weak. 409 trivial. 0 not checked. [2025-04-14 16:05:19,726 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1246147581] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:19,726 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:19,726 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 41 [2025-04-14 16:05:19,727 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:19,727 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 297 [2025-04-14 16:05:19,755 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:19,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1232835844, now seen corresponding path program 1 times [2025-04-14 16:05:19,755 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:19,755 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1355284409] [2025-04-14 16:05:19,755 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:19,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:19,782 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 298 statements into 1 equivalence classes. [2025-04-14 16:05:19,857 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 298 of 298 statements. [2025-04-14 16:05:19,857 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:19,857 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:20,720 INFO L134 CoverageAnalysis]: Checked inductivity of 777 backedges. 320 proven. 139 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2025-04-14 16:05:20,721 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:20,721 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1355284409] [2025-04-14 16:05:20,721 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1355284409] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:20,721 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1653196384] [2025-04-14 16:05:20,721 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:20,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:20,749 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 298 statements into 1 equivalence classes. [2025-04-14 16:05:20,835 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 298 of 298 statements. [2025-04-14 16:05:20,835 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:20,835 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:20,840 INFO L256 TraceCheckSpWp]: Trace formula consists of 1292 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-04-14 16:05:20,843 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:21,400 INFO L134 CoverageAnalysis]: Checked inductivity of 777 backedges. 414 proven. 45 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2025-04-14 16:05:21,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1653196384] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:21,401 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:21,401 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 40 [2025-04-14 16:05:21,401 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:21,401 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 300 [2025-04-14 16:05:21,401 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:21,401 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 304 [2025-04-14 16:05:21,401 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:21,401 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 306 [2025-04-14 16:05:21,428 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:21,428 INFO L85 PathProgramCache]: Analyzing trace with hash 184514699, now seen corresponding path program 1 times [2025-04-14 16:05:21,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:21,428 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271735006] [2025-04-14 16:05:21,429 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:21,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:21,458 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 307 statements into 1 equivalence classes. [2025-04-14 16:05:21,562 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 307 of 307 statements. [2025-04-14 16:05:21,563 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:21,563 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:22,544 INFO L134 CoverageAnalysis]: Checked inductivity of 781 backedges. 320 proven. 139 refuted. 0 times theorem prover too weak. 322 trivial. 0 not checked. [2025-04-14 16:05:22,545 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:22,545 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271735006] [2025-04-14 16:05:22,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1271735006] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:22,545 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1444881701] [2025-04-14 16:05:22,545 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:22,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:22,576 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 307 statements into 1 equivalence classes. [2025-04-14 16:05:22,663 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 307 of 307 statements. [2025-04-14 16:05:22,663 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:22,663 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:22,668 INFO L256 TraceCheckSpWp]: Trace formula consists of 1320 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-04-14 16:05:22,671 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:23,225 INFO L134 CoverageAnalysis]: Checked inductivity of 781 backedges. 414 proven. 45 refuted. 0 times theorem prover too weak. 322 trivial. 0 not checked. [2025-04-14 16:05:23,226 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1444881701] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:23,226 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:23,226 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 40 [2025-04-14 16:05:23,226 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:23,226 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 316 [2025-04-14 16:05:23,253 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:23,254 INFO L85 PathProgramCache]: Analyzing trace with hash 1353645227, now seen corresponding path program 1 times [2025-04-14 16:05:23,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:23,254 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [485015269] [2025-04-14 16:05:23,254 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:23,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:23,283 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 317 statements into 1 equivalence classes. [2025-04-14 16:05:23,361 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 317 of 317 statements. [2025-04-14 16:05:23,361 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:23,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:24,248 INFO L134 CoverageAnalysis]: Checked inductivity of 793 backedges. 320 proven. 139 refuted. 0 times theorem prover too weak. 334 trivial. 0 not checked. [2025-04-14 16:05:24,248 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:24,248 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [485015269] [2025-04-14 16:05:24,249 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [485015269] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:24,249 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [610559181] [2025-04-14 16:05:24,249 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:24,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:24,277 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 317 statements into 1 equivalence classes. [2025-04-14 16:05:24,404 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 317 of 317 statements. [2025-04-14 16:05:24,404 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:24,404 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:24,407 INFO L256 TraceCheckSpWp]: Trace formula consists of 1358 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-04-14 16:05:24,410 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:24,944 INFO L134 CoverageAnalysis]: Checked inductivity of 793 backedges. 414 proven. 45 refuted. 0 times theorem prover too weak. 334 trivial. 0 not checked. [2025-04-14 16:05:24,944 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [610559181] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:24,944 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:24,944 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 40 [2025-04-14 16:05:24,944 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:24,944 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 327 [2025-04-14 16:05:24,944 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:24,944 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:05:24,944 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:05:24,945 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:24,945 INFO L85 PathProgramCache]: Analyzing trace with hash 2010610616, now seen corresponding path program 14 times [2025-04-14 16:05:24,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:05:24,945 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [617805146] [2025-04-14 16:05:24,945 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-14 16:05:24,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:24,975 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 330 statements into 2 equivalence classes. [2025-04-14 16:05:25,051 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 330 of 330 statements. [2025-04-14 16:05:25,051 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-14 16:05:25,051 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:26,039 INFO L134 CoverageAnalysis]: Checked inductivity of 810 backedges. 320 proven. 139 refuted. 0 times theorem prover too weak. 351 trivial. 0 not checked. [2025-04-14 16:05:26,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:05:26,039 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [617805146] [2025-04-14 16:05:26,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [617805146] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:26,039 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1431914825] [2025-04-14 16:05:26,040 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-14 16:05:26,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:05:26,040 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:05:26,041 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:05:26,043 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-04-14 16:05:26,296 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 330 statements into 2 equivalence classes. [2025-04-14 16:05:26,409 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 330 of 330 statements. [2025-04-14 16:05:26,410 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-14 16:05:26,410 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:26,415 INFO L256 TraceCheckSpWp]: Trace formula consists of 1414 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-04-14 16:05:26,418 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:26,995 INFO L134 CoverageAnalysis]: Checked inductivity of 810 backedges. 361 proven. 45 refuted. 0 times theorem prover too weak. 404 trivial. 0 not checked. [2025-04-14 16:05:26,995 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:05:27,628 INFO L134 CoverageAnalysis]: Checked inductivity of 810 backedges. 224 proven. 182 refuted. 0 times theorem prover too weak. 404 trivial. 0 not checked. [2025-04-14 16:05:27,628 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1431914825] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:05:27,628 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:05:27,628 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 22, 22] total 61 [2025-04-14 16:05:27,628 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56115863] [2025-04-14 16:05:27,628 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:05:27,629 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 61 states [2025-04-14 16:05:27,629 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:05:27,629 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2025-04-14 16:05:27,630 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=3097, Unknown=0, NotChecked=0, Total=3660 [2025-04-14 16:05:27,630 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:27,630 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:05:27,630 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 61 states, 61 states have (on average 7.327868852459017) internal successors, (447), 61 states have internal predecessors, (447), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:05:27,630 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:27,630 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:27,630 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:27,630 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:05:27,631 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:28,044 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:28,045 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:28,045 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:28,045 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:28,045 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:28,045 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:05:28,045 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:05:28,053 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2025-04-14 16:05:28,245 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable42,SelfDestructingSolverStorable43,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36,SelfDestructingSolverStorable37,SelfDestructingSolverStorable38,SelfDestructingSolverStorable39 [2025-04-14 16:05:28,245 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:05:28,245 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:05:28,246 INFO L139 ounterexampleChecker]: Examining path program with hash -1566689597, occurence #4 [2025-04-14 16:05:28,246 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:05:28,246 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 11 [2025-04-14 16:05:28,246 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:28,246 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 23 [2025-04-14 16:05:28,246 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:28,246 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 27 [2025-04-14 16:05:28,246 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:28,246 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 31 [2025-04-14 16:05:28,246 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:28,246 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 35 [2025-04-14 16:05:28,246 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:28,246 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 294 [2025-04-14 16:05:28,263 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:28,263 INFO L85 PathProgramCache]: Analyzing trace with hash -1596206363, now seen corresponding path program 1 times [2025-04-14 16:05:28,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:28,263 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270128343] [2025-04-14 16:05:28,263 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:28,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:28,304 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 295 statements into 1 equivalence classes. [2025-04-14 16:05:28,378 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 295 of 295 statements. [2025-04-14 16:05:28,379 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:28,379 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:29,302 INFO L134 CoverageAnalysis]: Checked inductivity of 794 backedges. 320 proven. 68 refuted. 0 times theorem prover too weak. 406 trivial. 0 not checked. [2025-04-14 16:05:29,302 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:29,302 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270128343] [2025-04-14 16:05:29,302 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [270128343] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:29,302 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [211199530] [2025-04-14 16:05:29,302 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:29,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:29,332 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 295 statements into 1 equivalence classes. [2025-04-14 16:05:29,419 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 295 of 295 statements. [2025-04-14 16:05:29,420 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:29,420 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:29,425 INFO L256 TraceCheckSpWp]: Trace formula consists of 1295 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-04-14 16:05:29,428 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:30,016 INFO L134 CoverageAnalysis]: Checked inductivity of 794 backedges. 333 proven. 55 refuted. 0 times theorem prover too weak. 406 trivial. 0 not checked. [2025-04-14 16:05:30,016 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [211199530] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:30,016 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:30,016 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 45 [2025-04-14 16:05:30,016 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:30,017 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 299 [2025-04-14 16:05:30,045 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:30,045 INFO L85 PathProgramCache]: Analyzing trace with hash -643691489, now seen corresponding path program 1 times [2025-04-14 16:05:30,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:30,046 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187960775] [2025-04-14 16:05:30,046 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:30,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:30,074 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 300 statements into 1 equivalence classes. [2025-04-14 16:05:30,149 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 300 of 300 statements. [2025-04-14 16:05:30,149 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:30,149 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:31,078 INFO L134 CoverageAnalysis]: Checked inductivity of 797 backedges. 326 proven. 178 refuted. 0 times theorem prover too weak. 293 trivial. 0 not checked. [2025-04-14 16:05:31,078 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:31,078 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187960775] [2025-04-14 16:05:31,078 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [187960775] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:31,078 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1456656260] [2025-04-14 16:05:31,078 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:31,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:31,106 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 300 statements into 1 equivalence classes. [2025-04-14 16:05:31,192 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 300 of 300 statements. [2025-04-14 16:05:31,192 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:31,192 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:31,197 INFO L256 TraceCheckSpWp]: Trace formula consists of 1310 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-04-14 16:05:31,200 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:31,817 INFO L134 CoverageAnalysis]: Checked inductivity of 797 backedges. 449 proven. 55 refuted. 0 times theorem prover too weak. 293 trivial. 0 not checked. [2025-04-14 16:05:31,817 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1456656260] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:31,817 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:31,817 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 44 [2025-04-14 16:05:31,818 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:31,818 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 302 [2025-04-14 16:05:31,818 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:31,818 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 306 [2025-04-14 16:05:31,818 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:31,818 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 308 [2025-04-14 16:05:31,846 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:31,846 INFO L85 PathProgramCache]: Analyzing trace with hash 994058592, now seen corresponding path program 1 times [2025-04-14 16:05:31,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:31,846 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721033886] [2025-04-14 16:05:31,846 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:31,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:31,875 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 309 statements into 1 equivalence classes. [2025-04-14 16:05:31,952 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 309 of 309 statements. [2025-04-14 16:05:31,952 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:31,952 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:32,933 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 326 proven. 178 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2025-04-14 16:05:32,934 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:32,934 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721033886] [2025-04-14 16:05:32,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1721033886] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:32,934 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1000317000] [2025-04-14 16:05:32,934 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:32,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:32,968 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 309 statements into 1 equivalence classes. [2025-04-14 16:05:33,057 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 309 of 309 statements. [2025-04-14 16:05:33,057 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:33,057 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:33,062 INFO L256 TraceCheckSpWp]: Trace formula consists of 1338 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-04-14 16:05:33,065 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:33,685 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 449 proven. 55 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2025-04-14 16:05:33,685 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1000317000] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:33,685 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:33,685 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 44 [2025-04-14 16:05:33,685 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:33,686 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 318 [2025-04-14 16:05:33,715 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:33,715 INFO L85 PathProgramCache]: Analyzing trace with hash 768474688, now seen corresponding path program 1 times [2025-04-14 16:05:33,715 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:33,715 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936912387] [2025-04-14 16:05:33,715 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:33,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:33,747 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 319 statements into 1 equivalence classes. [2025-04-14 16:05:33,828 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 319 of 319 statements. [2025-04-14 16:05:33,828 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:33,828 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:34,928 INFO L134 CoverageAnalysis]: Checked inductivity of 813 backedges. 326 proven. 178 refuted. 0 times theorem prover too weak. 309 trivial. 0 not checked. [2025-04-14 16:05:34,929 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:34,929 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1936912387] [2025-04-14 16:05:34,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1936912387] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:34,929 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1220976448] [2025-04-14 16:05:34,929 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:34,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:34,958 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 319 statements into 1 equivalence classes. [2025-04-14 16:05:35,052 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 319 of 319 statements. [2025-04-14 16:05:35,052 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:35,052 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:35,057 INFO L256 TraceCheckSpWp]: Trace formula consists of 1376 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-04-14 16:05:35,060 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:35,761 INFO L134 CoverageAnalysis]: Checked inductivity of 813 backedges. 449 proven. 55 refuted. 0 times theorem prover too weak. 309 trivial. 0 not checked. [2025-04-14 16:05:35,761 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1220976448] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:35,762 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:35,762 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 44 [2025-04-14 16:05:35,762 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:35,762 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 329 [2025-04-14 16:05:35,762 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:35,762 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:05:35,762 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:05:35,762 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:35,762 INFO L85 PathProgramCache]: Analyzing trace with hash -493682481, now seen corresponding path program 15 times [2025-04-14 16:05:35,762 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:05:35,762 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052726853] [2025-04-14 16:05:35,762 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-04-14 16:05:35,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:35,796 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 332 statements into 9 equivalence classes. [2025-04-14 16:05:36,113 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 274 of 332 statements. [2025-04-14 16:05:36,113 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-04-14 16:05:36,113 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:36,976 INFO L134 CoverageAnalysis]: Checked inductivity of 830 backedges. 114 proven. 234 refuted. 0 times theorem prover too weak. 482 trivial. 0 not checked. [2025-04-14 16:05:36,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:05:36,976 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052726853] [2025-04-14 16:05:36,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2052726853] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:36,976 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1715722592] [2025-04-14 16:05:36,976 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-04-14 16:05:36,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:05:36,977 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:05:36,978 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:05:36,980 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-04-14 16:05:37,276 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 332 statements into 9 equivalence classes. [2025-04-14 16:05:38,936 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 274 of 332 statements. [2025-04-14 16:05:38,936 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-04-14 16:05:38,936 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:38,946 INFO L256 TraceCheckSpWp]: Trace formula consists of 1222 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-04-14 16:05:38,949 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:39,513 INFO L134 CoverageAnalysis]: Checked inductivity of 830 backedges. 293 proven. 55 refuted. 0 times theorem prover too weak. 482 trivial. 0 not checked. [2025-04-14 16:05:39,513 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:05:40,111 INFO L134 CoverageAnalysis]: Checked inductivity of 830 backedges. 101 proven. 247 refuted. 0 times theorem prover too weak. 482 trivial. 0 not checked. [2025-04-14 16:05:40,111 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1715722592] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:05:40,111 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:05:40,112 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 66 [2025-04-14 16:05:40,112 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712118471] [2025-04-14 16:05:40,112 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:05:40,112 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 66 states [2025-04-14 16:05:40,112 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:05:40,113 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2025-04-14 16:05:40,114 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=924, Invalid=3366, Unknown=0, NotChecked=0, Total=4290 [2025-04-14 16:05:40,114 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:40,114 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:05:40,114 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 66 states, 66 states have (on average 4.7272727272727275) internal successors, (312), 66 states have internal predecessors, (312), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:05:40,114 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:40,275 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:05:40,276 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:05:40,286 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-04-14 16:05:40,477 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable44,SelfDestructingSolverStorable45,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable48,SelfDestructingSolverStorable49 [2025-04-14 16:05:40,477 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:05:40,477 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:05:40,477 INFO L139 ounterexampleChecker]: Examining path program with hash -1566689597, occurence #5 [2025-04-14 16:05:40,477 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:05:40,477 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 11 [2025-04-14 16:05:40,477 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:40,478 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 24 [2025-04-14 16:05:40,478 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:40,478 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 28 [2025-04-14 16:05:40,478 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:40,478 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 32 [2025-04-14 16:05:40,478 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:40,478 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 36 [2025-04-14 16:05:40,478 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:40,478 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 295 [2025-04-14 16:05:40,492 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:40,492 INFO L85 PathProgramCache]: Analyzing trace with hash -1491592074, now seen corresponding path program 1 times [2025-04-14 16:05:40,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:40,492 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508554960] [2025-04-14 16:05:40,492 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:40,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:40,526 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 296 statements into 1 equivalence classes. [2025-04-14 16:05:40,600 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 296 of 296 statements. [2025-04-14 16:05:40,600 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:40,600 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:41,582 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 320 proven. 160 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2025-04-14 16:05:41,582 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:41,582 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1508554960] [2025-04-14 16:05:41,582 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1508554960] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:41,582 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [381630338] [2025-04-14 16:05:41,582 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:41,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:41,611 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 296 statements into 1 equivalence classes. [2025-04-14 16:05:41,694 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 296 of 296 statements. [2025-04-14 16:05:41,695 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:41,695 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:41,700 INFO L256 TraceCheckSpWp]: Trace formula consists of 1304 conjuncts, 28 conjuncts are in the unsatisfiable core [2025-04-14 16:05:41,702 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:42,349 INFO L134 CoverageAnalysis]: Checked inductivity of 805 backedges. 414 proven. 66 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2025-04-14 16:05:42,350 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [381630338] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:42,350 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:42,350 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 49 [2025-04-14 16:05:42,350 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:42,350 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 300 [2025-04-14 16:05:42,378 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:42,378 INFO L85 PathProgramCache]: Analyzing trace with hash -845156922, now seen corresponding path program 1 times [2025-04-14 16:05:42,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:42,378 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [7126763] [2025-04-14 16:05:42,378 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:42,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:42,410 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 301 statements into 1 equivalence classes. [2025-04-14 16:05:42,485 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 301 of 301 statements. [2025-04-14 16:05:42,485 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:42,485 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:43,425 INFO L134 CoverageAnalysis]: Checked inductivity of 808 backedges. 326 proven. 178 refuted. 0 times theorem prover too weak. 304 trivial. 0 not checked. [2025-04-14 16:05:43,425 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:43,425 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [7126763] [2025-04-14 16:05:43,425 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [7126763] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:43,425 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1960742428] [2025-04-14 16:05:43,425 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:43,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:43,454 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 301 statements into 1 equivalence classes. [2025-04-14 16:05:43,541 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 301 of 301 statements. [2025-04-14 16:05:43,541 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:43,541 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:43,546 INFO L256 TraceCheckSpWp]: Trace formula consists of 1319 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-04-14 16:05:43,549 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:44,154 INFO L134 CoverageAnalysis]: Checked inductivity of 808 backedges. 449 proven. 55 refuted. 0 times theorem prover too weak. 304 trivial. 0 not checked. [2025-04-14 16:05:44,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1960742428] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:44,154 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:44,154 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 44 [2025-04-14 16:05:44,155 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:44,155 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 303 [2025-04-14 16:05:44,155 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:44,155 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 307 [2025-04-14 16:05:44,155 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:44,155 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 309 [2025-04-14 16:05:44,182 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:44,182 INFO L85 PathProgramCache]: Analyzing trace with hash -389620175, now seen corresponding path program 1 times [2025-04-14 16:05:44,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:44,182 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141023110] [2025-04-14 16:05:44,182 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:44,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:44,212 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 310 statements into 1 equivalence classes. [2025-04-14 16:05:44,288 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 310 of 310 statements. [2025-04-14 16:05:44,289 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:44,289 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:45,245 INFO L134 CoverageAnalysis]: Checked inductivity of 812 backedges. 326 proven. 178 refuted. 0 times theorem prover too weak. 308 trivial. 0 not checked. [2025-04-14 16:05:45,245 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:45,245 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141023110] [2025-04-14 16:05:45,245 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2141023110] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:45,245 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1040391935] [2025-04-14 16:05:45,245 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:45,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:45,275 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 310 statements into 1 equivalence classes. [2025-04-14 16:05:45,362 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 310 of 310 statements. [2025-04-14 16:05:45,362 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:45,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:45,367 INFO L256 TraceCheckSpWp]: Trace formula consists of 1347 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-04-14 16:05:45,370 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:45,969 INFO L134 CoverageAnalysis]: Checked inductivity of 812 backedges. 449 proven. 55 refuted. 0 times theorem prover too weak. 308 trivial. 0 not checked. [2025-04-14 16:05:45,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1040391935] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:45,969 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:45,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 44 [2025-04-14 16:05:45,969 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:45,969 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 319 [2025-04-14 16:05:45,997 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:45,997 INFO L85 PathProgramCache]: Analyzing trace with hash -1290319663, now seen corresponding path program 1 times [2025-04-14 16:05:45,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:45,998 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060167055] [2025-04-14 16:05:45,998 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:45,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:46,028 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 320 statements into 1 equivalence classes. [2025-04-14 16:05:46,109 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 320 of 320 statements. [2025-04-14 16:05:46,109 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:46,109 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:47,098 INFO L134 CoverageAnalysis]: Checked inductivity of 824 backedges. 326 proven. 178 refuted. 0 times theorem prover too weak. 320 trivial. 0 not checked. [2025-04-14 16:05:47,098 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:47,098 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060167055] [2025-04-14 16:05:47,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2060167055] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:47,098 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [1022261075] [2025-04-14 16:05:47,099 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:47,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:47,129 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 320 statements into 1 equivalence classes. [2025-04-14 16:05:47,256 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 320 of 320 statements. [2025-04-14 16:05:47,256 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:47,256 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:47,259 INFO L256 TraceCheckSpWp]: Trace formula consists of 1385 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-04-14 16:05:47,262 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:47,845 INFO L134 CoverageAnalysis]: Checked inductivity of 824 backedges. 449 proven. 55 refuted. 0 times theorem prover too weak. 320 trivial. 0 not checked. [2025-04-14 16:05:47,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [1022261075] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:47,845 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:47,845 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 44 [2025-04-14 16:05:47,845 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:47,845 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 330 [2025-04-14 16:05:47,845 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:47,846 WARN L214 ounterexampleChecker]: Failed to synthesize and prove commutativity condition. [2025-04-14 16:05:47,846 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:05:47,846 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:47,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1886107242, now seen corresponding path program 16 times [2025-04-14 16:05:47,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:05:47,846 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1093373154] [2025-04-14 16:05:47,846 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-04-14 16:05:47,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:47,879 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 333 statements into 2 equivalence classes. [2025-04-14 16:05:47,978 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 333 of 333 statements. [2025-04-14 16:05:47,978 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-04-14 16:05:47,978 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:49,310 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 349 proven. 68 refuted. 0 times theorem prover too weak. 424 trivial. 0 not checked. [2025-04-14 16:05:49,311 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:05:49,311 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1093373154] [2025-04-14 16:05:49,311 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1093373154] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:49,311 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [831505576] [2025-04-14 16:05:49,311 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-04-14 16:05:49,311 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:05:49,311 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:05:49,313 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:05:49,314 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-04-14 16:05:49,659 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 333 statements into 2 equivalence classes. [2025-04-14 16:05:49,778 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 333 of 333 statements. [2025-04-14 16:05:49,779 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-04-14 16:05:49,779 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:49,785 INFO L256 TraceCheckSpWp]: Trace formula consists of 1441 conjuncts, 38 conjuncts are in the unsatisfiable core [2025-04-14 16:05:49,789 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:51,835 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 557 proven. 66 refuted. 0 times theorem prover too weak. 218 trivial. 0 not checked. [2025-04-14 16:05:51,835 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:05:53,510 INFO L325 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2025-04-14 16:05:53,511 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2025-04-14 16:05:53,968 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 367 proven. 256 refuted. 0 times theorem prover too weak. 218 trivial. 0 not checked. [2025-04-14 16:05:53,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [831505576] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:05:53,969 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:05:53,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 32, 32] total 84 [2025-04-14 16:05:53,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122831392] [2025-04-14 16:05:53,969 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:05:53,970 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 84 states [2025-04-14 16:05:53,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:05:53,971 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2025-04-14 16:05:53,972 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1279, Invalid=5693, Unknown=0, NotChecked=0, Total=6972 [2025-04-14 16:05:53,972 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:53,972 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:05:53,972 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 84 states, 84 states have (on average 7.035714285714286) internal successors, (591), 84 states have internal predecessors, (591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:05:53,973 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:05:54,471 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:54,471 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:54,471 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:05:54,471 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:05:54,471 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:54,471 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:05:54,471 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:54,471 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:05:54,472 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:05:54,481 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-04-14 16:05:54,672 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable60,SelfDestructingSolverStorable61,SelfDestructingSolverStorable53,SelfDestructingSolverStorable54,SelfDestructingSolverStorable55,SelfDestructingSolverStorable56,SelfDestructingSolverStorable57,SelfDestructingSolverStorable58,SelfDestructingSolverStorable59 [2025-04-14 16:05:54,673 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:05:54,673 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:05:54,673 INFO L139 ounterexampleChecker]: Examining path program with hash -1566689597, occurence #6 [2025-04-14 16:05:54,673 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:05:54,673 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 12 [2025-04-14 16:05:54,673 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:05:54,673 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 32 [2025-04-14 16:05:54,673 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:54,673 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 36 [2025-04-14 16:05:54,673 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:54,673 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 40 [2025-04-14 16:05:54,673 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:54,673 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 44 [2025-04-14 16:05:54,673 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:05:54,674 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 303 [2025-04-14 16:05:54,695 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:54,695 INFO L85 PathProgramCache]: Analyzing trace with hash -2076213589, now seen corresponding path program 1 times [2025-04-14 16:05:54,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:54,695 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1329055833] [2025-04-14 16:05:54,695 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:54,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:54,726 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 304 statements into 1 equivalence classes. [2025-04-14 16:05:54,806 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 304 of 304 statements. [2025-04-14 16:05:54,806 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:54,806 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:56,340 INFO L134 CoverageAnalysis]: Checked inductivity of 921 backedges. 395 proven. 379 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2025-04-14 16:05:56,340 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:56,341 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1329055833] [2025-04-14 16:05:56,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1329055833] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:56,341 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [846960350] [2025-04-14 16:05:56,341 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:56,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:56,371 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 304 statements into 1 equivalence classes. [2025-04-14 16:05:56,480 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 304 of 304 statements. [2025-04-14 16:05:56,480 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:56,480 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:56,483 INFO L256 TraceCheckSpWp]: Trace formula consists of 1376 conjuncts, 42 conjuncts are in the unsatisfiable core [2025-04-14 16:05:56,486 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:05:57,643 INFO L134 CoverageAnalysis]: Checked inductivity of 921 backedges. 603 proven. 171 refuted. 0 times theorem prover too weak. 147 trivial. 0 not checked. [2025-04-14 16:05:57,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [846960350] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:57,643 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:05:57,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 77 [2025-04-14 16:05:57,644 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:05:57,644 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 308 [2025-04-14 16:05:57,671 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:05:57,671 INFO L85 PathProgramCache]: Analyzing trace with hash -1849918135, now seen corresponding path program 1 times [2025-04-14 16:05:57,672 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:05:57,672 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172746799] [2025-04-14 16:05:57,672 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:57,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:57,702 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 309 statements into 1 equivalence classes. [2025-04-14 16:05:57,781 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 309 of 309 statements. [2025-04-14 16:05:57,782 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:57,782 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:59,361 INFO L134 CoverageAnalysis]: Checked inductivity of 924 backedges. 383 proven. 379 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2025-04-14 16:05:59,361 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:05:59,361 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1172746799] [2025-04-14 16:05:59,361 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1172746799] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:05:59,362 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolSpWp [521683905] [2025-04-14 16:05:59,362 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:05:59,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:05:59,392 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 309 statements into 1 equivalence classes. [2025-04-14 16:05:59,511 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 309 of 309 statements. [2025-04-14 16:05:59,512 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:05:59,512 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:05:59,515 INFO L256 TraceCheckSpWp]: Trace formula consists of 1391 conjuncts, 42 conjuncts are in the unsatisfiable core [2025-04-14 16:05:59,518 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:06:00,665 INFO L134 CoverageAnalysis]: Checked inductivity of 924 backedges. 591 proven. 171 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2025-04-14 16:06:00,665 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolSpWp [521683905] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:06:00,665 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2025-04-14 16:06:00,665 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 76 [2025-04-14 16:06:00,665 INFO L195 ounterexampleChecker]: Commutativity condition check failed due to imperfect proof (attempt 1 of 1). [2025-04-14 16:06:00,665 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 311 [2025-04-14 16:06:00,665 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:06:00,665 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 315 [2025-04-14 16:06:00,665 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:06:00,665 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 317 [2025-04-14 16:06:00,692 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:06:00,692 INFO L85 PathProgramCache]: Analyzing trace with hash -1736522586, now seen corresponding path program 1 times [2025-04-14 16:06:00,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:06:00,693 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457688371] [2025-04-14 16:06:00,693 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:06:00,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:06:00,725 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 318 statements into 1 equivalence classes. [2025-04-14 16:06:00,807 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 318 of 318 statements. [2025-04-14 16:06:00,807 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:06:00,807 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:06:01,022 INFO L134 CoverageAnalysis]: Checked inductivity of 928 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 924 trivial. 0 not checked. [2025-04-14 16:06:01,022 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:06:01,022 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457688371] [2025-04-14 16:06:01,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [457688371] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:06:01,022 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:06:01,023 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-14 16:06:01,023 INFO L172 ounterexampleChecker]: Successfully proved commutativity at non-minimality point 317. Constructing proof automaton... [2025-04-14 16:06:01,023 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:06:01,023 INFO L311 artialOrderCegarLoop]: Commutativity proof succeeded, skipping feasibility check. [2025-04-14 16:06:01,023 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-14 16:06:01,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SMTINTERPOL [2025-04-14 16:06:01,024 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-04-14 16:06:01,024 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2025-04-14 16:06:01,024 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:06:01,024 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:06:01,024 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:06:01,024 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:06:01,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:06:01,288 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:06:01,288 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable65,SelfDestructingSolverStorable66 [2025-04-14 16:06:01,288 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:06:01,288 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:06:01,289 INFO L139 ounterexampleChecker]: Examining path program with hash -1156718222, occurence #1 [2025-04-14 16:06:01,289 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:06:01,289 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:06:01,289 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:06:01,289 INFO L85 PathProgramCache]: Analyzing trace with hash 230590810, now seen corresponding path program 17 times [2025-04-14 16:06:01,289 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:06:01,289 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735614204] [2025-04-14 16:06:01,289 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-04-14 16:06:01,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:06:01,326 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 357 statements into 12 equivalence classes. [2025-04-14 16:06:02,244 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) and asserted 357 of 357 statements. [2025-04-14 16:06:02,244 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2025-04-14 16:06:02,244 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:06:03,282 INFO L134 CoverageAnalysis]: Checked inductivity of 1154 backedges. 364 proven. 115 refuted. 0 times theorem prover too weak. 675 trivial. 0 not checked. [2025-04-14 16:06:03,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:06:03,282 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1735614204] [2025-04-14 16:06:03,282 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1735614204] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:06:03,282 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1685675507] [2025-04-14 16:06:03,282 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-04-14 16:06:03,283 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:06:03,283 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:06:03,284 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:06:03,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-04-14 16:06:03,678 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 357 statements into 12 equivalence classes. [2025-04-14 16:08:10,770 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) and asserted 357 of 357 statements. [2025-04-14 16:08:10,771 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2025-04-14 16:08:10,771 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:10,806 INFO L256 TraceCheckSpWp]: Trace formula consists of 1527 conjuncts, 33 conjuncts are in the unsatisfiable core [2025-04-14 16:08:10,811 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:08:11,543 INFO L134 CoverageAnalysis]: Checked inductivity of 1154 backedges. 480 proven. 66 refuted. 0 times theorem prover too weak. 608 trivial. 0 not checked. [2025-04-14 16:08:11,544 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:08:12,340 INFO L134 CoverageAnalysis]: Checked inductivity of 1154 backedges. 329 proven. 217 refuted. 0 times theorem prover too weak. 608 trivial. 0 not checked. [2025-04-14 16:08:12,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1685675507] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:08:12,341 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:08:12,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 27, 27] total 63 [2025-04-14 16:08:12,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588480935] [2025-04-14 16:08:12,341 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:08:12,342 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2025-04-14 16:08:12,342 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:08:12,342 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2025-04-14 16:08:12,343 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=850, Invalid=3056, Unknown=0, NotChecked=0, Total=3906 [2025-04-14 16:08:12,343 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:12,343 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:12,343 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 8.301587301587302) internal successors, (523), 63 states have internal predecessors, (523), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:12,343 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,343 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,344 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:12,680 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:12,681 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:12,751 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-04-14 16:08:12,881 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:12,882 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:12,882 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:12,882 INFO L139 ounterexampleChecker]: Examining path program with hash 537533220, occurence #1 [2025-04-14 16:08:12,882 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:08:12,882 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:08:12,882 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:12,882 INFO L85 PathProgramCache]: Analyzing trace with hash -1587498083, now seen corresponding path program 18 times [2025-04-14 16:08:12,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:08:12,883 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874893740] [2025-04-14 16:08:12,883 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-04-14 16:08:12,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:12,911 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 251 statements into 10 equivalence classes. [2025-04-14 16:08:12,946 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 101 of 251 statements. [2025-04-14 16:08:12,946 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-04-14 16:08:12,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:13,116 INFO L134 CoverageAnalysis]: Checked inductivity of 656 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 654 trivial. 0 not checked. [2025-04-14 16:08:13,116 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:08:13,116 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874893740] [2025-04-14 16:08:13,116 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [874893740] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:08:13,116 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1039476307] [2025-04-14 16:08:13,116 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-04-14 16:08:13,117 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:13,117 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:08:13,118 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:08:13,119 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-04-14 16:08:13,504 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 251 statements into 10 equivalence classes. [2025-04-14 16:08:13,737 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 101 of 251 statements. [2025-04-14 16:08:13,737 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-04-14 16:08:13,737 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:13,740 INFO L256 TraceCheckSpWp]: Trace formula consists of 562 conjuncts, 11 conjuncts are in the unsatisfiable core [2025-04-14 16:08:13,742 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:08:13,962 INFO L134 CoverageAnalysis]: Checked inductivity of 656 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 647 trivial. 0 not checked. [2025-04-14 16:08:13,962 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:08:13,996 INFO L134 CoverageAnalysis]: Checked inductivity of 656 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 654 trivial. 0 not checked. [2025-04-14 16:08:13,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1039476307] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:08:13,996 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:08:13,996 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 8, 5] total 14 [2025-04-14 16:08:13,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676383756] [2025-04-14 16:08:13,996 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:08:13,997 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2025-04-14 16:08:13,997 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:08:13,997 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2025-04-14 16:08:13,997 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2025-04-14 16:08:13,997 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:13,997 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:13,997 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 8.642857142857142) internal successors, (121), 14 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:13,997 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:13,997 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:13,997 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:13,997 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:13,997 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:13,997 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:13,998 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:15,146 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:15,147 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:15,147 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:15,147 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:15,147 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:15,147 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:15,147 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:15,149 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:15,158 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2025-04-14 16:08:15,350 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:15,350 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:15,350 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:15,350 INFO L139 ounterexampleChecker]: Examining path program with hash 445680411, occurence #1 [2025-04-14 16:08:15,350 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:08:15,350 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:08:15,350 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:15,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1812811580, now seen corresponding path program 19 times [2025-04-14 16:08:15,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:08:15,351 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484381363] [2025-04-14 16:08:15,351 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-04-14 16:08:15,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:15,381 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 263 statements into 1 equivalence classes. [2025-04-14 16:08:15,428 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 263 of 263 statements. [2025-04-14 16:08:15,429 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:08:15,429 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:16,424 INFO L134 CoverageAnalysis]: Checked inductivity of 649 backedges. 161 proven. 268 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2025-04-14 16:08:16,424 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:08:16,424 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484381363] [2025-04-14 16:08:16,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1484381363] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:08:16,424 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1299975096] [2025-04-14 16:08:16,424 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-04-14 16:08:16,425 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:16,425 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:08:16,426 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:08:16,427 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-04-14 16:08:16,821 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 263 statements into 1 equivalence classes. [2025-04-14 16:08:16,910 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 263 of 263 statements. [2025-04-14 16:08:16,911 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:08:16,911 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:16,915 INFO L256 TraceCheckSpWp]: Trace formula consists of 1201 conjuncts, 32 conjuncts are in the unsatisfiable core [2025-04-14 16:08:16,918 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:08:17,743 INFO L134 CoverageAnalysis]: Checked inductivity of 649 backedges. 366 proven. 91 refuted. 0 times theorem prover too weak. 192 trivial. 0 not checked. [2025-04-14 16:08:17,743 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:08:18,525 INFO L134 CoverageAnalysis]: Checked inductivity of 649 backedges. 298 proven. 159 refuted. 0 times theorem prover too weak. 192 trivial. 0 not checked. [2025-04-14 16:08:18,525 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1299975096] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:08:18,525 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:08:18,525 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29] total 83 [2025-04-14 16:08:18,525 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324864376] [2025-04-14 16:08:18,525 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:08:18,526 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 84 states [2025-04-14 16:08:18,526 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:08:18,527 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2025-04-14 16:08:18,528 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1470, Invalid=5502, Unknown=0, NotChecked=0, Total=6972 [2025-04-14 16:08:18,528 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:18,528 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:18,528 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 84 states, 84 states have (on average 6.690476190476191) internal successors, (562), 83 states have internal predecessors, (562), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:18,528 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:18,529 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:18,995 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,995 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:18,996 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:18,997 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:19,007 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2025-04-14 16:08:19,197 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable69 [2025-04-14 16:08:19,197 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:19,197 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:19,198 INFO L139 ounterexampleChecker]: Examining path program with hash 445680411, occurence #2 [2025-04-14 16:08:19,198 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:08:19,198 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 15 [2025-04-14 16:08:19,198 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:08:19,198 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 35 [2025-04-14 16:08:19,198 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:08:19,198 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 39 [2025-04-14 16:08:19,198 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:08:19,198 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 43 [2025-04-14 16:08:19,198 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:08:19,198 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 47 [2025-04-14 16:08:19,198 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:08:19,198 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 222 [2025-04-14 16:08:19,225 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:19,226 INFO L85 PathProgramCache]: Analyzing trace with hash -251123627, now seen corresponding path program 1 times [2025-04-14 16:08:19,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:08:19,226 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725501262] [2025-04-14 16:08:19,226 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:08:19,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:19,272 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 223 statements into 1 equivalence classes. [2025-04-14 16:08:19,322 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 223 of 223 statements. [2025-04-14 16:08:19,323 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:08:19,323 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:19,759 INFO L134 CoverageAnalysis]: Checked inductivity of 636 backedges. 94 proven. 0 refuted. 0 times theorem prover too weak. 542 trivial. 0 not checked. [2025-04-14 16:08:19,759 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:08:19,759 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725501262] [2025-04-14 16:08:19,759 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [725501262] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:08:19,759 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:08:19,759 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-04-14 16:08:19,759 INFO L172 ounterexampleChecker]: Successfully proved commutativity at non-minimality point 222. Constructing proof automaton... [2025-04-14 16:08:19,759 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:08:19,759 INFO L311 artialOrderCegarLoop]: Commutativity proof succeeded, skipping feasibility check. [2025-04-14 16:08:19,759 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-04-14 16:08:19,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SMTINTERPOL [2025-04-14 16:08:19,760 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-04-14 16:08:19,760 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-04-14 16:08:19,760 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:19,760 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:19,760 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.6) internal successors, (63), 5 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:19,760 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:19,761 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:19,761 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:20,165 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:20,165 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:20,165 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:20,166 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:20,166 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2025-04-14 16:08:20,166 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:20,166 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:20,167 INFO L139 ounterexampleChecker]: Examining path program with hash 145052882, occurence #1 [2025-04-14 16:08:20,167 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:08:20,167 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:08:20,167 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:20,167 INFO L85 PathProgramCache]: Analyzing trace with hash -1781934340, now seen corresponding path program 20 times [2025-04-14 16:08:20,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:08:20,167 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143725797] [2025-04-14 16:08:20,167 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-14 16:08:20,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:20,199 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 297 statements into 2 equivalence classes. [2025-04-14 16:08:20,261 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 297 of 297 statements. [2025-04-14 16:08:20,262 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-14 16:08:20,262 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:21,397 INFO L134 CoverageAnalysis]: Checked inductivity of 911 backedges. 541 proven. 191 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2025-04-14 16:08:21,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:08:21,398 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143725797] [2025-04-14 16:08:21,398 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1143725797] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:08:21,398 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1721235875] [2025-04-14 16:08:21,398 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-14 16:08:21,398 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:21,398 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:08:21,400 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:08:21,400 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2025-04-14 16:08:21,815 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 297 statements into 2 equivalence classes. [2025-04-14 16:08:21,917 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 297 of 297 statements. [2025-04-14 16:08:21,917 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-14 16:08:21,917 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:21,923 INFO L256 TraceCheckSpWp]: Trace formula consists of 1338 conjuncts, 34 conjuncts are in the unsatisfiable core [2025-04-14 16:08:21,926 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:08:22,830 INFO L134 CoverageAnalysis]: Checked inductivity of 911 backedges. 627 proven. 105 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2025-04-14 16:08:22,830 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:08:23,721 INFO L134 CoverageAnalysis]: Checked inductivity of 911 backedges. 472 proven. 260 refuted. 0 times theorem prover too weak. 179 trivial. 0 not checked. [2025-04-14 16:08:23,721 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1721235875] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:08:23,721 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:08:23,721 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31] total 89 [2025-04-14 16:08:23,721 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1544011567] [2025-04-14 16:08:23,721 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:08:23,722 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 90 states [2025-04-14 16:08:23,722 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:08:23,723 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2025-04-14 16:08:23,724 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1680, Invalid=6330, Unknown=0, NotChecked=0, Total=8010 [2025-04-14 16:08:23,724 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:23,725 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:23,725 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 90 states, 90 states have (on average 7.033333333333333) internal successors, (633), 89 states have internal predecessors, (633), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:23,725 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:24,230 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:24,231 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:24,241 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2025-04-14 16:08:24,431 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:24,431 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:24,431 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:24,432 INFO L139 ounterexampleChecker]: Examining path program with hash 145052882, occurence #2 [2025-04-14 16:08:24,432 INFO L145 ounterexampleChecker]: Trying to synthesize and prove commutativity condition. [2025-04-14 16:08:24,432 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 16 [2025-04-14 16:08:24,432 INFO L209 ounterexampleChecker]: No commutativity condition found. [2025-04-14 16:08:24,432 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 36 [2025-04-14 16:08:24,432 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:08:24,432 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 40 [2025-04-14 16:08:24,432 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:08:24,432 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 44 [2025-04-14 16:08:24,432 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:08:24,432 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 48 [2025-04-14 16:08:24,432 WARN L190 ounterexampleChecker]: Statements were already independent. [2025-04-14 16:08:24,432 INFO L166 ounterexampleChecker]: Performing commutativity condition check at non-minimality point 277 [2025-04-14 16:08:24,446 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:24,446 INFO L85 PathProgramCache]: Analyzing trace with hash 1376440243, now seen corresponding path program 1 times [2025-04-14 16:08:24,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy SMTINTERPOL [2025-04-14 16:08:24,447 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1226636491] [2025-04-14 16:08:24,447 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-14 16:08:24,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:24,479 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 278 statements into 1 equivalence classes. [2025-04-14 16:08:24,541 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 278 of 278 statements. [2025-04-14 16:08:24,542 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-14 16:08:24,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:25,091 INFO L134 CoverageAnalysis]: Checked inductivity of 919 backedges. 393 proven. 0 refuted. 0 times theorem prover too weak. 526 trivial. 0 not checked. [2025-04-14 16:08:25,092 INFO L136 FreeRefinementEngine]: Strategy SMTINTERPOL found an infeasible trace [2025-04-14 16:08:25,092 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1226636491] [2025-04-14 16:08:25,092 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1226636491] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:08:25,092 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:08:25,092 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-04-14 16:08:25,092 INFO L172 ounterexampleChecker]: Successfully proved commutativity at non-minimality point 277. Constructing proof automaton... [2025-04-14 16:08:25,092 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:08:25,092 INFO L311 artialOrderCegarLoop]: Commutativity proof succeeded, skipping feasibility check. [2025-04-14 16:08:25,092 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-04-14 16:08:25,092 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SMTINTERPOL [2025-04-14 16:08:25,092 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-04-14 16:08:25,092 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2025-04-14 16:08:25,092 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:25,092 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:25,093 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 16.5) internal successors, (66), 4 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:25,093 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:25,599 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:25,600 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:25,600 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:25,600 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:25,600 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:25,600 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-14 16:08:25,600 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2025-04-14 16:08:25,600 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:25,600 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:25,600 INFO L139 ounterexampleChecker]: Examining path program with hash 1905728014, occurence #1 [2025-04-14 16:08:25,600 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:08:25,600 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:08:25,600 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:25,601 INFO L85 PathProgramCache]: Analyzing trace with hash -1457455619, now seen corresponding path program 21 times [2025-04-14 16:08:25,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:08:25,601 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78549682] [2025-04-14 16:08:25,601 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-04-14 16:08:25,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:25,632 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 293 statements into 10 equivalence classes. [2025-04-14 16:08:26,279 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) and asserted 293 of 293 statements. [2025-04-14 16:08:26,279 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2025-04-14 16:08:26,279 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:27,678 INFO L134 CoverageAnalysis]: Checked inductivity of 926 backedges. 76 proven. 150 refuted. 0 times theorem prover too weak. 700 trivial. 0 not checked. [2025-04-14 16:08:27,678 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:08:27,678 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78549682] [2025-04-14 16:08:27,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [78549682] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:08:27,678 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [746300905] [2025-04-14 16:08:27,678 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-04-14 16:08:27,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:27,678 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:08:27,680 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:08:27,682 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2025-04-14 16:08:28,118 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 293 statements into 10 equivalence classes. [2025-04-14 16:08:34,259 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) and asserted 293 of 293 statements. [2025-04-14 16:08:34,260 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2025-04-14 16:08:34,260 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:34,272 INFO L256 TraceCheckSpWp]: Trace formula consists of 1341 conjuncts, 44 conjuncts are in the unsatisfiable core [2025-04-14 16:08:34,275 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:08:35,566 INFO L134 CoverageAnalysis]: Checked inductivity of 926 backedges. 1 proven. 627 refuted. 0 times theorem prover too weak. 298 trivial. 0 not checked. [2025-04-14 16:08:35,567 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:08:36,744 INFO L134 CoverageAnalysis]: Checked inductivity of 926 backedges. 2 proven. 627 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2025-04-14 16:08:36,744 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [746300905] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:08:36,744 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:08:36,745 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 36, 38] total 82 [2025-04-14 16:08:36,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [220905328] [2025-04-14 16:08:36,745 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:08:36,745 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 83 states [2025-04-14 16:08:36,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:08:36,746 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2025-04-14 16:08:36,748 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1107, Invalid=5699, Unknown=0, NotChecked=0, Total=6806 [2025-04-14 16:08:36,748 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:36,748 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:36,748 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 83 states, 83 states have (on average 6.710843373493976) internal successors, (557), 82 states have internal predecessors, (557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-14 16:08:36,748 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:44,268 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-14 16:08:44,269 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 177 states. [2025-04-14 16:08:44,286 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2025-04-14 16:08:44,469 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:44,469 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:44,469 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:44,470 INFO L139 ounterexampleChecker]: Examining path program with hash 170409962, occurence #1 [2025-04-14 16:08:44,470 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:08:44,470 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:08:44,470 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:44,470 INFO L85 PathProgramCache]: Analyzing trace with hash -430460269, now seen corresponding path program 22 times [2025-04-14 16:08:44,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:08:44,470 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706675959] [2025-04-14 16:08:44,470 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-04-14 16:08:44,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:44,494 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 183 statements into 2 equivalence classes. [2025-04-14 16:08:44,532 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 183 of 183 statements. [2025-04-14 16:08:44,532 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-04-14 16:08:44,532 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:44,870 INFO L134 CoverageAnalysis]: Checked inductivity of 509 backedges. 22 proven. 1 refuted. 0 times theorem prover too weak. 486 trivial. 0 not checked. [2025-04-14 16:08:44,870 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:08:44,870 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706675959] [2025-04-14 16:08:44,870 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [706675959] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:08:44,870 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [749441631] [2025-04-14 16:08:44,870 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-04-14 16:08:44,870 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:44,871 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:08:44,872 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:08:44,873 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2025-04-14 16:08:45,301 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 183 statements into 2 equivalence classes. [2025-04-14 16:08:45,376 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 183 of 183 statements. [2025-04-14 16:08:45,376 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-04-14 16:08:45,376 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:45,380 INFO L256 TraceCheckSpWp]: Trace formula consists of 949 conjuncts, 15 conjuncts are in the unsatisfiable core [2025-04-14 16:08:45,382 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:08:45,468 INFO L134 CoverageAnalysis]: Checked inductivity of 509 backedges. 67 proven. 4 refuted. 0 times theorem prover too weak. 438 trivial. 0 not checked. [2025-04-14 16:08:45,468 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:08:45,528 INFO L134 CoverageAnalysis]: Checked inductivity of 509 backedges. 22 proven. 1 refuted. 0 times theorem prover too weak. 486 trivial. 0 not checked. [2025-04-14 16:08:45,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [749441631] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-14 16:08:45,529 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-14 16:08:45,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 10, 7] total 18 [2025-04-14 16:08:45,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212175771] [2025-04-14 16:08:45,529 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-14 16:08:45,529 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2025-04-14 16:08:45,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:08:45,530 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2025-04-14 16:08:45,530 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=238, Unknown=0, NotChecked=0, Total=306 [2025-04-14 16:08:45,530 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:45,530 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:45,530 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 5.166666666666667) internal successors, (93), 18 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:45,530 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 177 states. [2025-04-14 16:08:45,531 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:46,252 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 177 states. [2025-04-14 16:08:46,253 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-04-14 16:08:46,263 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2025-04-14 16:08:46,454 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:46,454 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:46,454 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:46,454 INFO L139 ounterexampleChecker]: Examining path program with hash -958194465, occurence #1 [2025-04-14 16:08:46,454 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:08:46,454 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:08:46,454 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:46,455 INFO L85 PathProgramCache]: Analyzing trace with hash 627079354, now seen corresponding path program 23 times [2025-04-14 16:08:46,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:08:46,455 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737920183] [2025-04-14 16:08:46,455 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-04-14 16:08:46,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:46,478 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 164 statements into 10 equivalence classes. [2025-04-14 16:08:46,574 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) and asserted 164 of 164 statements. [2025-04-14 16:08:46,574 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2025-04-14 16:08:46,574 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:46,848 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 467 trivial. 0 not checked. [2025-04-14 16:08:46,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:08:46,848 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737920183] [2025-04-14 16:08:46,848 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1737920183] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-14 16:08:46,848 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-14 16:08:46,848 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-04-14 16:08:46,848 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136159235] [2025-04-14 16:08:46,848 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-14 16:08:46,848 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-04-14 16:08:46,848 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-14 16:08:46,848 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-04-14 16:08:46,849 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-04-14 16:08:46,849 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:46,849 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-14 16:08:46,849 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.2) internal successors, (51), 5 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 177 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2025-04-14 16:08:46,849 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 177 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-04-14 16:08:47,020 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-14 16:08:47,021 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2025-04-14 16:08:47,021 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2025-04-14 16:08:47,021 INFO L305 artialOrderCegarLoop]: Trying commutativity condition synthesis. [2025-04-14 16:08:47,021 INFO L139 ounterexampleChecker]: Examining path program with hash -1254079775, occurence #1 [2025-04-14 16:08:47,021 INFO L141 ounterexampleChecker]: Commutativity condition synthesis is only active after more than 2 occurrences. Skipping... [2025-04-14 16:08:47,021 INFO L316 artialOrderCegarLoop]: No commutativity proof found, falling back to feasibility check. [2025-04-14 16:08:47,021 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-14 16:08:47,021 INFO L85 PathProgramCache]: Analyzing trace with hash -1596134147, now seen corresponding path program 24 times [2025-04-14 16:08:47,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-14 16:08:47,021 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63888139] [2025-04-14 16:08:47,021 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-04-14 16:08:47,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-14 16:08:47,044 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 160 statements into 10 equivalence classes. [2025-04-14 16:08:47,669 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) and asserted 160 of 160 statements. [2025-04-14 16:08:47,669 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2025-04-14 16:08:47,670 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:08:53,341 INFO L134 CoverageAnalysis]: Checked inductivity of 473 backedges. 4 proven. 196 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2025-04-14 16:08:53,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-14 16:08:53,342 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63888139] [2025-04-14 16:08:53,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [63888139] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-14 16:08:53,342 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1646212856] [2025-04-14 16:08:53,342 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-04-14 16:08:53,342 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-14 16:08:53,342 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-14 16:08:53,344 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-14 16:08:53,344 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2025-04-14 16:08:53,771 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 160 statements into 10 equivalence classes. [2025-04-14 16:09:02,911 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) and asserted 160 of 160 statements. [2025-04-14 16:09:02,912 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2025-04-14 16:09:02,912 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-14 16:09:02,924 INFO L256 TraceCheckSpWp]: Trace formula consists of 885 conjuncts, 194 conjuncts are in the unsatisfiable core [2025-04-14 16:09:02,931 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-14 16:09:03,860 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-04-14 16:09:22,293 INFO L325 Elim1Store]: treesize reduction 707, result has 24.9 percent of original size [2025-04-14 16:09:22,293 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 437 treesize of output 303 [2025-04-14 16:09:22,313 INFO L134 CoverageAnalysis]: Checked inductivity of 473 backedges. 54 proven. 416 refuted. 1 times theorem prover too weak. 2 trivial. 0 not checked. [2025-04-14 16:09:22,313 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-14 16:09:43,620 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:09:43,624 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 89440 treesize of output 79624 [2025-04-14 16:13:01,372 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:01,374 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 22785 [2025-04-14 16:13:02,578 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:02,580 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 30354 treesize of output 25968 [2025-04-14 16:13:03,836 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:03,837 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:03,901 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:03,902 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:03,931 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:03,932 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 6870 [2025-04-14 16:13:04,634 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:04,635 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7988 treesize of output 1 [2025-04-14 16:13:04,719 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:04,720 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 34081 treesize of output 1 [2025-04-14 16:13:04,796 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:04,797 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 30354 treesize of output 1 [2025-04-14 16:13:04,825 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:04,826 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 8020 treesize of output 1 [2025-04-14 16:13:05,108 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,108 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:05,171 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,172 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:05,224 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,225 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:05,294 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,295 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19163 treesize of output 1 [2025-04-14 16:13:05,343 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,344 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:05,400 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,401 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:05,466 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,467 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:05,499 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,499 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:05,621 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,622 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:05,667 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,668 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:05,715 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,715 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:05,753 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,754 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:05,803 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,804 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:05,859 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,860 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:05,920 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,920 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:05,974 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:05,975 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:06,039 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,040 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:06,067 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,068 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:06,137 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,138 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:06,209 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,210 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 30354 treesize of output 1 [2025-04-14 16:13:06,295 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,295 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:06,353 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,353 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:06,417 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,418 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:06,489 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,490 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:06,541 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,541 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:06,591 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,592 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:06,645 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,645 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:06,710 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,711 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:06,788 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,789 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:06,854 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,855 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:06,946 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:06,947 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:07,005 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,006 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:07,071 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,071 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:07,136 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,136 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:07,327 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,328 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:07,382 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,383 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:07,429 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,429 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:07,478 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,479 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:07,537 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,538 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:07,599 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,600 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:07,652 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,653 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:07,755 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,755 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:07,806 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,807 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:07,852 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,852 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:07,892 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,892 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:07,944 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,944 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:07,990 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:07,990 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:08,037 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,037 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:08,098 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,099 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:08,142 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,143 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:08,193 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,194 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:08,247 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,248 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:08,303 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,304 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:08,357 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,358 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:08,413 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,414 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:08,446 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,446 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:08,510 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,511 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:08,543 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,543 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:08,624 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,625 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:08,674 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,675 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:08,737 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,738 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:08,841 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,842 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:08,886 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,887 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:08,929 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,930 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:08,977 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:08,977 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:09,032 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,033 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:09,098 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,099 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:09,271 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,272 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:09,383 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,384 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:09,413 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,414 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:09,496 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,497 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:09,547 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,548 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:09,616 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,616 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:09,658 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,659 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:09,704 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,705 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:09,755 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,756 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:09,814 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,815 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:09,874 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,875 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:09,940 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:09,941 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:09,999 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,000 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:10,033 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,033 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:10,108 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,109 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:10,169 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,169 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:10,223 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,224 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19163 treesize of output 1 [2025-04-14 16:13:10,279 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,280 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:10,388 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,389 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:10,459 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,460 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:10,526 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,527 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:10,609 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,610 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:10,672 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,673 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:10,731 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,732 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:10,798 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,799 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:10,893 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,894 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:10,949 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,950 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:10,996 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:10,997 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:11,056 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,057 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:11,123 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,124 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:11,193 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,194 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:11,252 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,253 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:11,313 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,313 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:11,388 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,389 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 30354 treesize of output 1 [2025-04-14 16:13:11,411 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,412 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 4263 treesize of output 3685 [2025-04-14 16:13:11,613 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,614 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 30354 treesize of output 1 [2025-04-14 16:13:11,682 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,683 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:11,778 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,779 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:11,848 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,849 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:11,957 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:11,958 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 30354 treesize of output 1 [2025-04-14 16:13:12,037 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,037 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:12,095 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,096 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:12,157 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,158 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:12,217 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,217 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:12,285 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,286 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:12,413 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,414 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:12,479 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,480 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:12,567 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,568 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:12,626 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,627 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:12,690 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,691 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:12,756 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,756 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:12,826 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,826 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19163 treesize of output 1 [2025-04-14 16:13:12,872 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,873 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:12,931 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,932 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:12,988 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:12,989 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:13,056 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:13,056 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:13,086 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:13,086 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:13,163 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:13,163 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:13,232 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:13,233 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22888 treesize of output 1 [2025-04-14 16:13:13,287 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:13,288 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19163 treesize of output 1 [2025-04-14 16:13:13,355 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:13,356 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:13,386 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:13,387 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:13,502 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:13,503 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 30354 treesize of output 1 [2025-04-14 16:13:14,085 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,086 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:14,136 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,137 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:14,201 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,201 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:14,252 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,252 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:14,316 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,316 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:14,352 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,353 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:14,398 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,398 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:14,444 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,445 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:14,484 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,485 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:14,553 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,553 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:14,602 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,603 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:14,659 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,660 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:14,712 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,713 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:14,755 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,756 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:14,805 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,806 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:14,853 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,854 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:14,882 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,882 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:14,937 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,938 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:14,986 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:14,986 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:15,047 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,048 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:15,113 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,114 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:15,177 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,178 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:15,230 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,231 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:15,294 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,295 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:15,333 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,333 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:15,378 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,379 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:15,427 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,428 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:15,469 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,470 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:15,520 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,520 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:15,573 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,573 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:15,633 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,634 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:15,693 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,693 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:15,742 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,743 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:15,799 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,800 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:15,856 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,857 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:15,891 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,892 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:15,950 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:15,951 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:16,005 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,006 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:16,093 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,094 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:16,184 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,185 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:16,227 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,227 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:16,270 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,271 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:16,325 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,326 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:16,369 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,369 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:16,425 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,426 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:16,481 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,482 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:16,555 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,556 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:16,605 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,605 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:16,655 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,656 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:16,707 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,708 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:16,819 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,819 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:16,872 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,873 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19163 treesize of output 1 [2025-04-14 16:13:16,931 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,932 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:16,989 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:16,990 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:17,019 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,020 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:17,088 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,089 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:17,147 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,147 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:17,214 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,215 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:17,299 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,300 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:17,356 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,356 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:17,406 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,406 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:17,447 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,447 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:17,505 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,506 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:17,558 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,559 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:17,617 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,618 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:17,681 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,682 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:17,713 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,714 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:17,819 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,820 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:17,886 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,886 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:17,964 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:17,965 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:18,016 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,017 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:18,075 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,075 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:18,139 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,140 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:18,167 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,167 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7988 treesize of output 1 [2025-04-14 16:13:18,415 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,416 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:18,470 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,471 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:18,519 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,519 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:18,577 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,577 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:18,675 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,675 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:18,723 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,723 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15438 treesize of output 1 [2025-04-14 16:13:18,761 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,762 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:18,807 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,807 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:18,872 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,872 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:18,917 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,917 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:18,960 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:18,961 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:19,012 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,013 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:19,061 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,062 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:19,104 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,105 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:19,155 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,156 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:19,223 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,223 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:19,281 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,282 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:19,334 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,335 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:19,385 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,385 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:19,413 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,414 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:19,465 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,466 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:19,532 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,532 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:19,695 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,695 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:19,741 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,742 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:19,771 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,772 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:19,823 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,823 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:19,875 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,875 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:19,915 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,915 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:19,960 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,961 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:19,996 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:19,997 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7988 treesize of output 1 [2025-04-14 16:13:20,059 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,060 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:20,109 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,109 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:20,161 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,162 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:20,214 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,215 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:20,259 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,260 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:20,296 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,297 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7988 treesize of output 1 [2025-04-14 16:13:20,335 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,336 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:20,420 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,421 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:20,465 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,466 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11713 treesize of output 1 [2025-04-14 16:13:20,501 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,501 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7988 treesize of output 1 [2025-04-14 16:13:20,549 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,550 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:20,594 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,594 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:20,641 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,641 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:20,672 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,673 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:20,727 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,728 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:20,781 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,782 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:20,822 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,823 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:20,907 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,908 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:20,939 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,940 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7988 treesize of output 1 [2025-04-14 16:13:20,982 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:20,982 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:21,025 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,026 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:21,053 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,054 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7992 treesize of output 1 [2025-04-14 16:13:21,112 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,113 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:21,153 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,153 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:21,203 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,204 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:21,253 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,253 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:21,319 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,320 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:21,361 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,361 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:21,411 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,412 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:21,455 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,456 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:21,494 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,494 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:21,546 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,547 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:21,595 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,596 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:21,651 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,652 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:21,698 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,699 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:21,758 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,759 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:21,813 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,814 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:21,876 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,877 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:21,965 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:21,966 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:22,016 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,017 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:22,059 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,060 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 11719 treesize of output 1 [2025-04-14 16:13:22,107 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,108 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:22,163 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,164 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:22,218 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,219 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:22,279 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,279 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:22,341 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,342 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:22,413 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,414 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:22,474 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,475 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:22,591 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,592 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 30354 treesize of output 1 [2025-04-14 16:13:22,662 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,663 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:22,726 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,727 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:22,813 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,814 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:22,869 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,870 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:22,929 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,930 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:22,993 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:22,994 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 26627 treesize of output 1 [2025-04-14 16:13:23,063 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:23,064 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:23,121 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:23,122 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 22900 treesize of output 1 [2025-04-14 16:13:23,178 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:23,178 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 15446 treesize of output 1 [2025-04-14 16:13:23,229 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:23,230 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 19173 treesize of output 1 [2025-04-14 16:13:23,258 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:23,259 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7988 treesize of output 1 [2025-04-14 16:13:23,289 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-14 16:13:23,289 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 7988 treesize of output 1 Received shutdown request... [2025-04-14 16:18:23,541 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2025-04-14 16:18:23,541 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2025-04-14 16:18:23,541 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2025-04-14 16:18:24,568 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2025-04-14 16:18:24,582 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2025-04-14 16:18:24,782 WARN L435 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forcibly destroying the process [2025-04-14 16:18:24,875 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 137 Cannot interrupt operation gracefully because timeout expired. Forcing shutdown