/root/.sdkman/candidates/java/21.0.5-tem/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata ./data -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline_IcfgBuilder.xml -s ../benchexec/../../../trunk/examples/settings/default/gemcutter/svcomp-Reach-32bit-GemCutter_Default.epf --preprocessor.replace.while.statements.and.if-then-else.statements false --cacsl2boogietranslator.check.unreachability.of.reach_error.function false --cacsl2boogietranslator.check.absence.of.data.races.in.concurrent.programs true --icfgbuilder.only.consider.context.switches.at.boundaries.of.atomic.blocks false --rcfgbuilder.only.consider.context.switches.at.boundaries.of.atomic.blocks false --traceabstraction.dfs.order.used.in.por BY_SERIAL_NUMBER --traceabstraction.abstraction.used.for.commutativity.in.por VARIABLES_GLOBAL --traceabstraction.commutativity.condition.synthesis NONE -i ../../../trunk/examples/svcomp/pthread-ext/37_stack_lock_p0_vs_concur.i -------------------------------------------------------------------------------- This is Ultimate 0.3.0-wip.dk.cfg-lbe-improvements-04aa6ae-m [2025-04-16 04:07:07,527 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-04-16 04:07:07,582 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../benchexec/../../../trunk/examples/settings/default/gemcutter/svcomp-Reach-32bit-GemCutter_Default.epf [2025-04-16 04:07:07,590 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-04-16 04:07:07,590 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-04-16 04:07:07,609 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-04-16 04:07:07,609 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-04-16 04:07:07,610 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-04-16 04:07:07,610 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-04-16 04:07:07,610 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-04-16 04:07:07,610 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-04-16 04:07:07,610 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-04-16 04:07:07,610 INFO L153 SettingsManager]: * Use SBE=true [2025-04-16 04:07:07,610 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-04-16 04:07:07,610 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-04-16 04:07:07,610 INFO L153 SettingsManager]: * sizeof long=4 [2025-04-16 04:07:07,610 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * sizeof long double=12 [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Use constant arrays=true [2025-04-16 04:07:07,611 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-16 04:07:07,611 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-04-16 04:07:07,611 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-16 04:07:07,612 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Commutativity condition synthesis=NECESSARY_AND_SUFFICIENT [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2025-04-16 04:07:07,612 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.boogie.preprocessor: Replace while statements and if-then-else statements -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Check unreachability of reach_error function -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Check absence of data races in concurrent programs -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder: Only consider context switches at boundaries of atomic blocks -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Only consider context switches at boundaries of atomic blocks -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> BY_SERIAL_NUMBER Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Abstraction used for commutativity in POR -> VARIABLES_GLOBAL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Commutativity condition synthesis -> NONE [2025-04-16 04:07:07,845 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-04-16 04:07:07,853 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-04-16 04:07:07,855 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-04-16 04:07:07,856 INFO L270 PluginConnector]: Initializing CDTParser... [2025-04-16 04:07:07,856 INFO L274 PluginConnector]: CDTParser initialized [2025-04-16 04:07:07,858 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-ext/37_stack_lock_p0_vs_concur.i [2025-04-16 04:07:09,221 INFO L538 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/18ab30fc5/cdaab8ecc6fb484eb422305b8304e39b/FLAG67568815c [2025-04-16 04:07:09,482 INFO L389 CDTParser]: Found 1 translation units. [2025-04-16 04:07:09,483 INFO L178 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-ext/37_stack_lock_p0_vs_concur.i [2025-04-16 04:07:09,498 INFO L432 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/18ab30fc5/cdaab8ecc6fb484eb422305b8304e39b/FLAG67568815c [2025-04-16 04:07:10,273 INFO L440 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/18ab30fc5/cdaab8ecc6fb484eb422305b8304e39b [2025-04-16 04:07:10,275 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-04-16 04:07:10,276 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2025-04-16 04:07:10,278 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-04-16 04:07:10,278 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-04-16 04:07:10,281 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-04-16 04:07:10,282 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,282 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@602b0a2f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10, skipping insertion in model container [2025-04-16 04:07:10,283 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,309 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-04-16 04:07:10,635 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-16 04:07:10,646 INFO L200 MainTranslator]: Completed pre-run [2025-04-16 04:07:10,713 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-16 04:07:10,744 INFO L204 MainTranslator]: Completed translation [2025-04-16 04:07:10,744 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10 WrapperNode [2025-04-16 04:07:10,744 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-04-16 04:07:10,745 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-04-16 04:07:10,745 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-04-16 04:07:10,745 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-04-16 04:07:10,749 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,761 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,795 INFO L138 Inliner]: procedures = 165, calls = 30, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 201 [2025-04-16 04:07:10,795 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-04-16 04:07:10,795 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-04-16 04:07:10,795 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-04-16 04:07:10,795 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-04-16 04:07:10,805 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,806 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,811 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,812 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,825 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,827 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,832 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,833 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,841 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-04-16 04:07:10,842 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-04-16 04:07:10,842 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-04-16 04:07:10,842 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-04-16 04:07:10,847 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (1/1) ... [2025-04-16 04:07:10,851 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-16 04:07:10,868 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-16 04:07:10,884 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-04-16 04:07:10,888 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-04-16 04:07:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2025-04-16 04:07:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2025-04-16 04:07:10,907 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2025-04-16 04:07:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2025-04-16 04:07:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2025-04-16 04:07:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-04-16 04:07:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-04-16 04:07:10,908 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-04-16 04:07:10,908 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2025-04-16 04:07:10,908 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexUnlock [2025-04-16 04:07:10,908 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-04-16 04:07:10,908 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-04-16 04:07:10,909 WARN L225 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2025-04-16 04:07:11,042 INFO L256 CfgBuilder]: Building ICFG [2025-04-16 04:07:11,044 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2025-04-16 04:07:11,353 INFO L303 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2025-04-16 04:07:11,354 INFO L313 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-04-16 04:07:11,354 INFO L318 CfgBuilder]: Performing block encoding [2025-04-16 04:07:11,491 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-04-16 04:07:11,492 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.04 04:07:11 BoogieIcfgContainer [2025-04-16 04:07:11,492 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-04-16 04:07:11,493 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-04-16 04:07:11,493 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-04-16 04:07:11,499 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-04-16 04:07:11,500 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.04 04:07:10" (1/3) ... [2025-04-16 04:07:11,500 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4c386a85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.04 04:07:11, skipping insertion in model container [2025-04-16 04:07:11,500 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.04 04:07:10" (2/3) ... [2025-04-16 04:07:11,500 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4c386a85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.04 04:07:11, skipping insertion in model container [2025-04-16 04:07:11,500 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 16.04 04:07:11" (3/3) ... [2025-04-16 04:07:11,501 INFO L128 eAbstractionObserver]: Analyzing ICFG 37_stack_lock_p0_vs_concur.i [2025-04-16 04:07:11,515 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-04-16 04:07:11,518 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG 37_stack_lock_p0_vs_concur.i that has 2 procedures, 194 locations, 198 edges, 1 initial locations, 2 loop locations, and 15 error locations. [2025-04-16 04:07:11,519 INFO L490 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2025-04-16 04:07:11,597 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2025-04-16 04:07:11,640 INFO L125 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-16 04:07:11,641 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2025-04-16 04:07:11,641 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-16 04:07:11,647 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2025-04-16 04:07:11,648 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2025-04-16 04:07:11,726 INFO L177 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2025-04-16 04:07:11,733 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread1of1ForFork0 ======== [2025-04-16 04:07:11,738 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1a19863b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-16 04:07:11,738 INFO L341 AbstractCegarLoop]: Starting to check reachability of 15 error locations. [2025-04-16 04:07:11,954 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err14ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:11,958 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:11,959 INFO L85 PathProgramCache]: Analyzing trace with hash 1418496044, now seen corresponding path program 1 times [2025-04-16 04:07:11,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:11,965 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [878130464] [2025-04-16 04:07:11,965 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:11,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:12,034 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-04-16 04:07:12,077 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-04-16 04:07:12,077 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:12,077 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:12,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:07:12,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:12,188 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [878130464] [2025-04-16 04:07:12,189 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [878130464] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:12,189 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:12,189 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2025-04-16 04:07:12,192 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1223745766] [2025-04-16 04:07:12,192 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:12,195 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-04-16 04:07:12,195 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:12,209 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-04-16 04:07:12,210 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-04-16 04:07:12,210 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,213 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:12,214 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 1 states have (on average 95.0) internal successors, (95), 2 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:12,214 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,289 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,289 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-04-16 04:07:12,289 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err0ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:12,290 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:12,290 INFO L85 PathProgramCache]: Analyzing trace with hash 1117327783, now seen corresponding path program 1 times [2025-04-16 04:07:12,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:12,290 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350045674] [2025-04-16 04:07:12,290 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:12,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:12,320 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 117 statements into 1 equivalence classes. [2025-04-16 04:07:12,342 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 117 of 117 statements. [2025-04-16 04:07:12,342 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:12,342 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:12,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:07:12,544 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:12,544 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350045674] [2025-04-16 04:07:12,544 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1350045674] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:12,544 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:12,544 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-04-16 04:07:12,544 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [939029804] [2025-04-16 04:07:12,544 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:12,545 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-04-16 04:07:12,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:12,545 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-04-16 04:07:12,546 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-04-16 04:07:12,546 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,546 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:12,547 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:12,547 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,547 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,790 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,790 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:12,790 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-04-16 04:07:12,790 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err0ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:12,791 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:12,791 INFO L85 PathProgramCache]: Analyzing trace with hash 333275774, now seen corresponding path program 1 times [2025-04-16 04:07:12,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:12,791 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298586070] [2025-04-16 04:07:12,791 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:12,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:12,821 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 154 statements into 1 equivalence classes. [2025-04-16 04:07:12,855 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 154 of 154 statements. [2025-04-16 04:07:12,855 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:12,855 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:12,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:07:12,934 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:12,934 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1298586070] [2025-04-16 04:07:12,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1298586070] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:12,935 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:12,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-16 04:07:12,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [851651114] [2025-04-16 04:07:12,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:12,935 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-16 04:07:12,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:12,936 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-16 04:07:12,936 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-16 04:07:12,936 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,937 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:12,937 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 77.0) internal successors, (154), 3 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:12,937 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:12,937 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:12,937 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:13,040 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:13,040 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:13,040 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:13,040 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-04-16 04:07:13,041 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting thr1Err6ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:13,041 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:13,041 INFO L85 PathProgramCache]: Analyzing trace with hash -1611506794, now seen corresponding path program 1 times [2025-04-16 04:07:13,041 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:13,041 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571362559] [2025-04-16 04:07:13,041 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:13,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:13,083 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-04-16 04:07:13,101 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-04-16 04:07:13,102 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:13,102 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:13,279 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2025-04-16 04:07:13,279 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:13,279 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [571362559] [2025-04-16 04:07:13,279 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [571362559] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:13,279 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:13,279 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-16 04:07:13,279 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2003622754] [2025-04-16 04:07:13,279 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:13,280 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-16 04:07:13,280 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:13,280 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-16 04:07:13,280 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-16 04:07:13,281 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:13,281 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:13,281 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 79.5) internal successors, (159), 3 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:13,281 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:13,281 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:13,284 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:13,284 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:13,463 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:13,463 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:13,463 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:13,464 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:13,464 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-04-16 04:07:13,464 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting thr1Err7ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:13,464 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:13,464 INFO L85 PathProgramCache]: Analyzing trace with hash -398250350, now seen corresponding path program 1 times [2025-04-16 04:07:13,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:13,465 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342534588] [2025-04-16 04:07:13,465 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:13,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:13,495 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-04-16 04:07:13,522 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-04-16 04:07:13,524 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:13,525 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:14,343 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2025-04-16 04:07:14,343 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:14,344 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342534588] [2025-04-16 04:07:14,344 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1342534588] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:14,344 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:14,344 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-04-16 04:07:14,344 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966612829] [2025-04-16 04:07:14,344 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:14,345 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-04-16 04:07:14,345 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:14,345 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-04-16 04:07:14,345 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2025-04-16 04:07:14,345 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:14,346 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:14,346 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 32.4) internal successors, (162), 6 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:14,346 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:14,346 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:14,346 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:14,346 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:14,346 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:14,418 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:07:14,844 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:14,844 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:14,844 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:14,845 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:14,845 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:07:14,846 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-04-16 04:07:14,846 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting thr1Err1ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:14,846 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:14,846 INFO L85 PathProgramCache]: Analyzing trace with hash -924649868, now seen corresponding path program 1 times [2025-04-16 04:07:14,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:14,846 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213420808] [2025-04-16 04:07:14,846 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:14,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:14,868 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 142 statements into 1 equivalence classes. [2025-04-16 04:07:14,877 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 142 of 142 statements. [2025-04-16 04:07:14,877 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:14,878 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:14,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:07:14,919 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:14,919 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213420808] [2025-04-16 04:07:14,919 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [213420808] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:14,919 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:14,919 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-16 04:07:14,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522124537] [2025-04-16 04:07:14,919 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:14,920 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-16 04:07:14,920 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:14,920 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-16 04:07:14,920 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-16 04:07:14,920 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:14,921 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:14,921 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 71.0) internal successors, (142), 3 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:14,921 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:14,921 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:14,921 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:14,921 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:14,921 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:07:14,921 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:14,942 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:07:15,257 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:15,257 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:15,257 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,257 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,257 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:07:15,257 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,257 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-04-16 04:07:15,257 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting thr1Err3ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:15,258 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:15,258 INFO L85 PathProgramCache]: Analyzing trace with hash -1043561234, now seen corresponding path program 1 times [2025-04-16 04:07:15,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:15,258 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210371385] [2025-04-16 04:07:15,258 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:15,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:15,278 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 130 statements into 1 equivalence classes. [2025-04-16 04:07:15,287 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 130 of 130 statements. [2025-04-16 04:07:15,287 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:15,287 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:15,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:07:15,353 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:15,353 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210371385] [2025-04-16 04:07:15,353 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [210371385] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:15,353 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:15,353 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-16 04:07:15,353 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695316212] [2025-04-16 04:07:15,353 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:15,354 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-16 04:07:15,354 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:15,355 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-16 04:07:15,355 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-16 04:07:15,355 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:15,356 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:15,356 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 65.0) internal successors, (130), 3 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:15,357 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:15,357 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:15,357 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,357 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,357 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:07:15,357 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,357 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:15,374 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:07:15,710 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:15,710 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:15,710 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,710 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,710 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:07:15,710 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,711 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err14ASSERT_VIOLATIONDATA_RACE (14 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err9ASSERT_VIOLATIONDATA_RACE (13 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err13ASSERT_VIOLATIONDATA_RACE (12 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err12ASSERT_VIOLATIONDATA_RACE (11 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err11ASSERT_VIOLATIONDATA_RACE (10 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err10ASSERT_VIOLATIONDATA_RACE (9 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err8ASSERT_VIOLATIONDATA_RACE (8 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err7ASSERT_VIOLATIONDATA_RACE (7 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err6ASSERT_VIOLATIONDATA_RACE (6 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err0ASSERT_VIOLATIONDATA_RACE (5 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err5ASSERT_VIOLATIONDATA_RACE (4 of 15 remaining) [2025-04-16 04:07:15,714 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err4ASSERT_VIOLATIONDATA_RACE (3 of 15 remaining) [2025-04-16 04:07:15,715 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err3ASSERT_VIOLATIONDATA_RACE (2 of 15 remaining) [2025-04-16 04:07:15,715 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err2ASSERT_VIOLATIONDATA_RACE (1 of 15 remaining) [2025-04-16 04:07:15,715 INFO L790 garLoopResultBuilder]: Registering result SAFE for location thr1Err1ASSERT_VIOLATIONDATA_RACE (0 of 15 remaining) [2025-04-16 04:07:15,715 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-04-16 04:07:15,724 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1] [2025-04-16 04:07:15,725 INFO L320 ceAbstractionStarter]: Result for error location thr1Thread1of1ForFork0 was SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE,SAFE (1/2) [2025-04-16 04:07:15,730 INFO L125 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-16 04:07:15,732 INFO L177 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2025-04-16 04:07:15,732 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2025-04-16 04:07:15,732 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1a19863b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-16 04:07:15,732 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-04-16 04:07:15,813 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2025-04-16 04:07:15,813 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:15,813 INFO L85 PathProgramCache]: Analyzing trace with hash 909586741, now seen corresponding path program 1 times [2025-04-16 04:07:15,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:15,813 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594827159] [2025-04-16 04:07:15,813 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:15,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:15,826 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 93 statements into 1 equivalence classes. [2025-04-16 04:07:15,835 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 93 of 93 statements. [2025-04-16 04:07:15,835 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:15,835 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-16 04:07:15,835 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-16 04:07:15,841 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 93 statements into 1 equivalence classes. [2025-04-16 04:07:15,849 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 93 of 93 statements. [2025-04-16 04:07:15,849 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:15,850 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-16 04:07:15,873 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-16 04:07:15,873 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-04-16 04:07:15,873 INFO L790 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2025-04-16 04:07:15,873 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-04-16 04:07:15,874 INFO L422 BasicCegarLoop]: Path program histogram: [1] [2025-04-16 04:07:15,874 INFO L320 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE (2/2) [2025-04-16 04:07:15,875 WARN L247 ceAbstractionStarter]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2025-04-16 04:07:15,875 INFO L490 ceAbstractionStarter]: Constructing petrified ICFG for 2 thread instances. [2025-04-16 04:07:15,918 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2025-04-16 04:07:15,921 INFO L125 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-16 04:07:15,931 INFO L177 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2025-04-16 04:07:15,932 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.start ======== [2025-04-16 04:07:15,932 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1a19863b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-16 04:07:15,932 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-04-16 04:07:16,041 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES === [ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES] === [2025-04-16 04:07:16,042 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:16,042 INFO L85 PathProgramCache]: Analyzing trace with hash -1690651725, now seen corresponding path program 1 times [2025-04-16 04:07:16,042 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:16,042 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541587896] [2025-04-16 04:07:16,042 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:16,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:16,056 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 99 statements into 1 equivalence classes. [2025-04-16 04:07:16,066 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 99 of 99 statements. [2025-04-16 04:07:16,066 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:16,066 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-16 04:07:16,066 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-04-16 04:07:16,069 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 99 statements into 1 equivalence classes. [2025-04-16 04:07:16,079 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 99 of 99 statements. [2025-04-16 04:07:16,079 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:16,079 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-04-16 04:07:16,088 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-04-16 04:07:16,089 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-04-16 04:07:16,089 INFO L790 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2025-04-16 04:07:16,089 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-04-16 04:07:16,090 INFO L422 BasicCegarLoop]: Path program histogram: [1] [2025-04-16 04:07:16,090 INFO L320 ceAbstractionStarter]: Result for error location ULTIMATE.start was UNSAFE (1/3) [2025-04-16 04:07:16,090 WARN L247 ceAbstractionStarter]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2025-04-16 04:07:16,090 INFO L490 ceAbstractionStarter]: Constructing petrified ICFG for 3 thread instances. [2025-04-16 04:07:16,138 INFO L143 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2025-04-16 04:07:16,142 INFO L125 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-16 04:07:16,160 INFO L177 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2025-04-16 04:07:16,160 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread3of3ForFork0 ======== [2025-04-16 04:07:16,160 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1a19863b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-16 04:07:16,160 INFO L341 AbstractCegarLoop]: Starting to check reachability of 15 error locations. [2025-04-16 04:07:16,328 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err14ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:16,328 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:16,328 INFO L85 PathProgramCache]: Analyzing trace with hash -1489636144, now seen corresponding path program 1 times [2025-04-16 04:07:16,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:16,328 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581399937] [2025-04-16 04:07:16,328 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:16,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:16,341 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 107 statements into 1 equivalence classes. [2025-04-16 04:07:16,345 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 107 of 107 statements. [2025-04-16 04:07:16,345 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:16,345 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:16,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:07:16,359 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:16,359 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581399937] [2025-04-16 04:07:16,359 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [581399937] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:16,359 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:16,359 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2025-04-16 04:07:16,359 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860329369] [2025-04-16 04:07:16,359 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:16,359 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-04-16 04:07:16,359 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:16,360 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-04-16 04:07:16,360 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-04-16 04:07:16,360 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:16,360 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:16,361 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 1 states have (on average 99.0) internal successors, (99), 2 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:16,361 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:17,287 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:17,288 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-04-16 04:07:17,289 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err0ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:17,290 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:17,290 INFO L85 PathProgramCache]: Analyzing trace with hash -1461579539, now seen corresponding path program 1 times [2025-04-16 04:07:17,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:17,290 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300594560] [2025-04-16 04:07:17,290 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:17,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:17,349 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 239 statements into 1 equivalence classes. [2025-04-16 04:07:17,357 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 239 of 239 statements. [2025-04-16 04:07:17,358 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:17,358 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:17,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:07:17,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:17,487 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300594560] [2025-04-16 04:07:17,487 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1300594560] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:17,487 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:17,487 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-04-16 04:07:17,487 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [922032915] [2025-04-16 04:07:17,487 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:17,488 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-04-16 04:07:17,488 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:17,488 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-04-16 04:07:17,488 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-04-16 04:07:17,489 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:17,489 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:17,490 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:17,490 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:17,490 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:22,510 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:22,512 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:22,512 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-04-16 04:07:22,512 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err0ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:22,512 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:22,512 INFO L85 PathProgramCache]: Analyzing trace with hash -1147791063, now seen corresponding path program 1 times [2025-04-16 04:07:22,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:22,513 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802134349] [2025-04-16 04:07:22,513 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:22,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:22,544 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 313 statements into 1 equivalence classes. [2025-04-16 04:07:22,558 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 313 of 313 statements. [2025-04-16 04:07:22,558 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:22,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:23,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:07:23,063 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:23,063 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802134349] [2025-04-16 04:07:23,063 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802134349] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:23,063 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:23,063 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-04-16 04:07:23,063 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [224789976] [2025-04-16 04:07:23,063 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:23,063 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-04-16 04:07:23,063 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:23,064 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-04-16 04:07:23,064 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-04-16 04:07:23,064 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:23,065 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:23,065 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 50.833333333333336) internal successors, (305), 6 states have internal predecessors, (305), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:23,065 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:23,065 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:23,065 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:23,115 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:07:23,131 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:07:25,789 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 225 treesize of output 237 [2025-04-16 04:07:25,803 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 178 treesize of output 190 [2025-04-16 04:07:25,815 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 213 treesize of output 225 [2025-04-16 04:07:25,826 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 186 [2025-04-16 04:07:25,991 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 35 [2025-04-16 04:07:25,997 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,014 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,054 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 35 [2025-04-16 04:07:26,058 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,068 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,079 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 35 [2025-04-16 04:07:26,084 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,112 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,120 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 37 [2025-04-16 04:07:26,141 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 10 [2025-04-16 04:07:26,159 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 35 [2025-04-16 04:07:26,162 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,177 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 10 [2025-04-16 04:07:26,212 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 213 treesize of output 225 [2025-04-16 04:07:26,219 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 174 treesize of output 186 [2025-04-16 04:07:26,226 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 225 treesize of output 237 [2025-04-16 04:07:26,235 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 178 treesize of output 190 [2025-04-16 04:07:26,426 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 37 [2025-04-16 04:07:26,435 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,477 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 37 [2025-04-16 04:07:26,492 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,507 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 37 [2025-04-16 04:07:26,531 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 35 [2025-04-16 04:07:26,536 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,566 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 10 [2025-04-16 04:07:26,572 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,585 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:26,604 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 35 [2025-04-16 04:07:26,609 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 10 [2025-04-16 04:07:27,794 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:27,794 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:27,794 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:07:27,794 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-04-16 04:07:27,795 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting thr1Err1ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:27,795 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:27,795 INFO L85 PathProgramCache]: Analyzing trace with hash 1099204741, now seen corresponding path program 1 times [2025-04-16 04:07:27,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:27,795 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105209110] [2025-04-16 04:07:27,795 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:27,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:27,816 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 223 statements into 1 equivalence classes. [2025-04-16 04:07:27,825 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 223 of 223 statements. [2025-04-16 04:07:27,826 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:27,826 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:27,862 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2025-04-16 04:07:27,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:27,862 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1105209110] [2025-04-16 04:07:27,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1105209110] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:27,862 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:27,863 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-16 04:07:27,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [558302226] [2025-04-16 04:07:27,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:27,863 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-16 04:07:27,863 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:27,863 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-16 04:07:27,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-16 04:07:27,863 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:27,864 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:27,864 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 81.5) internal successors, (163), 3 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:27,864 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:27,864 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:27,864 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:07:27,864 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:27,879 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:07:27,889 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:07:31,906 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:31,906 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:31,906 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:07:31,906 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:31,906 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-04-16 04:07:31,907 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting thr1Err2ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:07:31,907 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:07:31,907 INFO L85 PathProgramCache]: Analyzing trace with hash -270884925, now seen corresponding path program 1 times [2025-04-16 04:07:31,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:07:31,907 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587675150] [2025-04-16 04:07:31,907 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:07:31,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:07:31,936 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 219 statements into 1 equivalence classes. [2025-04-16 04:07:31,952 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 219 of 219 statements. [2025-04-16 04:07:31,952 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:07:31,952 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:07:32,534 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2025-04-16 04:07:32,534 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:07:32,534 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587675150] [2025-04-16 04:07:32,534 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [587675150] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:07:32,534 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:07:32,534 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-04-16 04:07:32,534 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1381407792] [2025-04-16 04:07:32,534 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:07:32,535 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-04-16 04:07:32,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:07:32,535 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-04-16 04:07:32,535 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2025-04-16 04:07:32,535 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:32,536 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:07:32,536 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 33.2) internal successors, (166), 6 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:07:32,536 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:32,536 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:07:32,536 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:07:32,536 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:07:32,536 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:07:39,669 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:07:39,710 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:07:44,652 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:07:44,687 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:08:08,307 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:08,307 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:08:08,307 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:08:08,307 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:08,308 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:08:08,308 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-04-16 04:08:08,308 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting thr1Err3ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:08:08,309 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:08:08,309 INFO L85 PathProgramCache]: Analyzing trace with hash -1919719907, now seen corresponding path program 1 times [2025-04-16 04:08:08,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:08:08,309 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887248267] [2025-04-16 04:08:08,309 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:08:08,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:08:08,446 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1294 statements into 1 equivalence classes. [2025-04-16 04:08:08,520 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1294 of 1294 statements. [2025-04-16 04:08:08,520 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:08:08,520 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:08:09,334 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2025-04-16 04:08:09,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:08:09,335 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887248267] [2025-04-16 04:08:09,335 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [887248267] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:08:09,335 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:08:09,335 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-16 04:08:09,335 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [26125289] [2025-04-16 04:08:09,335 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:08:09,336 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-16 04:08:09,336 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:08:09,336 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-16 04:08:09,336 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-16 04:08:09,336 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:09,337 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:08:09,337 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 103.0) internal successors, (206), 3 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:08:09,337 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:09,337 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:08:09,337 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:08:09,337 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:09,337 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:08:09,337 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:09,352 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:08:09,365 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:08:12,356 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:12,356 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:08:12,356 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:08:12,356 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:12,356 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:08:12,357 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:12,357 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-04-16 04:08:12,357 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting thr1Err5ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:08:12,358 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:08:12,358 INFO L85 PathProgramCache]: Analyzing trace with hash -1114769687, now seen corresponding path program 1 times [2025-04-16 04:08:12,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:08:12,358 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649665553] [2025-04-16 04:08:12,359 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:08:12,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:08:12,465 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1283 statements into 1 equivalence classes. [2025-04-16 04:08:12,519 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1283 of 1283 statements. [2025-04-16 04:08:12,519 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:08:12,519 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:08:12,838 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2025-04-16 04:08:12,838 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:08:12,838 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [649665553] [2025-04-16 04:08:12,839 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [649665553] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:08:12,839 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:08:12,839 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-16 04:08:12,839 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134453051] [2025-04-16 04:08:12,839 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:08:12,839 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-16 04:08:12,839 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:08:12,840 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-16 04:08:12,840 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-16 04:08:12,840 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:12,843 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:08:12,843 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 103.0) internal successors, (206), 3 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:08:12,843 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:12,843 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:08:12,843 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:08:12,843 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:12,843 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:08:12,843 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:12,843 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:15,434 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:15,434 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:08:15,434 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:08:15,435 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:15,435 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:08:15,435 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:15,435 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:15,435 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-04-16 04:08:15,435 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting thr1Err6ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:08:15,436 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:08:15,436 INFO L85 PathProgramCache]: Analyzing trace with hash -729506207, now seen corresponding path program 1 times [2025-04-16 04:08:15,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:08:15,437 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222467445] [2025-04-16 04:08:15,437 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:08:15,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:08:15,538 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1277 statements into 1 equivalence classes. [2025-04-16 04:08:15,583 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1277 of 1277 statements. [2025-04-16 04:08:15,584 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:08:15,584 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:08:16,122 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2025-04-16 04:08:16,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:08:16,123 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222467445] [2025-04-16 04:08:16,123 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1222467445] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-16 04:08:16,123 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-16 04:08:16,123 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-16 04:08:16,123 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419458450] [2025-04-16 04:08:16,123 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:08:16,124 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-16 04:08:16,124 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:08:16,124 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-16 04:08:16,124 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-16 04:08:16,124 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:16,125 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:08:16,125 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 103.0) internal successors, (206), 3 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:08:16,125 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:16,125 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:08:16,125 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:08:16,125 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:16,125 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:08:16,125 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:16,125 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:16,125 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:16,138 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:08:16,152 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-04-16 04:08:20,042 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:20,042 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:08:20,042 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:08:20,042 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:20,043 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:08:20,043 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:20,043 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:20,043 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:20,043 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-04-16 04:08:20,043 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting thr1Err4ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:08:20,044 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:08:20,044 INFO L85 PathProgramCache]: Analyzing trace with hash 186915938, now seen corresponding path program 1 times [2025-04-16 04:08:20,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:08:20,045 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588556565] [2025-04-16 04:08:20,045 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:08:20,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:08:20,179 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1621 statements into 1 equivalence classes. [2025-04-16 04:08:20,471 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1621 of 1621 statements. [2025-04-16 04:08:20,471 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:08:20,471 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:08:37,906 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 112 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-16 04:08:37,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:08:37,907 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588556565] [2025-04-16 04:08:37,907 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [588556565] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-16 04:08:37,907 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [407031447] [2025-04-16 04:08:37,907 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:08:37,907 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-16 04:08:37,907 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-16 04:08:37,911 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-16 04:08:37,913 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-04-16 04:08:38,457 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1621 statements into 1 equivalence classes. [2025-04-16 04:08:38,899 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1621 of 1621 statements. [2025-04-16 04:08:38,899 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:08:38,899 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:08:38,922 INFO L256 TraceCheckSpWp]: Trace formula consists of 5449 conjuncts, 15 conjuncts are in the unsatisfiable core [2025-04-16 04:08:38,948 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-16 04:08:38,996 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:08:39,086 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:08:39,167 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:08:39,170 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-04-16 04:08:39,458 INFO L325 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2025-04-16 04:08:39,459 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 22 [2025-04-16 04:08:39,465 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:39,465 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 34 treesize of output 10 [2025-04-16 04:08:39,801 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2025-04-16 04:08:39,801 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-16 04:08:40,097 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:40,098 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 35 treesize of output 13 [2025-04-16 04:08:40,103 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:40,103 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 35 treesize of output 13 [2025-04-16 04:08:40,108 WARN L849 $PredicateComparison]: unable to prove that (forall ((v_DerPreprocessor_4 (Array Int Int))) (< 0 (select (select (store |c_#memory_int| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))) is different from false [2025-04-16 04:08:40,313 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:40,314 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 148 treesize of output 164 [2025-04-16 04:08:40,374 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 151 [2025-04-16 04:08:40,377 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 13 [2025-04-16 04:08:40,386 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:40,386 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 35 treesize of output 13 [2025-04-16 04:08:41,046 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:41,046 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:08:41,103 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 225 treesize of output 203 [2025-04-16 04:08:41,115 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:41,116 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 43 treesize of output 13 [2025-04-16 04:08:42,713 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:42,714 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:08:42,723 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:42,724 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 137 treesize of output 153 [2025-04-16 04:08:42,807 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:08:42,807 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 47 treesize of output 13 [2025-04-16 04:08:42,844 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 320 treesize of output 304 [2025-04-16 04:08:42,854 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 118 [2025-04-16 04:08:42,860 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 46 [2025-04-16 04:08:43,005 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2025-04-16 04:08:43,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [407031447] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-16 04:08:43,005 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-16 04:08:43,006 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 11, 11] total 54 [2025-04-16 04:08:43,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1665471247] [2025-04-16 04:08:43,006 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-16 04:08:43,008 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2025-04-16 04:08:43,008 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:08:43,011 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2025-04-16 04:08:43,011 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=556, Invalid=2199, Unknown=5, NotChecked=102, Total=2862 [2025-04-16 04:08:43,011 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:43,013 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:08:43,014 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 54 states have (on average 43.092592592592595) internal successors, (2327), 54 states have internal predecessors, (2327), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:08:43,014 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:09:16,679 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:09:16,718 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:09:22,486 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:09:22,517 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:10:02,932 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse0 (< c_~next_alloc_idx~0 65)) (.cse2 (< 64 c_~next_alloc_idx~0))) (and (<= c_~next_alloc_idx~0 21) (<= c_~next_alloc_idx~0 45) (<= c_~next_alloc_idx~0 60) (not (= |c_thr1Thread2of3ForFork0_push_~#newTop~0#1.base| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|)) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse1 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse1 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse1 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (<= c_~next_alloc_idx~0 43) (or .cse2 (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse3 (let ((.cse4 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse3 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse3 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse5 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse5 v_prenex_11) 0) 1) 0)))))))) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse6 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse6 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select .cse6 v_prenex_2) 0) 1) 0)))))) (not (= (select |c_#valid| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0)) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse7 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse7 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse7 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse0) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse8 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (or (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse9 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset| c_~next_alloc_idx~0)))) (or (not (= (+ (select (select .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)) (< 0 (select (select (store .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))))) .cse2))) is different from false [2025-04-16 04:10:17,619 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse0 (< c_~next_alloc_idx~0 65)) (.cse2 (< 64 c_~next_alloc_idx~0))) (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int)) (or (< 0 (select (select (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)))) (<= c_~next_alloc_idx~0 45) (<= c_~next_alloc_idx~0 60) (not (= |c_thr1Thread2of3ForFork0_push_~#newTop~0#1.base| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|)) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse1 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse1 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse1 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (<= c_~next_alloc_idx~0 43) (or .cse2 (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse3 (let ((.cse4 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse3 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse3 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse5 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse5 v_prenex_11) 0) 1) 0)))))))) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse6 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse6 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select .cse6 v_prenex_2) 0) 1) 0)))))) (not (= (select |c_#valid| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0)) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse7 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse7 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse7 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse0) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse8 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (<= 5 |c_thr1Thread1of3ForFork0_push_#t~mem4#1|) (<= c_~next_alloc_idx~0 9) (or (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse9 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset| c_~next_alloc_idx~0)))) (or (not (= (+ (select (select .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)) (< 0 (select (select (store .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))))) .cse2))) is different from false [2025-04-16 04:10:23,124 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse0 (< c_~next_alloc_idx~0 65)) (.cse2 (< 64 c_~next_alloc_idx~0))) (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int)) (or (< 0 (select (select (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)))) (<= c_~next_alloc_idx~0 45) (<= c_~next_alloc_idx~0 60) (not (= |c_thr1Thread2of3ForFork0_push_~#newTop~0#1.base| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|)) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse1 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse1 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse1 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (<= c_~next_alloc_idx~0 43) (or .cse2 (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse3 (let ((.cse4 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse3 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse3 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse5 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse5 v_prenex_11) 0) 1) 0)))))))) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse6 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse6 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select .cse6 v_prenex_2) 0) 1) 0)))))) (not (= (select |c_#valid| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0)) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse7 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse7 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse7 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse0) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse8 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (<= 5 |c_thr1Thread1of3ForFork0_push_#t~mem4#1|) (<= c_~next_alloc_idx~0 9) (or (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse9 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset| c_~next_alloc_idx~0)))) (or (not (= (+ (select (select .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)) (< 0 (select (select (store .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))))) .cse2) (< 0 (select (select |c_#memory_int| |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)))) is different from false [2025-04-16 04:10:24,820 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse0 (< c_~next_alloc_idx~0 65)) (.cse2 (< 64 c_~next_alloc_idx~0))) (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int)) (or (< 0 (select (select (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)))) (<= c_~next_alloc_idx~0 60) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse1 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse1 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse1 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (or .cse2 (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse3 (let ((.cse4 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse3 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse3 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse5 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse5 v_prenex_11) 0) 1) 0)))))))) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse6 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse6 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select .cse6 v_prenex_2) 0) 1) 0)))))) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse7 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse7 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse7 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse0) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse8 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (<= c_~next_alloc_idx~0 9) (or (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse9 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset| c_~next_alloc_idx~0)))) (or (not (= (+ (select (select .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)) (< 0 (select (select (store .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))))) .cse2) (< 0 (select (select |c_#memory_int| |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)))) is different from false [2025-04-16 04:11:16,039 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse0 (< c_~next_alloc_idx~0 65)) (.cse2 (< 64 c_~next_alloc_idx~0))) (and (<= c_~next_alloc_idx~0 35) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int)) (or (< 0 (select (select (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)))) (<= c_~next_alloc_idx~0 45) (<= c_~next_alloc_idx~0 60) (not (= |c_thr1Thread2of3ForFork0_push_~#newTop~0#1.base| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|)) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse1 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse1 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse1 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (<= c_~next_alloc_idx~0 43) (or .cse2 (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse3 (let ((.cse4 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse3 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse3 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse5 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse5 v_prenex_11) 0) 1) 0)))))))) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse6 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse6 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select .cse6 v_prenex_2) 0) 1) 0)))))) (not (= (select |c_#valid| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0)) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse7 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse7 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse7 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse0) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse8 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (or (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse9 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset| c_~next_alloc_idx~0)))) (or (not (= (+ (select (select .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)) (< 0 (select (select (store .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))))) .cse2))) is different from false [2025-04-16 04:11:18,152 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse0 (< c_~next_alloc_idx~0 65)) (.cse2 (< 64 c_~next_alloc_idx~0))) (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int)) (or (< 0 (select (select (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)))) (<= c_~next_alloc_idx~0 45) (<= c_~next_alloc_idx~0 60) (<= c_~next_alloc_idx~0 39) (not (= |c_thr1Thread2of3ForFork0_push_~#newTop~0#1.base| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|)) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse1 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse1 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse1 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (<= c_~next_alloc_idx~0 43) (or .cse2 (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse3 (let ((.cse4 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse3 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse3 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse5 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse5 v_prenex_11) 0) 1) 0)))))))) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse6 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse6 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select .cse6 v_prenex_2) 0) 1) 0)))))) (not (= (select |c_#valid| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0)) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse7 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse7 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse7 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse0) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse8 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (or (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse9 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset| c_~next_alloc_idx~0)))) (or (not (= (+ (select (select .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)) (< 0 (select (select (store .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))))) .cse2))) is different from false [2025-04-16 04:11:22,703 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse1 (< c_~next_alloc_idx~0 65)) (.cse3 (< 64 c_~next_alloc_idx~0)) (.cse0 (select |c_#race| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|))) (and (= (select .cse0 (+ 3 |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.offset|)) 0) (<= c_~next_alloc_idx~0 60) (or .cse1 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse2 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse2 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse2 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (<= c_~next_alloc_idx~0 43) (or .cse3 (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse4 (let ((.cse5 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse5 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse5 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse4 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse4 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse6 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse6 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse6 v_prenex_11) 0) 1) 0)))))))) (= (select .cse0 |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.offset|) 0) (or .cse1 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse7 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse7 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select .cse7 v_prenex_2) 0) 1) 0)))))) (not (= (select |c_#valid| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0)) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse8 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse8 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse8 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse1) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse9 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (<= c_~next_alloc_idx~0 47) (= (select .cse0 (+ |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.offset| 1)) 0) (or (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse10 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset| c_~next_alloc_idx~0)))) (or (not (= (+ (select (select .cse10 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)) (< 0 (select (select (store .cse10 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))))) .cse3) (= (select .cse0 (+ 2 |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.offset|)) 0) (<= c_~next_alloc_idx~0 41))) is different from false [2025-04-16 04:11:32,641 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse1 (< c_~next_alloc_idx~0 65)) (.cse0 (select |c_#race| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|))) (and (= (select .cse0 (+ 3 |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.offset|)) 0) (<= c_~next_alloc_idx~0 60) (or .cse1 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse2 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse2 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse2 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (<= c_~next_alloc_idx~0 43) (or (< 64 c_~next_alloc_idx~0) (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse3 (let ((.cse4 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse3 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse3 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse5 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse5 v_prenex_11) 0) 1) 0)))))))) (= (select .cse0 |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.offset|) 0) (not (= (select |c_#valid| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0)) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse6 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse6 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse6 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse1) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse7 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse7 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse7 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (<= c_~next_alloc_idx~0 47) (= (select .cse0 (+ |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.offset| 1)) 0) (= (select .cse0 (+ 2 |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.offset|)) 0) (<= c_~next_alloc_idx~0 13))) is different from false [2025-04-16 04:12:06,287 WARN L849 $PredicateComparison]: unable to prove that (let ((.cse0 (< c_~next_alloc_idx~0 65)) (.cse2 (< 64 c_~next_alloc_idx~0))) (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int)) (or (< 0 (select (select (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)))) (<= c_~next_alloc_idx~0 60) (<= c_~next_alloc_idx~0 39) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse1 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse1 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse1 v_prenex_2) 0) 1) 0)))))) (<= 0 (+ c_~next_alloc_idx~0 3)) (<= c_~next_alloc_idx~0 43) (or .cse2 (and (forall ((v_DerPreprocessor_4 (Array Int Int)) (v_DerPreprocessor_7 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int) (v_subst_1 Int)) (let ((.cse3 (let ((.cse4 (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_7))) (store .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select .cse4 |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 (+ c_~next_alloc_idx~0 2)))))) (or (< 0 (select (select (store .cse3 v_subst_1 v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse3 v_subst_1) 0) 1) 0))))) (or (< c_~next_alloc_idx~0 63) (forall ((v_prenex_8 (Array Int Int)) (v_prenex_7 Int) (v_prenex_10 (Array Int Int)) (v_prenex_11 Int) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_12 (Array Int Int))) (let ((.cse5 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_prenex_8) v_prenex_7 v_prenex_10))) (or (< 0 (select (select (store .cse5 v_prenex_11 v_prenex_12) v_prenex_7) 0)) (not (= (+ (select (select .cse5 v_prenex_11) 0) 1) 0)))))))) (or .cse0 (forall ((v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_prenex_1 (Array Int Int)) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse6 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_5))) (or (< 0 (select (select (store .cse6 v_prenex_2 v_prenex_1) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|)) (not (= (+ (select (select .cse6 v_prenex_2) 0) 1) 0)))))) (not (= (select |c_#valid| |c_thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0)) (or (forall ((v_prenex_6 Int) (v_DerPreprocessor_5 (Array Int Int)) (v_prenex_2 Int) (v_DerPreprocessor_6 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (v_prenex_1 (Array Int Int))) (let ((.cse7 (store (store |c_#memory_int| |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_6) v_prenex_6 v_DerPreprocessor_5))) (or (not (= (+ (select (select .cse7 v_prenex_2) 0) 1) 0)) (< 0 (select (select (store .cse7 v_prenex_2 v_prenex_1) v_prenex_6) 0))))) .cse0) (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse8 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0 c_~next_alloc_idx~0)))) (or (< 0 (select (select (store .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) 0)) (not (= (+ (select (select .cse8 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0))))) (or (forall ((v_DerPreprocessor_4 (Array Int Int)) (|thr1Thread3of3ForFork0_push_~#newTop~0#1.base| Int) (|thr1Thread1of3ForFork0_push_~#newTop~0#1.base| Int)) (let ((.cse9 (store |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base| (store (select |c_#memory_int| |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset| c_~next_alloc_idx~0)))) (or (not (= (+ (select (select .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base|) 0) 1) 0)) (< 0 (select (select (store .cse9 |thr1Thread3of3ForFork0_push_~#newTop~0#1.base| v_DerPreprocessor_4) |thr1Thread1of3ForFork0_push_~#newTop~0#1.base|) |c_thr1Thread1of3ForFork0_push_~#newTop~0#1.offset|))))) .cse2))) is different from false [2025-04-16 04:12:12,810 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:12:12,842 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:12:19,128 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:12:19,160 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:12:30,145 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:12:30,177 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:12:33,291 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:12:33,326 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 6 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:12:44,487 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 509 states. [2025-04-16 04:12:44,503 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2025-04-16 04:12:44,688 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2025-04-16 04:12:44,688 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting thr1Err6ASSERT_VIOLATIONDATA_RACE === [thr1Err14ASSERT_VIOLATIONDATA_RACE, thr1Err9ASSERT_VIOLATIONDATA_RACE, thr1Err13ASSERT_VIOLATIONDATA_RACE, thr1Err12ASSERT_VIOLATIONDATA_RACE (and 11 more)] === [2025-04-16 04:12:44,690 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-16 04:12:44,690 INFO L85 PathProgramCache]: Analyzing trace with hash 1601660452, now seen corresponding path program 1 times [2025-04-16 04:12:44,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-16 04:12:44,690 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [416874158] [2025-04-16 04:12:44,690 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:12:44,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-16 04:12:44,968 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3574 statements into 1 equivalence classes. [2025-04-16 04:12:45,335 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3574 of 3574 statements. [2025-04-16 04:12:45,335 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:12:45,335 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:13:37,392 INFO L134 CoverageAnalysis]: Checked inductivity of 20877 backedges. 0 proven. 20875 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-04-16 04:13:37,392 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-16 04:13:37,392 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [416874158] [2025-04-16 04:13:37,392 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [416874158] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-16 04:13:37,392 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [252443004] [2025-04-16 04:13:37,393 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-16 04:13:37,393 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-16 04:13:37,393 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2025-04-16 04:13:37,394 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-16 04:13:37,395 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-04-16 04:13:38,336 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3574 statements into 1 equivalence classes. [2025-04-16 04:13:39,263 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3574 of 3574 statements. [2025-04-16 04:13:39,263 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-16 04:13:39,263 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-16 04:13:39,308 INFO L256 TraceCheckSpWp]: Trace formula consists of 12021 conjuncts, 39 conjuncts are in the unsatisfiable core [2025-04-16 04:13:39,365 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-16 04:13:39,403 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,471 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,539 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,607 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,659 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,716 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,774 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,827 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,881 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,938 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:39,986 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,038 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,087 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,136 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,186 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,234 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,284 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,333 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,382 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,431 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,487 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,546 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,597 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,646 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,695 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,755 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,803 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:40,804 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:44,875 INFO L325 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2025-04-16 04:13:44,875 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 41 [2025-04-16 04:13:44,880 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:44,881 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 47 [2025-04-16 04:13:44,883 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:44,940 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:44,993 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:45,049 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:45,105 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2025-04-16 04:13:45,185 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:45,185 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 32 treesize of output 10 [2025-04-16 04:13:45,186 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-04-16 04:13:45,211 INFO L134 CoverageAnalysis]: Checked inductivity of 20877 backedges. 0 proven. 20875 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-04-16 04:13:45,212 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-16 04:13:45,253 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:45,253 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 148 treesize of output 164 [2025-04-16 04:13:45,373 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:45,373 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:45,496 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:45,497 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:45,607 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:45,608 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:45,708 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:45,708 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:45,855 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:45,855 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:45,960 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:45,960 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:46,077 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:46,077 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:46,189 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:46,189 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:46,304 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:46,304 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:46,409 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:46,409 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:46,514 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:46,514 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:46,632 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:46,632 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:46,746 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:46,746 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:46,875 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:46,875 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,041 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,042 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,147 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,147 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,252 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,252 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,371 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,371 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,483 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,483 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,610 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,610 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,722 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,722 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,840 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,840 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:47,949 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:47,949 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,059 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,060 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,172 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,172 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,289 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,289 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,409 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,409 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,525 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,525 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,635 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,635 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,746 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,746 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,858 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,859 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 159 [2025-04-16 04:13:48,867 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-16 04:13:48,867 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 137 treesize of output 153 [2025-04-16 04:13:48,961 INFO L134 CoverageAnalysis]: Checked inductivity of 20877 backedges. 20875 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-04-16 04:13:48,961 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [252443004] provided 1 perfect and 1 imperfect interpolant sequences [2025-04-16 04:13:48,961 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2025-04-16 04:13:48,962 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [37] imperfect sequences [37, 37] total 71 [2025-04-16 04:13:48,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1218530799] [2025-04-16 04:13:48,962 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-16 04:13:48,963 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2025-04-16 04:13:48,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-16 04:13:48,965 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2025-04-16 04:13:48,967 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1257, Invalid=3712, Unknown=1, NotChecked=0, Total=4970 [2025-04-16 04:13:48,967 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:13:48,968 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-16 04:13:48,969 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 65.16216216216216) internal successors, (2411), 37 states have internal predecessors, (2411), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-16 04:13:48,969 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-16 04:13:48,969 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2025-04-16 04:13:48,969 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-16 04:13:48,969 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:13:48,969 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-16 04:13:48,969 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:13:48,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:13:48,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-16 04:13:48,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 509 states. [2025-04-16 04:13:48,970 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states.