./Ultimate.py --spec /storage/repos/svcomp/c/properties/unreach-call.prp --file /storage/repos/svcomp/c/pthread-wmm/safe006_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 2e94e6aa Calling Ultimate with: java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/svcomp/c/pthread-wmm/safe006_power.opt_false-unreach-call.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b2136a9c10453b968eccf837dc70324a87bc3dbd ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-2e94e6a [2018-12-31 23:32:45,395 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-31 23:32:45,397 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-31 23:32:45,409 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-31 23:32:45,409 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-31 23:32:45,411 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-31 23:32:45,412 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-31 23:32:45,414 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-31 23:32:45,416 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-31 23:32:45,416 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-31 23:32:45,417 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-31 23:32:45,418 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-31 23:32:45,419 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-31 23:32:45,420 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-31 23:32:45,421 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-31 23:32:45,422 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-31 23:32:45,423 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-31 23:32:45,425 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-31 23:32:45,427 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-31 23:32:45,429 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-31 23:32:45,430 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-31 23:32:45,431 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-31 23:32:45,434 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-31 23:32:45,434 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-31 23:32:45,434 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-31 23:32:45,436 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-31 23:32:45,438 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-31 23:32:45,439 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-31 23:32:45,443 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-31 23:32:45,444 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-31 23:32:45,444 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-31 23:32:45,445 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-31 23:32:45,445 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-31 23:32:45,445 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-31 23:32:45,447 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-31 23:32:45,449 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-31 23:32:45,450 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-12-31 23:32:45,470 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-31 23:32:45,470 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-31 23:32:45,471 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-31 23:32:45,471 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-31 23:32:45,472 INFO L133 SettingsManager]: * Use SBE=true [2018-12-31 23:32:45,472 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-31 23:32:45,473 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-31 23:32:45,473 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-31 23:32:45,473 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-31 23:32:45,473 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-31 23:32:45,473 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-31 23:32:45,473 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-31 23:32:45,474 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-31 23:32:45,474 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-31 23:32:45,474 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-31 23:32:45,474 INFO L133 SettingsManager]: * Use constant arrays=true [2018-12-31 23:32:45,474 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-31 23:32:45,476 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-31 23:32:45,476 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-31 23:32:45,476 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-12-31 23:32:45,476 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-31 23:32:45,477 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-31 23:32:45,477 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-31 23:32:45,477 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-31 23:32:45,478 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-31 23:32:45,478 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-12-31 23:32:45,478 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-31 23:32:45,478 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-31 23:32:45,478 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b2136a9c10453b968eccf837dc70324a87bc3dbd [2018-12-31 23:32:45,517 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-31 23:32:45,533 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-31 23:32:45,540 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-31 23:32:45,542 INFO L271 PluginConnector]: Initializing CDTParser... [2018-12-31 23:32:45,542 INFO L276 PluginConnector]: CDTParser initialized [2018-12-31 23:32:45,543 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/svcomp/c/pthread-wmm/safe006_power.opt_false-unreach-call.i [2018-12-31 23:32:45,606 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7763c29e0/9b9f0b98655b4f3bbb6504bf0c06e872/FLAGfdec70cfe [2018-12-31 23:32:46,140 INFO L307 CDTParser]: Found 1 translation units. [2018-12-31 23:32:46,141 INFO L161 CDTParser]: Scanning /storage/repos/svcomp/c/pthread-wmm/safe006_power.opt_false-unreach-call.i [2018-12-31 23:32:46,157 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7763c29e0/9b9f0b98655b4f3bbb6504bf0c06e872/FLAGfdec70cfe [2018-12-31 23:32:46,421 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7763c29e0/9b9f0b98655b4f3bbb6504bf0c06e872 [2018-12-31 23:32:46,425 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-31 23:32:46,426 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-12-31 23:32:46,427 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-12-31 23:32:46,427 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-12-31 23:32:46,432 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-12-31 23:32:46,432 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.12 11:32:46" (1/1) ... [2018-12-31 23:32:46,436 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f2f7740 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:46, skipping insertion in model container [2018-12-31 23:32:46,436 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.12 11:32:46" (1/1) ... [2018-12-31 23:32:46,444 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-12-31 23:32:46,508 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-12-31 23:32:47,005 INFO L204 PostProcessor]: Analyzing one entry point: main [2018-12-31 23:32:47,034 INFO L191 MainTranslator]: Completed pre-run [2018-12-31 23:32:47,205 INFO L204 PostProcessor]: Analyzing one entry point: main [2018-12-31 23:32:47,284 INFO L195 MainTranslator]: Completed translation [2018-12-31 23:32:47,285 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47 WrapperNode [2018-12-31 23:32:47,285 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-12-31 23:32:47,286 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-31 23:32:47,287 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-31 23:32:47,287 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-31 23:32:47,297 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,329 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,372 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-31 23:32:47,373 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-31 23:32:47,373 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-31 23:32:47,373 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-31 23:32:47,384 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,384 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,390 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,390 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,406 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,413 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,417 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... [2018-12-31 23:32:47,422 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-31 23:32:47,422 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-31 23:32:47,423 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-31 23:32:47,423 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-31 23:32:47,424 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-31 23:32:47,502 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-12-31 23:32:47,502 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-12-31 23:32:47,502 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-12-31 23:32:47,503 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2018-12-31 23:32:47,503 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-12-31 23:32:47,503 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-12-31 23:32:47,503 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-12-31 23:32:47,504 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-12-31 23:32:47,504 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-12-31 23:32:47,504 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-12-31 23:32:47,504 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-12-31 23:32:47,504 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-12-31 23:32:47,505 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-12-31 23:32:47,506 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-12-31 23:32:48,856 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-12-31 23:32:48,857 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-12-31 23:32:48,858 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.12 11:32:48 BoogieIcfgContainer [2018-12-31 23:32:48,858 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-31 23:32:48,859 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-31 23:32:48,860 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-31 23:32:48,863 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-31 23:32:48,863 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 31.12 11:32:46" (1/3) ... [2018-12-31 23:32:48,864 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@624bac38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 31.12 11:32:48, skipping insertion in model container [2018-12-31 23:32:48,864 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.12 11:32:47" (2/3) ... [2018-12-31 23:32:48,865 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@624bac38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 31.12 11:32:48, skipping insertion in model container [2018-12-31 23:32:48,865 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.12 11:32:48" (3/3) ... [2018-12-31 23:32:48,867 INFO L112 eAbstractionObserver]: Analyzing ICFG safe006_power.opt_false-unreach-call.i [2018-12-31 23:32:48,917 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,917 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,918 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,918 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,918 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,918 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,919 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,919 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,919 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,920 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,920 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,920 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,920 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,920 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,921 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,921 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,921 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,921 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,922 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,922 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,922 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,922 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,922 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,922 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,923 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,923 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,923 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,923 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,924 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,924 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,924 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,924 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,924 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,925 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,925 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,925 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,925 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,925 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,925 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,926 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,927 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,928 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,928 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,928 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,928 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,928 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,928 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,929 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,929 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,929 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,929 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,929 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,929 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,930 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,930 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,930 WARN L317 ript$VariableManager]: TermVariabe Thread0_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,930 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet14.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,930 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,931 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,931 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,931 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,931 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,931 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,931 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,932 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,932 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,932 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,932 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,932 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,932 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,933 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,933 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,933 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,933 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,934 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,934 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,934 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,934 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,934 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,935 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,935 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,935 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,935 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,935 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,936 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,936 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,936 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,936 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,937 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,937 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,937 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,937 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,937 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,938 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,938 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,938 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,938 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,939 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,939 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,939 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,939 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,939 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,939 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,940 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,940 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,940 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,940 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,945 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,945 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,945 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,945 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,945 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,946 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,946 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,946 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,946 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,946 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,947 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,947 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,947 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,947 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,948 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,948 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,948 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,948 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,948 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,949 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,952 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,952 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,952 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,952 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,953 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,955 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,955 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,955 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,956 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,956 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,956 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,956 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,956 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,956 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,957 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,957 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,957 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,957 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,957 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,961 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,962 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,963 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,964 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,964 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,964 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,964 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,964 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,965 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,965 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,965 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,965 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,965 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,965 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,971 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,971 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,971 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,971 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,972 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,972 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,972 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,972 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,973 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,973 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,973 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,973 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,973 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,974 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,974 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,974 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,974 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,974 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,974 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,978 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,978 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,978 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,978 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,979 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,979 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,979 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,979 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,979 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,980 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,980 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,980 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,980 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,980 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,984 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,984 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,984 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,984 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,984 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,985 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,988 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,989 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~mem60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,990 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,994 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,995 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,998 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:48,999 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:49,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:49,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:49,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:49,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:49,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:49,000 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:49,004 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P1_#t~nondet67.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-12-31 23:32:49,034 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-12-31 23:32:49,034 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-31 23:32:49,048 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-12-31 23:32:49,068 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-12-31 23:32:49,094 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-12-31 23:32:49,094 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-31 23:32:49,095 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-31 23:32:49,095 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-31 23:32:49,095 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-31 23:32:49,095 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-31 23:32:49,095 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-31 23:32:49,095 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-31 23:32:49,095 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-31 23:32:49,113 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 200places, 259 transitions [2018-12-31 23:32:53,959 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 65314 states. [2018-12-31 23:32:53,962 INFO L276 IsEmpty]: Start isEmpty. Operand 65314 states. [2018-12-31 23:32:53,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-12-31 23:32:53,971 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:32:53,972 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:32:53,975 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:32:53,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:32:53,981 INFO L82 PathProgramCache]: Analyzing trace with hash -1016272846, now seen corresponding path program 1 times [2018-12-31 23:32:53,984 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:32:53,985 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:32:54,059 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:32:54,060 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:32:54,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:32:54,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:32:54,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:32:54,372 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:32:54,373 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-31 23:32:54,378 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-31 23:32:54,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-31 23:32:54,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:32:54,399 INFO L87 Difference]: Start difference. First operand 65314 states. Second operand 4 states. [2018-12-31 23:32:57,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:32:57,262 INFO L93 Difference]: Finished difference Result 113402 states and 445073 transitions. [2018-12-31 23:32:57,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-31 23:32:57,265 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 49 [2018-12-31 23:32:57,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:32:57,940 INFO L225 Difference]: With dead ends: 113402 [2018-12-31 23:32:57,940 INFO L226 Difference]: Without dead ends: 86242 [2018-12-31 23:32:57,942 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:32:58,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86242 states. [2018-12-31 23:33:01,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86242 to 53058. [2018-12-31 23:33:01,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53058 states. [2018-12-31 23:33:01,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53058 states to 53058 states and 208767 transitions. [2018-12-31 23:33:01,410 INFO L78 Accepts]: Start accepts. Automaton has 53058 states and 208767 transitions. Word has length 49 [2018-12-31 23:33:01,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:01,410 INFO L480 AbstractCegarLoop]: Abstraction has 53058 states and 208767 transitions. [2018-12-31 23:33:01,411 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-31 23:33:01,412 INFO L276 IsEmpty]: Start isEmpty. Operand 53058 states and 208767 transitions. [2018-12-31 23:33:01,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-12-31 23:33:01,425 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:01,425 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:01,425 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:01,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:01,427 INFO L82 PathProgramCache]: Analyzing trace with hash -267205330, now seen corresponding path program 1 times [2018-12-31 23:33:01,427 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:01,427 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:01,434 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:01,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:01,435 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:01,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:01,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:01,687 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:01,687 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-31 23:33:01,690 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-31 23:33:01,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-31 23:33:01,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:01,693 INFO L87 Difference]: Start difference. First operand 53058 states and 208767 transitions. Second operand 4 states. [2018-12-31 23:33:02,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:02,231 INFO L93 Difference]: Finished difference Result 14752 states and 50122 transitions. [2018-12-31 23:33:02,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-31 23:33:02,232 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 61 [2018-12-31 23:33:02,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:02,336 INFO L225 Difference]: With dead ends: 14752 [2018-12-31 23:33:02,336 INFO L226 Difference]: Without dead ends: 13006 [2018-12-31 23:33:02,338 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:02,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13006 states. [2018-12-31 23:33:02,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13006 to 13006. [2018-12-31 23:33:02,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13006 states. [2018-12-31 23:33:02,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13006 states to 13006 states and 43968 transitions. [2018-12-31 23:33:02,662 INFO L78 Accepts]: Start accepts. Automaton has 13006 states and 43968 transitions. Word has length 61 [2018-12-31 23:33:02,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:02,663 INFO L480 AbstractCegarLoop]: Abstraction has 13006 states and 43968 transitions. [2018-12-31 23:33:02,664 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-31 23:33:02,664 INFO L276 IsEmpty]: Start isEmpty. Operand 13006 states and 43968 transitions. [2018-12-31 23:33:02,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-12-31 23:33:02,673 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:02,673 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:02,673 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:02,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:02,673 INFO L82 PathProgramCache]: Analyzing trace with hash 1874201971, now seen corresponding path program 1 times [2018-12-31 23:33:02,674 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:02,674 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:02,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:02,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:02,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:02,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:03,150 WARN L181 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 13 DAG size of output: 12 [2018-12-31 23:33:03,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:03,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:03,358 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-31 23:33:03,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-31 23:33:03,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-31 23:33:03,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-12-31 23:33:03,363 INFO L87 Difference]: Start difference. First operand 13006 states and 43968 transitions. Second operand 8 states. [2018-12-31 23:33:03,720 WARN L181 SmtUtils]: Spent 249.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 9 [2018-12-31 23:33:06,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:06,087 INFO L93 Difference]: Finished difference Result 27074 states and 89599 transitions. [2018-12-31 23:33:06,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-31 23:33:06,088 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 62 [2018-12-31 23:33:06,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:06,235 INFO L225 Difference]: With dead ends: 27074 [2018-12-31 23:33:06,235 INFO L226 Difference]: Without dead ends: 26935 [2018-12-31 23:33:06,236 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=85, Invalid=187, Unknown=0, NotChecked=0, Total=272 [2018-12-31 23:33:06,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26935 states. [2018-12-31 23:33:06,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26935 to 21301. [2018-12-31 23:33:06,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21301 states. [2018-12-31 23:33:06,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21301 states to 21301 states and 71056 transitions. [2018-12-31 23:33:06,849 INFO L78 Accepts]: Start accepts. Automaton has 21301 states and 71056 transitions. Word has length 62 [2018-12-31 23:33:06,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:06,851 INFO L480 AbstractCegarLoop]: Abstraction has 21301 states and 71056 transitions. [2018-12-31 23:33:06,851 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-31 23:33:06,851 INFO L276 IsEmpty]: Start isEmpty. Operand 21301 states and 71056 transitions. [2018-12-31 23:33:06,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-12-31 23:33:06,856 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:06,856 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:06,856 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:06,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:06,856 INFO L82 PathProgramCache]: Analyzing trace with hash -1781281892, now seen corresponding path program 1 times [2018-12-31 23:33:06,857 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:06,857 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:06,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:06,861 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:06,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:06,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:06,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:06,960 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:06,960 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-31 23:33:06,960 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-31 23:33:06,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-31 23:33:06,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-31 23:33:06,962 INFO L87 Difference]: Start difference. First operand 21301 states and 71056 transitions. Second operand 3 states. [2018-12-31 23:33:07,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:07,252 INFO L93 Difference]: Finished difference Result 28240 states and 92743 transitions. [2018-12-31 23:33:07,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-31 23:33:07,253 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2018-12-31 23:33:07,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:07,319 INFO L225 Difference]: With dead ends: 28240 [2018-12-31 23:33:07,319 INFO L226 Difference]: Without dead ends: 28240 [2018-12-31 23:33:07,319 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-31 23:33:07,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28240 states. [2018-12-31 23:33:07,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28240 to 23214. [2018-12-31 23:33:07,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23214 states. [2018-12-31 23:33:07,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23214 states to 23214 states and 76471 transitions. [2018-12-31 23:33:07,916 INFO L78 Accepts]: Start accepts. Automaton has 23214 states and 76471 transitions. Word has length 64 [2018-12-31 23:33:07,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:07,917 INFO L480 AbstractCegarLoop]: Abstraction has 23214 states and 76471 transitions. [2018-12-31 23:33:07,917 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-31 23:33:07,917 INFO L276 IsEmpty]: Start isEmpty. Operand 23214 states and 76471 transitions. [2018-12-31 23:33:07,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-12-31 23:33:07,924 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:07,924 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:07,924 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:07,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:07,925 INFO L82 PathProgramCache]: Analyzing trace with hash -571649263, now seen corresponding path program 1 times [2018-12-31 23:33:07,925 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:07,925 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:07,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:07,930 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:07,930 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:07,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:08,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:08,224 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:08,224 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-31 23:33:08,224 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-31 23:33:08,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-31 23:33:08,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-12-31 23:33:08,225 INFO L87 Difference]: Start difference. First operand 23214 states and 76471 transitions. Second operand 10 states. [2018-12-31 23:33:10,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:10,889 INFO L93 Difference]: Finished difference Result 34544 states and 110364 transitions. [2018-12-31 23:33:10,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-12-31 23:33:10,890 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 68 [2018-12-31 23:33:10,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:10,966 INFO L225 Difference]: With dead ends: 34544 [2018-12-31 23:33:10,967 INFO L226 Difference]: Without dead ends: 34396 [2018-12-31 23:33:10,967 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=214, Invalid=598, Unknown=0, NotChecked=0, Total=812 [2018-12-31 23:33:11,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34396 states. [2018-12-31 23:33:12,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34396 to 24728. [2018-12-31 23:33:12,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24728 states. [2018-12-31 23:33:12,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24728 states to 24728 states and 80908 transitions. [2018-12-31 23:33:12,166 INFO L78 Accepts]: Start accepts. Automaton has 24728 states and 80908 transitions. Word has length 68 [2018-12-31 23:33:12,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:12,166 INFO L480 AbstractCegarLoop]: Abstraction has 24728 states and 80908 transitions. [2018-12-31 23:33:12,166 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-31 23:33:12,166 INFO L276 IsEmpty]: Start isEmpty. Operand 24728 states and 80908 transitions. [2018-12-31 23:33:12,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-31 23:33:12,182 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:12,182 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:12,182 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:12,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:12,183 INFO L82 PathProgramCache]: Analyzing trace with hash 1407972401, now seen corresponding path program 1 times [2018-12-31 23:33:12,183 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:12,183 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:12,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:12,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:12,186 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:12,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:12,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:12,339 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:12,339 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-31 23:33:12,340 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-31 23:33:12,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-31 23:33:12,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:12,340 INFO L87 Difference]: Start difference. First operand 24728 states and 80908 transitions. Second operand 4 states. [2018-12-31 23:33:12,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:12,590 INFO L93 Difference]: Finished difference Result 26400 states and 86218 transitions. [2018-12-31 23:33:12,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-31 23:33:12,591 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2018-12-31 23:33:12,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:12,646 INFO L225 Difference]: With dead ends: 26400 [2018-12-31 23:33:12,646 INFO L226 Difference]: Without dead ends: 26400 [2018-12-31 23:33:12,646 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:12,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26400 states. [2018-12-31 23:33:13,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26400 to 25872. [2018-12-31 23:33:13,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25872 states. [2018-12-31 23:33:13,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25872 states to 25872 states and 84494 transitions. [2018-12-31 23:33:13,151 INFO L78 Accepts]: Start accepts. Automaton has 25872 states and 84494 transitions. Word has length 76 [2018-12-31 23:33:13,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:13,151 INFO L480 AbstractCegarLoop]: Abstraction has 25872 states and 84494 transitions. [2018-12-31 23:33:13,151 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-31 23:33:13,152 INFO L276 IsEmpty]: Start isEmpty. Operand 25872 states and 84494 transitions. [2018-12-31 23:33:13,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-12-31 23:33:13,164 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:13,165 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:13,165 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:13,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:13,165 INFO L82 PathProgramCache]: Analyzing trace with hash -1144184560, now seen corresponding path program 1 times [2018-12-31 23:33:13,165 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:13,166 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:13,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:13,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:13,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:13,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:13,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:13,764 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:13,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-31 23:33:13,765 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-31 23:33:13,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-31 23:33:13,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:13,765 INFO L87 Difference]: Start difference. First operand 25872 states and 84494 transitions. Second operand 7 states. [2018-12-31 23:33:14,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:14,747 INFO L93 Difference]: Finished difference Result 45620 states and 147523 transitions. [2018-12-31 23:33:14,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-31 23:33:14,748 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 76 [2018-12-31 23:33:14,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:14,853 INFO L225 Difference]: With dead ends: 45620 [2018-12-31 23:33:14,854 INFO L226 Difference]: Without dead ends: 45549 [2018-12-31 23:33:14,854 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-12-31 23:33:14,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45549 states. [2018-12-31 23:33:15,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45549 to 29024. [2018-12-31 23:33:15,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29024 states. [2018-12-31 23:33:15,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29024 states to 29024 states and 93915 transitions. [2018-12-31 23:33:15,504 INFO L78 Accepts]: Start accepts. Automaton has 29024 states and 93915 transitions. Word has length 76 [2018-12-31 23:33:15,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:15,505 INFO L480 AbstractCegarLoop]: Abstraction has 29024 states and 93915 transitions. [2018-12-31 23:33:15,505 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-31 23:33:15,505 INFO L276 IsEmpty]: Start isEmpty. Operand 29024 states and 93915 transitions. [2018-12-31 23:33:15,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-31 23:33:15,524 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:15,525 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:15,525 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:15,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:15,525 INFO L82 PathProgramCache]: Analyzing trace with hash -457594562, now seen corresponding path program 1 times [2018-12-31 23:33:15,525 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:15,525 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:15,527 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:15,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:15,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:15,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:15,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:15,605 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:15,605 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-31 23:33:15,605 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-31 23:33:15,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-31 23:33:15,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-31 23:33:15,606 INFO L87 Difference]: Start difference. First operand 29024 states and 93915 transitions. Second operand 3 states. [2018-12-31 23:33:16,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:16,298 INFO L93 Difference]: Finished difference Result 30111 states and 96713 transitions. [2018-12-31 23:33:16,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-31 23:33:16,299 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 82 [2018-12-31 23:33:16,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:16,359 INFO L225 Difference]: With dead ends: 30111 [2018-12-31 23:33:16,360 INFO L226 Difference]: Without dead ends: 30111 [2018-12-31 23:33:16,360 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-31 23:33:16,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30111 states. [2018-12-31 23:33:16,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30111 to 29774. [2018-12-31 23:33:16,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29774 states. [2018-12-31 23:33:16,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29774 states to 29774 states and 95801 transitions. [2018-12-31 23:33:16,809 INFO L78 Accepts]: Start accepts. Automaton has 29774 states and 95801 transitions. Word has length 82 [2018-12-31 23:33:16,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:16,809 INFO L480 AbstractCegarLoop]: Abstraction has 29774 states and 95801 transitions. [2018-12-31 23:33:16,809 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-31 23:33:16,810 INFO L276 IsEmpty]: Start isEmpty. Operand 29774 states and 95801 transitions. [2018-12-31 23:33:16,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-12-31 23:33:16,828 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:16,828 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:16,829 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:16,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:16,829 INFO L82 PathProgramCache]: Analyzing trace with hash -1806342675, now seen corresponding path program 1 times [2018-12-31 23:33:16,829 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:16,829 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:16,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:16,831 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:16,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:16,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:17,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:17,091 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:17,091 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-31 23:33:17,092 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-31 23:33:17,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-31 23:33:17,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:17,092 INFO L87 Difference]: Start difference. First operand 29774 states and 95801 transitions. Second operand 4 states. [2018-12-31 23:33:17,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:17,651 INFO L93 Difference]: Finished difference Result 37551 states and 118479 transitions. [2018-12-31 23:33:17,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-31 23:33:17,652 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2018-12-31 23:33:17,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:17,726 INFO L225 Difference]: With dead ends: 37551 [2018-12-31 23:33:17,726 INFO L226 Difference]: Without dead ends: 37551 [2018-12-31 23:33:17,726 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:17,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37551 states. [2018-12-31 23:33:18,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37551 to 33641. [2018-12-31 23:33:18,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33641 states. [2018-12-31 23:33:18,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33641 states to 33641 states and 107014 transitions. [2018-12-31 23:33:18,303 INFO L78 Accepts]: Start accepts. Automaton has 33641 states and 107014 transitions. Word has length 82 [2018-12-31 23:33:18,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:18,303 INFO L480 AbstractCegarLoop]: Abstraction has 33641 states and 107014 transitions. [2018-12-31 23:33:18,304 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-31 23:33:18,304 INFO L276 IsEmpty]: Start isEmpty. Operand 33641 states and 107014 transitions. [2018-12-31 23:33:18,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-31 23:33:18,329 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:18,329 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:18,329 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:18,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:18,330 INFO L82 PathProgramCache]: Analyzing trace with hash 1307367553, now seen corresponding path program 1 times [2018-12-31 23:33:18,330 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:18,330 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:18,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:18,332 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:18,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:18,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:18,466 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:18,466 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:18,466 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-31 23:33:18,467 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-31 23:33:18,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-31 23:33:18,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-31 23:33:18,467 INFO L87 Difference]: Start difference. First operand 33641 states and 107014 transitions. Second operand 6 states. [2018-12-31 23:33:20,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:20,209 INFO L93 Difference]: Finished difference Result 42830 states and 133272 transitions. [2018-12-31 23:33:20,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-31 23:33:20,210 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2018-12-31 23:33:20,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:20,293 INFO L225 Difference]: With dead ends: 42830 [2018-12-31 23:33:20,293 INFO L226 Difference]: Without dead ends: 42775 [2018-12-31 23:33:20,293 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:20,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42775 states. [2018-12-31 23:33:20,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42775 to 36754. [2018-12-31 23:33:20,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36754 states. [2018-12-31 23:33:20,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36754 states to 36754 states and 115721 transitions. [2018-12-31 23:33:20,924 INFO L78 Accepts]: Start accepts. Automaton has 36754 states and 115721 transitions. Word has length 84 [2018-12-31 23:33:20,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:20,924 INFO L480 AbstractCegarLoop]: Abstraction has 36754 states and 115721 transitions. [2018-12-31 23:33:20,924 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-31 23:33:20,924 INFO L276 IsEmpty]: Start isEmpty. Operand 36754 states and 115721 transitions. [2018-12-31 23:33:20,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-31 23:33:20,950 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:20,950 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:20,950 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:20,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:20,950 INFO L82 PathProgramCache]: Analyzing trace with hash -2025985726, now seen corresponding path program 1 times [2018-12-31 23:33:20,950 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:20,951 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:20,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:20,952 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:20,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:20,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:21,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:21,257 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:21,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-31 23:33:21,258 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-31 23:33:21,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-31 23:33:21,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-31 23:33:21,258 INFO L87 Difference]: Start difference. First operand 36754 states and 115721 transitions. Second operand 6 states. [2018-12-31 23:33:22,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:22,281 INFO L93 Difference]: Finished difference Result 40459 states and 123830 transitions. [2018-12-31 23:33:22,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-31 23:33:22,282 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 84 [2018-12-31 23:33:22,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:22,710 INFO L225 Difference]: With dead ends: 40459 [2018-12-31 23:33:22,711 INFO L226 Difference]: Without dead ends: 40459 [2018-12-31 23:33:22,711 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-12-31 23:33:22,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40459 states. [2018-12-31 23:33:23,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40459 to 37542. [2018-12-31 23:33:23,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37542 states. [2018-12-31 23:33:23,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37542 states to 37542 states and 116434 transitions. [2018-12-31 23:33:23,306 INFO L78 Accepts]: Start accepts. Automaton has 37542 states and 116434 transitions. Word has length 84 [2018-12-31 23:33:23,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:23,307 INFO L480 AbstractCegarLoop]: Abstraction has 37542 states and 116434 transitions. [2018-12-31 23:33:23,307 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-31 23:33:23,307 INFO L276 IsEmpty]: Start isEmpty. Operand 37542 states and 116434 transitions. [2018-12-31 23:33:23,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-31 23:33:23,330 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:23,330 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:23,331 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:23,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:23,331 INFO L82 PathProgramCache]: Analyzing trace with hash -781221245, now seen corresponding path program 1 times [2018-12-31 23:33:23,331 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:23,331 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:23,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:23,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:23,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:23,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:23,780 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:23,780 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:23,780 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-31 23:33:23,781 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-31 23:33:23,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-31 23:33:23,781 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:23,781 INFO L87 Difference]: Start difference. First operand 37542 states and 116434 transitions. Second operand 5 states. [2018-12-31 23:33:24,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:24,614 INFO L93 Difference]: Finished difference Result 45311 states and 138176 transitions. [2018-12-31 23:33:24,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-31 23:33:24,615 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-31 23:33:24,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:24,707 INFO L225 Difference]: With dead ends: 45311 [2018-12-31 23:33:24,708 INFO L226 Difference]: Without dead ends: 45311 [2018-12-31 23:33:24,708 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:24,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45311 states. [2018-12-31 23:33:25,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45311 to 41762. [2018-12-31 23:33:25,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41762 states. [2018-12-31 23:33:25,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41762 states to 41762 states and 127591 transitions. [2018-12-31 23:33:25,395 INFO L78 Accepts]: Start accepts. Automaton has 41762 states and 127591 transitions. Word has length 84 [2018-12-31 23:33:25,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:25,395 INFO L480 AbstractCegarLoop]: Abstraction has 41762 states and 127591 transitions. [2018-12-31 23:33:25,395 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-31 23:33:25,395 INFO L276 IsEmpty]: Start isEmpty. Operand 41762 states and 127591 transitions. [2018-12-31 23:33:25,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-31 23:33:25,416 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:25,417 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:25,417 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:25,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:25,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1778293598, now seen corresponding path program 1 times [2018-12-31 23:33:25,417 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:25,417 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:25,421 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:25,421 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:25,421 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:25,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:25,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:25,822 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:25,822 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-31 23:33:25,822 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-31 23:33:25,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-31 23:33:25,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:25,823 INFO L87 Difference]: Start difference. First operand 41762 states and 127591 transitions. Second operand 5 states. [2018-12-31 23:33:29,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:29,651 INFO L93 Difference]: Finished difference Result 60315 states and 182907 transitions. [2018-12-31 23:33:29,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-31 23:33:29,652 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-31 23:33:29,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:29,778 INFO L225 Difference]: With dead ends: 60315 [2018-12-31 23:33:29,778 INFO L226 Difference]: Without dead ends: 60315 [2018-12-31 23:33:29,779 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-31 23:33:29,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60315 states. [2018-12-31 23:33:30,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60315 to 51954. [2018-12-31 23:33:30,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51954 states. [2018-12-31 23:33:31,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51954 states to 51954 states and 157771 transitions. [2018-12-31 23:33:31,490 INFO L78 Accepts]: Start accepts. Automaton has 51954 states and 157771 transitions. Word has length 84 [2018-12-31 23:33:31,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:31,491 INFO L480 AbstractCegarLoop]: Abstraction has 51954 states and 157771 transitions. [2018-12-31 23:33:31,491 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-31 23:33:31,491 INFO L276 IsEmpty]: Start isEmpty. Operand 51954 states and 157771 transitions. [2018-12-31 23:33:31,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-31 23:33:31,522 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:31,522 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:31,522 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:31,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:31,523 INFO L82 PathProgramCache]: Analyzing trace with hash 719722339, now seen corresponding path program 1 times [2018-12-31 23:33:31,523 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:31,523 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:31,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:31,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:31,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:31,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:31,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:31,776 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:31,776 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-31 23:33:31,777 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-31 23:33:31,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-31 23:33:31,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:31,777 INFO L87 Difference]: Start difference. First operand 51954 states and 157771 transitions. Second operand 4 states. [2018-12-31 23:33:33,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:33,121 INFO L93 Difference]: Finished difference Result 68742 states and 208406 transitions. [2018-12-31 23:33:33,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-31 23:33:33,122 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 84 [2018-12-31 23:33:33,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:33,277 INFO L225 Difference]: With dead ends: 68742 [2018-12-31 23:33:33,278 INFO L226 Difference]: Without dead ends: 68314 [2018-12-31 23:33:33,278 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:33,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68314 states. [2018-12-31 23:33:34,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68314 to 64038. [2018-12-31 23:33:34,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64038 states. [2018-12-31 23:33:34,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64038 states to 64038 states and 194610 transitions. [2018-12-31 23:33:34,469 INFO L78 Accepts]: Start accepts. Automaton has 64038 states and 194610 transitions. Word has length 84 [2018-12-31 23:33:34,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:34,470 INFO L480 AbstractCegarLoop]: Abstraction has 64038 states and 194610 transitions. [2018-12-31 23:33:34,470 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-31 23:33:34,470 INFO L276 IsEmpty]: Start isEmpty. Operand 64038 states and 194610 transitions. [2018-12-31 23:33:34,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-12-31 23:33:34,504 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:34,504 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:34,505 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:34,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:34,505 INFO L82 PathProgramCache]: Analyzing trace with hash 426319332, now seen corresponding path program 1 times [2018-12-31 23:33:34,505 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:34,505 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:34,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:34,507 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:34,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:34,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:34,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:34,651 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:34,651 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-31 23:33:34,651 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-31 23:33:34,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-31 23:33:34,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:34,652 INFO L87 Difference]: Start difference. First operand 64038 states and 194610 transitions. Second operand 5 states. [2018-12-31 23:33:34,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:34,729 INFO L93 Difference]: Finished difference Result 14218 states and 33841 transitions. [2018-12-31 23:33:34,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-31 23:33:34,730 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 84 [2018-12-31 23:33:34,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:34,745 INFO L225 Difference]: With dead ends: 14218 [2018-12-31 23:33:34,745 INFO L226 Difference]: Without dead ends: 11498 [2018-12-31 23:33:34,746 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:34,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11498 states. [2018-12-31 23:33:34,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11498 to 10114. [2018-12-31 23:33:34,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10114 states. [2018-12-31 23:33:34,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10114 states to 10114 states and 23312 transitions. [2018-12-31 23:33:34,873 INFO L78 Accepts]: Start accepts. Automaton has 10114 states and 23312 transitions. Word has length 84 [2018-12-31 23:33:34,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:34,873 INFO L480 AbstractCegarLoop]: Abstraction has 10114 states and 23312 transitions. [2018-12-31 23:33:34,873 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-31 23:33:34,874 INFO L276 IsEmpty]: Start isEmpty. Operand 10114 states and 23312 transitions. [2018-12-31 23:33:34,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-31 23:33:34,883 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:34,884 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:34,884 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:34,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:34,884 INFO L82 PathProgramCache]: Analyzing trace with hash -371203702, now seen corresponding path program 1 times [2018-12-31 23:33:34,884 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:34,884 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:34,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:34,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:34,886 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:34,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:35,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:35,025 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:35,025 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-31 23:33:35,026 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-31 23:33:35,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-31 23:33:35,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:35,026 INFO L87 Difference]: Start difference. First operand 10114 states and 23312 transitions. Second operand 5 states. [2018-12-31 23:33:35,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:35,475 INFO L93 Difference]: Finished difference Result 11625 states and 26744 transitions. [2018-12-31 23:33:35,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-31 23:33:35,477 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2018-12-31 23:33:35,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:35,492 INFO L225 Difference]: With dead ends: 11625 [2018-12-31 23:33:35,492 INFO L226 Difference]: Without dead ends: 11625 [2018-12-31 23:33:35,492 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-12-31 23:33:35,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11625 states. [2018-12-31 23:33:35,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11625 to 10596. [2018-12-31 23:33:35,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10596 states. [2018-12-31 23:33:35,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10596 states to 10596 states and 24419 transitions. [2018-12-31 23:33:35,625 INFO L78 Accepts]: Start accepts. Automaton has 10596 states and 24419 transitions. Word has length 88 [2018-12-31 23:33:35,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:35,626 INFO L480 AbstractCegarLoop]: Abstraction has 10596 states and 24419 transitions. [2018-12-31 23:33:35,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-31 23:33:35,626 INFO L276 IsEmpty]: Start isEmpty. Operand 10596 states and 24419 transitions. [2018-12-31 23:33:35,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-31 23:33:35,636 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:35,637 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:35,637 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:35,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:35,637 INFO L82 PathProgramCache]: Analyzing trace with hash 1371606633, now seen corresponding path program 1 times [2018-12-31 23:33:35,638 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:35,638 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:35,640 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:35,640 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:35,640 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:35,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:35,828 WARN L181 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 9 [2018-12-31 23:33:35,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:35,875 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:35,875 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-31 23:33:35,876 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-31 23:33:35,876 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-31 23:33:35,876 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:35,876 INFO L87 Difference]: Start difference. First operand 10596 states and 24419 transitions. Second operand 5 states. [2018-12-31 23:33:35,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:35,960 INFO L93 Difference]: Finished difference Result 13288 states and 30401 transitions. [2018-12-31 23:33:35,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-31 23:33:35,961 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 88 [2018-12-31 23:33:35,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:35,977 INFO L225 Difference]: With dead ends: 13288 [2018-12-31 23:33:35,977 INFO L226 Difference]: Without dead ends: 13207 [2018-12-31 23:33:35,978 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:35,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13207 states. [2018-12-31 23:33:36,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13207 to 8791. [2018-12-31 23:33:36,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8791 states. [2018-12-31 23:33:36,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8791 states to 8791 states and 19961 transitions. [2018-12-31 23:33:36,100 INFO L78 Accepts]: Start accepts. Automaton has 8791 states and 19961 transitions. Word has length 88 [2018-12-31 23:33:36,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:36,100 INFO L480 AbstractCegarLoop]: Abstraction has 8791 states and 19961 transitions. [2018-12-31 23:33:36,101 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-31 23:33:36,101 INFO L276 IsEmpty]: Start isEmpty. Operand 8791 states and 19961 transitions. [2018-12-31 23:33:36,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-12-31 23:33:36,109 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:36,109 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:36,110 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:36,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:36,110 INFO L82 PathProgramCache]: Analyzing trace with hash -425344726, now seen corresponding path program 1 times [2018-12-31 23:33:36,110 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:36,110 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:36,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:36,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:36,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:36,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:36,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:36,347 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:36,347 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-31 23:33:36,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-31 23:33:36,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-31 23:33:36,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:36,348 INFO L87 Difference]: Start difference. First operand 8791 states and 19961 transitions. Second operand 7 states. [2018-12-31 23:33:37,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:37,040 INFO L93 Difference]: Finished difference Result 13227 states and 30329 transitions. [2018-12-31 23:33:37,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-12-31 23:33:37,042 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 88 [2018-12-31 23:33:37,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:37,059 INFO L225 Difference]: With dead ends: 13227 [2018-12-31 23:33:37,059 INFO L226 Difference]: Without dead ends: 13108 [2018-12-31 23:33:37,059 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 9 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=236, Unknown=0, NotChecked=0, Total=342 [2018-12-31 23:33:37,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13108 states. [2018-12-31 23:33:37,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13108 to 8754. [2018-12-31 23:33:37,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8754 states. [2018-12-31 23:33:37,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8754 states to 8754 states and 19814 transitions. [2018-12-31 23:33:37,181 INFO L78 Accepts]: Start accepts. Automaton has 8754 states and 19814 transitions. Word has length 88 [2018-12-31 23:33:37,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:37,182 INFO L480 AbstractCegarLoop]: Abstraction has 8754 states and 19814 transitions. [2018-12-31 23:33:37,182 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-31 23:33:37,182 INFO L276 IsEmpty]: Start isEmpty. Operand 8754 states and 19814 transitions. [2018-12-31 23:33:37,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-31 23:33:37,191 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:37,191 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:37,192 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:37,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:37,192 INFO L82 PathProgramCache]: Analyzing trace with hash -2047011829, now seen corresponding path program 1 times [2018-12-31 23:33:37,192 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:37,192 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:37,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:37,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:37,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:37,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:37,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:37,274 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:37,274 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-31 23:33:37,274 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-31 23:33:37,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-31 23:33:37,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:37,275 INFO L87 Difference]: Start difference. First operand 8754 states and 19814 transitions. Second operand 4 states. [2018-12-31 23:33:37,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:37,736 INFO L93 Difference]: Finished difference Result 12754 states and 28548 transitions. [2018-12-31 23:33:37,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-31 23:33:37,737 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2018-12-31 23:33:37,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:37,754 INFO L225 Difference]: With dead ends: 12754 [2018-12-31 23:33:37,754 INFO L226 Difference]: Without dead ends: 12754 [2018-12-31 23:33:37,754 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:37,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12754 states. [2018-12-31 23:33:37,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12754 to 10443. [2018-12-31 23:33:37,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10443 states. [2018-12-31 23:33:37,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10443 states to 10443 states and 23241 transitions. [2018-12-31 23:33:37,895 INFO L78 Accepts]: Start accepts. Automaton has 10443 states and 23241 transitions. Word has length 109 [2018-12-31 23:33:37,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:37,895 INFO L480 AbstractCegarLoop]: Abstraction has 10443 states and 23241 transitions. [2018-12-31 23:33:37,896 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-31 23:33:37,896 INFO L276 IsEmpty]: Start isEmpty. Operand 10443 states and 23241 transitions. [2018-12-31 23:33:37,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-31 23:33:37,908 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:37,908 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:37,908 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:37,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:37,909 INFO L82 PathProgramCache]: Analyzing trace with hash -1997462001, now seen corresponding path program 2 times [2018-12-31 23:33:37,909 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:37,909 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:37,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:37,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:37,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:37,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:38,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:38,070 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:38,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-31 23:33:38,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-31 23:33:38,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-31 23:33:38,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:38,071 INFO L87 Difference]: Start difference. First operand 10443 states and 23241 transitions. Second operand 4 states. [2018-12-31 23:33:38,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:38,433 INFO L93 Difference]: Finished difference Result 10520 states and 23305 transitions. [2018-12-31 23:33:38,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-31 23:33:38,434 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2018-12-31 23:33:38,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:38,447 INFO L225 Difference]: With dead ends: 10520 [2018-12-31 23:33:38,447 INFO L226 Difference]: Without dead ends: 10520 [2018-12-31 23:33:38,448 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:38,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10520 states. [2018-12-31 23:33:38,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10520 to 10013. [2018-12-31 23:33:38,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10013 states. [2018-12-31 23:33:38,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10013 states to 10013 states and 22206 transitions. [2018-12-31 23:33:38,575 INFO L78 Accepts]: Start accepts. Automaton has 10013 states and 22206 transitions. Word has length 109 [2018-12-31 23:33:38,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:38,576 INFO L480 AbstractCegarLoop]: Abstraction has 10013 states and 22206 transitions. [2018-12-31 23:33:38,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-31 23:33:38,576 INFO L276 IsEmpty]: Start isEmpty. Operand 10013 states and 22206 transitions. [2018-12-31 23:33:38,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-12-31 23:33:38,588 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:38,588 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:38,589 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:38,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:38,589 INFO L82 PathProgramCache]: Analyzing trace with hash -590450134, now seen corresponding path program 1 times [2018-12-31 23:33:38,589 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:38,589 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:38,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:38,594 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-31 23:33:38,594 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:38,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:38,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:38,805 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:38,805 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-12-31 23:33:38,806 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-31 23:33:38,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-31 23:33:38,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-31 23:33:38,807 INFO L87 Difference]: Start difference. First operand 10013 states and 22206 transitions. Second operand 4 states. [2018-12-31 23:33:38,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:38,964 INFO L93 Difference]: Finished difference Result 10519 states and 23181 transitions. [2018-12-31 23:33:38,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-31 23:33:38,965 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 109 [2018-12-31 23:33:38,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:38,977 INFO L225 Difference]: With dead ends: 10519 [2018-12-31 23:33:38,977 INFO L226 Difference]: Without dead ends: 10519 [2018-12-31 23:33:38,978 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:38,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10519 states. [2018-12-31 23:33:39,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10519 to 9946. [2018-12-31 23:33:39,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9946 states. [2018-12-31 23:33:39,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9946 states to 9946 states and 21984 transitions. [2018-12-31 23:33:39,101 INFO L78 Accepts]: Start accepts. Automaton has 9946 states and 21984 transitions. Word has length 109 [2018-12-31 23:33:39,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:39,102 INFO L480 AbstractCegarLoop]: Abstraction has 9946 states and 21984 transitions. [2018-12-31 23:33:39,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-31 23:33:39,102 INFO L276 IsEmpty]: Start isEmpty. Operand 9946 states and 21984 transitions. [2018-12-31 23:33:39,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-31 23:33:39,113 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:39,113 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:39,114 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:39,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:39,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1563716653, now seen corresponding path program 1 times [2018-12-31 23:33:39,114 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:39,114 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:39,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:39,117 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:39,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:39,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:39,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:39,401 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:39,401 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-31 23:33:39,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-31 23:33:39,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-31 23:33:39,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:39,402 INFO L87 Difference]: Start difference. First operand 9946 states and 21984 transitions. Second operand 5 states. [2018-12-31 23:33:39,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:39,721 INFO L93 Difference]: Finished difference Result 12974 states and 28550 transitions. [2018-12-31 23:33:39,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-12-31 23:33:39,722 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 111 [2018-12-31 23:33:39,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:39,739 INFO L225 Difference]: With dead ends: 12974 [2018-12-31 23:33:39,740 INFO L226 Difference]: Without dead ends: 12974 [2018-12-31 23:33:39,740 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-12-31 23:33:39,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12974 states. [2018-12-31 23:33:39,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12974 to 10352. [2018-12-31 23:33:39,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10352 states. [2018-12-31 23:33:39,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10352 states to 10352 states and 22841 transitions. [2018-12-31 23:33:39,908 INFO L78 Accepts]: Start accepts. Automaton has 10352 states and 22841 transitions. Word has length 111 [2018-12-31 23:33:39,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:39,909 INFO L480 AbstractCegarLoop]: Abstraction has 10352 states and 22841 transitions. [2018-12-31 23:33:39,909 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-31 23:33:39,909 INFO L276 IsEmpty]: Start isEmpty. Operand 10352 states and 22841 transitions. [2018-12-31 23:33:39,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-31 23:33:39,920 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:39,921 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:39,921 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:39,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:39,921 INFO L82 PathProgramCache]: Analyzing trace with hash -1552400526, now seen corresponding path program 1 times [2018-12-31 23:33:39,922 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:39,922 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:39,923 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:39,923 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:39,924 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:39,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:40,284 WARN L181 SmtUtils]: Spent 108.00 ms on a formula simplification that was a NOOP. DAG size: 15 [2018-12-31 23:33:40,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:40,307 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:40,307 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-12-31 23:33:40,308 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-31 23:33:40,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-31 23:33:40,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-12-31 23:33:40,310 INFO L87 Difference]: Start difference. First operand 10352 states and 22841 transitions. Second operand 5 states. [2018-12-31 23:33:41,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:41,100 INFO L93 Difference]: Finished difference Result 17041 states and 38055 transitions. [2018-12-31 23:33:41,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-31 23:33:41,101 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 111 [2018-12-31 23:33:41,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:41,123 INFO L225 Difference]: With dead ends: 17041 [2018-12-31 23:33:41,123 INFO L226 Difference]: Without dead ends: 17041 [2018-12-31 23:33:41,124 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:41,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17041 states. [2018-12-31 23:33:41,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17041 to 11201. [2018-12-31 23:33:41,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11201 states. [2018-12-31 23:33:41,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11201 states to 11201 states and 24621 transitions. [2018-12-31 23:33:41,652 INFO L78 Accepts]: Start accepts. Automaton has 11201 states and 24621 transitions. Word has length 111 [2018-12-31 23:33:41,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:41,652 INFO L480 AbstractCegarLoop]: Abstraction has 11201 states and 24621 transitions. [2018-12-31 23:33:41,653 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-31 23:33:41,653 INFO L276 IsEmpty]: Start isEmpty. Operand 11201 states and 24621 transitions. [2018-12-31 23:33:41,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-31 23:33:41,664 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:41,664 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:41,665 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:41,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:41,665 INFO L82 PathProgramCache]: Analyzing trace with hash 665357427, now seen corresponding path program 1 times [2018-12-31 23:33:41,665 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:41,665 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:41,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:41,668 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:41,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:41,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:41,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:41,855 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:41,856 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-31 23:33:41,856 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-31 23:33:41,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-31 23:33:41,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-31 23:33:41,857 INFO L87 Difference]: Start difference. First operand 11201 states and 24621 transitions. Second operand 8 states. [2018-12-31 23:33:42,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:42,699 INFO L93 Difference]: Finished difference Result 14428 states and 31675 transitions. [2018-12-31 23:33:42,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-31 23:33:42,700 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2018-12-31 23:33:42,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:42,718 INFO L225 Difference]: With dead ends: 14428 [2018-12-31 23:33:42,718 INFO L226 Difference]: Without dead ends: 14396 [2018-12-31 23:33:42,719 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=163, Unknown=0, NotChecked=0, Total=210 [2018-12-31 23:33:42,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14396 states. [2018-12-31 23:33:42,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14396 to 12605. [2018-12-31 23:33:42,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12605 states. [2018-12-31 23:33:42,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12605 states to 12605 states and 27658 transitions. [2018-12-31 23:33:42,882 INFO L78 Accepts]: Start accepts. Automaton has 12605 states and 27658 transitions. Word has length 111 [2018-12-31 23:33:42,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:42,882 INFO L480 AbstractCegarLoop]: Abstraction has 12605 states and 27658 transitions. [2018-12-31 23:33:42,883 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-31 23:33:42,883 INFO L276 IsEmpty]: Start isEmpty. Operand 12605 states and 27658 transitions. [2018-12-31 23:33:42,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-31 23:33:42,897 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:42,897 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:42,897 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:42,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:42,898 INFO L82 PathProgramCache]: Analyzing trace with hash 371954420, now seen corresponding path program 1 times [2018-12-31 23:33:42,898 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:42,898 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:42,899 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:42,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:42,900 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:42,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:43,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:43,327 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:43,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-12-31 23:33:43,328 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-12-31 23:33:43,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-12-31 23:33:43,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-12-31 23:33:43,328 INFO L87 Difference]: Start difference. First operand 12605 states and 27658 transitions. Second operand 8 states. [2018-12-31 23:33:43,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:43,993 INFO L93 Difference]: Finished difference Result 20154 states and 45274 transitions. [2018-12-31 23:33:43,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-12-31 23:33:43,994 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2018-12-31 23:33:43,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:44,020 INFO L225 Difference]: With dead ends: 20154 [2018-12-31 23:33:44,020 INFO L226 Difference]: Without dead ends: 20154 [2018-12-31 23:33:44,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-12-31 23:33:44,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20154 states. [2018-12-31 23:33:44,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20154 to 14019. [2018-12-31 23:33:44,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14019 states. [2018-12-31 23:33:44,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14019 states to 14019 states and 31052 transitions. [2018-12-31 23:33:44,232 INFO L78 Accepts]: Start accepts. Automaton has 14019 states and 31052 transitions. Word has length 111 [2018-12-31 23:33:44,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:44,233 INFO L480 AbstractCegarLoop]: Abstraction has 14019 states and 31052 transitions. [2018-12-31 23:33:44,233 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-12-31 23:33:44,233 INFO L276 IsEmpty]: Start isEmpty. Operand 14019 states and 31052 transitions. [2018-12-31 23:33:44,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-31 23:33:44,249 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:44,249 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:44,249 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:44,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:44,250 INFO L82 PathProgramCache]: Analyzing trace with hash -1435500043, now seen corresponding path program 1 times [2018-12-31 23:33:44,250 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:44,250 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:44,251 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:44,251 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:44,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:44,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:44,642 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:44,642 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:44,642 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-31 23:33:44,643 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-31 23:33:44,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-31 23:33:44,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:44,643 INFO L87 Difference]: Start difference. First operand 14019 states and 31052 transitions. Second operand 7 states. [2018-12-31 23:33:44,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:44,946 INFO L93 Difference]: Finished difference Result 17509 states and 39370 transitions. [2018-12-31 23:33:44,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-31 23:33:44,947 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 111 [2018-12-31 23:33:44,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:44,968 INFO L225 Difference]: With dead ends: 17509 [2018-12-31 23:33:44,969 INFO L226 Difference]: Without dead ends: 17509 [2018-12-31 23:33:44,969 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-12-31 23:33:44,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17509 states. [2018-12-31 23:33:45,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17509 to 13625. [2018-12-31 23:33:45,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13625 states. [2018-12-31 23:33:45,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13625 states to 13625 states and 29902 transitions. [2018-12-31 23:33:45,155 INFO L78 Accepts]: Start accepts. Automaton has 13625 states and 29902 transitions. Word has length 111 [2018-12-31 23:33:45,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:45,156 INFO L480 AbstractCegarLoop]: Abstraction has 13625 states and 29902 transitions. [2018-12-31 23:33:45,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-31 23:33:45,156 INFO L276 IsEmpty]: Start isEmpty. Operand 13625 states and 29902 transitions. [2018-12-31 23:33:45,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-12-31 23:33:45,172 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:45,172 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:45,172 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:45,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:45,173 INFO L82 PathProgramCache]: Analyzing trace with hash 583305333, now seen corresponding path program 1 times [2018-12-31 23:33:45,173 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:45,173 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:45,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:45,175 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:45,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:45,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:45,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:45,350 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:45,350 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-31 23:33:45,350 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-31 23:33:45,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-31 23:33:45,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-31 23:33:45,351 INFO L87 Difference]: Start difference. First operand 13625 states and 29902 transitions. Second operand 6 states. [2018-12-31 23:33:45,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:45,587 INFO L93 Difference]: Finished difference Result 13458 states and 29025 transitions. [2018-12-31 23:33:45,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-31 23:33:45,589 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 111 [2018-12-31 23:33:45,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:45,605 INFO L225 Difference]: With dead ends: 13458 [2018-12-31 23:33:45,606 INFO L226 Difference]: Without dead ends: 13458 [2018-12-31 23:33:45,606 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-12-31 23:33:45,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13458 states. [2018-12-31 23:33:45,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13458 to 9202. [2018-12-31 23:33:45,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9202 states. [2018-12-31 23:33:45,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9202 states to 9202 states and 19803 transitions. [2018-12-31 23:33:45,743 INFO L78 Accepts]: Start accepts. Automaton has 9202 states and 19803 transitions. Word has length 111 [2018-12-31 23:33:45,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:45,743 INFO L480 AbstractCegarLoop]: Abstraction has 9202 states and 19803 transitions. [2018-12-31 23:33:45,743 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-31 23:33:45,744 INFO L276 IsEmpty]: Start isEmpty. Operand 9202 states and 19803 transitions. [2018-12-31 23:33:45,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-31 23:33:45,753 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:45,753 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:45,754 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:45,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:45,754 INFO L82 PathProgramCache]: Analyzing trace with hash -1204799495, now seen corresponding path program 1 times [2018-12-31 23:33:45,754 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:45,754 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:45,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:45,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:45,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:45,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:46,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:46,470 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:46,470 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-12-31 23:33:46,470 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-12-31 23:33:46,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-12-31 23:33:46,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-12-31 23:33:46,471 INFO L87 Difference]: Start difference. First operand 9202 states and 19803 transitions. Second operand 10 states. [2018-12-31 23:33:47,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:47,330 INFO L93 Difference]: Finished difference Result 11506 states and 24816 transitions. [2018-12-31 23:33:47,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-12-31 23:33:47,331 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 113 [2018-12-31 23:33:47,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:47,345 INFO L225 Difference]: With dead ends: 11506 [2018-12-31 23:33:47,346 INFO L226 Difference]: Without dead ends: 11506 [2018-12-31 23:33:47,346 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=81, Invalid=299, Unknown=0, NotChecked=0, Total=380 [2018-12-31 23:33:47,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11506 states. [2018-12-31 23:33:47,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11506 to 10980. [2018-12-31 23:33:47,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10980 states. [2018-12-31 23:33:47,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10980 states to 10980 states and 23677 transitions. [2018-12-31 23:33:47,482 INFO L78 Accepts]: Start accepts. Automaton has 10980 states and 23677 transitions. Word has length 113 [2018-12-31 23:33:47,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:47,483 INFO L480 AbstractCegarLoop]: Abstraction has 10980 states and 23677 transitions. [2018-12-31 23:33:47,483 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-12-31 23:33:47,483 INFO L276 IsEmpty]: Start isEmpty. Operand 10980 states and 23677 transitions. [2018-12-31 23:33:47,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-12-31 23:33:47,497 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:47,498 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:47,498 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:47,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:47,498 INFO L82 PathProgramCache]: Analyzing trace with hash 1282713338, now seen corresponding path program 1 times [2018-12-31 23:33:47,498 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:47,499 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:47,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:47,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:47,500 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:47,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:47,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:47,588 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:47,588 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-31 23:33:47,589 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-31 23:33:47,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-31 23:33:47,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-31 23:33:47,589 INFO L87 Difference]: Start difference. First operand 10980 states and 23677 transitions. Second operand 3 states. [2018-12-31 23:33:47,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:47,654 INFO L93 Difference]: Finished difference Result 10980 states and 23661 transitions. [2018-12-31 23:33:47,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-31 23:33:47,656 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2018-12-31 23:33:47,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:47,676 INFO L225 Difference]: With dead ends: 10980 [2018-12-31 23:33:47,676 INFO L226 Difference]: Without dead ends: 10980 [2018-12-31 23:33:47,676 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-31 23:33:47,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10980 states. [2018-12-31 23:33:47,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10980 to 10980. [2018-12-31 23:33:47,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10980 states. [2018-12-31 23:33:47,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10980 states to 10980 states and 23661 transitions. [2018-12-31 23:33:47,858 INFO L78 Accepts]: Start accepts. Automaton has 10980 states and 23661 transitions. Word has length 113 [2018-12-31 23:33:47,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:47,860 INFO L480 AbstractCegarLoop]: Abstraction has 10980 states and 23661 transitions. [2018-12-31 23:33:47,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-31 23:33:47,860 INFO L276 IsEmpty]: Start isEmpty. Operand 10980 states and 23661 transitions. [2018-12-31 23:33:47,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-31 23:33:47,881 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:47,883 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:47,883 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:47,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:47,885 INFO L82 PathProgramCache]: Analyzing trace with hash 1031376510, now seen corresponding path program 1 times [2018-12-31 23:33:47,886 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:47,886 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:47,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:47,891 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:47,891 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:47,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:48,286 WARN L181 SmtUtils]: Spent 216.00 ms on a formula simplification that was a NOOP. DAG size: 21 [2018-12-31 23:33:48,486 WARN L181 SmtUtils]: Spent 125.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-12-31 23:33:49,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:49,132 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:49,132 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-12-31 23:33:49,133 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-12-31 23:33:49,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-12-31 23:33:49,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-12-31 23:33:49,133 INFO L87 Difference]: Start difference. First operand 10980 states and 23661 transitions. Second operand 9 states. [2018-12-31 23:33:49,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:49,961 INFO L93 Difference]: Finished difference Result 13849 states and 30111 transitions. [2018-12-31 23:33:49,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-31 23:33:49,963 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 115 [2018-12-31 23:33:49,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:49,967 INFO L225 Difference]: With dead ends: 13849 [2018-12-31 23:33:49,967 INFO L226 Difference]: Without dead ends: 2961 [2018-12-31 23:33:49,968 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-12-31 23:33:49,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2961 states. [2018-12-31 23:33:49,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2961 to 2961. [2018-12-31 23:33:49,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2961 states. [2018-12-31 23:33:49,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2961 states to 2961 states and 6636 transitions. [2018-12-31 23:33:49,998 INFO L78 Accepts]: Start accepts. Automaton has 2961 states and 6636 transitions. Word has length 115 [2018-12-31 23:33:49,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:49,998 INFO L480 AbstractCegarLoop]: Abstraction has 2961 states and 6636 transitions. [2018-12-31 23:33:49,998 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-12-31 23:33:49,998 INFO L276 IsEmpty]: Start isEmpty. Operand 2961 states and 6636 transitions. [2018-12-31 23:33:50,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-31 23:33:50,002 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:50,002 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:50,003 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:50,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:50,003 INFO L82 PathProgramCache]: Analyzing trace with hash -572739718, now seen corresponding path program 1 times [2018-12-31 23:33:50,003 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:50,003 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:50,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:50,005 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:50,006 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:50,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:50,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:50,158 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:50,158 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-31 23:33:50,158 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-31 23:33:50,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-31 23:33:50,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-12-31 23:33:50,159 INFO L87 Difference]: Start difference. First operand 2961 states and 6636 transitions. Second operand 6 states. [2018-12-31 23:33:50,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:50,447 INFO L93 Difference]: Finished difference Result 3109 states and 6916 transitions. [2018-12-31 23:33:50,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-12-31 23:33:50,449 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 115 [2018-12-31 23:33:50,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:50,453 INFO L225 Difference]: With dead ends: 3109 [2018-12-31 23:33:50,453 INFO L226 Difference]: Without dead ends: 3109 [2018-12-31 23:33:50,454 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:50,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3109 states. [2018-12-31 23:33:50,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3109 to 2420. [2018-12-31 23:33:50,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2420 states. [2018-12-31 23:33:50,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2420 states to 2420 states and 5375 transitions. [2018-12-31 23:33:50,483 INFO L78 Accepts]: Start accepts. Automaton has 2420 states and 5375 transitions. Word has length 115 [2018-12-31 23:33:50,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:50,484 INFO L480 AbstractCegarLoop]: Abstraction has 2420 states and 5375 transitions. [2018-12-31 23:33:50,484 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-31 23:33:50,484 INFO L276 IsEmpty]: Start isEmpty. Operand 2420 states and 5375 transitions. [2018-12-31 23:33:50,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-31 23:33:50,487 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:50,487 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:50,488 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:50,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:50,488 INFO L82 PathProgramCache]: Analyzing trace with hash 432349851, now seen corresponding path program 1 times [2018-12-31 23:33:50,488 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:50,488 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:50,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:50,490 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:50,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:50,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:50,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:50,626 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:50,626 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-12-31 23:33:50,626 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-12-31 23:33:50,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-12-31 23:33:50,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-12-31 23:33:50,627 INFO L87 Difference]: Start difference. First operand 2420 states and 5375 transitions. Second operand 6 states. [2018-12-31 23:33:50,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:50,797 INFO L93 Difference]: Finished difference Result 2738 states and 6005 transitions. [2018-12-31 23:33:50,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-12-31 23:33:50,798 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 115 [2018-12-31 23:33:50,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:50,803 INFO L225 Difference]: With dead ends: 2738 [2018-12-31 23:33:50,803 INFO L226 Difference]: Without dead ends: 2693 [2018-12-31 23:33:50,803 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:50,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2693 states. [2018-12-31 23:33:50,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2693 to 2318. [2018-12-31 23:33:50,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2318 states. [2018-12-31 23:33:50,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2318 states to 2318 states and 5142 transitions. [2018-12-31 23:33:50,831 INFO L78 Accepts]: Start accepts. Automaton has 2318 states and 5142 transitions. Word has length 115 [2018-12-31 23:33:50,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:50,831 INFO L480 AbstractCegarLoop]: Abstraction has 2318 states and 5142 transitions. [2018-12-31 23:33:50,831 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-12-31 23:33:50,831 INFO L276 IsEmpty]: Start isEmpty. Operand 2318 states and 5142 transitions. [2018-12-31 23:33:50,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-31 23:33:50,834 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:50,835 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:50,835 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:50,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:50,835 INFO L82 PathProgramCache]: Analyzing trace with hash -1372564389, now seen corresponding path program 1 times [2018-12-31 23:33:50,835 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:50,836 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:50,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:50,837 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:50,837 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:50,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:51,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:51,022 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:51,022 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-12-31 23:33:51,023 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-12-31 23:33:51,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-12-31 23:33:51,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-12-31 23:33:51,023 INFO L87 Difference]: Start difference. First operand 2318 states and 5142 transitions. Second operand 7 states. [2018-12-31 23:33:51,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:51,226 INFO L93 Difference]: Finished difference Result 2984 states and 6686 transitions. [2018-12-31 23:33:51,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-12-31 23:33:51,228 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 115 [2018-12-31 23:33:51,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:51,233 INFO L225 Difference]: With dead ends: 2984 [2018-12-31 23:33:51,233 INFO L226 Difference]: Without dead ends: 2984 [2018-12-31 23:33:51,234 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2018-12-31 23:33:51,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2984 states. [2018-12-31 23:33:51,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2984 to 2236. [2018-12-31 23:33:51,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2236 states. [2018-12-31 23:33:51,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2236 states to 2236 states and 4972 transitions. [2018-12-31 23:33:51,272 INFO L78 Accepts]: Start accepts. Automaton has 2236 states and 4972 transitions. Word has length 115 [2018-12-31 23:33:51,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:51,273 INFO L480 AbstractCegarLoop]: Abstraction has 2236 states and 4972 transitions. [2018-12-31 23:33:51,273 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-12-31 23:33:51,273 INFO L276 IsEmpty]: Start isEmpty. Operand 2236 states and 4972 transitions. [2018-12-31 23:33:51,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-31 23:33:51,279 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:51,279 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:51,279 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:51,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:51,280 INFO L82 PathProgramCache]: Analyzing trace with hash 1125451548, now seen corresponding path program 2 times [2018-12-31 23:33:51,280 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:51,280 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:51,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:51,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:51,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:51,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:51,851 WARN L181 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 15 [2018-12-31 23:33:52,203 WARN L181 SmtUtils]: Spent 150.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 21 [2018-12-31 23:33:52,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:52,317 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:52,317 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-12-31 23:33:52,317 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-12-31 23:33:52,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-12-31 23:33:52,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2018-12-31 23:33:52,318 INFO L87 Difference]: Start difference. First operand 2236 states and 4972 transitions. Second operand 17 states. [2018-12-31 23:33:53,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:53,047 INFO L93 Difference]: Finished difference Result 2392 states and 5310 transitions. [2018-12-31 23:33:53,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-12-31 23:33:53,049 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 115 [2018-12-31 23:33:53,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:53,053 INFO L225 Difference]: With dead ends: 2392 [2018-12-31 23:33:53,053 INFO L226 Difference]: Without dead ends: 2296 [2018-12-31 23:33:53,054 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2018-12-31 23:33:53,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2296 states. [2018-12-31 23:33:53,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2296 to 2236. [2018-12-31 23:33:53,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2236 states. [2018-12-31 23:33:53,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2236 states to 2236 states and 4956 transitions. [2018-12-31 23:33:53,078 INFO L78 Accepts]: Start accepts. Automaton has 2236 states and 4956 transitions. Word has length 115 [2018-12-31 23:33:53,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:53,078 INFO L480 AbstractCegarLoop]: Abstraction has 2236 states and 4956 transitions. [2018-12-31 23:33:53,078 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-12-31 23:33:53,078 INFO L276 IsEmpty]: Start isEmpty. Operand 2236 states and 4956 transitions. [2018-12-31 23:33:53,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-31 23:33:53,081 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:53,082 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:53,082 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:53,082 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:53,082 INFO L82 PathProgramCache]: Analyzing trace with hash -617358787, now seen corresponding path program 1 times [2018-12-31 23:33:53,082 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:53,083 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:53,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:53,084 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-12-31 23:33:53,084 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:53,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-31 23:33:53,693 WARN L181 SmtUtils]: Spent 296.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 16 [2018-12-31 23:33:54,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-31 23:33:54,289 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-31 23:33:54,289 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-12-31 23:33:54,289 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-12-31 23:33:54,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-12-31 23:33:54,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=539, Unknown=0, NotChecked=0, Total=600 [2018-12-31 23:33:54,290 INFO L87 Difference]: Start difference. First operand 2236 states and 4956 transitions. Second operand 25 states. [2018-12-31 23:33:55,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-31 23:33:55,964 INFO L93 Difference]: Finished difference Result 3362 states and 7489 transitions. [2018-12-31 23:33:55,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-12-31 23:33:55,966 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 115 [2018-12-31 23:33:55,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-31 23:33:55,970 INFO L225 Difference]: With dead ends: 3362 [2018-12-31 23:33:55,970 INFO L226 Difference]: Without dead ends: 2423 [2018-12-31 23:33:55,971 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 358 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=351, Invalid=1811, Unknown=0, NotChecked=0, Total=2162 [2018-12-31 23:33:55,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2423 states. [2018-12-31 23:33:55,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2423 to 2257. [2018-12-31 23:33:55,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2257 states. [2018-12-31 23:33:55,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2257 states to 2257 states and 4995 transitions. [2018-12-31 23:33:55,995 INFO L78 Accepts]: Start accepts. Automaton has 2257 states and 4995 transitions. Word has length 115 [2018-12-31 23:33:55,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-31 23:33:55,997 INFO L480 AbstractCegarLoop]: Abstraction has 2257 states and 4995 transitions. [2018-12-31 23:33:55,997 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-12-31 23:33:55,997 INFO L276 IsEmpty]: Start isEmpty. Operand 2257 states and 4995 transitions. [2018-12-31 23:33:56,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-12-31 23:33:56,002 INFO L394 BasicCegarLoop]: Found error trace [2018-12-31 23:33:56,002 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-12-31 23:33:56,003 INFO L423 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-12-31 23:33:56,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-31 23:33:56,003 INFO L82 PathProgramCache]: Analyzing trace with hash -313970737, now seen corresponding path program 2 times [2018-12-31 23:33:56,003 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-12-31 23:33:56,003 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-12-31 23:33:56,008 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:56,008 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-31 23:33:56,009 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-31 23:33:56,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-31 23:33:56,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-31 23:33:56,141 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-31 23:33:56,514 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-12-31 23:33:56,516 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 31.12 11:33:56 BasicIcfg [2018-12-31 23:33:56,516 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-31 23:33:56,517 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-12-31 23:33:56,517 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-12-31 23:33:56,517 INFO L276 PluginConnector]: Witness Printer initialized [2018-12-31 23:33:56,517 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.12 11:32:48" (3/4) ... [2018-12-31 23:33:56,521 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-12-31 23:33:56,865 INFO L145 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2018-12-31 23:33:56,866 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-12-31 23:33:56,872 INFO L168 Benchmark]: Toolchain (without parser) took 70441.44 ms. Allocated memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: 3.5 GB). Free memory was 946.0 MB in the beginning and 3.8 GB in the end (delta: -2.9 GB). Peak memory consumption was 633.2 MB. Max. memory is 11.5 GB. [2018-12-31 23:33:56,873 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-31 23:33:56,873 INFO L168 Benchmark]: CACSL2BoogieTranslator took 857.94 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.7 MB). Free memory was 946.0 MB in the beginning and 1.1 GB in the end (delta: -150.3 MB). Peak memory consumption was 31.7 MB. Max. memory is 11.5 GB. [2018-12-31 23:33:56,875 INFO L168 Benchmark]: Boogie Procedure Inliner took 85.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2018-12-31 23:33:56,876 INFO L168 Benchmark]: Boogie Preprocessor took 49.50 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-12-31 23:33:56,876 INFO L168 Benchmark]: RCFGBuilder took 1435.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 58.9 MB). Peak memory consumption was 58.9 MB. Max. memory is 11.5 GB. [2018-12-31 23:33:56,876 INFO L168 Benchmark]: TraceAbstraction took 67656.66 ms. Allocated memory was 1.2 GB in the beginning and 4.5 GB in the end (delta: 3.4 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2018-12-31 23:33:56,882 INFO L168 Benchmark]: Witness Printer took 349.32 ms. Allocated memory is still 4.5 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 70.2 MB). Peak memory consumption was 70.2 MB. Max. memory is 11.5 GB. [2018-12-31 23:33:56,884 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 857.94 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 122.7 MB). Free memory was 946.0 MB in the beginning and 1.1 GB in the end (delta: -150.3 MB). Peak memory consumption was 31.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 85.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 49.50 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 1435.84 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 58.9 MB). Peak memory consumption was 58.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 67656.66 ms. Allocated memory was 1.2 GB in the beginning and 4.5 GB in the end (delta: 3.4 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 349.32 ms. Allocated memory is still 4.5 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 70.2 MB). Peak memory consumption was 70.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L671] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L675] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L676] -1 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L677] -1 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L678] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L679] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L680] -1 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L681] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L682] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L683] -1 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L684] -1 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L685] -1 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L686] -1 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L687] -1 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L688] -1 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L689] -1 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L690] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L691] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L693] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}] [L694] -1 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0] [L695] -1 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0] [L696] -1 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L697] -1 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L698] -1 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L699] -1 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L700] -1 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L701] -1 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L702] -1 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L703] -1 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L704] -1 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L705] -1 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L706] -1 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L707] -1 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L709] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L710] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L711] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L712] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L788] -1 pthread_t t1925; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L789] FCALL, FORK -1 pthread_create(&t1925, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L790] -1 pthread_t t1926; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L791] FCALL, FORK -1 pthread_create(&t1926, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L744] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L745] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L746] 0 x$flush_delayed = weak$$choice2 [L747] EXPR 0 \read(x) [L747] 0 x$mem_tmp = x [L748] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L749] EXPR 0 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L749] EXPR 0 \read(x) [L749] EXPR 0 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) VAL [!x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L749] 0 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L750] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))))=0, x={2:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L750] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L751] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))=0, x={2:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L751] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L752] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))=0, x={2:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L752] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L753] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={2:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L753] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L754] EXPR 0 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={2:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L754] 0 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L755] EXPR 0 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={2:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L755] 0 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L756] 0 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L757] 0 __unbuffered_p1_EAX$read_delayed_var = &x [L758] EXPR 0 \read(x) [L758] 0 __unbuffered_p1_EAX = x [L759] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=1, x$flush_delayed ? x$mem_tmp : x=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L759] 0 x = x$flush_delayed ? x$mem_tmp : x [L760] 0 x$flush_delayed = (_Bool)0 [L763] 0 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L766] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L716] 1 __unbuffered_p0_EAX = y [L719] 1 x$w_buff1 = x$w_buff0 [L720] 1 x$w_buff0 = 1 [L721] 1 x$w_buff1_used = x$w_buff0_used [L722] 1 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L724] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L725] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L726] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L727] 1 x$r_buff0_thd1 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L766] EXPR 0 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L766] EXPR 0 \read(x) [L766] EXPR 0 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L766] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=0, y=1] [L766] 0 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L767] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L767] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L768] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L769] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L769] 0 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L770] EXPR 0 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L770] 0 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L773] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L733] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L734] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L734] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L737] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L793] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L797] EXPR -1 \read(x) [L797] EXPR -1 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L797] -1 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L798] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] -1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L799] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] -1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L800] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L800] -1 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L801] EXPR -1 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=0, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] -1 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L804] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L805] EXPR -1 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] EXPR -1 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L805] EXPR -1 \read(*__unbuffered_p1_EAX$read_delayed_var) [L805] EXPR -1 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] EXPR -1 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L805] -1 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L806] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={2:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice1=1, weak$$choice2=1, x={2:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 318 locations, 3 error locations. UNSAFE Result, 67.4s OverallTime, 36 OverallIterations, 1 TraceHistogramMax, 33.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12021 SDtfs, 16327 SDslu, 30215 SDs, 0 SdLazy, 11691 SolverSat, 896 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 19.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 432 GetRequests, 96 SyntacticMatches, 31 SemanticMatches, 305 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 864 ImplicationChecksByTransitivity, 12.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=65314occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 15.9s AutomataMinimizationTime, 35 MinimizatonAttempts, 141602 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 11.0s InterpolantComputationTime, 3412 NumberOfCodeBlocks, 3412 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 3262 ConstructedInterpolants, 0 QuantifiedInterpolants, 958370 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 35 InterpolantComputations, 35 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...