./Ultimate.py --spec /storage/repos/svcomp/c/properties/unreach-call.prp --file /storage/repos/svcomp/c/systemc/kundu1_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0ed9222f Calling Ultimate with: java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/svcomp/c/systemc/kundu1_false-unreach-call_false-termination.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 532163d21d7e473fbfa4a073427e9fd2a45c7337 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-0ed9222-m [2019-01-12 15:12:43,211 INFO L170 SettingsManager]: Resetting all preferences to default values... [2019-01-12 15:12:43,214 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2019-01-12 15:12:43,236 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-01-12 15:12:43,238 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-01-12 15:12:43,240 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-01-12 15:12:43,242 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-01-12 15:12:43,245 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2019-01-12 15:12:43,247 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-01-12 15:12:43,250 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-01-12 15:12:43,253 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-01-12 15:12:43,254 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-01-12 15:12:43,255 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-01-12 15:12:43,258 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-01-12 15:12:43,265 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-01-12 15:12:43,270 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-01-12 15:12:43,273 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-01-12 15:12:43,281 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-01-12 15:12:43,284 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2019-01-12 15:12:43,285 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-01-12 15:12:43,286 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-01-12 15:12:43,293 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-01-12 15:12:43,297 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-01-12 15:12:43,299 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-01-12 15:12:43,299 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-01-12 15:12:43,301 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-01-12 15:12:43,303 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-01-12 15:12:43,308 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-01-12 15:12:43,309 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2019-01-12 15:12:43,312 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-01-12 15:12:43,315 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2019-01-12 15:12:43,318 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-01-12 15:12:43,318 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-01-12 15:12:43,318 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2019-01-12 15:12:43,320 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2019-01-12 15:12:43,321 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2019-01-12 15:12:43,321 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-01-12 15:12:43,354 INFO L110 SettingsManager]: Loading preferences was successful [2019-01-12 15:12:43,355 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2019-01-12 15:12:43,360 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-01-12 15:12:43,360 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2019-01-12 15:12:43,361 INFO L133 SettingsManager]: * Use SBE=true [2019-01-12 15:12:43,361 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-01-12 15:12:43,361 INFO L133 SettingsManager]: * sizeof long=4 [2019-01-12 15:12:43,361 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2019-01-12 15:12:43,361 INFO L133 SettingsManager]: * sizeof POINTER=4 [2019-01-12 15:12:43,362 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2019-01-12 15:12:43,362 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-01-12 15:12:43,362 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-01-12 15:12:43,362 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-01-12 15:12:43,362 INFO L133 SettingsManager]: * sizeof long double=12 [2019-01-12 15:12:43,363 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2019-01-12 15:12:43,364 INFO L133 SettingsManager]: * Use constant arrays=true [2019-01-12 15:12:43,365 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-01-12 15:12:43,365 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-01-12 15:12:43,365 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-01-12 15:12:43,366 INFO L133 SettingsManager]: * To the following directory=./dump/ [2019-01-12 15:12:43,368 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2019-01-12 15:12:43,369 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-12 15:12:43,369 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-01-12 15:12:43,369 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-01-12 15:12:43,369 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-01-12 15:12:43,370 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2019-01-12 15:12:43,370 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-01-12 15:12:43,370 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-01-12 15:12:43,370 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 532163d21d7e473fbfa4a073427e9fd2a45c7337 [2019-01-12 15:12:43,449 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-01-12 15:12:43,471 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-01-12 15:12:43,480 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-01-12 15:12:43,483 INFO L271 PluginConnector]: Initializing CDTParser... [2019-01-12 15:12:43,484 INFO L276 PluginConnector]: CDTParser initialized [2019-01-12 15:12:43,486 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/svcomp/c/systemc/kundu1_false-unreach-call_false-termination.cil.c [2019-01-12 15:12:43,567 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c4c4b8da1/8474d69765624032b3a23210d5544b21/FLAGe77586828 [2019-01-12 15:12:44,065 INFO L307 CDTParser]: Found 1 translation units. [2019-01-12 15:12:44,066 INFO L161 CDTParser]: Scanning /storage/repos/svcomp/c/systemc/kundu1_false-unreach-call_false-termination.cil.c [2019-01-12 15:12:44,078 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c4c4b8da1/8474d69765624032b3a23210d5544b21/FLAGe77586828 [2019-01-12 15:12:44,398 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c4c4b8da1/8474d69765624032b3a23210d5544b21 [2019-01-12 15:12:44,403 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-01-12 15:12:44,405 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-01-12 15:12:44,406 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-01-12 15:12:44,406 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-01-12 15:12:44,412 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2019-01-12 15:12:44,413 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:44,417 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@31f70efb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44, skipping insertion in model container [2019-01-12 15:12:44,418 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:44,428 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-01-12 15:12:44,485 INFO L176 MainTranslator]: Built tables and reachable declarations [2019-01-12 15:12:44,806 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-12 15:12:44,815 INFO L191 MainTranslator]: Completed pre-run [2019-01-12 15:12:44,912 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-12 15:12:44,946 INFO L195 MainTranslator]: Completed translation [2019-01-12 15:12:44,947 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44 WrapperNode [2019-01-12 15:12:44,949 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-01-12 15:12:44,950 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-01-12 15:12:44,950 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-01-12 15:12:44,951 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2019-01-12 15:12:44,961 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:44,973 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:45,018 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-01-12 15:12:45,019 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-01-12 15:12:45,022 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-01-12 15:12:45,022 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2019-01-12 15:12:45,034 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:45,035 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:45,043 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:45,044 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:45,057 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:45,171 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:45,174 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... [2019-01-12 15:12:45,179 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-01-12 15:12:45,180 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-01-12 15:12:45,180 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-01-12 15:12:45,180 INFO L276 PluginConnector]: RCFGBuilder initialized [2019-01-12 15:12:45,182 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-12 15:12:45,275 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-01-12 15:12:45,275 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-01-12 15:12:46,377 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-01-12 15:12:46,378 INFO L286 CfgBuilder]: Removed 72 assue(true) statements. [2019-01-12 15:12:46,380 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:12:46 BoogieIcfgContainer [2019-01-12 15:12:46,380 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-01-12 15:12:46,381 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-01-12 15:12:46,381 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-01-12 15:12:46,384 INFO L276 PluginConnector]: TraceAbstraction initialized [2019-01-12 15:12:46,385 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.01 03:12:44" (1/3) ... [2019-01-12 15:12:46,386 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44d6bfb3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.01 03:12:46, skipping insertion in model container [2019-01-12 15:12:46,386 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:12:44" (2/3) ... [2019-01-12 15:12:46,386 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@44d6bfb3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.01 03:12:46, skipping insertion in model container [2019-01-12 15:12:46,387 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:12:46" (3/3) ... [2019-01-12 15:12:46,389 INFO L112 eAbstractionObserver]: Analyzing ICFG kundu1_false-unreach-call_false-termination.cil.c [2019-01-12 15:12:46,399 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-01-12 15:12:46,408 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2019-01-12 15:12:46,425 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2019-01-12 15:12:46,461 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2019-01-12 15:12:46,462 INFO L382 AbstractCegarLoop]: Interprodecural is true [2019-01-12 15:12:46,463 INFO L383 AbstractCegarLoop]: Hoare is true [2019-01-12 15:12:46,463 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-01-12 15:12:46,463 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-01-12 15:12:46,463 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-01-12 15:12:46,463 INFO L387 AbstractCegarLoop]: Difference is false [2019-01-12 15:12:46,464 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-01-12 15:12:46,464 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-01-12 15:12:46,489 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states. [2019-01-12 15:12:46,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-01-12 15:12:46,498 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:46,499 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:46,505 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:46,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:46,512 INFO L82 PathProgramCache]: Analyzing trace with hash 1913091172, now seen corresponding path program 1 times [2019-01-12 15:12:46,514 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:46,514 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:46,559 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:46,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:46,560 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:46,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:46,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:46,678 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:46,678 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:12:46,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:12:46,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:12:46,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:46,704 INFO L87 Difference]: Start difference. First operand 117 states. Second operand 3 states. [2019-01-12 15:12:46,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:46,772 INFO L93 Difference]: Finished difference Result 228 states and 346 transitions. [2019-01-12 15:12:46,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:12:46,777 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-01-12 15:12:46,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:46,797 INFO L225 Difference]: With dead ends: 228 [2019-01-12 15:12:46,799 INFO L226 Difference]: Without dead ends: 112 [2019-01-12 15:12:46,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:46,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2019-01-12 15:12:46,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2019-01-12 15:12:46,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2019-01-12 15:12:46,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 162 transitions. [2019-01-12 15:12:46,873 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 162 transitions. Word has length 33 [2019-01-12 15:12:46,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:46,873 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 162 transitions. [2019-01-12 15:12:46,874 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:12:46,874 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 162 transitions. [2019-01-12 15:12:46,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-01-12 15:12:46,877 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:46,877 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:46,878 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:46,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:46,879 INFO L82 PathProgramCache]: Analyzing trace with hash 526887778, now seen corresponding path program 1 times [2019-01-12 15:12:46,879 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:46,880 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:46,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:46,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:46,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:46,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:46,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:46,993 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:46,993 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:12:46,996 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:12:46,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:12:46,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:46,997 INFO L87 Difference]: Start difference. First operand 112 states and 162 transitions. Second operand 3 states. [2019-01-12 15:12:47,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:47,154 INFO L93 Difference]: Finished difference Result 305 states and 441 transitions. [2019-01-12 15:12:47,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:12:47,157 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-01-12 15:12:47,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:47,161 INFO L225 Difference]: With dead ends: 305 [2019-01-12 15:12:47,164 INFO L226 Difference]: Without dead ends: 200 [2019-01-12 15:12:47,166 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:47,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2019-01-12 15:12:47,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 190. [2019-01-12 15:12:47,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2019-01-12 15:12:47,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 275 transitions. [2019-01-12 15:12:47,208 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 275 transitions. Word has length 33 [2019-01-12 15:12:47,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:47,209 INFO L480 AbstractCegarLoop]: Abstraction has 190 states and 275 transitions. [2019-01-12 15:12:47,209 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:12:47,209 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 275 transitions. [2019-01-12 15:12:47,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-01-12 15:12:47,210 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:47,210 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:47,211 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:47,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:47,211 INFO L82 PathProgramCache]: Analyzing trace with hash -1145629853, now seen corresponding path program 1 times [2019-01-12 15:12:47,212 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:47,212 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:47,213 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:47,214 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:47,214 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:47,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:47,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:47,281 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:47,281 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:12:47,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:12:47,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:12:47,283 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:47,284 INFO L87 Difference]: Start difference. First operand 190 states and 275 transitions. Second operand 3 states. [2019-01-12 15:12:47,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:47,575 INFO L93 Difference]: Finished difference Result 527 states and 762 transitions. [2019-01-12 15:12:47,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:12:47,581 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-01-12 15:12:47,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:47,584 INFO L225 Difference]: With dead ends: 527 [2019-01-12 15:12:47,585 INFO L226 Difference]: Without dead ends: 350 [2019-01-12 15:12:47,587 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:47,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350 states. [2019-01-12 15:12:47,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350 to 328. [2019-01-12 15:12:47,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-01-12 15:12:47,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 462 transitions. [2019-01-12 15:12:47,634 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 462 transitions. Word has length 33 [2019-01-12 15:12:47,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:47,635 INFO L480 AbstractCegarLoop]: Abstraction has 328 states and 462 transitions. [2019-01-12 15:12:47,635 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:12:47,635 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 462 transitions. [2019-01-12 15:12:47,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-01-12 15:12:47,637 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:47,638 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:47,638 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:47,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:47,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1045714737, now seen corresponding path program 1 times [2019-01-12 15:12:47,640 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:47,640 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:47,642 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:47,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:47,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:47,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:47,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:47,842 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:47,842 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:12:47,843 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:12:47,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:12:47,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:12:47,844 INFO L87 Difference]: Start difference. First operand 328 states and 462 transitions. Second operand 5 states. [2019-01-12 15:12:48,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:48,212 INFO L93 Difference]: Finished difference Result 1045 states and 1489 transitions. [2019-01-12 15:12:48,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:12:48,214 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-01-12 15:12:48,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:48,221 INFO L225 Difference]: With dead ends: 1045 [2019-01-12 15:12:48,221 INFO L226 Difference]: Without dead ends: 728 [2019-01-12 15:12:48,228 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:12:48,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states. [2019-01-12 15:12:48,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 340. [2019-01-12 15:12:48,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2019-01-12 15:12:48,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 469 transitions. [2019-01-12 15:12:48,306 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 469 transitions. Word has length 34 [2019-01-12 15:12:48,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:48,308 INFO L480 AbstractCegarLoop]: Abstraction has 340 states and 469 transitions. [2019-01-12 15:12:48,308 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:12:48,308 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 469 transitions. [2019-01-12 15:12:48,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-01-12 15:12:48,309 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:48,310 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:48,310 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:48,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:48,311 INFO L82 PathProgramCache]: Analyzing trace with hash -1179728243, now seen corresponding path program 1 times [2019-01-12 15:12:48,311 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:48,311 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:48,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:48,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:48,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:48,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:48,872 WARN L181 SmtUtils]: Spent 232.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 5 [2019-01-12 15:12:48,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:48,877 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:48,877 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:12:48,878 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:12:48,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:12:48,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:12:48,879 INFO L87 Difference]: Start difference. First operand 340 states and 469 transitions. Second operand 5 states. [2019-01-12 15:12:49,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:49,645 INFO L93 Difference]: Finished difference Result 1046 states and 1465 transitions. [2019-01-12 15:12:49,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:12:49,647 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-01-12 15:12:49,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:49,655 INFO L225 Difference]: With dead ends: 1046 [2019-01-12 15:12:49,655 INFO L226 Difference]: Without dead ends: 724 [2019-01-12 15:12:49,657 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:12:49,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2019-01-12 15:12:49,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 352. [2019-01-12 15:12:49,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 352 states. [2019-01-12 15:12:49,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 352 states to 352 states and 476 transitions. [2019-01-12 15:12:49,733 INFO L78 Accepts]: Start accepts. Automaton has 352 states and 476 transitions. Word has length 34 [2019-01-12 15:12:49,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:49,734 INFO L480 AbstractCegarLoop]: Abstraction has 352 states and 476 transitions. [2019-01-12 15:12:49,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:12:49,737 INFO L276 IsEmpty]: Start isEmpty. Operand 352 states and 476 transitions. [2019-01-12 15:12:49,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-01-12 15:12:49,739 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:49,739 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:49,744 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:49,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:49,745 INFO L82 PathProgramCache]: Analyzing trace with hash 1526891151, now seen corresponding path program 1 times [2019-01-12 15:12:49,746 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:49,746 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:49,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:49,751 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:49,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:49,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:49,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:49,926 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:49,926 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:12:49,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:12:49,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:12:49,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:12:49,929 INFO L87 Difference]: Start difference. First operand 352 states and 476 transitions. Second operand 4 states. [2019-01-12 15:12:50,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:50,630 INFO L93 Difference]: Finished difference Result 1638 states and 2239 transitions. [2019-01-12 15:12:50,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:12:50,632 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2019-01-12 15:12:50,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:50,645 INFO L225 Difference]: With dead ends: 1638 [2019-01-12 15:12:50,645 INFO L226 Difference]: Without dead ends: 1304 [2019-01-12 15:12:50,648 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:12:50,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1304 states. [2019-01-12 15:12:50,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1304 to 662. [2019-01-12 15:12:50,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 662 states. [2019-01-12 15:12:50,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 662 states to 662 states and 900 transitions. [2019-01-12 15:12:50,799 INFO L78 Accepts]: Start accepts. Automaton has 662 states and 900 transitions. Word has length 34 [2019-01-12 15:12:50,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:50,802 INFO L480 AbstractCegarLoop]: Abstraction has 662 states and 900 transitions. [2019-01-12 15:12:50,802 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:12:50,802 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 900 transitions. [2019-01-12 15:12:50,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-01-12 15:12:50,807 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:50,807 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:50,808 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:50,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:50,808 INFO L82 PathProgramCache]: Analyzing trace with hash -1026068075, now seen corresponding path program 1 times [2019-01-12 15:12:50,809 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:50,810 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:50,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:50,814 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:50,814 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:50,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:51,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:51,029 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:51,034 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:12:51,035 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:12:51,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:12:51,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:12:51,038 INFO L87 Difference]: Start difference. First operand 662 states and 900 transitions. Second operand 4 states. [2019-01-12 15:12:51,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:51,509 INFO L93 Difference]: Finished difference Result 1626 states and 2222 transitions. [2019-01-12 15:12:51,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:12:51,511 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 41 [2019-01-12 15:12:51,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:51,519 INFO L225 Difference]: With dead ends: 1626 [2019-01-12 15:12:51,520 INFO L226 Difference]: Without dead ends: 982 [2019-01-12 15:12:51,523 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:12:51,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 982 states. [2019-01-12 15:12:51,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 982 to 972. [2019-01-12 15:12:51,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 972 states. [2019-01-12 15:12:51,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 972 states to 972 states and 1324 transitions. [2019-01-12 15:12:51,700 INFO L78 Accepts]: Start accepts. Automaton has 972 states and 1324 transitions. Word has length 41 [2019-01-12 15:12:51,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:51,701 INFO L480 AbstractCegarLoop]: Abstraction has 972 states and 1324 transitions. [2019-01-12 15:12:51,701 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:12:51,701 INFO L276 IsEmpty]: Start isEmpty. Operand 972 states and 1324 transitions. [2019-01-12 15:12:51,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-01-12 15:12:51,708 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:51,708 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:51,708 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:51,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:51,709 INFO L82 PathProgramCache]: Analyzing trace with hash -305826283, now seen corresponding path program 1 times [2019-01-12 15:12:51,709 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:51,709 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:51,712 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:51,713 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:51,713 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:51,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:51,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:51,886 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:51,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:12:51,886 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:12:51,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:12:51,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:12:51,887 INFO L87 Difference]: Start difference. First operand 972 states and 1324 transitions. Second operand 6 states. [2019-01-12 15:12:53,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:53,588 INFO L93 Difference]: Finished difference Result 3850 states and 5260 transitions. [2019-01-12 15:12:53,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-01-12 15:12:53,590 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-01-12 15:12:53,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:53,609 INFO L225 Difference]: With dead ends: 3850 [2019-01-12 15:12:53,610 INFO L226 Difference]: Without dead ends: 2896 [2019-01-12 15:12:53,615 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-01-12 15:12:53,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2896 states. [2019-01-12 15:12:53,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2896 to 1606. [2019-01-12 15:12:53,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1606 states. [2019-01-12 15:12:53,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1606 states to 1606 states and 2192 transitions. [2019-01-12 15:12:53,857 INFO L78 Accepts]: Start accepts. Automaton has 1606 states and 2192 transitions. Word has length 44 [2019-01-12 15:12:53,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:53,858 INFO L480 AbstractCegarLoop]: Abstraction has 1606 states and 2192 transitions. [2019-01-12 15:12:53,858 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:12:53,858 INFO L276 IsEmpty]: Start isEmpty. Operand 1606 states and 2192 transitions. [2019-01-12 15:12:53,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-01-12 15:12:53,862 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:53,862 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:53,862 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:53,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:53,863 INFO L82 PathProgramCache]: Analyzing trace with hash -1702134670, now seen corresponding path program 1 times [2019-01-12 15:12:53,863 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:53,863 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:53,866 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:53,867 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:53,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:53,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:53,943 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-01-12 15:12:53,944 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:53,944 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:12:53,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:12:53,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:12:53,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:53,945 INFO L87 Difference]: Start difference. First operand 1606 states and 2192 transitions. Second operand 3 states. [2019-01-12 15:12:54,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:54,684 INFO L93 Difference]: Finished difference Result 4614 states and 6233 transitions. [2019-01-12 15:12:54,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:12:54,686 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2019-01-12 15:12:54,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:54,706 INFO L225 Difference]: With dead ends: 4614 [2019-01-12 15:12:54,707 INFO L226 Difference]: Without dead ends: 3026 [2019-01-12 15:12:54,714 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:54,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3026 states. [2019-01-12 15:12:55,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3026 to 3022. [2019-01-12 15:12:55,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3022 states. [2019-01-12 15:12:55,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3022 states to 3022 states and 3978 transitions. [2019-01-12 15:12:55,283 INFO L78 Accepts]: Start accepts. Automaton has 3022 states and 3978 transitions. Word has length 46 [2019-01-12 15:12:55,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:55,283 INFO L480 AbstractCegarLoop]: Abstraction has 3022 states and 3978 transitions. [2019-01-12 15:12:55,283 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:12:55,283 INFO L276 IsEmpty]: Start isEmpty. Operand 3022 states and 3978 transitions. [2019-01-12 15:12:55,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-01-12 15:12:55,285 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:55,287 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:55,287 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:55,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:55,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1664931104, now seen corresponding path program 1 times [2019-01-12 15:12:55,289 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:55,289 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:55,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:55,291 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:55,291 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:55,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:55,371 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:55,372 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:55,372 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:12:55,372 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:12:55,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:12:55,374 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:55,375 INFO L87 Difference]: Start difference. First operand 3022 states and 3978 transitions. Second operand 3 states. [2019-01-12 15:12:56,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:56,273 INFO L93 Difference]: Finished difference Result 8013 states and 10530 transitions. [2019-01-12 15:12:56,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:12:56,273 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-01-12 15:12:56,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:56,294 INFO L225 Difference]: With dead ends: 8013 [2019-01-12 15:12:56,295 INFO L226 Difference]: Without dead ends: 5023 [2019-01-12 15:12:56,302 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:56,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5023 states. [2019-01-12 15:12:56,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5023 to 4273. [2019-01-12 15:12:56,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4273 states. [2019-01-12 15:12:56,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4273 states to 4273 states and 5593 transitions. [2019-01-12 15:12:56,960 INFO L78 Accepts]: Start accepts. Automaton has 4273 states and 5593 transitions. Word has length 48 [2019-01-12 15:12:56,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:56,960 INFO L480 AbstractCegarLoop]: Abstraction has 4273 states and 5593 transitions. [2019-01-12 15:12:56,960 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:12:56,961 INFO L276 IsEmpty]: Start isEmpty. Operand 4273 states and 5593 transitions. [2019-01-12 15:12:56,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-01-12 15:12:56,961 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:56,962 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:56,962 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:56,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:56,962 INFO L82 PathProgramCache]: Analyzing trace with hash 403090641, now seen corresponding path program 1 times [2019-01-12 15:12:56,965 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:56,965 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:56,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:56,966 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:56,967 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:56,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:57,032 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:57,032 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:57,032 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:12:57,033 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:12:57,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:12:57,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:57,034 INFO L87 Difference]: Start difference. First operand 4273 states and 5593 transitions. Second operand 3 states. [2019-01-12 15:12:57,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:57,685 INFO L93 Difference]: Finished difference Result 8516 states and 11154 transitions. [2019-01-12 15:12:57,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:12:57,686 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 48 [2019-01-12 15:12:57,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:57,703 INFO L225 Difference]: With dead ends: 8516 [2019-01-12 15:12:57,703 INFO L226 Difference]: Without dead ends: 4275 [2019-01-12 15:12:57,714 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:57,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4275 states. [2019-01-12 15:12:58,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4275 to 4273. [2019-01-12 15:12:58,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4273 states. [2019-01-12 15:12:58,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4273 states to 4273 states and 5518 transitions. [2019-01-12 15:12:58,189 INFO L78 Accepts]: Start accepts. Automaton has 4273 states and 5518 transitions. Word has length 48 [2019-01-12 15:12:58,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:58,189 INFO L480 AbstractCegarLoop]: Abstraction has 4273 states and 5518 transitions. [2019-01-12 15:12:58,189 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:12:58,190 INFO L276 IsEmpty]: Start isEmpty. Operand 4273 states and 5518 transitions. [2019-01-12 15:12:58,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-01-12 15:12:58,191 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:58,191 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:58,192 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:58,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:58,192 INFO L82 PathProgramCache]: Analyzing trace with hash 57108908, now seen corresponding path program 1 times [2019-01-12 15:12:58,192 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:58,193 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:58,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:58,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:58,194 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:58,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:58,268 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:12:58,268 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:58,268 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:12:58,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:12:58,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:12:58,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:58,270 INFO L87 Difference]: Start difference. First operand 4273 states and 5518 transitions. Second operand 3 states. [2019-01-12 15:12:58,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:58,708 INFO L93 Difference]: Finished difference Result 7967 states and 10312 transitions. [2019-01-12 15:12:58,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:12:58,709 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-01-12 15:12:58,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:58,722 INFO L225 Difference]: With dead ends: 7967 [2019-01-12 15:12:58,722 INFO L226 Difference]: Without dead ends: 3610 [2019-01-12 15:12:58,729 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:58,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3610 states. [2019-01-12 15:12:59,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3610 to 3465. [2019-01-12 15:12:59,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3465 states. [2019-01-12 15:12:59,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3465 states to 3465 states and 4400 transitions. [2019-01-12 15:12:59,064 INFO L78 Accepts]: Start accepts. Automaton has 3465 states and 4400 transitions. Word has length 49 [2019-01-12 15:12:59,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:59,064 INFO L480 AbstractCegarLoop]: Abstraction has 3465 states and 4400 transitions. [2019-01-12 15:12:59,064 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:12:59,064 INFO L276 IsEmpty]: Start isEmpty. Operand 3465 states and 4400 transitions. [2019-01-12 15:12:59,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-01-12 15:12:59,068 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:59,068 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:59,069 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:59,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:59,069 INFO L82 PathProgramCache]: Analyzing trace with hash 652914839, now seen corresponding path program 1 times [2019-01-12 15:12:59,070 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:59,070 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:59,071 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:59,071 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:59,071 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:59,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:12:59,122 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-01-12 15:12:59,123 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:12:59,123 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:12:59,123 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:12:59,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:12:59,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:59,124 INFO L87 Difference]: Start difference. First operand 3465 states and 4400 transitions. Second operand 3 states. [2019-01-12 15:12:59,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:12:59,451 INFO L93 Difference]: Finished difference Result 6369 states and 8143 transitions. [2019-01-12 15:12:59,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:12:59,452 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-01-12 15:12:59,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:12:59,469 INFO L225 Difference]: With dead ends: 6369 [2019-01-12 15:12:59,470 INFO L226 Difference]: Without dead ends: 3465 [2019-01-12 15:12:59,477 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:12:59,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3465 states. [2019-01-12 15:12:59,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3465 to 3465. [2019-01-12 15:12:59,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3465 states. [2019-01-12 15:12:59,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3465 states to 3465 states and 4336 transitions. [2019-01-12 15:12:59,914 INFO L78 Accepts]: Start accepts. Automaton has 3465 states and 4336 transitions. Word has length 83 [2019-01-12 15:12:59,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:12:59,915 INFO L480 AbstractCegarLoop]: Abstraction has 3465 states and 4336 transitions. [2019-01-12 15:12:59,915 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:12:59,915 INFO L276 IsEmpty]: Start isEmpty. Operand 3465 states and 4336 transitions. [2019-01-12 15:12:59,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2019-01-12 15:12:59,918 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:12:59,918 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:12:59,919 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:12:59,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:12:59,919 INFO L82 PathProgramCache]: Analyzing trace with hash -608848062, now seen corresponding path program 1 times [2019-01-12 15:12:59,919 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:12:59,919 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:12:59,920 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:59,920 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:12:59,920 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:12:59,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:00,003 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:13:00,003 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:00,003 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:13:00,004 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:13:00,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:13:00,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:00,005 INFO L87 Difference]: Start difference. First operand 3465 states and 4336 transitions. Second operand 3 states. [2019-01-12 15:13:00,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:00,483 INFO L93 Difference]: Finished difference Result 7371 states and 9260 transitions. [2019-01-12 15:13:00,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:13:00,484 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 84 [2019-01-12 15:13:00,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:00,500 INFO L225 Difference]: With dead ends: 7371 [2019-01-12 15:13:00,501 INFO L226 Difference]: Without dead ends: 4154 [2019-01-12 15:13:00,509 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:00,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4154 states. [2019-01-12 15:13:00,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4154 to 3700. [2019-01-12 15:13:00,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3700 states. [2019-01-12 15:13:00,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3700 states to 3700 states and 4553 transitions. [2019-01-12 15:13:00,863 INFO L78 Accepts]: Start accepts. Automaton has 3700 states and 4553 transitions. Word has length 84 [2019-01-12 15:13:00,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:00,864 INFO L480 AbstractCegarLoop]: Abstraction has 3700 states and 4553 transitions. [2019-01-12 15:13:00,864 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:13:00,864 INFO L276 IsEmpty]: Start isEmpty. Operand 3700 states and 4553 transitions. [2019-01-12 15:13:00,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2019-01-12 15:13:00,866 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:00,867 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:00,867 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:00,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:00,868 INFO L82 PathProgramCache]: Analyzing trace with hash 885528412, now seen corresponding path program 1 times [2019-01-12 15:13:00,868 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:00,868 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:00,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:00,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:00,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:00,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:00,957 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-01-12 15:13:00,958 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:00,958 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:13:00,959 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:13:00,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:13:00,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:00,960 INFO L87 Difference]: Start difference. First operand 3700 states and 4553 transitions. Second operand 3 states. [2019-01-12 15:13:01,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:01,586 INFO L93 Difference]: Finished difference Result 7674 states and 9427 transitions. [2019-01-12 15:13:01,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:13:01,587 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2019-01-12 15:13:01,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:01,602 INFO L225 Difference]: With dead ends: 7674 [2019-01-12 15:13:01,602 INFO L226 Difference]: Without dead ends: 4176 [2019-01-12 15:13:01,611 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:01,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4176 states. [2019-01-12 15:13:02,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4176 to 4174. [2019-01-12 15:13:02,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4174 states. [2019-01-12 15:13:02,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4174 states to 4174 states and 5092 transitions. [2019-01-12 15:13:02,020 INFO L78 Accepts]: Start accepts. Automaton has 4174 states and 5092 transitions. Word has length 86 [2019-01-12 15:13:02,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:02,020 INFO L480 AbstractCegarLoop]: Abstraction has 4174 states and 5092 transitions. [2019-01-12 15:13:02,020 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:13:02,020 INFO L276 IsEmpty]: Start isEmpty. Operand 4174 states and 5092 transitions. [2019-01-12 15:13:02,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2019-01-12 15:13:02,023 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:02,023 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:02,023 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:02,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:02,024 INFO L82 PathProgramCache]: Analyzing trace with hash 1836340184, now seen corresponding path program 1 times [2019-01-12 15:13:02,024 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:02,024 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:02,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:02,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:02,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:02,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:02,133 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:13:02,134 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:02,134 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:13:02,140 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:13:02,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:13:02,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:02,141 INFO L87 Difference]: Start difference. First operand 4174 states and 5092 transitions. Second operand 3 states. [2019-01-12 15:13:02,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:02,491 INFO L93 Difference]: Finished difference Result 7056 states and 8680 transitions. [2019-01-12 15:13:02,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:13:02,492 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 98 [2019-01-12 15:13:02,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:02,502 INFO L225 Difference]: With dead ends: 7056 [2019-01-12 15:13:02,502 INFO L226 Difference]: Without dead ends: 3227 [2019-01-12 15:13:02,512 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:02,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3227 states. [2019-01-12 15:13:02,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3227 to 3223. [2019-01-12 15:13:02,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3223 states. [2019-01-12 15:13:02,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3223 states to 3223 states and 3862 transitions. [2019-01-12 15:13:02,968 INFO L78 Accepts]: Start accepts. Automaton has 3223 states and 3862 transitions. Word has length 98 [2019-01-12 15:13:02,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:02,968 INFO L480 AbstractCegarLoop]: Abstraction has 3223 states and 3862 transitions. [2019-01-12 15:13:02,969 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:13:02,969 INFO L276 IsEmpty]: Start isEmpty. Operand 3223 states and 3862 transitions. [2019-01-12 15:13:02,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-01-12 15:13:02,975 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:02,975 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:02,976 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:02,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:02,977 INFO L82 PathProgramCache]: Analyzing trace with hash 1328739563, now seen corresponding path program 1 times [2019-01-12 15:13:02,977 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:02,977 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:02,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:02,980 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:02,980 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:02,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:03,073 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-01-12 15:13:03,074 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:03,075 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:13:03,076 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:13:03,076 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:13:03,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:03,077 INFO L87 Difference]: Start difference. First operand 3223 states and 3862 transitions. Second operand 3 states. [2019-01-12 15:13:03,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:03,504 INFO L93 Difference]: Finished difference Result 5622 states and 6780 transitions. [2019-01-12 15:13:03,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:13:03,505 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2019-01-12 15:13:03,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:03,511 INFO L225 Difference]: With dead ends: 5622 [2019-01-12 15:13:03,512 INFO L226 Difference]: Without dead ends: 3075 [2019-01-12 15:13:03,516 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:03,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3075 states. [2019-01-12 15:13:03,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3075 to 3075. [2019-01-12 15:13:03,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3075 states. [2019-01-12 15:13:03,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3075 states to 3075 states and 3691 transitions. [2019-01-12 15:13:03,868 INFO L78 Accepts]: Start accepts. Automaton has 3075 states and 3691 transitions. Word has length 99 [2019-01-12 15:13:03,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:03,868 INFO L480 AbstractCegarLoop]: Abstraction has 3075 states and 3691 transitions. [2019-01-12 15:13:03,868 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:13:03,868 INFO L276 IsEmpty]: Start isEmpty. Operand 3075 states and 3691 transitions. [2019-01-12 15:13:03,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2019-01-12 15:13:03,874 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:03,874 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:03,875 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:03,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:03,875 INFO L82 PathProgramCache]: Analyzing trace with hash -472369520, now seen corresponding path program 1 times [2019-01-12 15:13:03,875 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:03,876 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:03,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:03,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:03,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:03,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:03,980 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2019-01-12 15:13:03,980 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:03,980 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:13:03,981 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:13:03,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:13:03,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:13:03,982 INFO L87 Difference]: Start difference. First operand 3075 states and 3691 transitions. Second operand 5 states. [2019-01-12 15:13:04,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:04,323 INFO L93 Difference]: Finished difference Result 5286 states and 6380 transitions. [2019-01-12 15:13:04,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-01-12 15:13:04,324 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 104 [2019-01-12 15:13:04,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:04,331 INFO L225 Difference]: With dead ends: 5286 [2019-01-12 15:13:04,332 INFO L226 Difference]: Without dead ends: 2229 [2019-01-12 15:13:04,338 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:13:04,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2229 states. [2019-01-12 15:13:04,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2229 to 1920. [2019-01-12 15:13:04,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1920 states. [2019-01-12 15:13:04,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1920 states to 1920 states and 2325 transitions. [2019-01-12 15:13:04,678 INFO L78 Accepts]: Start accepts. Automaton has 1920 states and 2325 transitions. Word has length 104 [2019-01-12 15:13:04,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:04,678 INFO L480 AbstractCegarLoop]: Abstraction has 1920 states and 2325 transitions. [2019-01-12 15:13:04,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:13:04,679 INFO L276 IsEmpty]: Start isEmpty. Operand 1920 states and 2325 transitions. [2019-01-12 15:13:04,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2019-01-12 15:13:04,682 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:04,682 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:04,684 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:04,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:04,684 INFO L82 PathProgramCache]: Analyzing trace with hash 663738500, now seen corresponding path program 1 times [2019-01-12 15:13:04,684 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:04,684 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:04,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:04,685 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:04,685 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:04,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:04,863 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-01-12 15:13:04,863 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:04,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:13:04,864 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:13:04,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:13:04,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:13:04,865 INFO L87 Difference]: Start difference. First operand 1920 states and 2325 transitions. Second operand 4 states. [2019-01-12 15:13:05,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:05,344 INFO L93 Difference]: Finished difference Result 4180 states and 5082 transitions. [2019-01-12 15:13:05,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:13:05,345 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 107 [2019-01-12 15:13:05,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:05,350 INFO L225 Difference]: With dead ends: 4180 [2019-01-12 15:13:05,350 INFO L226 Difference]: Without dead ends: 2423 [2019-01-12 15:13:05,353 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:13:05,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2423 states. [2019-01-12 15:13:05,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2423 to 2324. [2019-01-12 15:13:05,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2324 states. [2019-01-12 15:13:05,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 2802 transitions. [2019-01-12 15:13:05,767 INFO L78 Accepts]: Start accepts. Automaton has 2324 states and 2802 transitions. Word has length 107 [2019-01-12 15:13:05,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:05,767 INFO L480 AbstractCegarLoop]: Abstraction has 2324 states and 2802 transitions. [2019-01-12 15:13:05,767 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:13:05,768 INFO L276 IsEmpty]: Start isEmpty. Operand 2324 states and 2802 transitions. [2019-01-12 15:13:05,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-01-12 15:13:05,769 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:05,770 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:05,770 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:05,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:05,771 INFO L82 PathProgramCache]: Analyzing trace with hash -1105184803, now seen corresponding path program 1 times [2019-01-12 15:13:05,771 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:05,771 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:05,772 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:05,772 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:05,773 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:05,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:05,870 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:13:05,870 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:05,870 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:13:05,872 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:13:05,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:13:05,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:05,873 INFO L87 Difference]: Start difference. First operand 2324 states and 2802 transitions. Second operand 3 states. [2019-01-12 15:13:06,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:06,664 INFO L93 Difference]: Finished difference Result 3902 states and 4743 transitions. [2019-01-12 15:13:06,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:13:06,666 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2019-01-12 15:13:06,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:06,670 INFO L225 Difference]: With dead ends: 3902 [2019-01-12 15:13:06,670 INFO L226 Difference]: Without dead ends: 1655 [2019-01-12 15:13:06,675 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:06,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1655 states. [2019-01-12 15:13:06,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1655 to 1653. [2019-01-12 15:13:06,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1653 states. [2019-01-12 15:13:06,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1653 states to 1653 states and 1933 transitions. [2019-01-12 15:13:06,910 INFO L78 Accepts]: Start accepts. Automaton has 1653 states and 1933 transitions. Word has length 113 [2019-01-12 15:13:06,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:06,910 INFO L480 AbstractCegarLoop]: Abstraction has 1653 states and 1933 transitions. [2019-01-12 15:13:06,910 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:13:06,911 INFO L276 IsEmpty]: Start isEmpty. Operand 1653 states and 1933 transitions. [2019-01-12 15:13:06,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-01-12 15:13:06,913 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:06,913 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:06,913 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:06,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:06,916 INFO L82 PathProgramCache]: Analyzing trace with hash 1508765653, now seen corresponding path program 1 times [2019-01-12 15:13:06,916 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:06,916 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:06,918 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:06,918 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:06,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:06,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:06,995 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2019-01-12 15:13:06,995 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:06,995 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:13:06,996 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:13:06,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:13:06,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:13:06,997 INFO L87 Difference]: Start difference. First operand 1653 states and 1933 transitions. Second operand 5 states. [2019-01-12 15:13:07,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:07,461 INFO L93 Difference]: Finished difference Result 4188 states and 4920 transitions. [2019-01-12 15:13:07,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-01-12 15:13:07,463 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 114 [2019-01-12 15:13:07,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:07,471 INFO L225 Difference]: With dead ends: 4188 [2019-01-12 15:13:07,472 INFO L226 Difference]: Without dead ends: 2940 [2019-01-12 15:13:07,477 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-01-12 15:13:07,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2940 states. [2019-01-12 15:13:07,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2940 to 1905. [2019-01-12 15:13:07,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1905 states. [2019-01-12 15:13:07,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1905 states to 1905 states and 2228 transitions. [2019-01-12 15:13:07,899 INFO L78 Accepts]: Start accepts. Automaton has 1905 states and 2228 transitions. Word has length 114 [2019-01-12 15:13:07,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:07,901 INFO L480 AbstractCegarLoop]: Abstraction has 1905 states and 2228 transitions. [2019-01-12 15:13:07,901 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:13:07,901 INFO L276 IsEmpty]: Start isEmpty. Operand 1905 states and 2228 transitions. [2019-01-12 15:13:07,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-01-12 15:13:07,905 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:07,905 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:07,906 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:07,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:07,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1919382230, now seen corresponding path program 1 times [2019-01-12 15:13:07,907 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:07,909 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:07,911 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:07,912 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:07,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:07,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:08,254 WARN L181 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 3 [2019-01-12 15:13:08,378 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-01-12 15:13:08,381 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:13:08,381 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:13:08,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:08,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:08,535 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:13:08,593 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-01-12 15:13:08,633 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-12 15:13:08,634 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2019-01-12 15:13:08,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:13:08,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:13:08,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:13:08,638 INFO L87 Difference]: Start difference. First operand 1905 states and 2228 transitions. Second operand 5 states. [2019-01-12 15:13:10,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:10,413 INFO L93 Difference]: Finished difference Result 4107 states and 4811 transitions. [2019-01-12 15:13:10,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-01-12 15:13:10,418 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 118 [2019-01-12 15:13:10,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:10,440 INFO L225 Difference]: With dead ends: 4107 [2019-01-12 15:13:10,441 INFO L226 Difference]: Without dead ends: 3084 [2019-01-12 15:13:10,447 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 119 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:13:10,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3084 states. [2019-01-12 15:13:10,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3084 to 2067. [2019-01-12 15:13:10,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2067 states. [2019-01-12 15:13:10,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2067 states to 2067 states and 2410 transitions. [2019-01-12 15:13:10,908 INFO L78 Accepts]: Start accepts. Automaton has 2067 states and 2410 transitions. Word has length 118 [2019-01-12 15:13:10,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:10,909 INFO L480 AbstractCegarLoop]: Abstraction has 2067 states and 2410 transitions. [2019-01-12 15:13:10,909 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:13:10,909 INFO L276 IsEmpty]: Start isEmpty. Operand 2067 states and 2410 transitions. [2019-01-12 15:13:10,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2019-01-12 15:13:10,916 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:10,917 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:10,917 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:10,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:10,919 INFO L82 PathProgramCache]: Analyzing trace with hash -2045968037, now seen corresponding path program 1 times [2019-01-12 15:13:10,919 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:10,920 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:10,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:10,923 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:10,923 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:10,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:11,087 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 129 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2019-01-12 15:13:11,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:11,088 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:13:11,089 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:13:11,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:13:11,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:11,093 INFO L87 Difference]: Start difference. First operand 2067 states and 2410 transitions. Second operand 3 states. [2019-01-12 15:13:11,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:11,635 INFO L93 Difference]: Finished difference Result 5041 states and 5868 transitions. [2019-01-12 15:13:11,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:13:11,635 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 172 [2019-01-12 15:13:11,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:11,642 INFO L225 Difference]: With dead ends: 5041 [2019-01-12 15:13:11,642 INFO L226 Difference]: Without dead ends: 3137 [2019-01-12 15:13:11,646 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:11,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3137 states. [2019-01-12 15:13:12,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3137 to 3087. [2019-01-12 15:13:12,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3087 states. [2019-01-12 15:13:12,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3087 states to 3087 states and 3575 transitions. [2019-01-12 15:13:12,243 INFO L78 Accepts]: Start accepts. Automaton has 3087 states and 3575 transitions. Word has length 172 [2019-01-12 15:13:12,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:12,244 INFO L480 AbstractCegarLoop]: Abstraction has 3087 states and 3575 transitions. [2019-01-12 15:13:12,244 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:13:12,244 INFO L276 IsEmpty]: Start isEmpty. Operand 3087 states and 3575 transitions. [2019-01-12 15:13:12,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2019-01-12 15:13:12,251 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:12,252 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:12,252 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:12,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:12,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1191161181, now seen corresponding path program 1 times [2019-01-12 15:13:12,255 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:12,255 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:12,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:12,257 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:12,257 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:12,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:13:12,339 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 99 proven. 0 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2019-01-12 15:13:12,340 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:13:12,340 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:13:12,341 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:13:12,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:13:12,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:12,341 INFO L87 Difference]: Start difference. First operand 3087 states and 3575 transitions. Second operand 3 states. [2019-01-12 15:13:12,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:13:12,564 INFO L93 Difference]: Finished difference Result 4589 states and 5331 transitions. [2019-01-12 15:13:12,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:13:12,565 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 172 [2019-01-12 15:13:12,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:13:12,569 INFO L225 Difference]: With dead ends: 4589 [2019-01-12 15:13:12,569 INFO L226 Difference]: Without dead ends: 1619 [2019-01-12 15:13:12,575 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:13:12,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1619 states. [2019-01-12 15:13:12,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1619 to 1619. [2019-01-12 15:13:12,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1619 states. [2019-01-12 15:13:12,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1619 states to 1619 states and 1839 transitions. [2019-01-12 15:13:12,937 INFO L78 Accepts]: Start accepts. Automaton has 1619 states and 1839 transitions. Word has length 172 [2019-01-12 15:13:12,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:13:12,938 INFO L480 AbstractCegarLoop]: Abstraction has 1619 states and 1839 transitions. [2019-01-12 15:13:12,938 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:13:12,939 INFO L276 IsEmpty]: Start isEmpty. Operand 1619 states and 1839 transitions. [2019-01-12 15:13:12,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2019-01-12 15:13:12,946 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:13:12,947 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:13:12,947 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:13:12,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:13:12,949 INFO L82 PathProgramCache]: Analyzing trace with hash 1404970223, now seen corresponding path program 1 times [2019-01-12 15:13:12,950 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:13:12,950 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:13:12,951 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:12,952 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:13:12,953 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:13:12,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-12 15:13:12,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-12 15:13:13,079 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2019-01-12 15:13:13,321 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.01 03:13:13 BoogieIcfgContainer [2019-01-12 15:13:13,321 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-01-12 15:13:13,322 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-01-12 15:13:13,322 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-01-12 15:13:13,322 INFO L276 PluginConnector]: Witness Printer initialized [2019-01-12 15:13:13,325 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:12:46" (3/4) ... [2019-01-12 15:13:13,332 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2019-01-12 15:13:13,599 INFO L145 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-01-12 15:13:13,600 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-01-12 15:13:13,601 INFO L168 Benchmark]: Toolchain (without parser) took 29197.42 ms. Allocated memory was 1.0 GB in the beginning and 1.9 GB in the end (delta: 848.3 MB). Free memory was 950.0 MB in the beginning and 1.2 GB in the end (delta: -242.4 MB). Peak memory consumption was 605.9 MB. Max. memory is 11.5 GB. [2019-01-12 15:13:13,603 INFO L168 Benchmark]: CDTParser took 0.32 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-01-12 15:13:13,603 INFO L168 Benchmark]: CACSL2BoogieTranslator took 543.56 ms. Allocated memory is still 1.0 GB. Free memory was 950.0 MB in the beginning and 933.9 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. [2019-01-12 15:13:13,604 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.90 ms. Allocated memory is still 1.0 GB. Free memory is still 933.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-01-12 15:13:13,604 INFO L168 Benchmark]: Boogie Preprocessor took 160.90 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 86.0 MB). Free memory was 933.9 MB in the beginning and 1.1 GB in the end (delta: -139.3 MB). Peak memory consumption was 14.5 MB. Max. memory is 11.5 GB. [2019-01-12 15:13:13,604 INFO L168 Benchmark]: RCFGBuilder took 1199.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 33.5 MB). Peak memory consumption was 33.5 MB. Max. memory is 11.5 GB. [2019-01-12 15:13:13,607 INFO L168 Benchmark]: TraceAbstraction took 26940.06 ms. Allocated memory was 1.1 GB in the beginning and 1.9 GB in the end (delta: 762.3 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -174.4 MB). Peak memory consumption was 587.9 MB. Max. memory is 11.5 GB. [2019-01-12 15:13:13,607 INFO L168 Benchmark]: Witness Printer took 278.19 ms. Allocated memory is still 1.9 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 21.7 MB). Peak memory consumption was 21.7 MB. Max. memory is 11.5 GB. [2019-01-12 15:13:13,610 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 543.56 ms. Allocated memory is still 1.0 GB. Free memory was 950.0 MB in the beginning and 933.9 MB in the end (delta: 16.1 MB). Peak memory consumption was 16.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 67.90 ms. Allocated memory is still 1.0 GB. Free memory is still 933.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 160.90 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 86.0 MB). Free memory was 933.9 MB in the beginning and 1.1 GB in the end (delta: -139.3 MB). Peak memory consumption was 14.5 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1199.92 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 33.5 MB). Peak memory consumption was 33.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 26940.06 ms. Allocated memory was 1.1 GB in the beginning and 1.9 GB in the end (delta: 762.3 MB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -174.4 MB). Peak memory consumption was 587.9 MB. Max. memory is 11.5 GB. * Witness Printer took 278.19 ms. Allocated memory is still 1.9 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 21.7 MB). Peak memory consumption was 21.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 9]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int max_loop ; [L16] int num ; [L17] int i ; [L18] int e ; [L19] int timer ; [L20] char data_0 ; [L21] char data_1 ; [L64] int P_1_pc; [L65] int P_1_st ; [L66] int P_1_i ; [L67] int P_1_ev ; [L122] int C_1_pc ; [L123] int C_1_st ; [L124] int C_1_i ; [L125] int C_1_ev ; [L126] int C_1_pr ; VAL [C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, timer=0] [L490] int count ; [L491] int __retres2 ; [L495] num = 0 [L496] i = 0 [L497] max_loop = 2 [L499] timer = 0 [L500] P_1_pc = 0 [L501] C_1_pc = 0 [L503] count = 0 [L483] P_1_i = 1 [L484] C_1_i = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L421] int kernel_st ; [L422] int tmp ; [L423] int tmp___0 ; [L427] kernel_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L226] COND TRUE (int )P_1_i == 1 [L227] P_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L231] COND TRUE (int )C_1_i == 1 [L232] C_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L107] COND FALSE !((int )P_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L117] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L119] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L186] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L189] COND FALSE !((int )C_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L209] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L211] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L435] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L438] kernel_st = 1 [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L269] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L241] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L258] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L294] COND TRUE (int )C_1_st == 0 [L296] tmp___1 = __VERIFIER_nondet_int() [L298] COND TRUE \read(tmp___1) [L300] C_1_st = 1 [L128] char c ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L131] COND TRUE (int )C_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L146] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L148] COND TRUE num == 0 [L149] timer = 1 [L150] i += 1 [L151] C_1_pc = 1 [L152] C_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L72] COND TRUE (int )P_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L49] COND TRUE i___0 == 0 [L50] data_0 = c VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L87] num += 1 [L88] P_1_pc = 1 [L89] P_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L294] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L442] kernel_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L446] kernel_st = 3 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L117] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L186] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L190] COND FALSE !((int )e == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L209] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L452] tmp = exists_runnable_thread() [L454] COND TRUE tmp == 0 [L456] kernel_st = 4 [L336] C_1_ev = 1 [L338] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND TRUE (int )P_1_ev == 1 [L109] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND TRUE \read(tmp) [L374] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L186] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L190] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L209] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L350] COND TRUE (int )P_1_ev == 1 [L351] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L355] COND TRUE (int )C_1_ev == 1 [L356] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L402] int tmp ; [L403] int __retres2 ; [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] tmp = exists_runnable_thread() [L409] COND TRUE \read(tmp) [L410] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L417] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L465] tmp___0 = stop_simulation() [L467] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L435] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L438] kernel_st = 1 [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L72] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L75] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L49] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L52] COND TRUE i___0 == 1 [L53] data_1 = c VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L87] num += 1 [L88] P_1_pc = 1 [L89] P_1_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L294] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L442] kernel_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L446] kernel_st = 3 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L117] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND FALSE !(\read(tmp)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L186] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L190] COND FALSE !((int )e == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L209] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L244] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L248] COND FALSE !((int )C_1_st == 0) [L256] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L452] tmp = exists_runnable_thread() [L454] COND TRUE tmp == 0 [L456] kernel_st = 4 [L336] C_1_ev = 1 [L338] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L365] int tmp ; [L366] int tmp___0 ; [L367] int tmp___1 ; [L104] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L107] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L108] COND TRUE (int )P_1_ev == 1 [L109] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L371] tmp = is_P_1_triggered() [L373] COND TRUE \read(tmp) [L374] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L186] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L189] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L190] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L199] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L209] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L379] tmp___1 = is_C_1_triggered() [L381] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L350] COND TRUE (int )P_1_ev == 1 [L351] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L355] COND TRUE (int )C_1_ev == 1 [L356] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L402] int tmp ; [L403] int __retres2 ; [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L407] tmp = exists_runnable_thread() [L409] COND TRUE \read(tmp) [L410] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L417] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L465] tmp___0 = stop_simulation() [L467] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L435] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L438] kernel_st = 1 [L262] int tmp ; [L263] int tmp___0 ; [L264] int tmp___1 ; [L265] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L269] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L241] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L244] COND TRUE (int )P_1_st == 0 [L245] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L258] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L272] tmp___2 = exists_runnable_thread() [L274] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L279] COND TRUE (int )P_1_st == 0 [L281] tmp = __VERIFIER_nondet_int() [L283] COND TRUE \read(tmp) [L285] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L72] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L75] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L83] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L49] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L52] COND FALSE !(i___0 == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L9] __VERIFIER_error() VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 117 locations, 3 error locations. UNSAFE Result, 26.8s OverallTime, 25 OverallIterations, 6 TraceHistogramMax, 14.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4775 SDtfs, 4830 SDslu, 5616 SDs, 0 SdLazy, 519 SolverSat, 139 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 229 GetRequests, 169 SyntacticMatches, 3 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 2.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=4273occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 7.7s AutomataMinimizationTime, 24 MinimizatonAttempts, 6607 StatesRemovedByMinimization, 20 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.9s InterpolantComputationTime, 2135 NumberOfCodeBlocks, 2135 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1920 ConstructedInterpolants, 0 QuantifiedInterpolants, 350082 SizeOfPredicates, 2 NumberOfNonLiveVariables, 344 ConjunctsInSsa, 9 ConjunctsInUnsatCore, 25 InterpolantComputations, 23 PerfectInterpolantSequences, 619/689 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...