./Ultimate.py --spec /storage/repos/svcomp/c/properties/unreach-call.prp --file /storage/repos/svcomp/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0ed9222f Calling Ultimate with: java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/svcomp/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 51b120a585d23a491f06d4bb80c2a463453987ac ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-0ed9222-m [2019-01-12 15:36:28,421 INFO L170 SettingsManager]: Resetting all preferences to default values... [2019-01-12 15:36:28,422 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2019-01-12 15:36:28,439 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-01-12 15:36:28,440 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-01-12 15:36:28,443 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-01-12 15:36:28,445 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-01-12 15:36:28,448 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2019-01-12 15:36:28,451 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-01-12 15:36:28,452 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-01-12 15:36:28,454 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-01-12 15:36:28,455 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-01-12 15:36:28,456 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-01-12 15:36:28,457 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-01-12 15:36:28,458 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-01-12 15:36:28,466 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-01-12 15:36:28,467 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-01-12 15:36:28,471 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-01-12 15:36:28,478 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2019-01-12 15:36:28,479 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-01-12 15:36:28,483 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-01-12 15:36:28,487 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-01-12 15:36:28,492 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-01-12 15:36:28,492 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-01-12 15:36:28,492 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-01-12 15:36:28,493 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-01-12 15:36:28,497 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-01-12 15:36:28,498 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-01-12 15:36:28,498 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2019-01-12 15:36:28,499 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-01-12 15:36:28,500 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2019-01-12 15:36:28,500 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-01-12 15:36:28,500 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-01-12 15:36:28,501 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2019-01-12 15:36:28,503 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2019-01-12 15:36:28,506 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2019-01-12 15:36:28,506 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-01-12 15:36:28,532 INFO L110 SettingsManager]: Loading preferences was successful [2019-01-12 15:36:28,532 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2019-01-12 15:36:28,534 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-01-12 15:36:28,534 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2019-01-12 15:36:28,534 INFO L133 SettingsManager]: * Use SBE=true [2019-01-12 15:36:28,534 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-01-12 15:36:28,535 INFO L133 SettingsManager]: * sizeof long=4 [2019-01-12 15:36:28,535 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2019-01-12 15:36:28,535 INFO L133 SettingsManager]: * sizeof POINTER=4 [2019-01-12 15:36:28,535 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2019-01-12 15:36:28,535 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-01-12 15:36:28,535 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-01-12 15:36:28,536 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-01-12 15:36:28,536 INFO L133 SettingsManager]: * sizeof long double=12 [2019-01-12 15:36:28,536 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2019-01-12 15:36:28,536 INFO L133 SettingsManager]: * Use constant arrays=true [2019-01-12 15:36:28,536 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-01-12 15:36:28,536 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-01-12 15:36:28,538 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-01-12 15:36:28,538 INFO L133 SettingsManager]: * To the following directory=./dump/ [2019-01-12 15:36:28,538 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2019-01-12 15:36:28,538 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-12 15:36:28,538 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-01-12 15:36:28,538 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-01-12 15:36:28,539 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-01-12 15:36:28,539 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2019-01-12 15:36:28,539 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-01-12 15:36:28,539 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-01-12 15:36:28,539 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 51b120a585d23a491f06d4bb80c2a463453987ac [2019-01-12 15:36:28,594 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-01-12 15:36:28,609 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-01-12 15:36:28,613 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-01-12 15:36:28,615 INFO L271 PluginConnector]: Initializing CDTParser... [2019-01-12 15:36:28,615 INFO L276 PluginConnector]: CDTParser initialized [2019-01-12 15:36:28,616 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/svcomp/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2019-01-12 15:36:28,681 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/295724ad4/88b81b9c899a49baada626a2e9ce2762/FLAG27f5d027c [2019-01-12 15:36:29,162 INFO L307 CDTParser]: Found 1 translation units. [2019-01-12 15:36:29,163 INFO L161 CDTParser]: Scanning /storage/repos/svcomp/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2019-01-12 15:36:29,178 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/295724ad4/88b81b9c899a49baada626a2e9ce2762/FLAG27f5d027c [2019-01-12 15:36:29,489 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/295724ad4/88b81b9c899a49baada626a2e9ce2762 [2019-01-12 15:36:29,493 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-01-12 15:36:29,495 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-01-12 15:36:29,496 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-01-12 15:36:29,496 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-01-12 15:36:29,501 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2019-01-12 15:36:29,502 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.01 03:36:29" (1/1) ... [2019-01-12 15:36:29,505 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@60bcfd37 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:29, skipping insertion in model container [2019-01-12 15:36:29,506 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.01 03:36:29" (1/1) ... [2019-01-12 15:36:29,513 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-01-12 15:36:29,573 INFO L176 MainTranslator]: Built tables and reachable declarations [2019-01-12 15:36:29,826 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-12 15:36:29,838 INFO L191 MainTranslator]: Completed pre-run [2019-01-12 15:36:29,942 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-12 15:36:30,054 INFO L195 MainTranslator]: Completed translation [2019-01-12 15:36:30,055 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30 WrapperNode [2019-01-12 15:36:30,055 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-01-12 15:36:30,056 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-01-12 15:36:30,056 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-01-12 15:36:30,056 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2019-01-12 15:36:30,065 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,081 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,144 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-01-12 15:36:30,145 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-01-12 15:36:30,145 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-01-12 15:36:30,145 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2019-01-12 15:36:30,156 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,157 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,164 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,164 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,181 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,196 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,202 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... [2019-01-12 15:36:30,209 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-01-12 15:36:30,209 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-01-12 15:36:30,210 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-01-12 15:36:30,210 INFO L276 PluginConnector]: RCFGBuilder initialized [2019-01-12 15:36:30,211 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-12 15:36:30,271 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-01-12 15:36:30,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-01-12 15:36:32,311 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-01-12 15:36:32,311 INFO L286 CfgBuilder]: Removed 119 assue(true) statements. [2019-01-12 15:36:32,313 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:36:32 BoogieIcfgContainer [2019-01-12 15:36:32,313 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-01-12 15:36:32,314 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-01-12 15:36:32,314 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-01-12 15:36:32,317 INFO L276 PluginConnector]: TraceAbstraction initialized [2019-01-12 15:36:32,318 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.01 03:36:29" (1/3) ... [2019-01-12 15:36:32,318 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3596af80 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.01 03:36:32, skipping insertion in model container [2019-01-12 15:36:32,319 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:30" (2/3) ... [2019-01-12 15:36:32,319 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3596af80 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.01 03:36:32, skipping insertion in model container [2019-01-12 15:36:32,319 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:36:32" (3/3) ... [2019-01-12 15:36:32,321 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_1.ufo.UNBOUNDED.pals.c [2019-01-12 15:36:32,332 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-01-12 15:36:32,341 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2019-01-12 15:36:32,359 INFO L257 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2019-01-12 15:36:32,401 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2019-01-12 15:36:32,402 INFO L382 AbstractCegarLoop]: Interprodecural is true [2019-01-12 15:36:32,402 INFO L383 AbstractCegarLoop]: Hoare is true [2019-01-12 15:36:32,402 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-01-12 15:36:32,402 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-01-12 15:36:32,403 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-01-12 15:36:32,403 INFO L387 AbstractCegarLoop]: Difference is false [2019-01-12 15:36:32,403 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-01-12 15:36:32,403 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-01-12 15:36:32,432 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states. [2019-01-12 15:36:32,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-01-12 15:36:32,442 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:32,443 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:32,447 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:32,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:32,453 INFO L82 PathProgramCache]: Analyzing trace with hash 211735483, now seen corresponding path program 1 times [2019-01-12 15:36:32,454 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:32,455 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:32,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:32,505 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:32,505 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:32,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:32,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:32,706 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:32,706 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:32,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:32,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:32,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:32,729 INFO L87 Difference]: Start difference. First operand 290 states. Second operand 3 states. [2019-01-12 15:36:32,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:32,906 INFO L93 Difference]: Finished difference Result 562 states and 879 transitions. [2019-01-12 15:36:32,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:32,911 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-01-12 15:36:32,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:32,927 INFO L225 Difference]: With dead ends: 562 [2019-01-12 15:36:32,928 INFO L226 Difference]: Without dead ends: 286 [2019-01-12 15:36:32,933 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:32,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286 states. [2019-01-12 15:36:32,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286 to 286. [2019-01-12 15:36:32,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2019-01-12 15:36:32,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 408 transitions. [2019-01-12 15:36:32,994 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 408 transitions. Word has length 31 [2019-01-12 15:36:32,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:32,995 INFO L480 AbstractCegarLoop]: Abstraction has 286 states and 408 transitions. [2019-01-12 15:36:32,995 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:32,995 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 408 transitions. [2019-01-12 15:36:32,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-01-12 15:36:32,997 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:32,997 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:32,998 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:32,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:32,998 INFO L82 PathProgramCache]: Analyzing trace with hash -1187444686, now seen corresponding path program 1 times [2019-01-12 15:36:32,999 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:32,999 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:33,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:33,002 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:33,002 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:33,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:33,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:33,206 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:33,206 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:33,208 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:33,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:33,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:33,209 INFO L87 Difference]: Start difference. First operand 286 states and 408 transitions. Second operand 3 states. [2019-01-12 15:36:33,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:33,342 INFO L93 Difference]: Finished difference Result 590 states and 850 transitions. [2019-01-12 15:36:33,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:33,344 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-01-12 15:36:33,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:33,349 INFO L225 Difference]: With dead ends: 590 [2019-01-12 15:36:33,350 INFO L226 Difference]: Without dead ends: 319 [2019-01-12 15:36:33,352 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:33,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2019-01-12 15:36:33,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 262. [2019-01-12 15:36:33,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 262 states. [2019-01-12 15:36:33,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 372 transitions. [2019-01-12 15:36:33,396 INFO L78 Accepts]: Start accepts. Automaton has 262 states and 372 transitions. Word has length 42 [2019-01-12 15:36:33,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:33,397 INFO L480 AbstractCegarLoop]: Abstraction has 262 states and 372 transitions. [2019-01-12 15:36:33,397 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:33,397 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 372 transitions. [2019-01-12 15:36:33,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-01-12 15:36:33,401 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:33,401 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:33,402 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:33,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:33,404 INFO L82 PathProgramCache]: Analyzing trace with hash -365626229, now seen corresponding path program 1 times [2019-01-12 15:36:33,404 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:33,404 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:33,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:33,410 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:33,410 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:33,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:33,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:33,654 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:33,655 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:33,655 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:33,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:33,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:33,657 INFO L87 Difference]: Start difference. First operand 262 states and 372 transitions. Second operand 3 states. [2019-01-12 15:36:33,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:33,767 INFO L93 Difference]: Finished difference Result 733 states and 1051 transitions. [2019-01-12 15:36:33,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:33,768 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-01-12 15:36:33,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:33,772 INFO L225 Difference]: With dead ends: 733 [2019-01-12 15:36:33,772 INFO L226 Difference]: Without dead ends: 486 [2019-01-12 15:36:33,774 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:33,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 486 states. [2019-01-12 15:36:33,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 486 to 295. [2019-01-12 15:36:33,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295 states. [2019-01-12 15:36:33,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 420 transitions. [2019-01-12 15:36:33,804 INFO L78 Accepts]: Start accepts. Automaton has 295 states and 420 transitions. Word has length 49 [2019-01-12 15:36:33,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:33,805 INFO L480 AbstractCegarLoop]: Abstraction has 295 states and 420 transitions. [2019-01-12 15:36:33,805 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:33,805 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 420 transitions. [2019-01-12 15:36:33,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-01-12 15:36:33,812 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:33,813 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:33,813 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:33,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:33,816 INFO L82 PathProgramCache]: Analyzing trace with hash 744745200, now seen corresponding path program 1 times [2019-01-12 15:36:33,816 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:33,816 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:33,819 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:33,819 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:33,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:33,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:33,998 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:33,999 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:33,999 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:33,999 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:34,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:34,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:34,000 INFO L87 Difference]: Start difference. First operand 295 states and 420 transitions. Second operand 5 states. [2019-01-12 15:36:35,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:35,002 INFO L93 Difference]: Finished difference Result 929 states and 1337 transitions. [2019-01-12 15:36:35,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:36:35,005 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2019-01-12 15:36:35,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:35,010 INFO L225 Difference]: With dead ends: 929 [2019-01-12 15:36:35,013 INFO L226 Difference]: Without dead ends: 649 [2019-01-12 15:36:35,014 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:36:35,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 649 states. [2019-01-12 15:36:35,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 649 to 381. [2019-01-12 15:36:35,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 381 states. [2019-01-12 15:36:35,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 543 transitions. [2019-01-12 15:36:35,042 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 543 transitions. Word has length 50 [2019-01-12 15:36:35,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:35,042 INFO L480 AbstractCegarLoop]: Abstraction has 381 states and 543 transitions. [2019-01-12 15:36:35,043 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:35,043 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 543 transitions. [2019-01-12 15:36:35,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-01-12 15:36:35,049 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:35,050 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:35,051 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:35,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:35,051 INFO L82 PathProgramCache]: Analyzing trace with hash 1614483527, now seen corresponding path program 1 times [2019-01-12 15:36:35,051 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:35,051 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:35,054 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:35,054 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:35,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:35,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:35,355 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:35,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:35,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:35,356 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:35,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:35,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:35,357 INFO L87 Difference]: Start difference. First operand 381 states and 543 transitions. Second operand 5 states. [2019-01-12 15:36:36,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:36,410 INFO L93 Difference]: Finished difference Result 929 states and 1333 transitions. [2019-01-12 15:36:36,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:36:36,412 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-01-12 15:36:36,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:36,420 INFO L225 Difference]: With dead ends: 929 [2019-01-12 15:36:36,420 INFO L226 Difference]: Without dead ends: 649 [2019-01-12 15:36:36,421 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:36:36,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 649 states. [2019-01-12 15:36:36,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 649 to 381. [2019-01-12 15:36:36,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 381 states. [2019-01-12 15:36:36,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 541 transitions. [2019-01-12 15:36:36,454 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 541 transitions. Word has length 51 [2019-01-12 15:36:36,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:36,457 INFO L480 AbstractCegarLoop]: Abstraction has 381 states and 541 transitions. [2019-01-12 15:36:36,457 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:36,457 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 541 transitions. [2019-01-12 15:36:36,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-01-12 15:36:36,459 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:36,459 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:36,467 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:36,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:36,468 INFO L82 PathProgramCache]: Analyzing trace with hash 251892323, now seen corresponding path program 1 times [2019-01-12 15:36:36,468 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:36,468 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:36,472 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:36,473 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:36,473 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:36,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:36,973 WARN L181 SmtUtils]: Spent 283.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 11 [2019-01-12 15:36:37,485 WARN L181 SmtUtils]: Spent 442.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 12 [2019-01-12 15:36:37,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:37,505 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:37,506 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:36:37,507 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:37,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:37,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:37,509 INFO L87 Difference]: Start difference. First operand 381 states and 541 transitions. Second operand 5 states. [2019-01-12 15:36:37,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:37,710 INFO L93 Difference]: Finished difference Result 757 states and 1086 transitions. [2019-01-12 15:36:37,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:36:37,711 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-01-12 15:36:37,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:37,714 INFO L225 Difference]: With dead ends: 757 [2019-01-12 15:36:37,715 INFO L226 Difference]: Without dead ends: 477 [2019-01-12 15:36:37,716 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:37,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states. [2019-01-12 15:36:37,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 376. [2019-01-12 15:36:37,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 376 states. [2019-01-12 15:36:37,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 533 transitions. [2019-01-12 15:36:37,756 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 533 transitions. Word has length 52 [2019-01-12 15:36:37,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:37,757 INFO L480 AbstractCegarLoop]: Abstraction has 376 states and 533 transitions. [2019-01-12 15:36:37,757 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:37,757 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 533 transitions. [2019-01-12 15:36:37,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-01-12 15:36:37,758 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:37,758 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:37,797 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:37,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:37,797 INFO L82 PathProgramCache]: Analyzing trace with hash -1519937093, now seen corresponding path program 1 times [2019-01-12 15:36:37,798 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:37,798 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:37,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:37,799 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:37,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:37,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:38,249 WARN L181 SmtUtils]: Spent 283.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 11 [2019-01-12 15:36:38,520 WARN L181 SmtUtils]: Spent 193.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 13 [2019-01-12 15:36:38,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:38,541 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:38,542 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:36:38,542 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:38,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:38,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:38,543 INFO L87 Difference]: Start difference. First operand 376 states and 533 transitions. Second operand 5 states. [2019-01-12 15:36:38,735 WARN L181 SmtUtils]: Spent 112.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2019-01-12 15:36:39,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:39,227 INFO L93 Difference]: Finished difference Result 788 states and 1135 transitions. [2019-01-12 15:36:39,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:39,228 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-01-12 15:36:39,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:39,237 INFO L225 Difference]: With dead ends: 788 [2019-01-12 15:36:39,238 INFO L226 Difference]: Without dead ends: 513 [2019-01-12 15:36:39,239 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:36:39,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states. [2019-01-12 15:36:39,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 346. [2019-01-12 15:36:39,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346 states. [2019-01-12 15:36:39,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346 states to 346 states and 487 transitions. [2019-01-12 15:36:39,267 INFO L78 Accepts]: Start accepts. Automaton has 346 states and 487 transitions. Word has length 56 [2019-01-12 15:36:39,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:39,269 INFO L480 AbstractCegarLoop]: Abstraction has 346 states and 487 transitions. [2019-01-12 15:36:39,269 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:39,269 INFO L276 IsEmpty]: Start isEmpty. Operand 346 states and 487 transitions. [2019-01-12 15:36:39,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-01-12 15:36:39,271 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:39,271 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:39,272 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:39,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:39,273 INFO L82 PathProgramCache]: Analyzing trace with hash 1786376721, now seen corresponding path program 1 times [2019-01-12 15:36:39,275 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:39,275 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:39,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:39,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:39,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:39,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:39,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:39,632 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:39,632 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:36:39,632 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:39,632 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:39,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:39,633 INFO L87 Difference]: Start difference. First operand 346 states and 487 transitions. Second operand 5 states. [2019-01-12 15:36:40,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:40,088 INFO L93 Difference]: Finished difference Result 880 states and 1256 transitions. [2019-01-12 15:36:40,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:40,089 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2019-01-12 15:36:40,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:40,092 INFO L225 Difference]: With dead ends: 880 [2019-01-12 15:36:40,092 INFO L226 Difference]: Without dead ends: 635 [2019-01-12 15:36:40,093 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:36:40,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 635 states. [2019-01-12 15:36:40,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 635 to 316. [2019-01-12 15:36:40,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 316 states. [2019-01-12 15:36:40,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 441 transitions. [2019-01-12 15:36:40,120 INFO L78 Accepts]: Start accepts. Automaton has 316 states and 441 transitions. Word has length 61 [2019-01-12 15:36:40,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:40,120 INFO L480 AbstractCegarLoop]: Abstraction has 316 states and 441 transitions. [2019-01-12 15:36:40,120 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:40,121 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 441 transitions. [2019-01-12 15:36:40,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-01-12 15:36:40,121 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:40,122 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:40,122 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:40,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:40,123 INFO L82 PathProgramCache]: Analyzing trace with hash -1245848025, now seen corresponding path program 1 times [2019-01-12 15:36:40,123 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:40,123 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:40,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:40,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:40,124 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:40,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:40,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:40,327 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:40,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:40,327 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:40,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:40,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:40,328 INFO L87 Difference]: Start difference. First operand 316 states and 441 transitions. Second operand 6 states. [2019-01-12 15:36:41,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:41,387 INFO L93 Difference]: Finished difference Result 1074 states and 1513 transitions. [2019-01-12 15:36:41,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-01-12 15:36:41,387 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-01-12 15:36:41,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:41,392 INFO L225 Difference]: With dead ends: 1074 [2019-01-12 15:36:41,392 INFO L226 Difference]: Without dead ends: 859 [2019-01-12 15:36:41,393 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-01-12 15:36:41,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 859 states. [2019-01-12 15:36:41,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 859 to 355. [2019-01-12 15:36:41,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 355 states. [2019-01-12 15:36:41,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 355 states to 355 states and 495 transitions. [2019-01-12 15:36:41,428 INFO L78 Accepts]: Start accepts. Automaton has 355 states and 495 transitions. Word has length 66 [2019-01-12 15:36:41,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:41,429 INFO L480 AbstractCegarLoop]: Abstraction has 355 states and 495 transitions. [2019-01-12 15:36:41,429 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:41,429 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 495 transitions. [2019-01-12 15:36:41,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-01-12 15:36:41,430 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:41,430 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:41,430 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:41,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:41,431 INFO L82 PathProgramCache]: Analyzing trace with hash 1591247394, now seen corresponding path program 1 times [2019-01-12 15:36:41,431 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:41,431 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:41,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:41,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:41,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:41,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:41,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:41,653 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:41,653 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:41,654 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:41,654 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:41,654 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:41,654 INFO L87 Difference]: Start difference. First operand 355 states and 495 transitions. Second operand 3 states. [2019-01-12 15:36:41,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:41,929 INFO L93 Difference]: Finished difference Result 647 states and 912 transitions. [2019-01-12 15:36:41,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:41,930 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-01-12 15:36:41,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:41,932 INFO L225 Difference]: With dead ends: 647 [2019-01-12 15:36:41,933 INFO L226 Difference]: Without dead ends: 432 [2019-01-12 15:36:41,933 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:41,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 432 states. [2019-01-12 15:36:41,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 432 to 351. [2019-01-12 15:36:41,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 351 states. [2019-01-12 15:36:41,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 488 transitions. [2019-01-12 15:36:41,965 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 488 transitions. Word has length 67 [2019-01-12 15:36:41,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:41,965 INFO L480 AbstractCegarLoop]: Abstraction has 351 states and 488 transitions. [2019-01-12 15:36:41,965 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:41,965 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 488 transitions. [2019-01-12 15:36:41,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-01-12 15:36:41,966 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:41,966 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:41,967 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:41,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:41,967 INFO L82 PathProgramCache]: Analyzing trace with hash 480130565, now seen corresponding path program 1 times [2019-01-12 15:36:41,967 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:41,967 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:41,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:41,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:41,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:41,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:42,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:42,164 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:42,164 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:42,164 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:42,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:42,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:42,165 INFO L87 Difference]: Start difference. First operand 351 states and 488 transitions. Second operand 4 states. [2019-01-12 15:36:42,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:42,924 INFO L93 Difference]: Finished difference Result 933 states and 1300 transitions. [2019-01-12 15:36:42,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:42,924 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 70 [2019-01-12 15:36:42,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:42,928 INFO L225 Difference]: With dead ends: 933 [2019-01-12 15:36:42,928 INFO L226 Difference]: Without dead ends: 712 [2019-01-12 15:36:42,929 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:42,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 712 states. [2019-01-12 15:36:42,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 712 to 517. [2019-01-12 15:36:42,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 517 states. [2019-01-12 15:36:42,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 517 states to 517 states and 715 transitions. [2019-01-12 15:36:42,977 INFO L78 Accepts]: Start accepts. Automaton has 517 states and 715 transitions. Word has length 70 [2019-01-12 15:36:42,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:42,978 INFO L480 AbstractCegarLoop]: Abstraction has 517 states and 715 transitions. [2019-01-12 15:36:42,978 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:42,978 INFO L276 IsEmpty]: Start isEmpty. Operand 517 states and 715 transitions. [2019-01-12 15:36:42,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-01-12 15:36:42,979 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:42,979 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:42,980 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:42,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:42,980 INFO L82 PathProgramCache]: Analyzing trace with hash -1523824051, now seen corresponding path program 1 times [2019-01-12 15:36:42,980 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:42,980 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:42,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:42,982 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:42,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:42,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:43,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:43,070 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:43,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:43,071 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:43,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:43,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:43,072 INFO L87 Difference]: Start difference. First operand 517 states and 715 transitions. Second operand 3 states. [2019-01-12 15:36:43,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:43,148 INFO L93 Difference]: Finished difference Result 1220 states and 1679 transitions. [2019-01-12 15:36:43,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:43,149 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2019-01-12 15:36:43,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:43,153 INFO L225 Difference]: With dead ends: 1220 [2019-01-12 15:36:43,153 INFO L226 Difference]: Without dead ends: 850 [2019-01-12 15:36:43,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:43,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 850 states. [2019-01-12 15:36:43,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 850 to 578. [2019-01-12 15:36:43,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 578 states. [2019-01-12 15:36:43,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 578 states to 578 states and 792 transitions. [2019-01-12 15:36:43,224 INFO L78 Accepts]: Start accepts. Automaton has 578 states and 792 transitions. Word has length 70 [2019-01-12 15:36:43,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:43,224 INFO L480 AbstractCegarLoop]: Abstraction has 578 states and 792 transitions. [2019-01-12 15:36:43,224 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:43,224 INFO L276 IsEmpty]: Start isEmpty. Operand 578 states and 792 transitions. [2019-01-12 15:36:43,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-01-12 15:36:43,226 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:43,226 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:43,226 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:43,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:43,227 INFO L82 PathProgramCache]: Analyzing trace with hash -1383275441, now seen corresponding path program 1 times [2019-01-12 15:36:43,227 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:43,227 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:43,228 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:43,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:43,229 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:43,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:43,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:43,322 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:43,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:43,323 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:43,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:43,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:43,323 INFO L87 Difference]: Start difference. First operand 578 states and 792 transitions. Second operand 3 states. [2019-01-12 15:36:43,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:43,457 INFO L93 Difference]: Finished difference Result 982 states and 1355 transitions. [2019-01-12 15:36:43,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:43,458 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2019-01-12 15:36:43,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:43,460 INFO L225 Difference]: With dead ends: 982 [2019-01-12 15:36:43,461 INFO L226 Difference]: Without dead ends: 543 [2019-01-12 15:36:43,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:43,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2019-01-12 15:36:43,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 543. [2019-01-12 15:36:43,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 543 states. [2019-01-12 15:36:43,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 543 states to 543 states and 743 transitions. [2019-01-12 15:36:43,517 INFO L78 Accepts]: Start accepts. Automaton has 543 states and 743 transitions. Word has length 70 [2019-01-12 15:36:43,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:43,518 INFO L480 AbstractCegarLoop]: Abstraction has 543 states and 743 transitions. [2019-01-12 15:36:43,518 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:43,518 INFO L276 IsEmpty]: Start isEmpty. Operand 543 states and 743 transitions. [2019-01-12 15:36:43,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-01-12 15:36:43,519 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:43,519 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:43,520 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:43,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:43,520 INFO L82 PathProgramCache]: Analyzing trace with hash -1837662732, now seen corresponding path program 1 times [2019-01-12 15:36:43,520 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:43,520 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:43,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:43,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:43,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:43,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:44,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:44,048 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:44,048 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:44,048 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:44,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:44,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:44,049 INFO L87 Difference]: Start difference. First operand 543 states and 743 transitions. Second operand 6 states. [2019-01-12 15:36:44,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:44,452 INFO L93 Difference]: Finished difference Result 1703 states and 2366 transitions. [2019-01-12 15:36:44,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-01-12 15:36:44,453 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2019-01-12 15:36:44,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:44,458 INFO L225 Difference]: With dead ends: 1703 [2019-01-12 15:36:44,458 INFO L226 Difference]: Without dead ends: 1380 [2019-01-12 15:36:44,459 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-01-12 15:36:44,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1380 states. [2019-01-12 15:36:44,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1380 to 547. [2019-01-12 15:36:44,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 547 states. [2019-01-12 15:36:44,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 547 states to 547 states and 748 transitions. [2019-01-12 15:36:44,521 INFO L78 Accepts]: Start accepts. Automaton has 547 states and 748 transitions. Word has length 71 [2019-01-12 15:36:44,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:44,521 INFO L480 AbstractCegarLoop]: Abstraction has 547 states and 748 transitions. [2019-01-12 15:36:44,521 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:44,521 INFO L276 IsEmpty]: Start isEmpty. Operand 547 states and 748 transitions. [2019-01-12 15:36:44,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-01-12 15:36:44,522 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:44,522 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:44,523 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:44,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:44,523 INFO L82 PathProgramCache]: Analyzing trace with hash 276642491, now seen corresponding path program 1 times [2019-01-12 15:36:44,523 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:44,524 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:44,524 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:44,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:44,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:44,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:44,871 WARN L181 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 8 [2019-01-12 15:36:44,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:44,874 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:44,875 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:36:44,875 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:44,875 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:44,875 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:44,876 INFO L87 Difference]: Start difference. First operand 547 states and 748 transitions. Second operand 5 states. [2019-01-12 15:36:45,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:45,047 INFO L93 Difference]: Finished difference Result 856 states and 1187 transitions. [2019-01-12 15:36:45,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:36:45,048 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2019-01-12 15:36:45,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:45,053 INFO L225 Difference]: With dead ends: 856 [2019-01-12 15:36:45,053 INFO L226 Difference]: Without dead ends: 854 [2019-01-12 15:36:45,053 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:36:45,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 854 states. [2019-01-12 15:36:45,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 854 to 549. [2019-01-12 15:36:45,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 549 states. [2019-01-12 15:36:45,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549 states to 549 states and 750 transitions. [2019-01-12 15:36:45,105 INFO L78 Accepts]: Start accepts. Automaton has 549 states and 750 transitions. Word has length 71 [2019-01-12 15:36:45,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:45,106 INFO L480 AbstractCegarLoop]: Abstraction has 549 states and 750 transitions. [2019-01-12 15:36:45,106 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:45,106 INFO L276 IsEmpty]: Start isEmpty. Operand 549 states and 750 transitions. [2019-01-12 15:36:45,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-01-12 15:36:45,107 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:45,107 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:45,108 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:45,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:45,108 INFO L82 PathProgramCache]: Analyzing trace with hash -66828782, now seen corresponding path program 1 times [2019-01-12 15:36:45,108 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:45,108 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:45,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:45,109 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:45,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:45,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:45,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:45,494 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:45,494 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:45,495 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:45,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:45,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:45,495 INFO L87 Difference]: Start difference. First operand 549 states and 750 transitions. Second operand 6 states. [2019-01-12 15:36:46,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:46,013 INFO L93 Difference]: Finished difference Result 1970 states and 2711 transitions. [2019-01-12 15:36:46,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:36:46,014 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2019-01-12 15:36:46,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:46,021 INFO L225 Difference]: With dead ends: 1970 [2019-01-12 15:36:46,021 INFO L226 Difference]: Without dead ends: 1606 [2019-01-12 15:36:46,022 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-01-12 15:36:46,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1606 states. [2019-01-12 15:36:46,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1606 to 595. [2019-01-12 15:36:46,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 595 states. [2019-01-12 15:36:46,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 595 states to 595 states and 808 transitions. [2019-01-12 15:36:46,111 INFO L78 Accepts]: Start accepts. Automaton has 595 states and 808 transitions. Word has length 71 [2019-01-12 15:36:46,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:46,111 INFO L480 AbstractCegarLoop]: Abstraction has 595 states and 808 transitions. [2019-01-12 15:36:46,111 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:46,111 INFO L276 IsEmpty]: Start isEmpty. Operand 595 states and 808 transitions. [2019-01-12 15:36:46,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-01-12 15:36:46,113 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:46,113 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:46,113 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:46,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:46,117 INFO L82 PathProgramCache]: Analyzing trace with hash -624478278, now seen corresponding path program 1 times [2019-01-12 15:36:46,117 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:46,117 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:46,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:46,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:46,118 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:46,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:46,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:46,390 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:46,390 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:46,390 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:46,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:46,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:46,391 INFO L87 Difference]: Start difference. First operand 595 states and 808 transitions. Second operand 6 states. [2019-01-12 15:36:47,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:47,014 INFO L93 Difference]: Finished difference Result 2296 states and 3143 transitions. [2019-01-12 15:36:47,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:36:47,015 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2019-01-12 15:36:47,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:47,022 INFO L225 Difference]: With dead ends: 2296 [2019-01-12 15:36:47,022 INFO L226 Difference]: Without dead ends: 1924 [2019-01-12 15:36:47,024 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-01-12 15:36:47,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1924 states. [2019-01-12 15:36:47,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1924 to 673. [2019-01-12 15:36:47,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 673 states. [2019-01-12 15:36:47,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 673 states to 673 states and 910 transitions. [2019-01-12 15:36:47,124 INFO L78 Accepts]: Start accepts. Automaton has 673 states and 910 transitions. Word has length 72 [2019-01-12 15:36:47,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:47,124 INFO L480 AbstractCegarLoop]: Abstraction has 673 states and 910 transitions. [2019-01-12 15:36:47,124 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:47,124 INFO L276 IsEmpty]: Start isEmpty. Operand 673 states and 910 transitions. [2019-01-12 15:36:47,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-01-12 15:36:47,125 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:47,125 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:47,126 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:47,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:47,126 INFO L82 PathProgramCache]: Analyzing trace with hash -2046951303, now seen corresponding path program 1 times [2019-01-12 15:36:47,127 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:47,127 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:47,128 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,128 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:47,128 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:47,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:47,284 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:47,284 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:47,284 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:47,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:47,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:47,285 INFO L87 Difference]: Start difference. First operand 673 states and 910 transitions. Second operand 3 states. [2019-01-12 15:36:47,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:47,392 INFO L93 Difference]: Finished difference Result 1220 states and 1675 transitions. [2019-01-12 15:36:47,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:47,393 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-01-12 15:36:47,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:47,395 INFO L225 Difference]: With dead ends: 1220 [2019-01-12 15:36:47,396 INFO L226 Difference]: Without dead ends: 831 [2019-01-12 15:36:47,396 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:47,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 831 states. [2019-01-12 15:36:47,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 831 to 669. [2019-01-12 15:36:47,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 669 states. [2019-01-12 15:36:47,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 669 states to 669 states and 903 transitions. [2019-01-12 15:36:47,483 INFO L78 Accepts]: Start accepts. Automaton has 669 states and 903 transitions. Word has length 72 [2019-01-12 15:36:47,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:47,483 INFO L480 AbstractCegarLoop]: Abstraction has 669 states and 903 transitions. [2019-01-12 15:36:47,483 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:47,483 INFO L276 IsEmpty]: Start isEmpty. Operand 669 states and 903 transitions. [2019-01-12 15:36:47,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-01-12 15:36:47,484 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:47,484 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:47,485 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:47,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:47,485 INFO L82 PathProgramCache]: Analyzing trace with hash 778464989, now seen corresponding path program 1 times [2019-01-12 15:36:47,485 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:47,486 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:47,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:47,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:47,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:47,585 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:47,585 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:47,585 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:47,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:47,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:47,588 INFO L87 Difference]: Start difference. First operand 669 states and 903 transitions. Second operand 3 states. [2019-01-12 15:36:47,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:47,863 INFO L93 Difference]: Finished difference Result 1307 states and 1785 transitions. [2019-01-12 15:36:47,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:47,864 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-01-12 15:36:47,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:47,867 INFO L225 Difference]: With dead ends: 1307 [2019-01-12 15:36:47,867 INFO L226 Difference]: Without dead ends: 859 [2019-01-12 15:36:47,868 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:47,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 859 states. [2019-01-12 15:36:47,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 859 to 648. [2019-01-12 15:36:47,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 648 states. [2019-01-12 15:36:47,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 648 states to 648 states and 866 transitions. [2019-01-12 15:36:47,954 INFO L78 Accepts]: Start accepts. Automaton has 648 states and 866 transitions. Word has length 72 [2019-01-12 15:36:47,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:47,954 INFO L480 AbstractCegarLoop]: Abstraction has 648 states and 866 transitions. [2019-01-12 15:36:47,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:47,954 INFO L276 IsEmpty]: Start isEmpty. Operand 648 states and 866 transitions. [2019-01-12 15:36:47,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-01-12 15:36:47,955 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:47,956 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:47,956 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:47,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:47,956 INFO L82 PathProgramCache]: Analyzing trace with hash 449594347, now seen corresponding path program 1 times [2019-01-12 15:36:47,957 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:47,957 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:47,958 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,958 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:47,958 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:48,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:48,064 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:48,065 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:48,065 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:48,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:48,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:48,065 INFO L87 Difference]: Start difference. First operand 648 states and 866 transitions. Second operand 4 states. [2019-01-12 15:36:48,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:48,320 INFO L93 Difference]: Finished difference Result 1658 states and 2226 transitions. [2019-01-12 15:36:48,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:48,320 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 73 [2019-01-12 15:36:48,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:48,325 INFO L225 Difference]: With dead ends: 1658 [2019-01-12 15:36:48,325 INFO L226 Difference]: Without dead ends: 1263 [2019-01-12 15:36:48,326 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:48,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1263 states. [2019-01-12 15:36:48,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1263 to 882. [2019-01-12 15:36:48,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 882 states. [2019-01-12 15:36:48,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 882 states to 882 states and 1177 transitions. [2019-01-12 15:36:48,423 INFO L78 Accepts]: Start accepts. Automaton has 882 states and 1177 transitions. Word has length 73 [2019-01-12 15:36:48,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:48,423 INFO L480 AbstractCegarLoop]: Abstraction has 882 states and 1177 transitions. [2019-01-12 15:36:48,423 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:48,423 INFO L276 IsEmpty]: Start isEmpty. Operand 882 states and 1177 transitions. [2019-01-12 15:36:48,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-01-12 15:36:48,424 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:48,425 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:48,425 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:48,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:48,425 INFO L82 PathProgramCache]: Analyzing trace with hash 1828954211, now seen corresponding path program 1 times [2019-01-12 15:36:48,425 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:48,426 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:48,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:48,427 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:48,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:48,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:48,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:48,514 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:48,514 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:48,514 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:48,515 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:48,515 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:48,515 INFO L87 Difference]: Start difference. First operand 882 states and 1177 transitions. Second operand 3 states. [2019-01-12 15:36:49,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:49,104 INFO L93 Difference]: Finished difference Result 1837 states and 2469 transitions. [2019-01-12 15:36:49,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:49,105 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 73 [2019-01-12 15:36:49,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:49,112 INFO L225 Difference]: With dead ends: 1837 [2019-01-12 15:36:49,112 INFO L226 Difference]: Without dead ends: 1259 [2019-01-12 15:36:49,114 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:49,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1259 states. [2019-01-12 15:36:49,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1259 to 838. [2019-01-12 15:36:49,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 838 states. [2019-01-12 15:36:49,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 838 states to 838 states and 1113 transitions. [2019-01-12 15:36:49,334 INFO L78 Accepts]: Start accepts. Automaton has 838 states and 1113 transitions. Word has length 73 [2019-01-12 15:36:49,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:49,335 INFO L480 AbstractCegarLoop]: Abstraction has 838 states and 1113 transitions. [2019-01-12 15:36:49,335 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:49,335 INFO L276 IsEmpty]: Start isEmpty. Operand 838 states and 1113 transitions. [2019-01-12 15:36:49,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-01-12 15:36:49,336 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:49,336 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:49,337 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:49,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:49,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1948644571, now seen corresponding path program 1 times [2019-01-12 15:36:49,337 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:49,337 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:49,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:49,338 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:49,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:49,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:49,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:49,501 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:49,501 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:49,501 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:49,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:49,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:49,502 INFO L87 Difference]: Start difference. First operand 838 states and 1113 transitions. Second operand 4 states. [2019-01-12 15:36:50,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:50,451 INFO L93 Difference]: Finished difference Result 1942 states and 2574 transitions. [2019-01-12 15:36:50,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:50,451 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 73 [2019-01-12 15:36:50,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:50,456 INFO L225 Difference]: With dead ends: 1942 [2019-01-12 15:36:50,456 INFO L226 Difference]: Without dead ends: 1393 [2019-01-12 15:36:50,458 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:50,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1393 states. [2019-01-12 15:36:50,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1393 to 1120. [2019-01-12 15:36:50,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1120 states. [2019-01-12 15:36:50,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1120 states to 1120 states and 1477 transitions. [2019-01-12 15:36:50,588 INFO L78 Accepts]: Start accepts. Automaton has 1120 states and 1477 transitions. Word has length 73 [2019-01-12 15:36:50,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:50,588 INFO L480 AbstractCegarLoop]: Abstraction has 1120 states and 1477 transitions. [2019-01-12 15:36:50,588 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:50,588 INFO L276 IsEmpty]: Start isEmpty. Operand 1120 states and 1477 transitions. [2019-01-12 15:36:50,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-01-12 15:36:50,589 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:50,590 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:50,590 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:50,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:50,591 INFO L82 PathProgramCache]: Analyzing trace with hash 1795806066, now seen corresponding path program 1 times [2019-01-12 15:36:50,591 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:50,591 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:50,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:50,592 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:50,592 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:50,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:50,666 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:50,666 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:50,666 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:50,666 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:50,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:50,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:50,667 INFO L87 Difference]: Start difference. First operand 1120 states and 1477 transitions. Second operand 3 states. [2019-01-12 15:36:51,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:51,413 INFO L93 Difference]: Finished difference Result 2761 states and 3631 transitions. [2019-01-12 15:36:51,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:51,414 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2019-01-12 15:36:51,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:51,423 INFO L225 Difference]: With dead ends: 2761 [2019-01-12 15:36:51,423 INFO L226 Difference]: Without dead ends: 1874 [2019-01-12 15:36:51,425 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:51,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1874 states. [2019-01-12 15:36:51,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1874 to 1122. [2019-01-12 15:36:51,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1122 states. [2019-01-12 15:36:51,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1122 states to 1122 states and 1479 transitions. [2019-01-12 15:36:51,747 INFO L78 Accepts]: Start accepts. Automaton has 1122 states and 1479 transitions. Word has length 74 [2019-01-12 15:36:51,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:51,747 INFO L480 AbstractCegarLoop]: Abstraction has 1122 states and 1479 transitions. [2019-01-12 15:36:51,747 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:51,747 INFO L276 IsEmpty]: Start isEmpty. Operand 1122 states and 1479 transitions. [2019-01-12 15:36:51,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-01-12 15:36:51,749 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:51,749 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:51,749 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:51,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:51,750 INFO L82 PathProgramCache]: Analyzing trace with hash 230569326, now seen corresponding path program 1 times [2019-01-12 15:36:51,750 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:51,750 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:51,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:51,751 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:51,751 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:51,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:52,193 WARN L181 SmtUtils]: Spent 253.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 5 [2019-01-12 15:36:52,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:52,211 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:52,211 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:52,211 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:52,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:52,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:52,212 INFO L87 Difference]: Start difference. First operand 1122 states and 1479 transitions. Second operand 4 states. [2019-01-12 15:36:52,504 WARN L181 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 8 [2019-01-12 15:36:53,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:53,151 INFO L93 Difference]: Finished difference Result 2434 states and 3205 transitions. [2019-01-12 15:36:53,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:53,152 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-01-12 15:36:53,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:53,157 INFO L225 Difference]: With dead ends: 2434 [2019-01-12 15:36:53,157 INFO L226 Difference]: Without dead ends: 1457 [2019-01-12 15:36:53,158 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:53,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1457 states. [2019-01-12 15:36:53,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1457 to 1120. [2019-01-12 15:36:53,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1120 states. [2019-01-12 15:36:53,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1120 states to 1120 states and 1473 transitions. [2019-01-12 15:36:53,285 INFO L78 Accepts]: Start accepts. Automaton has 1120 states and 1473 transitions. Word has length 75 [2019-01-12 15:36:53,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:53,286 INFO L480 AbstractCegarLoop]: Abstraction has 1120 states and 1473 transitions. [2019-01-12 15:36:53,286 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:53,286 INFO L276 IsEmpty]: Start isEmpty. Operand 1120 states and 1473 transitions. [2019-01-12 15:36:53,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-01-12 15:36:53,287 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:53,288 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:53,288 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:53,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:53,289 INFO L82 PathProgramCache]: Analyzing trace with hash -432015466, now seen corresponding path program 1 times [2019-01-12 15:36:53,291 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:53,291 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:53,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:53,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:53,293 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:53,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:53,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:53,435 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:53,435 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:53,435 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:53,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:53,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:53,436 INFO L87 Difference]: Start difference. First operand 1120 states and 1473 transitions. Second operand 4 states. [2019-01-12 15:36:53,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:53,941 INFO L93 Difference]: Finished difference Result 2413 states and 3169 transitions. [2019-01-12 15:36:53,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:53,941 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-01-12 15:36:53,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:53,946 INFO L225 Difference]: With dead ends: 2413 [2019-01-12 15:36:53,946 INFO L226 Difference]: Without dead ends: 1536 [2019-01-12 15:36:53,947 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:53,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1536 states. [2019-01-12 15:36:54,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1536 to 1033. [2019-01-12 15:36:54,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1033 states. [2019-01-12 15:36:54,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1033 states to 1033 states and 1356 transitions. [2019-01-12 15:36:54,075 INFO L78 Accepts]: Start accepts. Automaton has 1033 states and 1356 transitions. Word has length 75 [2019-01-12 15:36:54,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:54,075 INFO L480 AbstractCegarLoop]: Abstraction has 1033 states and 1356 transitions. [2019-01-12 15:36:54,075 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:54,075 INFO L276 IsEmpty]: Start isEmpty. Operand 1033 states and 1356 transitions. [2019-01-12 15:36:54,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-01-12 15:36:54,076 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:54,076 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:54,077 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:54,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:54,077 INFO L82 PathProgramCache]: Analyzing trace with hash -1691843444, now seen corresponding path program 1 times [2019-01-12 15:36:54,077 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:54,077 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:54,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:54,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:54,078 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:54,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:54,242 WARN L181 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 9 DAG size of output: 4 [2019-01-12 15:36:54,440 WARN L181 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 19 DAG size of output: 15 [2019-01-12 15:36:54,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:54,443 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:54,443 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:54,444 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:54,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:54,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:54,444 INFO L87 Difference]: Start difference. First operand 1033 states and 1356 transitions. Second operand 4 states. [2019-01-12 15:36:54,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:54,806 INFO L93 Difference]: Finished difference Result 2258 states and 2949 transitions. [2019-01-12 15:36:54,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:36:54,807 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-01-12 15:36:54,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:54,812 INFO L225 Difference]: With dead ends: 2258 [2019-01-12 15:36:54,812 INFO L226 Difference]: Without dead ends: 1367 [2019-01-12 15:36:54,813 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:54,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1367 states. [2019-01-12 15:36:54,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1367 to 934. [2019-01-12 15:36:54,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 934 states. [2019-01-12 15:36:54,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 934 states to 934 states and 1220 transitions. [2019-01-12 15:36:54,949 INFO L78 Accepts]: Start accepts. Automaton has 934 states and 1220 transitions. Word has length 75 [2019-01-12 15:36:54,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:54,949 INFO L480 AbstractCegarLoop]: Abstraction has 934 states and 1220 transitions. [2019-01-12 15:36:54,949 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:54,949 INFO L276 IsEmpty]: Start isEmpty. Operand 934 states and 1220 transitions. [2019-01-12 15:36:54,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-01-12 15:36:54,950 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:54,950 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:54,950 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:54,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:54,951 INFO L82 PathProgramCache]: Analyzing trace with hash -818028433, now seen corresponding path program 1 times [2019-01-12 15:36:54,951 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:54,951 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:54,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:54,952 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:54,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:54,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:55,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:55,228 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:55,228 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:55,228 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:55,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:55,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:55,229 INFO L87 Difference]: Start difference. First operand 934 states and 1220 transitions. Second operand 4 states. [2019-01-12 15:36:55,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:55,623 INFO L93 Difference]: Finished difference Result 2349 states and 3086 transitions. [2019-01-12 15:36:55,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:55,624 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2019-01-12 15:36:55,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:55,631 INFO L225 Difference]: With dead ends: 2349 [2019-01-12 15:36:55,631 INFO L226 Difference]: Without dead ends: 1532 [2019-01-12 15:36:55,632 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:55,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1532 states. [2019-01-12 15:36:55,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1532 to 936. [2019-01-12 15:36:55,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 936 states. [2019-01-12 15:36:55,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 936 states to 936 states and 1216 transitions. [2019-01-12 15:36:55,768 INFO L78 Accepts]: Start accepts. Automaton has 936 states and 1216 transitions. Word has length 76 [2019-01-12 15:36:55,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:55,768 INFO L480 AbstractCegarLoop]: Abstraction has 936 states and 1216 transitions. [2019-01-12 15:36:55,768 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:55,768 INFO L276 IsEmpty]: Start isEmpty. Operand 936 states and 1216 transitions. [2019-01-12 15:36:55,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-01-12 15:36:55,769 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:55,769 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:55,770 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:55,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:55,770 INFO L82 PathProgramCache]: Analyzing trace with hash 1367704469, now seen corresponding path program 1 times [2019-01-12 15:36:55,770 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:55,770 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:55,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:55,771 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:55,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:55,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:55,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:55,928 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:55,929 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:55,929 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:55,929 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:55,929 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:55,929 INFO L87 Difference]: Start difference. First operand 936 states and 1216 transitions. Second operand 4 states. [2019-01-12 15:36:56,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:56,406 INFO L93 Difference]: Finished difference Result 2588 states and 3377 transitions. [2019-01-12 15:36:56,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:36:56,407 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-01-12 15:36:56,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:56,415 INFO L225 Difference]: With dead ends: 2588 [2019-01-12 15:36:56,415 INFO L226 Difference]: Without dead ends: 1769 [2019-01-12 15:36:56,417 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:56,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1769 states. [2019-01-12 15:36:56,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1769 to 884. [2019-01-12 15:36:56,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 884 states. [2019-01-12 15:36:56,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 884 states to 884 states and 1144 transitions. [2019-01-12 15:36:56,579 INFO L78 Accepts]: Start accepts. Automaton has 884 states and 1144 transitions. Word has length 77 [2019-01-12 15:36:56,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:56,580 INFO L480 AbstractCegarLoop]: Abstraction has 884 states and 1144 transitions. [2019-01-12 15:36:56,580 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:56,580 INFO L276 IsEmpty]: Start isEmpty. Operand 884 states and 1144 transitions. [2019-01-12 15:36:56,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-01-12 15:36:56,581 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:56,581 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:56,582 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:56,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:56,582 INFO L82 PathProgramCache]: Analyzing trace with hash -1497253600, now seen corresponding path program 1 times [2019-01-12 15:36:56,582 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:56,582 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:56,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:56,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:56,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:56,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:56,780 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:56,780 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:56,781 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:56,781 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:56,781 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:56,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:56,782 INFO L87 Difference]: Start difference. First operand 884 states and 1144 transitions. Second operand 3 states. [2019-01-12 15:36:57,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:57,094 INFO L93 Difference]: Finished difference Result 1605 states and 2097 transitions. [2019-01-12 15:36:57,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:57,095 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 77 [2019-01-12 15:36:57,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:57,099 INFO L225 Difference]: With dead ends: 1605 [2019-01-12 15:36:57,099 INFO L226 Difference]: Without dead ends: 880 [2019-01-12 15:36:57,100 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:57,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 880 states. [2019-01-12 15:36:57,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 880 to 880. [2019-01-12 15:36:57,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 880 states. [2019-01-12 15:36:57,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 880 states to 880 states and 1137 transitions. [2019-01-12 15:36:57,232 INFO L78 Accepts]: Start accepts. Automaton has 880 states and 1137 transitions. Word has length 77 [2019-01-12 15:36:57,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:57,232 INFO L480 AbstractCegarLoop]: Abstraction has 880 states and 1137 transitions. [2019-01-12 15:36:57,232 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:57,232 INFO L276 IsEmpty]: Start isEmpty. Operand 880 states and 1137 transitions. [2019-01-12 15:36:57,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:36:57,233 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:57,233 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:57,233 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:57,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:57,234 INFO L82 PathProgramCache]: Analyzing trace with hash -156241120, now seen corresponding path program 1 times [2019-01-12 15:36:57,235 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:57,235 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:57,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:57,236 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:57,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:57,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:57,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:57,410 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:57,411 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:57,411 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:57,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:57,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:57,411 INFO L87 Difference]: Start difference. First operand 880 states and 1137 transitions. Second operand 3 states. [2019-01-12 15:36:57,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:57,614 INFO L93 Difference]: Finished difference Result 1597 states and 2083 transitions. [2019-01-12 15:36:57,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:57,614 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:36:57,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:57,616 INFO L225 Difference]: With dead ends: 1597 [2019-01-12 15:36:57,617 INFO L226 Difference]: Without dead ends: 876 [2019-01-12 15:36:57,619 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:57,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 876 states. [2019-01-12 15:36:57,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 876 to 876. [2019-01-12 15:36:57,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 876 states. [2019-01-12 15:36:57,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 876 states to 876 states and 1130 transitions. [2019-01-12 15:36:57,753 INFO L78 Accepts]: Start accepts. Automaton has 876 states and 1130 transitions. Word has length 85 [2019-01-12 15:36:57,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:57,753 INFO L480 AbstractCegarLoop]: Abstraction has 876 states and 1130 transitions. [2019-01-12 15:36:57,753 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:57,753 INFO L276 IsEmpty]: Start isEmpty. Operand 876 states and 1130 transitions. [2019-01-12 15:36:57,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-01-12 15:36:57,754 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:57,754 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:57,754 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:57,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:57,755 INFO L82 PathProgramCache]: Analyzing trace with hash 1185716640, now seen corresponding path program 1 times [2019-01-12 15:36:57,755 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:57,755 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:57,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:57,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:57,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:57,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:58,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:58,113 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:58,113 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:58,113 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:58,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:58,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:58,114 INFO L87 Difference]: Start difference. First operand 876 states and 1130 transitions. Second operand 6 states. [2019-01-12 15:36:58,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:58,555 INFO L93 Difference]: Finished difference Result 2093 states and 2798 transitions. [2019-01-12 15:36:58,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:36:58,556 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-01-12 15:36:58,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:58,559 INFO L225 Difference]: With dead ends: 2093 [2019-01-12 15:36:58,559 INFO L226 Difference]: Without dead ends: 1376 [2019-01-12 15:36:58,560 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-01-12 15:36:58,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2019-01-12 15:36:58,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 882. [2019-01-12 15:36:58,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 882 states. [2019-01-12 15:36:58,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 882 states to 882 states and 1136 transitions. [2019-01-12 15:36:58,697 INFO L78 Accepts]: Start accepts. Automaton has 882 states and 1136 transitions. Word has length 93 [2019-01-12 15:36:58,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:58,697 INFO L480 AbstractCegarLoop]: Abstraction has 882 states and 1136 transitions. [2019-01-12 15:36:58,697 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:58,697 INFO L276 IsEmpty]: Start isEmpty. Operand 882 states and 1136 transitions. [2019-01-12 15:36:58,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2019-01-12 15:36:58,699 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:58,700 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:58,700 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:58,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:58,700 INFO L82 PathProgramCache]: Analyzing trace with hash 231668988, now seen corresponding path program 1 times [2019-01-12 15:36:58,700 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:58,700 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:58,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:58,701 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:58,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:58,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:59,144 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:59,144 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:36:59,144 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:36:59,159 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:59,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:59,307 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:36:59,706 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-12 15:36:59,755 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:36:59,756 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-01-12 15:36:59,756 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-01-12 15:36:59,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-01-12 15:36:59,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-01-12 15:36:59,757 INFO L87 Difference]: Start difference. First operand 882 states and 1136 transitions. Second operand 16 states. [2019-01-12 15:37:01,230 WARN L181 SmtUtils]: Spent 226.00 ms on a formula simplification that was a NOOP. DAG size: 22 [2019-01-12 15:37:01,754 WARN L181 SmtUtils]: Spent 261.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2019-01-12 15:37:02,119 WARN L181 SmtUtils]: Spent 199.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2019-01-12 15:37:06,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:06,444 INFO L93 Difference]: Finished difference Result 3759 states and 4955 transitions. [2019-01-12 15:37:06,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2019-01-12 15:37:06,445 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 119 [2019-01-12 15:37:06,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:06,450 INFO L225 Difference]: With dead ends: 3759 [2019-01-12 15:37:06,450 INFO L226 Difference]: Without dead ends: 3022 [2019-01-12 15:37:06,454 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2633 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=1192, Invalid=6464, Unknown=0, NotChecked=0, Total=7656 [2019-01-12 15:37:06,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3022 states. [2019-01-12 15:37:06,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3022 to 1066. [2019-01-12 15:37:06,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1066 states. [2019-01-12 15:37:06,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1066 states to 1066 states and 1357 transitions. [2019-01-12 15:37:06,804 INFO L78 Accepts]: Start accepts. Automaton has 1066 states and 1357 transitions. Word has length 119 [2019-01-12 15:37:06,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:06,806 INFO L480 AbstractCegarLoop]: Abstraction has 1066 states and 1357 transitions. [2019-01-12 15:37:06,807 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-01-12 15:37:06,807 INFO L276 IsEmpty]: Start isEmpty. Operand 1066 states and 1357 transitions. [2019-01-12 15:37:06,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2019-01-12 15:37:06,812 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:06,812 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:06,813 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:06,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:06,813 INFO L82 PathProgramCache]: Analyzing trace with hash 357745823, now seen corresponding path program 1 times [2019-01-12 15:37:06,813 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:06,813 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:06,818 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:06,818 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:06,818 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:06,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:06,983 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2019-01-12 15:37:06,984 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:06,984 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:06,984 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:37:06,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:37:06,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:06,987 INFO L87 Difference]: Start difference. First operand 1066 states and 1357 transitions. Second operand 4 states. [2019-01-12 15:37:07,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:07,541 INFO L93 Difference]: Finished difference Result 2706 states and 3469 transitions. [2019-01-12 15:37:07,542 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:37:07,543 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 123 [2019-01-12 15:37:07,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:07,547 INFO L225 Difference]: With dead ends: 2706 [2019-01-12 15:37:07,548 INFO L226 Difference]: Without dead ends: 1753 [2019-01-12 15:37:07,549 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:07,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1753 states. [2019-01-12 15:37:07,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1753 to 1074. [2019-01-12 15:37:07,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1074 states. [2019-01-12 15:37:07,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1074 states to 1074 states and 1361 transitions. [2019-01-12 15:37:07,856 INFO L78 Accepts]: Start accepts. Automaton has 1074 states and 1361 transitions. Word has length 123 [2019-01-12 15:37:07,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:07,856 INFO L480 AbstractCegarLoop]: Abstraction has 1074 states and 1361 transitions. [2019-01-12 15:37:07,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:37:07,856 INFO L276 IsEmpty]: Start isEmpty. Operand 1074 states and 1361 transitions. [2019-01-12 15:37:07,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2019-01-12 15:37:07,862 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:07,862 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:07,864 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:07,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:07,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1689578651, now seen corresponding path program 1 times [2019-01-12 15:37:07,864 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:07,864 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:07,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:07,868 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:07,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:07,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:08,451 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 32 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:08,451 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:08,451 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:08,494 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:08,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:08,677 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:09,164 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2019-01-12 15:37:09,191 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:09,192 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 10 [2019-01-12 15:37:09,192 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-01-12 15:37:09,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-01-12 15:37:09,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-01-12 15:37:09,193 INFO L87 Difference]: Start difference. First operand 1074 states and 1361 transitions. Second operand 10 states. [2019-01-12 15:37:10,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:10,414 INFO L93 Difference]: Finished difference Result 2499 states and 3194 transitions. [2019-01-12 15:37:10,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:37:10,415 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 123 [2019-01-12 15:37:10,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:10,417 INFO L225 Difference]: With dead ends: 2499 [2019-01-12 15:37:10,418 INFO L226 Difference]: Without dead ends: 1477 [2019-01-12 15:37:10,419 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2019-01-12 15:37:10,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1477 states. [2019-01-12 15:37:10,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1477 to 991. [2019-01-12 15:37:10,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 991 states. [2019-01-12 15:37:10,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 991 states to 991 states and 1261 transitions. [2019-01-12 15:37:10,619 INFO L78 Accepts]: Start accepts. Automaton has 991 states and 1261 transitions. Word has length 123 [2019-01-12 15:37:10,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:10,619 INFO L480 AbstractCegarLoop]: Abstraction has 991 states and 1261 transitions. [2019-01-12 15:37:10,620 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-01-12 15:37:10,623 INFO L276 IsEmpty]: Start isEmpty. Operand 991 states and 1261 transitions. [2019-01-12 15:37:10,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2019-01-12 15:37:10,625 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:10,626 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:10,626 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:10,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:10,626 INFO L82 PathProgramCache]: Analyzing trace with hash 1439056912, now seen corresponding path program 1 times [2019-01-12 15:37:10,626 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:10,626 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:10,631 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:10,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:10,632 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:10,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:10,870 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:10,870 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:10,870 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-01-12 15:37:10,871 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-01-12 15:37:10,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-01-12 15:37:10,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-01-12 15:37:10,871 INFO L87 Difference]: Start difference. First operand 991 states and 1261 transitions. Second operand 11 states. [2019-01-12 15:37:11,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:11,870 INFO L93 Difference]: Finished difference Result 2765 states and 3516 transitions. [2019-01-12 15:37:11,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-01-12 15:37:11,871 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 124 [2019-01-12 15:37:11,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:11,876 INFO L225 Difference]: With dead ends: 2765 [2019-01-12 15:37:11,877 INFO L226 Difference]: Without dead ends: 1959 [2019-01-12 15:37:11,878 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=163, Invalid=539, Unknown=0, NotChecked=0, Total=702 [2019-01-12 15:37:11,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1959 states. [2019-01-12 15:37:12,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1959 to 1108. [2019-01-12 15:37:12,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1108 states. [2019-01-12 15:37:12,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1108 states to 1108 states and 1404 transitions. [2019-01-12 15:37:12,253 INFO L78 Accepts]: Start accepts. Automaton has 1108 states and 1404 transitions. Word has length 124 [2019-01-12 15:37:12,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:12,253 INFO L480 AbstractCegarLoop]: Abstraction has 1108 states and 1404 transitions. [2019-01-12 15:37:12,253 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-01-12 15:37:12,253 INFO L276 IsEmpty]: Start isEmpty. Operand 1108 states and 1404 transitions. [2019-01-12 15:37:12,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2019-01-12 15:37:12,259 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:12,259 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:12,259 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:12,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:12,260 INFO L82 PathProgramCache]: Analyzing trace with hash 1410556622, now seen corresponding path program 1 times [2019-01-12 15:37:12,260 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:12,260 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:12,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:12,261 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:12,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:12,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:12,417 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-01-12 15:37:12,418 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:12,418 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:12,418 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:37:12,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:37:12,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:12,419 INFO L87 Difference]: Start difference. First operand 1108 states and 1404 transitions. Second operand 4 states. [2019-01-12 15:37:13,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:13,530 INFO L93 Difference]: Finished difference Result 2632 states and 3356 transitions. [2019-01-12 15:37:13,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:37:13,530 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2019-01-12 15:37:13,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:13,534 INFO L225 Difference]: With dead ends: 2632 [2019-01-12 15:37:13,534 INFO L226 Difference]: Without dead ends: 1679 [2019-01-12 15:37:13,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:13,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1679 states. [2019-01-12 15:37:13,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1679 to 1140. [2019-01-12 15:37:13,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1140 states. [2019-01-12 15:37:13,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1140 states to 1140 states and 1432 transitions. [2019-01-12 15:37:13,796 INFO L78 Accepts]: Start accepts. Automaton has 1140 states and 1432 transitions. Word has length 124 [2019-01-12 15:37:13,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:13,796 INFO L480 AbstractCegarLoop]: Abstraction has 1140 states and 1432 transitions. [2019-01-12 15:37:13,796 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:37:13,796 INFO L276 IsEmpty]: Start isEmpty. Operand 1140 states and 1432 transitions. [2019-01-12 15:37:13,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2019-01-12 15:37:13,798 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:13,798 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:13,799 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:13,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:13,799 INFO L82 PathProgramCache]: Analyzing trace with hash -2002041142, now seen corresponding path program 1 times [2019-01-12 15:37:13,799 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:13,799 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:13,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:13,800 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:13,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:13,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:14,069 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-01-12 15:37:14,070 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:14,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:14,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:37:14,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:37:14,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:14,071 INFO L87 Difference]: Start difference. First operand 1140 states and 1432 transitions. Second operand 5 states. [2019-01-12 15:37:15,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:15,394 INFO L93 Difference]: Finished difference Result 2024 states and 2568 transitions. [2019-01-12 15:37:15,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:37:15,395 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2019-01-12 15:37:15,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:15,397 INFO L225 Difference]: With dead ends: 2024 [2019-01-12 15:37:15,397 INFO L226 Difference]: Without dead ends: 1039 [2019-01-12 15:37:15,398 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:15,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1039 states. [2019-01-12 15:37:15,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1039 to 1039. [2019-01-12 15:37:15,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1039 states. [2019-01-12 15:37:15,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1039 states to 1039 states and 1308 transitions. [2019-01-12 15:37:15,601 INFO L78 Accepts]: Start accepts. Automaton has 1039 states and 1308 transitions. Word has length 124 [2019-01-12 15:37:15,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:15,602 INFO L480 AbstractCegarLoop]: Abstraction has 1039 states and 1308 transitions. [2019-01-12 15:37:15,602 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:37:15,602 INFO L276 IsEmpty]: Start isEmpty. Operand 1039 states and 1308 transitions. [2019-01-12 15:37:15,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2019-01-12 15:37:15,604 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:15,605 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:15,605 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:15,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:15,605 INFO L82 PathProgramCache]: Analyzing trace with hash 9226426, now seen corresponding path program 1 times [2019-01-12 15:37:15,605 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:15,606 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:15,606 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:15,607 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:15,607 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:15,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:16,120 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 19 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:16,120 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:16,121 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:16,132 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:16,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:16,255 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:16,353 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-12 15:37:16,372 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:16,372 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-01-12 15:37:16,372 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-01-12 15:37:16,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-01-12 15:37:16,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-01-12 15:37:16,373 INFO L87 Difference]: Start difference. First operand 1039 states and 1308 transitions. Second operand 16 states. [2019-01-12 15:37:21,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:21,850 INFO L93 Difference]: Finished difference Result 4405 states and 5640 transitions. [2019-01-12 15:37:21,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2019-01-12 15:37:21,852 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 124 [2019-01-12 15:37:21,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:21,855 INFO L225 Difference]: With dead ends: 4405 [2019-01-12 15:37:21,856 INFO L226 Difference]: Without dead ends: 3524 [2019-01-12 15:37:21,859 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2980 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1258, Invalid=7114, Unknown=0, NotChecked=0, Total=8372 [2019-01-12 15:37:21,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3524 states. [2019-01-12 15:37:22,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3524 to 1176. [2019-01-12 15:37:22,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1176 states. [2019-01-12 15:37:22,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1176 states to 1176 states and 1473 transitions. [2019-01-12 15:37:22,157 INFO L78 Accepts]: Start accepts. Automaton has 1176 states and 1473 transitions. Word has length 124 [2019-01-12 15:37:22,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:22,157 INFO L480 AbstractCegarLoop]: Abstraction has 1176 states and 1473 transitions. [2019-01-12 15:37:22,157 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-01-12 15:37:22,158 INFO L276 IsEmpty]: Start isEmpty. Operand 1176 states and 1473 transitions. [2019-01-12 15:37:22,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-01-12 15:37:22,163 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:22,163 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:22,163 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:22,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:22,164 INFO L82 PathProgramCache]: Analyzing trace with hash -569114610, now seen corresponding path program 1 times [2019-01-12 15:37:22,164 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:22,164 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:22,165 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:22,165 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:22,165 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:22,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:22,428 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 15 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:22,428 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:22,428 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:22,472 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:22,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:22,588 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:22,754 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-01-12 15:37:22,773 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:22,773 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 13 [2019-01-12 15:37:22,773 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-01-12 15:37:22,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-01-12 15:37:22,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2019-01-12 15:37:22,774 INFO L87 Difference]: Start difference. First operand 1176 states and 1473 transitions. Second operand 13 states. [2019-01-12 15:37:26,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:26,806 INFO L93 Difference]: Finished difference Result 5856 states and 7506 transitions. [2019-01-12 15:37:26,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-01-12 15:37:26,807 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 127 [2019-01-12 15:37:26,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:26,811 INFO L225 Difference]: With dead ends: 5856 [2019-01-12 15:37:26,811 INFO L226 Difference]: Without dead ends: 4880 [2019-01-12 15:37:26,813 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1377 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=831, Invalid=3329, Unknown=0, NotChecked=0, Total=4160 [2019-01-12 15:37:26,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4880 states. [2019-01-12 15:37:27,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4880 to 1509. [2019-01-12 15:37:27,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1509 states. [2019-01-12 15:37:27,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1509 states to 1509 states and 1893 transitions. [2019-01-12 15:37:27,161 INFO L78 Accepts]: Start accepts. Automaton has 1509 states and 1893 transitions. Word has length 127 [2019-01-12 15:37:27,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:27,162 INFO L480 AbstractCegarLoop]: Abstraction has 1509 states and 1893 transitions. [2019-01-12 15:37:27,162 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-01-12 15:37:27,162 INFO L276 IsEmpty]: Start isEmpty. Operand 1509 states and 1893 transitions. [2019-01-12 15:37:27,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2019-01-12 15:37:27,167 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:27,167 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:27,168 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:27,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:27,168 INFO L82 PathProgramCache]: Analyzing trace with hash 545844292, now seen corresponding path program 1 times [2019-01-12 15:37:27,168 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:27,168 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:27,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:27,171 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:27,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:27,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:27,734 WARN L181 SmtUtils]: Spent 300.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 5 [2019-01-12 15:37:27,807 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 32 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:27,807 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:27,807 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:27,819 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:27,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:27,932 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:28,031 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-12 15:37:28,062 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:28,062 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2019-01-12 15:37:28,063 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-01-12 15:37:28,063 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-01-12 15:37:28,063 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=182, Unknown=0, NotChecked=0, Total=210 [2019-01-12 15:37:28,063 INFO L87 Difference]: Start difference. First operand 1509 states and 1893 transitions. Second operand 15 states. [2019-01-12 15:37:29,764 WARN L181 SmtUtils]: Spent 211.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2019-01-12 15:37:32,735 WARN L181 SmtUtils]: Spent 107.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2019-01-12 15:37:35,363 WARN L181 SmtUtils]: Spent 104.00 ms on a formula simplification that was a NOOP. DAG size: 28 [2019-01-12 15:37:36,904 WARN L181 SmtUtils]: Spent 159.00 ms on a formula simplification that was a NOOP. DAG size: 23 [2019-01-12 15:37:37,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:37,972 INFO L93 Difference]: Finished difference Result 7133 states and 9086 transitions. [2019-01-12 15:37:37,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 109 states. [2019-01-12 15:37:37,973 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 132 [2019-01-12 15:37:37,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:37,979 INFO L225 Difference]: With dead ends: 7133 [2019-01-12 15:37:37,979 INFO L226 Difference]: Without dead ends: 5789 [2019-01-12 15:37:37,985 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 298 GetRequests, 179 SyntacticMatches, 0 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4734 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=2569, Invalid=11951, Unknown=0, NotChecked=0, Total=14520 [2019-01-12 15:37:37,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5789 states. [2019-01-12 15:37:38,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5789 to 1512. [2019-01-12 15:37:38,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1512 states. [2019-01-12 15:37:38,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1512 states to 1512 states and 1883 transitions. [2019-01-12 15:37:38,601 INFO L78 Accepts]: Start accepts. Automaton has 1512 states and 1883 transitions. Word has length 132 [2019-01-12 15:37:38,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:38,602 INFO L480 AbstractCegarLoop]: Abstraction has 1512 states and 1883 transitions. [2019-01-12 15:37:38,602 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-01-12 15:37:38,602 INFO L276 IsEmpty]: Start isEmpty. Operand 1512 states and 1883 transitions. [2019-01-12 15:37:38,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2019-01-12 15:37:38,607 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:38,607 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:38,607 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:38,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:38,608 INFO L82 PathProgramCache]: Analyzing trace with hash -321860052, now seen corresponding path program 1 times [2019-01-12 15:37:38,608 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:38,608 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:38,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:38,614 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:38,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:38,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:38,822 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-01-12 15:37:38,823 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:38,823 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:37:38,823 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:37:38,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:37:38,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:37:38,824 INFO L87 Difference]: Start difference. First operand 1512 states and 1883 transitions. Second operand 6 states. [2019-01-12 15:37:41,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:41,001 INFO L93 Difference]: Finished difference Result 7783 states and 9895 transitions. [2019-01-12 15:37:41,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-01-12 15:37:41,003 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 132 [2019-01-12 15:37:41,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:41,009 INFO L225 Difference]: With dead ends: 7783 [2019-01-12 15:37:41,010 INFO L226 Difference]: Without dead ends: 6511 [2019-01-12 15:37:41,014 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-01-12 15:37:41,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6511 states. [2019-01-12 15:37:41,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6511 to 1919. [2019-01-12 15:37:41,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1919 states. [2019-01-12 15:37:41,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1919 states to 1919 states and 2358 transitions. [2019-01-12 15:37:41,596 INFO L78 Accepts]: Start accepts. Automaton has 1919 states and 2358 transitions. Word has length 132 [2019-01-12 15:37:41,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:41,596 INFO L480 AbstractCegarLoop]: Abstraction has 1919 states and 2358 transitions. [2019-01-12 15:37:41,597 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:37:41,597 INFO L276 IsEmpty]: Start isEmpty. Operand 1919 states and 2358 transitions. [2019-01-12 15:37:41,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2019-01-12 15:37:41,599 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:41,600 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:41,600 INFO L423 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:41,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:41,600 INFO L82 PathProgramCache]: Analyzing trace with hash 132149542, now seen corresponding path program 1 times [2019-01-12 15:37:41,600 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:41,600 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:41,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:41,601 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:41,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:41,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:42,153 WARN L181 SmtUtils]: Spent 230.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 10 [2019-01-12 15:37:42,368 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:42,368 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:42,368 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:42,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:42,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:42,500 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:43,043 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 23 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:43,061 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-12 15:37:43,061 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 19 [2019-01-12 15:37:43,062 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-01-12 15:37:43,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-01-12 15:37:43,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=317, Unknown=0, NotChecked=0, Total=380 [2019-01-12 15:37:43,063 INFO L87 Difference]: Start difference. First operand 1919 states and 2358 transitions. Second operand 20 states. [2019-01-12 15:37:45,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:45,453 INFO L93 Difference]: Finished difference Result 4461 states and 5535 transitions. [2019-01-12 15:37:45,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-01-12 15:37:45,454 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 133 [2019-01-12 15:37:45,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:45,458 INFO L225 Difference]: With dead ends: 4461 [2019-01-12 15:37:45,458 INFO L226 Difference]: Without dead ends: 2782 [2019-01-12 15:37:45,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 120 SyntacticMatches, 4 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 274 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=276, Invalid=1130, Unknown=0, NotChecked=0, Total=1406 [2019-01-12 15:37:45,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2782 states. [2019-01-12 15:37:46,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2782 to 1985. [2019-01-12 15:37:46,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1985 states. [2019-01-12 15:37:46,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2442 transitions. [2019-01-12 15:37:46,030 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2442 transitions. Word has length 133 [2019-01-12 15:37:46,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:46,031 INFO L480 AbstractCegarLoop]: Abstraction has 1985 states and 2442 transitions. [2019-01-12 15:37:46,031 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-01-12 15:37:46,031 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2442 transitions. [2019-01-12 15:37:46,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-01-12 15:37:46,034 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:46,034 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:46,034 INFO L423 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:46,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:46,034 INFO L82 PathProgramCache]: Analyzing trace with hash -1714435691, now seen corresponding path program 1 times [2019-01-12 15:37:46,035 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:46,035 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:46,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:46,036 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:46,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:46,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:46,372 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 28 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:46,372 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:46,372 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:46,387 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:46,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:46,504 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:46,781 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 28 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:46,799 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-12 15:37:46,800 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 20 [2019-01-12 15:37:46,800 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-01-12 15:37:46,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-01-12 15:37:46,801 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2019-01-12 15:37:46,801 INFO L87 Difference]: Start difference. First operand 1985 states and 2442 transitions. Second operand 21 states. [2019-01-12 15:37:50,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:50,728 INFO L93 Difference]: Finished difference Result 5546 states and 6814 transitions. [2019-01-12 15:37:50,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-01-12 15:37:50,730 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 134 [2019-01-12 15:37:50,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:50,736 INFO L225 Difference]: With dead ends: 5546 [2019-01-12 15:37:50,736 INFO L226 Difference]: Without dead ends: 3801 [2019-01-12 15:37:50,740 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 120 SyntacticMatches, 4 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 995 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=649, Invalid=3133, Unknown=0, NotChecked=0, Total=3782 [2019-01-12 15:37:50,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3801 states. [2019-01-12 15:37:51,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3801 to 2202. [2019-01-12 15:37:51,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2202 states. [2019-01-12 15:37:51,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2202 states to 2202 states and 2698 transitions. [2019-01-12 15:37:51,364 INFO L78 Accepts]: Start accepts. Automaton has 2202 states and 2698 transitions. Word has length 134 [2019-01-12 15:37:51,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:51,364 INFO L480 AbstractCegarLoop]: Abstraction has 2202 states and 2698 transitions. [2019-01-12 15:37:51,365 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-01-12 15:37:51,365 INFO L276 IsEmpty]: Start isEmpty. Operand 2202 states and 2698 transitions. [2019-01-12 15:37:51,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2019-01-12 15:37:51,368 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:51,368 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:51,368 INFO L423 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:51,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:51,368 INFO L82 PathProgramCache]: Analyzing trace with hash 1273389207, now seen corresponding path program 1 times [2019-01-12 15:37:51,369 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:51,369 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:51,370 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:51,370 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:51,370 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:51,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:51,452 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2019-01-12 15:37:51,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:51,453 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:51,453 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:37:51,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:37:51,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:51,454 INFO L87 Difference]: Start difference. First operand 2202 states and 2698 transitions. Second operand 4 states. [2019-01-12 15:37:52,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:52,026 INFO L93 Difference]: Finished difference Result 3814 states and 4717 transitions. [2019-01-12 15:37:52,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:37:52,027 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 134 [2019-01-12 15:37:52,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:52,030 INFO L225 Difference]: With dead ends: 3814 [2019-01-12 15:37:52,030 INFO L226 Difference]: Without dead ends: 1797 [2019-01-12 15:37:52,032 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:52,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1797 states. [2019-01-12 15:37:52,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1797 to 1797. [2019-01-12 15:37:52,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1797 states. [2019-01-12 15:37:52,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1797 states to 1797 states and 2200 transitions. [2019-01-12 15:37:52,529 INFO L78 Accepts]: Start accepts. Automaton has 1797 states and 2200 transitions. Word has length 134 [2019-01-12 15:37:52,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:52,529 INFO L480 AbstractCegarLoop]: Abstraction has 1797 states and 2200 transitions. [2019-01-12 15:37:52,529 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:37:52,529 INFO L276 IsEmpty]: Start isEmpty. Operand 1797 states and 2200 transitions. [2019-01-12 15:37:52,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-01-12 15:37:52,531 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:52,531 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:52,532 INFO L423 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:52,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:52,532 INFO L82 PathProgramCache]: Analyzing trace with hash 1769777121, now seen corresponding path program 1 times [2019-01-12 15:37:52,532 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:52,532 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:52,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:52,533 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:52,533 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:52,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-12 15:37:52,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-12 15:37:52,682 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2019-01-12 15:37:52,947 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.01 03:37:52 BoogieIcfgContainer [2019-01-12 15:37:52,947 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-01-12 15:37:52,947 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-01-12 15:37:52,947 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-01-12 15:37:52,948 INFO L276 PluginConnector]: Witness Printer initialized [2019-01-12 15:37:52,948 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:36:32" (3/4) ... [2019-01-12 15:37:52,954 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2019-01-12 15:37:53,194 INFO L145 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-01-12 15:37:53,195 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-01-12 15:37:53,196 INFO L168 Benchmark]: Toolchain (without parser) took 83701.96 ms. Allocated memory was 1.0 GB in the beginning and 2.2 GB in the end (delta: 1.2 GB). Free memory was 952.7 MB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 48.5 MB. Max. memory is 11.5 GB. [2019-01-12 15:37:53,196 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-01-12 15:37:53,197 INFO L168 Benchmark]: CACSL2BoogieTranslator took 559.18 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.6 MB). Free memory was 952.7 MB in the beginning and 1.1 GB in the end (delta: -177.2 MB). Peak memory consumption was 36.9 MB. Max. memory is 11.5 GB. [2019-01-12 15:37:53,197 INFO L168 Benchmark]: Boogie Procedure Inliner took 88.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.7 MB). Peak memory consumption was 1.7 MB. Max. memory is 11.5 GB. [2019-01-12 15:37:53,197 INFO L168 Benchmark]: Boogie Preprocessor took 64.14 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 13.6 MB). Peak memory consumption was 13.6 MB. Max. memory is 11.5 GB. [2019-01-12 15:37:53,198 INFO L168 Benchmark]: RCFGBuilder took 2103.61 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 80.4 MB). Peak memory consumption was 80.4 MB. Max. memory is 11.5 GB. [2019-01-12 15:37:53,202 INFO L168 Benchmark]: TraceAbstraction took 80632.98 ms. Allocated memory was 1.2 GB in the beginning and 2.2 GB in the end (delta: 1.0 GB). Free memory was 1.0 GB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. [2019-01-12 15:37:53,202 INFO L168 Benchmark]: Witness Printer took 247.51 ms. Allocated memory is still 2.2 GB. Free memory was 2.1 GB in the beginning and 2.1 GB in the end (delta: 53.9 MB). Peak memory consumption was 53.9 MB. Max. memory is 11.5 GB. [2019-01-12 15:37:53,207 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 559.18 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 142.6 MB). Free memory was 952.7 MB in the beginning and 1.1 GB in the end (delta: -177.2 MB). Peak memory consumption was 36.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 88.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.7 MB). Peak memory consumption was 1.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 64.14 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 13.6 MB). Peak memory consumption was 13.6 MB. Max. memory is 11.5 GB. * RCFGBuilder took 2103.61 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 80.4 MB). Peak memory consumption was 80.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 80632.98 ms. Allocated memory was 1.2 GB in the beginning and 2.2 GB in the end (delta: 1.0 GB). Free memory was 1.0 GB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.2 GB. Max. memory is 11.5 GB. * Witness Printer took 247.51 ms. Allocated memory is still 2.2 GB. Free memory was 2.1 GB in the beginning and 2.1 GB in the end (delta: 53.9 MB). Peak memory consumption was 53.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 653]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L455] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L577] int c1 ; [L578] int i2 ; [L581] c1 = 0 [L582] side1Failed = __VERIFIER_nondet_bool() [L583] side2Failed = __VERIFIER_nondet_bool() [L584] side1_written = __VERIFIER_nondet_char() [L585] side2_written = __VERIFIER_nondet_char() [L586] side1Failed_History_0 = __VERIFIER_nondet_bool() [L587] side1Failed_History_1 = __VERIFIER_nondet_bool() [L588] side1Failed_History_2 = __VERIFIER_nondet_bool() [L589] side2Failed_History_0 = __VERIFIER_nondet_bool() [L590] side2Failed_History_1 = __VERIFIER_nondet_bool() [L591] side2Failed_History_2 = __VERIFIER_nondet_bool() [L592] active_side_History_0 = __VERIFIER_nondet_char() [L593] active_side_History_1 = __VERIFIER_nondet_char() [L594] active_side_History_2 = __VERIFIER_nondet_char() [L595] manual_selection_History_0 = __VERIFIER_nondet_char() [L596] manual_selection_History_1 = __VERIFIER_nondet_char() [L597] manual_selection_History_2 = __VERIFIER_nondet_char() [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] i2 = init() [L600] cs1_old = nomsg [L601] cs1_new = nomsg [L602] cs2_old = nomsg [L603] cs2_new = nomsg [L604] s1s2_old = nomsg [L605] s1s2_new = nomsg [L606] s1s1_old = nomsg [L607] s1s1_new = nomsg [L608] s2s1_old = nomsg [L609] s2s1_new = nomsg [L610] s2s2_old = nomsg [L611] s2s2_new = nomsg [L612] s1p_old = nomsg [L613] s1p_new = nomsg [L614] s2p_old = nomsg [L615] s2p_new = nomsg [L616] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L617] COND TRUE 1 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) [L449] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-4, cs1_old=-1, cs2=0, cs2_new=-4, cs2_old=-1, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L623] cs1_old = cs1_new [L624] cs1_new = nomsg [L625] cs2_old = cs2_new [L626] cs2_new = nomsg [L627] s1s2_old = s1s2_new [L628] s1s2_new = nomsg [L629] s1s1_old = s1s1_new [L630] s1s1_new = nomsg [L631] s2s1_old = s2s1_new [L632] s2s1_new = nomsg [L633] s2s2_old = s2s2_new [L634] s2s2_new = nomsg [L635] s1p_old = s1p_new [L636] s1p_new = nomsg [L637] s2p_old = s2p_new [L638] s2p_new = nomsg [L458] int tmp ; [L459] msg_t tmp___0 ; [L460] _Bool tmp___1 ; [L461] _Bool tmp___2 ; [L462] _Bool tmp___3 ; [L463] _Bool tmp___4 ; [L464] int8_t tmp___5 ; [L465] _Bool tmp___6 ; [L466] _Bool tmp___7 ; [L467] _Bool tmp___8 ; [L468] int8_t tmp___9 ; [L469] _Bool tmp___10 ; [L470] _Bool tmp___11 ; [L471] _Bool tmp___12 ; [L472] msg_t tmp___13 ; [L473] _Bool tmp___14 ; [L474] _Bool tmp___15 ; [L475] _Bool tmp___16 ; [L476] _Bool tmp___17 ; [L477] int8_t tmp___18 ; [L478] int8_t tmp___19 ; [L479] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L482] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L485] COND TRUE ! side2Failed [L486] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L491] tmp___0 = read_manual_selection_history((unsigned char)1) [L492] COND TRUE ! tmp___0 [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] tmp___1 = read_side1_failed_history((unsigned char)1) [L494] COND TRUE ! tmp___1 [L130] COND TRUE (int )index == 0 [L131] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L495] tmp___2 = read_side1_failed_history((unsigned char)0) [L496] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L521] tmp___7 = read_side1_failed_history((unsigned char)1) [L522] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] tmp___11 = read_side1_failed_history((unsigned char)1) [L538] COND TRUE ! tmp___11 [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L539] tmp___12 = read_side2_failed_history((unsigned char)1) [L540] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L553] tmp___20 = read_active_side_history((unsigned char)2) [L554] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L572] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L639] c1 = check() [L651] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-4, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L617] COND TRUE 1 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-4, cs2=0, cs2_new=-1, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-4, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-4, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND FALSE !(\read(side1Failed)) [L326] side1 = s1s1_old [L327] s1s1_old = nomsg [L328] side2 = s2s1_old [L329] s2s1_old = nomsg [L330] manual_selection = cs1_old [L331] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L332] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L335] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L336] COND TRUE (int )side2 != (int )nomsg [L337] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L356] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L356] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L357] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L357] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L358] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L358] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L359] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L377] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L377] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L378] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L378] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L379] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L379] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L380] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) [L449] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-1, cs2=0, cs2_new=-2, cs2_old=-4, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L623] cs1_old = cs1_new [L624] cs1_new = nomsg [L625] cs2_old = cs2_new [L626] cs2_new = nomsg [L627] s1s2_old = s1s2_new [L628] s1s2_new = nomsg [L629] s1s1_old = s1s1_new [L630] s1s1_new = nomsg [L631] s2s1_old = s2s1_new [L632] s2s1_new = nomsg [L633] s2s2_old = s2s2_new [L634] s2s2_new = nomsg [L635] s1p_old = s1p_new [L636] s1p_new = nomsg [L637] s2p_old = s2p_new [L638] s2p_new = nomsg [L458] int tmp ; [L459] msg_t tmp___0 ; [L460] _Bool tmp___1 ; [L461] _Bool tmp___2 ; [L462] _Bool tmp___3 ; [L463] _Bool tmp___4 ; [L464] int8_t tmp___5 ; [L465] _Bool tmp___6 ; [L466] _Bool tmp___7 ; [L467] _Bool tmp___8 ; [L468] int8_t tmp___9 ; [L469] _Bool tmp___10 ; [L470] _Bool tmp___11 ; [L471] _Bool tmp___12 ; [L472] msg_t tmp___13 ; [L473] _Bool tmp___14 ; [L474] _Bool tmp___15 ; [L475] _Bool tmp___16 ; [L476] _Bool tmp___17 ; [L477] int8_t tmp___18 ; [L478] int8_t tmp___19 ; [L479] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] COND TRUE ! side1Failed [L483] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L491] tmp___0 = read_manual_selection_history((unsigned char)1) [L492] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L521] tmp___7 = read_side1_failed_history((unsigned char)1) [L522] COND TRUE \read(tmp___7) [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L523] tmp___8 = read_side2_failed_history((unsigned char)1) [L524] COND TRUE ! tmp___8 [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L525] tmp___5 = read_active_side_history((unsigned char)0) [L526] COND TRUE ! ((int )tmp___5 == 2) [L527] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L639] c1 = check() [L651] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L653] __VERIFIER_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-4, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 290 locations, 23 error locations. UNSAFE Result, 80.5s OverallTime, 45 OverallIterations, 2 TraceHistogramMax, 55.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 19864 SDtfs, 37807 SDslu, 63686 SDs, 0 SdLazy, 14220 SolverSat, 609 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 21.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1666 GetRequests, 1012 SyntacticMatches, 24 SemanticMatches, 630 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13204 ImplicationChecksByTransitivity, 26.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2202occurred in iteration=43, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 8.0s AutomataMinimizationTime, 44 MinimizatonAttempts, 32766 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 1.4s SatisfiabilityAnalysisTime, 13.8s InterpolantComputationTime, 4770 NumberOfCodeBlocks, 4770 NumberOfCodeBlocksAsserted, 52 NumberOfCheckSat, 4584 ConstructedInterpolants, 0 QuantifiedInterpolants, 1577431 SizeOfPredicates, 36 NumberOfNonLiveVariables, 5236 ConjunctsInSsa, 128 ConjunctsInUnsatCore, 51 InterpolantComputations, 42 PerfectInterpolantSequences, 625/713 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...