./Ultimate.py --spec /storage/repos/svcomp/c/properties/unreach-call.prp --file /storage/repos/svcomp/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0ed9222f Calling Ultimate with: java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/svcomp/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 75de94c5f78b6878c3cbd09fac99b01e14f23f29 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-0ed9222-m [2019-01-12 15:36:30,292 INFO L170 SettingsManager]: Resetting all preferences to default values... [2019-01-12 15:36:30,293 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2019-01-12 15:36:30,305 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-01-12 15:36:30,305 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-01-12 15:36:30,306 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-01-12 15:36:30,308 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-01-12 15:36:30,310 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2019-01-12 15:36:30,311 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-01-12 15:36:30,312 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-01-12 15:36:30,313 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-01-12 15:36:30,313 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-01-12 15:36:30,314 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-01-12 15:36:30,315 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-01-12 15:36:30,316 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-01-12 15:36:30,317 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-01-12 15:36:30,318 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-01-12 15:36:30,320 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-01-12 15:36:30,322 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2019-01-12 15:36:30,323 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-01-12 15:36:30,325 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-01-12 15:36:30,326 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-01-12 15:36:30,331 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-01-12 15:36:30,332 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-01-12 15:36:30,332 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-01-12 15:36:30,333 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-01-12 15:36:30,334 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-01-12 15:36:30,338 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-01-12 15:36:30,340 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2019-01-12 15:36:30,343 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-01-12 15:36:30,343 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2019-01-12 15:36:30,344 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-01-12 15:36:30,344 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-01-12 15:36:30,344 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2019-01-12 15:36:30,346 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2019-01-12 15:36:30,346 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2019-01-12 15:36:30,347 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-01-12 15:36:30,368 INFO L110 SettingsManager]: Loading preferences was successful [2019-01-12 15:36:30,368 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2019-01-12 15:36:30,372 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-01-12 15:36:30,372 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2019-01-12 15:36:30,373 INFO L133 SettingsManager]: * Use SBE=true [2019-01-12 15:36:30,373 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-01-12 15:36:30,373 INFO L133 SettingsManager]: * sizeof long=4 [2019-01-12 15:36:30,373 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2019-01-12 15:36:30,373 INFO L133 SettingsManager]: * sizeof POINTER=4 [2019-01-12 15:36:30,374 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2019-01-12 15:36:30,374 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-01-12 15:36:30,374 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-01-12 15:36:30,374 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-01-12 15:36:30,374 INFO L133 SettingsManager]: * sizeof long double=12 [2019-01-12 15:36:30,374 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2019-01-12 15:36:30,375 INFO L133 SettingsManager]: * Use constant arrays=true [2019-01-12 15:36:30,377 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-01-12 15:36:30,378 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-01-12 15:36:30,378 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-01-12 15:36:30,378 INFO L133 SettingsManager]: * To the following directory=./dump/ [2019-01-12 15:36:30,378 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2019-01-12 15:36:30,378 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-12 15:36:30,378 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-01-12 15:36:30,379 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-01-12 15:36:30,379 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-01-12 15:36:30,379 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2019-01-12 15:36:30,379 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-01-12 15:36:30,379 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-01-12 15:36:30,379 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 75de94c5f78b6878c3cbd09fac99b01e14f23f29 [2019-01-12 15:36:30,429 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-01-12 15:36:30,447 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-01-12 15:36:30,451 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-01-12 15:36:30,453 INFO L271 PluginConnector]: Initializing CDTParser... [2019-01-12 15:36:30,453 INFO L276 PluginConnector]: CDTParser initialized [2019-01-12 15:36:30,455 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/svcomp/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2019-01-12 15:36:30,515 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13581c792/f86da9a69fa54bbab6b19db4ba86e67f/FLAG775d03d95 [2019-01-12 15:36:31,001 INFO L307 CDTParser]: Found 1 translation units. [2019-01-12 15:36:31,002 INFO L161 CDTParser]: Scanning /storage/repos/svcomp/c/seq-mthreaded/pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2019-01-12 15:36:31,014 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13581c792/f86da9a69fa54bbab6b19db4ba86e67f/FLAG775d03d95 [2019-01-12 15:36:31,304 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/13581c792/f86da9a69fa54bbab6b19db4ba86e67f [2019-01-12 15:36:31,308 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-01-12 15:36:31,309 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-01-12 15:36:31,310 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-01-12 15:36:31,311 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-01-12 15:36:31,314 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2019-01-12 15:36:31,315 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:31,318 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3b035c21 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31, skipping insertion in model container [2019-01-12 15:36:31,319 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:31,327 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-01-12 15:36:31,375 INFO L176 MainTranslator]: Built tables and reachable declarations [2019-01-12 15:36:31,703 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-12 15:36:31,716 INFO L191 MainTranslator]: Completed pre-run [2019-01-12 15:36:31,810 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-12 15:36:31,848 INFO L195 MainTranslator]: Completed translation [2019-01-12 15:36:31,848 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31 WrapperNode [2019-01-12 15:36:31,848 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-01-12 15:36:31,849 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-01-12 15:36:31,849 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-01-12 15:36:31,850 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2019-01-12 15:36:31,922 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:31,946 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:32,002 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-01-12 15:36:32,002 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-01-12 15:36:32,002 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-01-12 15:36:32,003 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2019-01-12 15:36:32,013 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:32,014 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:32,019 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:32,019 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:32,036 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:32,050 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:32,055 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... [2019-01-12 15:36:32,062 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-01-12 15:36:32,062 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-01-12 15:36:32,062 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-01-12 15:36:32,062 INFO L276 PluginConnector]: RCFGBuilder initialized [2019-01-12 15:36:32,063 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-12 15:36:32,133 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-01-12 15:36:32,133 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-01-12 15:36:34,232 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-01-12 15:36:34,233 INFO L286 CfgBuilder]: Removed 119 assue(true) statements. [2019-01-12 15:36:34,235 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:36:34 BoogieIcfgContainer [2019-01-12 15:36:34,235 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-01-12 15:36:34,236 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-01-12 15:36:34,236 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-01-12 15:36:34,239 INFO L276 PluginConnector]: TraceAbstraction initialized [2019-01-12 15:36:34,240 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.01 03:36:31" (1/3) ... [2019-01-12 15:36:34,240 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e782da9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.01 03:36:34, skipping insertion in model container [2019-01-12 15:36:34,241 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:36:31" (2/3) ... [2019-01-12 15:36:34,241 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e782da9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.01 03:36:34, skipping insertion in model container [2019-01-12 15:36:34,241 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:36:34" (3/3) ... [2019-01-12 15:36:34,243 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby_false-unreach-call.4_2.ufo.BOUNDED-10.pals.c [2019-01-12 15:36:34,252 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-01-12 15:36:34,259 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2019-01-12 15:36:34,274 INFO L257 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2019-01-12 15:36:34,309 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2019-01-12 15:36:34,310 INFO L382 AbstractCegarLoop]: Interprodecural is true [2019-01-12 15:36:34,310 INFO L383 AbstractCegarLoop]: Hoare is true [2019-01-12 15:36:34,310 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-01-12 15:36:34,310 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-01-12 15:36:34,310 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-01-12 15:36:34,311 INFO L387 AbstractCegarLoop]: Difference is false [2019-01-12 15:36:34,311 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-01-12 15:36:34,311 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-01-12 15:36:34,338 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states. [2019-01-12 15:36:34,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-01-12 15:36:34,346 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:34,347 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:34,351 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:34,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:34,357 INFO L82 PathProgramCache]: Analyzing trace with hash 211735483, now seen corresponding path program 1 times [2019-01-12 15:36:34,359 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:34,359 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:34,408 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:34,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:34,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:34,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:34,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:34,587 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:34,587 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:34,591 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:34,602 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:34,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:34,605 INFO L87 Difference]: Start difference. First operand 293 states. Second operand 3 states. [2019-01-12 15:36:34,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:34,907 INFO L93 Difference]: Finished difference Result 572 states and 892 transitions. [2019-01-12 15:36:34,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:34,912 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-01-12 15:36:34,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:34,929 INFO L225 Difference]: With dead ends: 572 [2019-01-12 15:36:34,930 INFO L226 Difference]: Without dead ends: 289 [2019-01-12 15:36:34,934 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:34,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2019-01-12 15:36:35,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 289. [2019-01-12 15:36:35,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2019-01-12 15:36:35,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 413 transitions. [2019-01-12 15:36:35,024 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 413 transitions. Word has length 31 [2019-01-12 15:36:35,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:35,024 INFO L480 AbstractCegarLoop]: Abstraction has 289 states and 413 transitions. [2019-01-12 15:36:35,024 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:35,025 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 413 transitions. [2019-01-12 15:36:35,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-01-12 15:36:35,028 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:35,028 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:35,030 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:35,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:35,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1187444686, now seen corresponding path program 1 times [2019-01-12 15:36:35,031 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:35,032 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:35,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:35,035 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:35,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:35,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:35,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:35,253 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:35,253 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:35,255 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:35,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:35,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:35,256 INFO L87 Difference]: Start difference. First operand 289 states and 413 transitions. Second operand 3 states. [2019-01-12 15:36:35,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:35,452 INFO L93 Difference]: Finished difference Result 597 states and 861 transitions. [2019-01-12 15:36:35,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:35,456 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-01-12 15:36:35,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:35,461 INFO L225 Difference]: With dead ends: 597 [2019-01-12 15:36:35,463 INFO L226 Difference]: Without dead ends: 323 [2019-01-12 15:36:35,468 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:35,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2019-01-12 15:36:35,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 265. [2019-01-12 15:36:35,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2019-01-12 15:36:35,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 377 transitions. [2019-01-12 15:36:35,494 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 377 transitions. Word has length 42 [2019-01-12 15:36:35,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:35,495 INFO L480 AbstractCegarLoop]: Abstraction has 265 states and 377 transitions. [2019-01-12 15:36:35,495 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:35,495 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 377 transitions. [2019-01-12 15:36:35,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-01-12 15:36:35,497 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:35,497 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:35,498 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:35,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:35,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1273755287, now seen corresponding path program 1 times [2019-01-12 15:36:35,499 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:35,499 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:35,501 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:35,501 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:35,501 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:35,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:35,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:35,691 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:35,691 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:35,692 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:35,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:35,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:35,694 INFO L87 Difference]: Start difference. First operand 265 states and 377 transitions. Second operand 3 states. [2019-01-12 15:36:35,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:35,857 INFO L93 Difference]: Finished difference Result 742 states and 1066 transitions. [2019-01-12 15:36:35,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:35,858 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-01-12 15:36:35,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:35,864 INFO L225 Difference]: With dead ends: 742 [2019-01-12 15:36:35,865 INFO L226 Difference]: Without dead ends: 492 [2019-01-12 15:36:35,866 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:35,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2019-01-12 15:36:35,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 300. [2019-01-12 15:36:35,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2019-01-12 15:36:35,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 429 transitions. [2019-01-12 15:36:35,902 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 429 transitions. Word has length 49 [2019-01-12 15:36:35,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:35,902 INFO L480 AbstractCegarLoop]: Abstraction has 300 states and 429 transitions. [2019-01-12 15:36:35,902 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:35,902 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 429 transitions. [2019-01-12 15:36:35,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-01-12 15:36:35,905 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:35,905 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:35,906 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:35,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:35,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1910840580, now seen corresponding path program 1 times [2019-01-12 15:36:35,906 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:35,906 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:35,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:35,908 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:35,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:35,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:36,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:36,033 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:36,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:36,033 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:36,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:36,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:36,034 INFO L87 Difference]: Start difference. First operand 300 states and 429 transitions. Second operand 5 states. [2019-01-12 15:36:37,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:37,232 INFO L93 Difference]: Finished difference Result 942 states and 1360 transitions. [2019-01-12 15:36:37,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:36:37,240 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2019-01-12 15:36:37,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:37,245 INFO L225 Difference]: With dead ends: 942 [2019-01-12 15:36:37,245 INFO L226 Difference]: Without dead ends: 657 [2019-01-12 15:36:37,246 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:36:37,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 657 states. [2019-01-12 15:36:37,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 657 to 386. [2019-01-12 15:36:37,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 386 states. [2019-01-12 15:36:37,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 552 transitions. [2019-01-12 15:36:37,275 INFO L78 Accepts]: Start accepts. Automaton has 386 states and 552 transitions. Word has length 50 [2019-01-12 15:36:37,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:37,275 INFO L480 AbstractCegarLoop]: Abstraction has 386 states and 552 transitions. [2019-01-12 15:36:37,275 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:37,276 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 552 transitions. [2019-01-12 15:36:37,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-01-12 15:36:37,278 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:37,279 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:37,280 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:37,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:37,281 INFO L82 PathProgramCache]: Analyzing trace with hash -1041102253, now seen corresponding path program 1 times [2019-01-12 15:36:37,281 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:37,281 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:37,284 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:37,285 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:37,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:37,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:37,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:37,439 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:37,439 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:37,440 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:37,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:37,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:37,440 INFO L87 Difference]: Start difference. First operand 386 states and 552 transitions. Second operand 5 states. [2019-01-12 15:36:37,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:37,914 INFO L93 Difference]: Finished difference Result 944 states and 1360 transitions. [2019-01-12 15:36:37,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:36:37,916 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-01-12 15:36:37,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:37,924 INFO L225 Difference]: With dead ends: 944 [2019-01-12 15:36:37,925 INFO L226 Difference]: Without dead ends: 659 [2019-01-12 15:36:37,926 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:36:37,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 659 states. [2019-01-12 15:36:37,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 659 to 390. [2019-01-12 15:36:37,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 390 states. [2019-01-12 15:36:37,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 556 transitions. [2019-01-12 15:36:37,958 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 556 transitions. Word has length 51 [2019-01-12 15:36:37,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:37,959 INFO L480 AbstractCegarLoop]: Abstraction has 390 states and 556 transitions. [2019-01-12 15:36:37,959 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:37,959 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 556 transitions. [2019-01-12 15:36:37,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-01-12 15:36:37,964 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:37,964 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:37,967 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:37,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:37,967 INFO L82 PathProgramCache]: Analyzing trace with hash -458607163, now seen corresponding path program 1 times [2019-01-12 15:36:37,968 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:37,971 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:37,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:37,972 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:37,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:38,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:38,420 WARN L181 SmtUtils]: Spent 225.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 5 [2019-01-12 15:36:38,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:38,428 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:38,428 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:38,428 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:38,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:38,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:38,429 INFO L87 Difference]: Start difference. First operand 390 states and 556 transitions. Second operand 4 states. [2019-01-12 15:36:39,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:39,785 INFO L93 Difference]: Finished difference Result 944 states and 1356 transitions. [2019-01-12 15:36:39,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:39,788 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 53 [2019-01-12 15:36:39,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:39,792 INFO L225 Difference]: With dead ends: 944 [2019-01-12 15:36:39,793 INFO L226 Difference]: Without dead ends: 659 [2019-01-12 15:36:39,794 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:39,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 659 states. [2019-01-12 15:36:39,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 659 to 390. [2019-01-12 15:36:39,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 390 states. [2019-01-12 15:36:39,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 554 transitions. [2019-01-12 15:36:39,822 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 554 transitions. Word has length 53 [2019-01-12 15:36:39,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:39,822 INFO L480 AbstractCegarLoop]: Abstraction has 390 states and 554 transitions. [2019-01-12 15:36:39,822 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:39,822 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 554 transitions. [2019-01-12 15:36:39,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-01-12 15:36:39,827 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:39,828 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:39,828 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:39,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:39,829 INFO L82 PathProgramCache]: Analyzing trace with hash 1789775306, now seen corresponding path program 1 times [2019-01-12 15:36:39,829 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:39,829 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:39,834 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:39,834 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:39,834 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:39,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:40,301 WARN L181 SmtUtils]: Spent 290.00 ms on a formula simplification. DAG size of input: 17 DAG size of output: 11 [2019-01-12 15:36:40,629 WARN L181 SmtUtils]: Spent 250.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 12 [2019-01-12 15:36:40,639 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:40,639 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:40,639 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:36:40,640 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:40,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:40,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:40,640 INFO L87 Difference]: Start difference. First operand 390 states and 554 transitions. Second operand 5 states. [2019-01-12 15:36:40,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:40,804 INFO L93 Difference]: Finished difference Result 776 states and 1117 transitions. [2019-01-12 15:36:40,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:36:40,804 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-01-12 15:36:40,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:40,808 INFO L225 Difference]: With dead ends: 776 [2019-01-12 15:36:40,808 INFO L226 Difference]: Without dead ends: 491 [2019-01-12 15:36:40,809 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:40,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 491 states. [2019-01-12 15:36:40,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 491 to 385. [2019-01-12 15:36:40,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2019-01-12 15:36:40,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 546 transitions. [2019-01-12 15:36:40,838 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 546 transitions. Word has length 54 [2019-01-12 15:36:40,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:40,838 INFO L480 AbstractCegarLoop]: Abstraction has 385 states and 546 transitions. [2019-01-12 15:36:40,838 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:40,839 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 546 transitions. [2019-01-12 15:36:40,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-01-12 15:36:40,839 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:40,840 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:40,840 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:40,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:40,841 INFO L82 PathProgramCache]: Analyzing trace with hash 1630366882, now seen corresponding path program 1 times [2019-01-12 15:36:40,843 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:40,844 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:40,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:40,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:40,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:40,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:41,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:41,165 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:41,165 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:36:41,165 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:41,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:41,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:41,167 INFO L87 Difference]: Start difference. First operand 385 states and 546 transitions. Second operand 5 states. [2019-01-12 15:36:41,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:41,569 INFO L93 Difference]: Finished difference Result 807 states and 1166 transitions. [2019-01-12 15:36:41,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:41,571 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-01-12 15:36:41,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:41,574 INFO L225 Difference]: With dead ends: 807 [2019-01-12 15:36:41,575 INFO L226 Difference]: Without dead ends: 527 [2019-01-12 15:36:41,576 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:36:41,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 527 states. [2019-01-12 15:36:41,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 527 to 355. [2019-01-12 15:36:41,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 355 states. [2019-01-12 15:36:41,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 355 states to 355 states and 500 transitions. [2019-01-12 15:36:41,603 INFO L78 Accepts]: Start accepts. Automaton has 355 states and 500 transitions. Word has length 58 [2019-01-12 15:36:41,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:41,604 INFO L480 AbstractCegarLoop]: Abstraction has 355 states and 500 transitions. [2019-01-12 15:36:41,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:41,606 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 500 transitions. [2019-01-12 15:36:41,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-01-12 15:36:41,607 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:41,608 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:41,609 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:41,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:41,610 INFO L82 PathProgramCache]: Analyzing trace with hash 644191382, now seen corresponding path program 1 times [2019-01-12 15:36:41,610 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:41,611 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:41,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:41,613 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:41,613 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:41,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:41,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:41,989 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:41,989 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:36:41,990 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:41,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:41,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:41,990 INFO L87 Difference]: Start difference. First operand 355 states and 500 transitions. Second operand 5 states. [2019-01-12 15:36:42,188 WARN L181 SmtUtils]: Spent 114.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2019-01-12 15:36:42,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:42,707 INFO L93 Difference]: Finished difference Result 904 states and 1296 transitions. [2019-01-12 15:36:42,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:42,708 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 63 [2019-01-12 15:36:42,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:42,714 INFO L225 Difference]: With dead ends: 904 [2019-01-12 15:36:42,714 INFO L226 Difference]: Without dead ends: 654 [2019-01-12 15:36:42,715 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:36:42,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 654 states. [2019-01-12 15:36:42,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 654 to 325. [2019-01-12 15:36:42,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325 states. [2019-01-12 15:36:42,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 454 transitions. [2019-01-12 15:36:42,750 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 454 transitions. Word has length 63 [2019-01-12 15:36:42,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:42,750 INFO L480 AbstractCegarLoop]: Abstraction has 325 states and 454 transitions. [2019-01-12 15:36:42,750 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:42,750 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 454 transitions. [2019-01-12 15:36:42,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-01-12 15:36:42,753 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:42,754 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:42,754 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:42,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:42,755 INFO L82 PathProgramCache]: Analyzing trace with hash 157991886, now seen corresponding path program 1 times [2019-01-12 15:36:42,755 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:42,755 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:42,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:42,760 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:42,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:42,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:43,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:43,073 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:43,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:43,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:43,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:43,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:43,074 INFO L87 Difference]: Start difference. First operand 325 states and 454 transitions. Second operand 6 states. [2019-01-12 15:36:43,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:43,999 INFO L93 Difference]: Finished difference Result 1105 states and 1564 transitions. [2019-01-12 15:36:44,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-01-12 15:36:44,001 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-01-12 15:36:44,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:44,008 INFO L225 Difference]: With dead ends: 1105 [2019-01-12 15:36:44,009 INFO L226 Difference]: Without dead ends: 885 [2019-01-12 15:36:44,011 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-01-12 15:36:44,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 885 states. [2019-01-12 15:36:44,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 885 to 364. [2019-01-12 15:36:44,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2019-01-12 15:36:44,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 508 transitions. [2019-01-12 15:36:44,077 INFO L78 Accepts]: Start accepts. Automaton has 364 states and 508 transitions. Word has length 68 [2019-01-12 15:36:44,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:44,078 INFO L480 AbstractCegarLoop]: Abstraction has 364 states and 508 transitions. [2019-01-12 15:36:44,078 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:44,078 INFO L276 IsEmpty]: Start isEmpty. Operand 364 states and 508 transitions. [2019-01-12 15:36:44,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-01-12 15:36:44,080 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:44,080 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:44,081 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:44,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:44,081 INFO L82 PathProgramCache]: Analyzing trace with hash -2134355609, now seen corresponding path program 1 times [2019-01-12 15:36:44,081 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:44,084 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:44,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:44,086 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:44,086 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:44,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:44,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:44,305 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:44,305 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:44,306 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:44,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:44,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:44,308 INFO L87 Difference]: Start difference. First operand 364 states and 508 transitions. Second operand 3 states. [2019-01-12 15:36:44,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:44,640 INFO L93 Difference]: Finished difference Result 662 states and 935 transitions. [2019-01-12 15:36:44,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:44,641 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-01-12 15:36:44,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:44,645 INFO L225 Difference]: With dead ends: 662 [2019-01-12 15:36:44,646 INFO L226 Difference]: Without dead ends: 442 [2019-01-12 15:36:44,647 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:44,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 442 states. [2019-01-12 15:36:44,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 442 to 360. [2019-01-12 15:36:44,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2019-01-12 15:36:44,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 501 transitions. [2019-01-12 15:36:44,691 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 501 transitions. Word has length 69 [2019-01-12 15:36:44,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:44,692 INFO L480 AbstractCegarLoop]: Abstraction has 360 states and 501 transitions. [2019-01-12 15:36:44,693 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:44,693 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 501 transitions. [2019-01-12 15:36:44,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-01-12 15:36:44,694 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:44,694 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:44,696 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:44,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:44,697 INFO L82 PathProgramCache]: Analyzing trace with hash 1585943340, now seen corresponding path program 1 times [2019-01-12 15:36:44,697 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:44,697 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:44,700 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:44,700 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:44,700 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:44,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:44,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:44,869 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:44,870 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:44,870 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:44,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:44,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:44,872 INFO L87 Difference]: Start difference. First operand 360 states and 501 transitions. Second operand 4 states. [2019-01-12 15:36:45,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:45,793 INFO L93 Difference]: Finished difference Result 953 states and 1330 transitions. [2019-01-12 15:36:45,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:45,793 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 72 [2019-01-12 15:36:45,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:45,797 INFO L225 Difference]: With dead ends: 953 [2019-01-12 15:36:45,797 INFO L226 Difference]: Without dead ends: 727 [2019-01-12 15:36:45,798 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:45,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 727 states. [2019-01-12 15:36:45,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 727 to 530. [2019-01-12 15:36:45,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 530 states. [2019-01-12 15:36:45,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 530 states to 530 states and 734 transitions. [2019-01-12 15:36:45,856 INFO L78 Accepts]: Start accepts. Automaton has 530 states and 734 transitions. Word has length 72 [2019-01-12 15:36:45,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:45,856 INFO L480 AbstractCegarLoop]: Abstraction has 530 states and 734 transitions. [2019-01-12 15:36:45,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:45,856 INFO L276 IsEmpty]: Start isEmpty. Operand 530 states and 734 transitions. [2019-01-12 15:36:45,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-01-12 15:36:45,858 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:45,859 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:45,859 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:45,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:45,860 INFO L82 PathProgramCache]: Analyzing trace with hash -2083950892, now seen corresponding path program 1 times [2019-01-12 15:36:45,861 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:45,862 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:45,864 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:45,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:45,864 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:45,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:45,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:45,946 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:45,946 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:45,947 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:45,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:45,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:45,948 INFO L87 Difference]: Start difference. First operand 530 states and 734 transitions. Second operand 3 states. [2019-01-12 15:36:46,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:46,054 INFO L93 Difference]: Finished difference Result 909 states and 1264 transitions. [2019-01-12 15:36:46,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:46,056 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-01-12 15:36:46,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:46,060 INFO L225 Difference]: With dead ends: 909 [2019-01-12 15:36:46,060 INFO L226 Difference]: Without dead ends: 530 [2019-01-12 15:36:46,061 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:46,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 530 states. [2019-01-12 15:36:46,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 530 to 530. [2019-01-12 15:36:46,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 530 states. [2019-01-12 15:36:46,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 530 states to 530 states and 730 transitions. [2019-01-12 15:36:46,127 INFO L78 Accepts]: Start accepts. Automaton has 530 states and 730 transitions. Word has length 72 [2019-01-12 15:36:46,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:46,127 INFO L480 AbstractCegarLoop]: Abstraction has 530 states and 730 transitions. [2019-01-12 15:36:46,128 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:46,129 INFO L276 IsEmpty]: Start isEmpty. Operand 530 states and 730 transitions. [2019-01-12 15:36:46,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-01-12 15:36:46,130 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:46,130 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:46,131 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:46,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:46,131 INFO L82 PathProgramCache]: Analyzing trace with hash 2070467794, now seen corresponding path program 1 times [2019-01-12 15:36:46,132 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:46,132 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:46,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:46,136 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:46,136 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:46,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:46,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:46,232 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:46,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:46,234 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:46,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:46,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:46,234 INFO L87 Difference]: Start difference. First operand 530 states and 730 transitions. Second operand 3 states. [2019-01-12 15:36:46,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:46,388 INFO L93 Difference]: Finished difference Result 1253 states and 1720 transitions. [2019-01-12 15:36:46,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:46,389 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-01-12 15:36:46,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:46,395 INFO L225 Difference]: With dead ends: 1253 [2019-01-12 15:36:46,395 INFO L226 Difference]: Without dead ends: 837 [2019-01-12 15:36:46,397 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:46,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 837 states. [2019-01-12 15:36:46,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 837 to 564. [2019-01-12 15:36:46,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 564 states. [2019-01-12 15:36:46,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 564 states to 564 states and 774 transitions. [2019-01-12 15:36:46,495 INFO L78 Accepts]: Start accepts. Automaton has 564 states and 774 transitions. Word has length 72 [2019-01-12 15:36:46,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:46,496 INFO L480 AbstractCegarLoop]: Abstraction has 564 states and 774 transitions. [2019-01-12 15:36:46,496 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:46,496 INFO L276 IsEmpty]: Start isEmpty. Operand 564 states and 774 transitions. [2019-01-12 15:36:46,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-01-12 15:36:46,499 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:46,499 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:46,499 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:46,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:46,502 INFO L82 PathProgramCache]: Analyzing trace with hash -1917205063, now seen corresponding path program 1 times [2019-01-12 15:36:46,503 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:46,503 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:46,505 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:46,505 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:46,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:46,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:46,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:46,920 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:46,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:46,921 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:46,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:46,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:46,922 INFO L87 Difference]: Start difference. First operand 564 states and 774 transitions. Second operand 6 states. [2019-01-12 15:36:47,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:47,420 INFO L93 Difference]: Finished difference Result 1770 states and 2483 transitions. [2019-01-12 15:36:47,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-01-12 15:36:47,421 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-01-12 15:36:47,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:47,427 INFO L225 Difference]: With dead ends: 1770 [2019-01-12 15:36:47,427 INFO L226 Difference]: Without dead ends: 1436 [2019-01-12 15:36:47,429 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-01-12 15:36:47,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2019-01-12 15:36:47,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 568. [2019-01-12 15:36:47,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 568 states. [2019-01-12 15:36:47,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 568 states to 568 states and 779 transitions. [2019-01-12 15:36:47,505 INFO L78 Accepts]: Start accepts. Automaton has 568 states and 779 transitions. Word has length 73 [2019-01-12 15:36:47,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:47,507 INFO L480 AbstractCegarLoop]: Abstraction has 568 states and 779 transitions. [2019-01-12 15:36:47,507 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:47,507 INFO L276 IsEmpty]: Start isEmpty. Operand 568 states and 779 transitions. [2019-01-12 15:36:47,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-01-12 15:36:47,509 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:47,509 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:47,510 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:47,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:47,510 INFO L82 PathProgramCache]: Analyzing trace with hash 197100160, now seen corresponding path program 1 times [2019-01-12 15:36:47,510 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:47,510 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:47,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,514 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:47,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:47,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:47,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:47,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:36:47,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:36:47,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:36:47,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:47,670 INFO L87 Difference]: Start difference. First operand 568 states and 779 transitions. Second operand 5 states. [2019-01-12 15:36:47,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:47,849 INFO L93 Difference]: Finished difference Result 888 states and 1239 transitions. [2019-01-12 15:36:47,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:36:47,849 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2019-01-12 15:36:47,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:47,853 INFO L225 Difference]: With dead ends: 888 [2019-01-12 15:36:47,853 INFO L226 Difference]: Without dead ends: 886 [2019-01-12 15:36:47,854 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:36:47,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 886 states. [2019-01-12 15:36:47,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 886 to 570. [2019-01-12 15:36:47,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 570 states. [2019-01-12 15:36:47,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 570 states to 570 states and 781 transitions. [2019-01-12 15:36:47,938 INFO L78 Accepts]: Start accepts. Automaton has 570 states and 781 transitions. Word has length 73 [2019-01-12 15:36:47,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:47,938 INFO L480 AbstractCegarLoop]: Abstraction has 570 states and 781 transitions. [2019-01-12 15:36:47,938 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:36:47,939 INFO L276 IsEmpty]: Start isEmpty. Operand 570 states and 781 transitions. [2019-01-12 15:36:47,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-01-12 15:36:47,940 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:47,940 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:47,943 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:47,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:47,944 INFO L82 PathProgramCache]: Analyzing trace with hash 2083582807, now seen corresponding path program 1 times [2019-01-12 15:36:47,944 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:47,944 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:47,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:47,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:47,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:48,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:48,122 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:48,122 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:48,122 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:48,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:48,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:48,123 INFO L87 Difference]: Start difference. First operand 570 states and 781 transitions. Second operand 6 states. [2019-01-12 15:36:48,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:48,764 INFO L93 Difference]: Finished difference Result 2037 states and 2828 transitions. [2019-01-12 15:36:48,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:36:48,765 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 73 [2019-01-12 15:36:48,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:48,772 INFO L225 Difference]: With dead ends: 2037 [2019-01-12 15:36:48,773 INFO L226 Difference]: Without dead ends: 1662 [2019-01-12 15:36:48,775 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-01-12 15:36:48,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1662 states. [2019-01-12 15:36:48,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1662 to 616. [2019-01-12 15:36:48,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 616 states. [2019-01-12 15:36:48,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 616 states to 616 states and 839 transitions. [2019-01-12 15:36:48,871 INFO L78 Accepts]: Start accepts. Automaton has 616 states and 839 transitions. Word has length 73 [2019-01-12 15:36:48,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:48,871 INFO L480 AbstractCegarLoop]: Abstraction has 616 states and 839 transitions. [2019-01-12 15:36:48,871 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:48,871 INFO L276 IsEmpty]: Start isEmpty. Operand 616 states and 839 transitions. [2019-01-12 15:36:48,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-01-12 15:36:48,874 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:48,874 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:48,874 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:48,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:48,877 INFO L82 PathProgramCache]: Analyzing trace with hash 1204676769, now seen corresponding path program 1 times [2019-01-12 15:36:48,877 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:48,877 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:48,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:48,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:48,880 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:48,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:49,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:49,327 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:49,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:49,327 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:49,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:49,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:49,328 INFO L87 Difference]: Start difference. First operand 616 states and 839 transitions. Second operand 6 states. [2019-01-12 15:36:50,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:50,099 INFO L93 Difference]: Finished difference Result 2364 states and 3261 transitions. [2019-01-12 15:36:50,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:36:50,100 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-01-12 15:36:50,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:50,107 INFO L225 Difference]: With dead ends: 2364 [2019-01-12 15:36:50,107 INFO L226 Difference]: Without dead ends: 1981 [2019-01-12 15:36:50,109 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-01-12 15:36:50,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1981 states. [2019-01-12 15:36:50,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1981 to 694. [2019-01-12 15:36:50,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 694 states. [2019-01-12 15:36:50,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 694 states to 694 states and 941 transitions. [2019-01-12 15:36:50,227 INFO L78 Accepts]: Start accepts. Automaton has 694 states and 941 transitions. Word has length 74 [2019-01-12 15:36:50,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:50,229 INFO L480 AbstractCegarLoop]: Abstraction has 694 states and 941 transitions. [2019-01-12 15:36:50,229 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:50,229 INFO L276 IsEmpty]: Start isEmpty. Operand 694 states and 941 transitions. [2019-01-12 15:36:50,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-01-12 15:36:50,231 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:50,232 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:50,233 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:50,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:50,233 INFO L82 PathProgramCache]: Analyzing trace with hash -217796256, now seen corresponding path program 1 times [2019-01-12 15:36:50,233 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:50,233 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:50,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:50,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:50,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:50,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:50,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:50,641 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:50,641 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:36:50,642 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:36:50,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:36:50,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:36:50,643 INFO L87 Difference]: Start difference. First operand 694 states and 941 transitions. Second operand 6 states. [2019-01-12 15:36:51,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:51,451 INFO L93 Difference]: Finished difference Result 1560 states and 2200 transitions. [2019-01-12 15:36:51,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:36:51,452 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 74 [2019-01-12 15:36:51,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:51,456 INFO L225 Difference]: With dead ends: 1560 [2019-01-12 15:36:51,456 INFO L226 Difference]: Without dead ends: 1160 [2019-01-12 15:36:51,457 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-01-12 15:36:51,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1160 states. [2019-01-12 15:36:51,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1160 to 700. [2019-01-12 15:36:51,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 700 states. [2019-01-12 15:36:51,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 947 transitions. [2019-01-12 15:36:51,552 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 947 transitions. Word has length 74 [2019-01-12 15:36:51,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:51,552 INFO L480 AbstractCegarLoop]: Abstraction has 700 states and 947 transitions. [2019-01-12 15:36:51,552 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:36:51,552 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 947 transitions. [2019-01-12 15:36:51,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2019-01-12 15:36:51,553 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:51,554 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:51,556 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:51,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:51,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1278252476, now seen corresponding path program 1 times [2019-01-12 15:36:51,557 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:51,557 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:51,560 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:51,560 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:51,560 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:51,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:51,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:51,663 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:51,663 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:51,664 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:51,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:51,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:51,665 INFO L87 Difference]: Start difference. First operand 700 states and 947 transitions. Second operand 3 states. [2019-01-12 15:36:52,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:52,156 INFO L93 Difference]: Finished difference Result 1374 states and 1891 transitions. [2019-01-12 15:36:52,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:52,156 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2019-01-12 15:36:52,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:52,159 INFO L225 Difference]: With dead ends: 1374 [2019-01-12 15:36:52,160 INFO L226 Difference]: Without dead ends: 905 [2019-01-12 15:36:52,161 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:52,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 905 states. [2019-01-12 15:36:52,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 905 to 679. [2019-01-12 15:36:52,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 679 states. [2019-01-12 15:36:52,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 679 states to 679 states and 910 transitions. [2019-01-12 15:36:52,313 INFO L78 Accepts]: Start accepts. Automaton has 679 states and 910 transitions. Word has length 74 [2019-01-12 15:36:52,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:52,313 INFO L480 AbstractCegarLoop]: Abstraction has 679 states and 910 transitions. [2019-01-12 15:36:52,313 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:52,313 INFO L276 IsEmpty]: Start isEmpty. Operand 679 states and 910 transitions. [2019-01-12 15:36:52,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-01-12 15:36:52,318 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:52,318 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:52,320 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:52,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:52,321 INFO L82 PathProgramCache]: Analyzing trace with hash -1698648942, now seen corresponding path program 1 times [2019-01-12 15:36:52,321 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:52,321 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:52,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:52,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:52,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:52,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:52,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:52,495 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:52,495 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:52,497 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:52,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:52,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:52,498 INFO L87 Difference]: Start difference. First operand 679 states and 910 transitions. Second operand 4 states. [2019-01-12 15:36:53,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:53,224 INFO L93 Difference]: Finished difference Result 1744 states and 2350 transitions. [2019-01-12 15:36:53,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:53,226 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-01-12 15:36:53,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:53,230 INFO L225 Difference]: With dead ends: 1744 [2019-01-12 15:36:53,230 INFO L226 Difference]: Without dead ends: 1328 [2019-01-12 15:36:53,231 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:53,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1328 states. [2019-01-12 15:36:53,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1328 to 923. [2019-01-12 15:36:53,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 923 states. [2019-01-12 15:36:53,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 923 states to 923 states and 1237 transitions. [2019-01-12 15:36:53,377 INFO L78 Accepts]: Start accepts. Automaton has 923 states and 1237 transitions. Word has length 75 [2019-01-12 15:36:53,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:53,377 INFO L480 AbstractCegarLoop]: Abstraction has 923 states and 1237 transitions. [2019-01-12 15:36:53,377 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:53,377 INFO L276 IsEmpty]: Start isEmpty. Operand 923 states and 1237 transitions. [2019-01-12 15:36:53,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-01-12 15:36:53,380 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:53,380 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:53,381 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:53,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:53,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1596781464, now seen corresponding path program 1 times [2019-01-12 15:36:53,381 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:53,381 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:53,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:53,382 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:53,382 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:53,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:53,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:53,483 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:53,484 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:53,484 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:53,484 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:53,484 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:53,484 INFO L87 Difference]: Start difference. First operand 923 states and 1237 transitions. Second operand 3 states. [2019-01-12 15:36:53,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:53,731 INFO L93 Difference]: Finished difference Result 1932 states and 2621 transitions. [2019-01-12 15:36:53,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:53,731 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 75 [2019-01-12 15:36:53,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:53,736 INFO L225 Difference]: With dead ends: 1932 [2019-01-12 15:36:53,736 INFO L226 Difference]: Without dead ends: 1327 [2019-01-12 15:36:53,738 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:53,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1327 states. [2019-01-12 15:36:53,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1327 to 877. [2019-01-12 15:36:53,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 877 states. [2019-01-12 15:36:53,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 877 states to 877 states and 1171 transitions. [2019-01-12 15:36:53,903 INFO L78 Accepts]: Start accepts. Automaton has 877 states and 1171 transitions. Word has length 75 [2019-01-12 15:36:53,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:53,903 INFO L480 AbstractCegarLoop]: Abstraction has 877 states and 1171 transitions. [2019-01-12 15:36:53,903 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:53,903 INFO L276 IsEmpty]: Start isEmpty. Operand 877 states and 1171 transitions. [2019-01-12 15:36:53,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2019-01-12 15:36:53,907 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:53,907 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:53,908 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:53,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:53,908 INFO L82 PathProgramCache]: Analyzing trace with hash -216337278, now seen corresponding path program 1 times [2019-01-12 15:36:53,908 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:53,908 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:53,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:53,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:53,910 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:53,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:54,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:54,060 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:54,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:54,060 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:54,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:54,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:54,061 INFO L87 Difference]: Start difference. First operand 877 states and 1171 transitions. Second operand 4 states. [2019-01-12 15:36:54,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:54,516 INFO L93 Difference]: Finished difference Result 2042 states and 2724 transitions. [2019-01-12 15:36:54,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:54,517 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 75 [2019-01-12 15:36:54,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:54,522 INFO L225 Difference]: With dead ends: 2042 [2019-01-12 15:36:54,522 INFO L226 Difference]: Without dead ends: 1466 [2019-01-12 15:36:54,523 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:54,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1466 states. [2019-01-12 15:36:54,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1466 to 1169. [2019-01-12 15:36:54,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1169 states. [2019-01-12 15:36:54,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1169 states to 1169 states and 1551 transitions. [2019-01-12 15:36:54,684 INFO L78 Accepts]: Start accepts. Automaton has 1169 states and 1551 transitions. Word has length 75 [2019-01-12 15:36:54,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:54,684 INFO L480 AbstractCegarLoop]: Abstraction has 1169 states and 1551 transitions. [2019-01-12 15:36:54,684 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:54,684 INFO L276 IsEmpty]: Start isEmpty. Operand 1169 states and 1551 transitions. [2019-01-12 15:36:54,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2019-01-12 15:36:54,685 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:54,686 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:54,686 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:54,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:54,687 INFO L82 PathProgramCache]: Analyzing trace with hash -1065252519, now seen corresponding path program 1 times [2019-01-12 15:36:54,689 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:54,689 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:54,691 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:54,691 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:54,691 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:54,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:54,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:54,760 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:54,760 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:36:54,761 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:36:54,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:36:54,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:54,761 INFO L87 Difference]: Start difference. First operand 1169 states and 1551 transitions. Second operand 3 states. [2019-01-12 15:36:55,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:55,417 INFO L93 Difference]: Finished difference Result 2882 states and 3817 transitions. [2019-01-12 15:36:55,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:36:55,418 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 76 [2019-01-12 15:36:55,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:55,424 INFO L225 Difference]: With dead ends: 2882 [2019-01-12 15:36:55,424 INFO L226 Difference]: Without dead ends: 1956 [2019-01-12 15:36:55,425 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:36:55,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1956 states. [2019-01-12 15:36:55,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1956 to 1171. [2019-01-12 15:36:55,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1171 states. [2019-01-12 15:36:55,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1171 states to 1171 states and 1553 transitions. [2019-01-12 15:36:55,566 INFO L78 Accepts]: Start accepts. Automaton has 1171 states and 1553 transitions. Word has length 76 [2019-01-12 15:36:55,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:55,566 INFO L480 AbstractCegarLoop]: Abstraction has 1171 states and 1553 transitions. [2019-01-12 15:36:55,566 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:36:55,567 INFO L276 IsEmpty]: Start isEmpty. Operand 1171 states and 1553 transitions. [2019-01-12 15:36:55,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-01-12 15:36:55,568 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:55,568 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:55,569 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:55,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:55,569 INFO L82 PathProgramCache]: Analyzing trace with hash -2019206059, now seen corresponding path program 1 times [2019-01-12 15:36:55,569 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:55,569 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:55,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:55,573 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:55,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:55,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:55,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:55,806 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:55,806 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:55,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:55,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:55,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:55,807 INFO L87 Difference]: Start difference. First operand 1171 states and 1553 transitions. Second operand 4 states. [2019-01-12 15:36:56,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:56,259 INFO L93 Difference]: Finished difference Result 2537 states and 3367 transitions. [2019-01-12 15:36:56,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:56,259 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-01-12 15:36:56,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:56,264 INFO L225 Difference]: With dead ends: 2537 [2019-01-12 15:36:56,264 INFO L226 Difference]: Without dead ends: 1517 [2019-01-12 15:36:56,266 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:56,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1517 states. [2019-01-12 15:36:56,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1517 to 1169. [2019-01-12 15:36:56,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1169 states. [2019-01-12 15:36:56,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1169 states to 1169 states and 1547 transitions. [2019-01-12 15:36:56,405 INFO L78 Accepts]: Start accepts. Automaton has 1169 states and 1547 transitions. Word has length 77 [2019-01-12 15:36:56,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:56,405 INFO L480 AbstractCegarLoop]: Abstraction has 1169 states and 1547 transitions. [2019-01-12 15:36:56,405 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:56,405 INFO L276 IsEmpty]: Start isEmpty. Operand 1169 states and 1547 transitions. [2019-01-12 15:36:56,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-01-12 15:36:56,407 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:56,407 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:56,407 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:56,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:56,408 INFO L82 PathProgramCache]: Analyzing trace with hash 2079566589, now seen corresponding path program 1 times [2019-01-12 15:36:56,408 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:56,408 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:56,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:56,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:56,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:56,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:56,753 WARN L181 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 11 DAG size of output: 7 [2019-01-12 15:36:56,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:56,757 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:56,757 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:56,758 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:56,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:56,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:56,758 INFO L87 Difference]: Start difference. First operand 1169 states and 1547 transitions. Second operand 4 states. [2019-01-12 15:36:57,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:57,262 INFO L93 Difference]: Finished difference Result 2514 states and 3335 transitions. [2019-01-12 15:36:57,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:57,263 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-01-12 15:36:57,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:57,269 INFO L225 Difference]: With dead ends: 2514 [2019-01-12 15:36:57,269 INFO L226 Difference]: Without dead ends: 1598 [2019-01-12 15:36:57,270 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:57,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1598 states. [2019-01-12 15:36:57,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1598 to 1078. [2019-01-12 15:36:57,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1078 states. [2019-01-12 15:36:57,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1078 states to 1078 states and 1426 transitions. [2019-01-12 15:36:57,410 INFO L78 Accepts]: Start accepts. Automaton has 1078 states and 1426 transitions. Word has length 77 [2019-01-12 15:36:57,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:57,410 INFO L480 AbstractCegarLoop]: Abstraction has 1078 states and 1426 transitions. [2019-01-12 15:36:57,411 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:57,411 INFO L276 IsEmpty]: Start isEmpty. Operand 1078 states and 1426 transitions. [2019-01-12 15:36:57,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-01-12 15:36:57,412 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:57,412 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:57,412 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:57,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:57,413 INFO L82 PathProgramCache]: Analyzing trace with hash 1673026547, now seen corresponding path program 1 times [2019-01-12 15:36:57,413 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:57,413 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:57,416 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:57,416 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:57,416 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:57,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:57,589 WARN L181 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 9 DAG size of output: 4 [2019-01-12 15:36:58,137 WARN L181 SmtUtils]: Spent 499.00 ms on a formula simplification. DAG size of input: 19 DAG size of output: 15 [2019-01-12 15:36:58,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:58,143 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:58,144 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:58,144 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:58,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:58,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:58,147 INFO L87 Difference]: Start difference. First operand 1078 states and 1426 transitions. Second operand 4 states. [2019-01-12 15:36:58,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:58,791 INFO L93 Difference]: Finished difference Result 2354 states and 3107 transitions. [2019-01-12 15:36:58,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:36:58,791 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-01-12 15:36:58,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:58,797 INFO L225 Difference]: With dead ends: 2354 [2019-01-12 15:36:58,797 INFO L226 Difference]: Without dead ends: 1424 [2019-01-12 15:36:58,800 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:58,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1424 states. [2019-01-12 15:36:58,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1424 to 975. [2019-01-12 15:36:58,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 975 states. [2019-01-12 15:36:58,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 975 states to 975 states and 1286 transitions. [2019-01-12 15:36:58,982 INFO L78 Accepts]: Start accepts. Automaton has 975 states and 1286 transitions. Word has length 77 [2019-01-12 15:36:58,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:58,982 INFO L480 AbstractCegarLoop]: Abstraction has 975 states and 1286 transitions. [2019-01-12 15:36:58,983 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:58,983 INFO L276 IsEmpty]: Start isEmpty. Operand 975 states and 1286 transitions. [2019-01-12 15:36:58,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-01-12 15:36:58,983 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:58,984 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:58,984 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:58,984 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:58,984 INFO L82 PathProgramCache]: Analyzing trace with hash -113428458, now seen corresponding path program 1 times [2019-01-12 15:36:58,985 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:58,985 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:58,986 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:58,986 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:58,986 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:58,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:36:59,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:36:59,229 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:36:59,229 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:36:59,229 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:36:59,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:36:59,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:36:59,231 INFO L87 Difference]: Start difference. First operand 975 states and 1286 transitions. Second operand 4 states. [2019-01-12 15:36:59,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:36:59,700 INFO L93 Difference]: Finished difference Result 2448 states and 3254 transitions. [2019-01-12 15:36:59,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:36:59,701 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2019-01-12 15:36:59,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:36:59,705 INFO L225 Difference]: With dead ends: 2448 [2019-01-12 15:36:59,706 INFO L226 Difference]: Without dead ends: 1594 [2019-01-12 15:36:59,708 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:36:59,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1594 states. [2019-01-12 15:36:59,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1594 to 977. [2019-01-12 15:36:59,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 977 states. [2019-01-12 15:36:59,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 977 states to 977 states and 1282 transitions. [2019-01-12 15:36:59,858 INFO L78 Accepts]: Start accepts. Automaton has 977 states and 1282 transitions. Word has length 78 [2019-01-12 15:36:59,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:36:59,858 INFO L480 AbstractCegarLoop]: Abstraction has 977 states and 1282 transitions. [2019-01-12 15:36:59,859 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:36:59,859 INFO L276 IsEmpty]: Start isEmpty. Operand 977 states and 1282 transitions. [2019-01-12 15:36:59,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-01-12 15:36:59,859 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:36:59,860 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:36:59,860 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:36:59,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:36:59,860 INFO L82 PathProgramCache]: Analyzing trace with hash 136882620, now seen corresponding path program 1 times [2019-01-12 15:36:59,860 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:36:59,860 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:36:59,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:59,861 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:36:59,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:36:59,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:00,044 WARN L181 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 9 DAG size of output: 7 [2019-01-12 15:37:00,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:00,113 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:00,113 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:00,114 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:37:00,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:37:00,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:00,114 INFO L87 Difference]: Start difference. First operand 977 states and 1282 transitions. Second operand 4 states. [2019-01-12 15:37:00,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:00,669 INFO L93 Difference]: Finished difference Result 2684 states and 3537 transitions. [2019-01-12 15:37:00,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:37:00,670 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-01-12 15:37:00,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:00,673 INFO L225 Difference]: With dead ends: 2684 [2019-01-12 15:37:00,673 INFO L226 Difference]: Without dead ends: 1828 [2019-01-12 15:37:00,675 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:00,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1828 states. [2019-01-12 15:37:00,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1828 to 923. [2019-01-12 15:37:00,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 923 states. [2019-01-12 15:37:00,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 923 states to 923 states and 1208 transitions. [2019-01-12 15:37:00,823 INFO L78 Accepts]: Start accepts. Automaton has 923 states and 1208 transitions. Word has length 79 [2019-01-12 15:37:00,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:00,823 INFO L480 AbstractCegarLoop]: Abstraction has 923 states and 1208 transitions. [2019-01-12 15:37:00,823 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:37:00,823 INFO L276 IsEmpty]: Start isEmpty. Operand 923 states and 1208 transitions. [2019-01-12 15:37:00,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2019-01-12 15:37:00,827 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:00,827 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:00,827 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:00,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:00,828 INFO L82 PathProgramCache]: Analyzing trace with hash 831151167, now seen corresponding path program 1 times [2019-01-12 15:37:00,828 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:00,828 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:00,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:00,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:00,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:00,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:01,143 WARN L181 SmtUtils]: Spent 102.00 ms on a formula simplification that was a NOOP. DAG size: 9 [2019-01-12 15:37:01,500 WARN L181 SmtUtils]: Spent 143.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2019-01-12 15:37:01,814 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:01,814 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:01,814 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:01,824 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:01,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:01,961 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:02,223 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-12 15:37:02,244 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:02,244 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-01-12 15:37:02,247 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-01-12 15:37:02,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-01-12 15:37:02,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-01-12 15:37:02,248 INFO L87 Difference]: Start difference. First operand 923 states and 1208 transitions. Second operand 16 states. [2019-01-12 15:37:03,207 WARN L181 SmtUtils]: Spent 222.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2019-01-12 15:37:04,519 WARN L181 SmtUtils]: Spent 240.00 ms on a formula simplification that was a NOOP. DAG size: 22 [2019-01-12 15:37:04,960 WARN L181 SmtUtils]: Spent 152.00 ms on a formula simplification that was a NOOP. DAG size: 24 [2019-01-12 15:37:10,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:10,436 INFO L93 Difference]: Finished difference Result 4874 states and 6623 transitions. [2019-01-12 15:37:10,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2019-01-12 15:37:10,437 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 122 [2019-01-12 15:37:10,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:10,444 INFO L225 Difference]: With dead ends: 4874 [2019-01-12 15:37:10,444 INFO L226 Difference]: Without dead ends: 4102 [2019-01-12 15:37:10,449 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3824 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=1564, Invalid=8942, Unknown=0, NotChecked=0, Total=10506 [2019-01-12 15:37:10,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4102 states. [2019-01-12 15:37:10,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4102 to 1118. [2019-01-12 15:37:10,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1118 states. [2019-01-12 15:37:10,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1118 states to 1118 states and 1454 transitions. [2019-01-12 15:37:10,813 INFO L78 Accepts]: Start accepts. Automaton has 1118 states and 1454 transitions. Word has length 122 [2019-01-12 15:37:10,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:10,813 INFO L480 AbstractCegarLoop]: Abstraction has 1118 states and 1454 transitions. [2019-01-12 15:37:10,813 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-01-12 15:37:10,813 INFO L276 IsEmpty]: Start isEmpty. Operand 1118 states and 1454 transitions. [2019-01-12 15:37:10,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2019-01-12 15:37:10,816 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:10,817 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:10,817 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:10,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:10,818 INFO L82 PathProgramCache]: Analyzing trace with hash 910010364, now seen corresponding path program 1 times [2019-01-12 15:37:10,818 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:10,818 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:10,822 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:10,823 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:10,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:10,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:10,961 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2019-01-12 15:37:10,961 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:10,961 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:10,962 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:37:10,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:37:10,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:10,964 INFO L87 Difference]: Start difference. First operand 1118 states and 1454 transitions. Second operand 4 states. [2019-01-12 15:37:11,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:11,437 INFO L93 Difference]: Finished difference Result 2837 states and 3715 transitions. [2019-01-12 15:37:11,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:37:11,438 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 126 [2019-01-12 15:37:11,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:11,443 INFO L225 Difference]: With dead ends: 2837 [2019-01-12 15:37:11,444 INFO L226 Difference]: Without dead ends: 1836 [2019-01-12 15:37:11,446 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:11,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1836 states. [2019-01-12 15:37:11,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1836 to 1126. [2019-01-12 15:37:11,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1126 states. [2019-01-12 15:37:11,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1126 states to 1126 states and 1458 transitions. [2019-01-12 15:37:11,742 INFO L78 Accepts]: Start accepts. Automaton has 1126 states and 1458 transitions. Word has length 126 [2019-01-12 15:37:11,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:11,743 INFO L480 AbstractCegarLoop]: Abstraction has 1126 states and 1458 transitions. [2019-01-12 15:37:11,743 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:37:11,743 INFO L276 IsEmpty]: Start isEmpty. Operand 1126 states and 1458 transitions. [2019-01-12 15:37:11,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2019-01-12 15:37:11,745 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:11,745 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:11,745 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:11,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:11,748 INFO L82 PathProgramCache]: Analyzing trace with hash 633908864, now seen corresponding path program 1 times [2019-01-12 15:37:11,748 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:11,748 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:11,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:11,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:11,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:11,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:12,173 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 32 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:12,174 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:12,174 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:12,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:12,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:12,303 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:12,468 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2019-01-12 15:37:12,499 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:12,500 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 10 [2019-01-12 15:37:12,500 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-01-12 15:37:12,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-01-12 15:37:12,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-01-12 15:37:12,501 INFO L87 Difference]: Start difference. First operand 1126 states and 1458 transitions. Second operand 10 states. [2019-01-12 15:37:13,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:13,965 INFO L93 Difference]: Finished difference Result 2622 states and 3426 transitions. [2019-01-12 15:37:13,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:37:13,966 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 126 [2019-01-12 15:37:13,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:13,972 INFO L225 Difference]: With dead ends: 2622 [2019-01-12 15:37:13,972 INFO L226 Difference]: Without dead ends: 1550 [2019-01-12 15:37:13,975 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2019-01-12 15:37:13,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1550 states. [2019-01-12 15:37:14,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1550 to 1039. [2019-01-12 15:37:14,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1039 states. [2019-01-12 15:37:14,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1039 states to 1039 states and 1352 transitions. [2019-01-12 15:37:14,471 INFO L78 Accepts]: Start accepts. Automaton has 1039 states and 1352 transitions. Word has length 126 [2019-01-12 15:37:14,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:14,472 INFO L480 AbstractCegarLoop]: Abstraction has 1039 states and 1352 transitions. [2019-01-12 15:37:14,475 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-01-12 15:37:14,477 INFO L276 IsEmpty]: Start isEmpty. Operand 1039 states and 1352 transitions. [2019-01-12 15:37:14,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-01-12 15:37:14,479 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:14,479 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:14,479 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:14,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:14,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1993942763, now seen corresponding path program 1 times [2019-01-12 15:37:14,480 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:14,480 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:14,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:14,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:14,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:14,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:15,058 WARN L181 SmtUtils]: Spent 249.00 ms on a formula simplification. DAG size of input: 12 DAG size of output: 8 [2019-01-12 15:37:15,321 WARN L181 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 10 DAG size of output: 7 [2019-01-12 15:37:15,681 WARN L181 SmtUtils]: Spent 248.00 ms on a formula simplification. DAG size of input: 13 DAG size of output: 10 [2019-01-12 15:37:16,096 WARN L181 SmtUtils]: Spent 276.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 11 [2019-01-12 15:37:16,439 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:16,440 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:16,440 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-01-12 15:37:16,440 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-01-12 15:37:16,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-01-12 15:37:16,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-01-12 15:37:16,441 INFO L87 Difference]: Start difference. First operand 1039 states and 1352 transitions. Second operand 11 states. [2019-01-12 15:37:17,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:17,574 INFO L93 Difference]: Finished difference Result 2943 states and 3851 transitions. [2019-01-12 15:37:17,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-01-12 15:37:17,575 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 127 [2019-01-12 15:37:17,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:17,579 INFO L225 Difference]: With dead ends: 2943 [2019-01-12 15:37:17,579 INFO L226 Difference]: Without dead ends: 2095 [2019-01-12 15:37:17,582 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=163, Invalid=539, Unknown=0, NotChecked=0, Total=702 [2019-01-12 15:37:17,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2095 states. [2019-01-12 15:37:17,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2095 to 1160. [2019-01-12 15:37:17,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1160 states. [2019-01-12 15:37:17,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1160 states to 1160 states and 1501 transitions. [2019-01-12 15:37:17,812 INFO L78 Accepts]: Start accepts. Automaton has 1160 states and 1501 transitions. Word has length 127 [2019-01-12 15:37:17,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:17,812 INFO L480 AbstractCegarLoop]: Abstraction has 1160 states and 1501 transitions. [2019-01-12 15:37:17,812 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-01-12 15:37:17,812 INFO L276 IsEmpty]: Start isEmpty. Operand 1160 states and 1501 transitions. [2019-01-12 15:37:17,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-01-12 15:37:17,814 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:17,815 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:17,815 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:17,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:17,815 INFO L82 PathProgramCache]: Analyzing trace with hash -949639315, now seen corresponding path program 1 times [2019-01-12 15:37:17,815 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:17,815 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:17,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:17,816 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:17,816 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:17,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:17,976 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-01-12 15:37:17,976 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:17,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:17,977 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:37:17,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:37:17,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:17,977 INFO L87 Difference]: Start difference. First operand 1160 states and 1501 transitions. Second operand 4 states. [2019-01-12 15:37:19,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:19,516 INFO L93 Difference]: Finished difference Result 2761 states and 3598 transitions. [2019-01-12 15:37:19,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:37:19,516 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 127 [2019-01-12 15:37:19,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:19,520 INFO L225 Difference]: With dead ends: 2761 [2019-01-12 15:37:19,520 INFO L226 Difference]: Without dead ends: 1760 [2019-01-12 15:37:19,521 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:19,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1760 states. [2019-01-12 15:37:19,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1760 to 1192. [2019-01-12 15:37:19,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1192 states. [2019-01-12 15:37:19,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 1192 states and 1529 transitions. [2019-01-12 15:37:19,838 INFO L78 Accepts]: Start accepts. Automaton has 1192 states and 1529 transitions. Word has length 127 [2019-01-12 15:37:19,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:19,839 INFO L480 AbstractCegarLoop]: Abstraction has 1192 states and 1529 transitions. [2019-01-12 15:37:19,839 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:37:19,839 INFO L276 IsEmpty]: Start isEmpty. Operand 1192 states and 1529 transitions. [2019-01-12 15:37:19,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-01-12 15:37:19,841 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:19,841 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:19,841 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:19,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:19,841 INFO L82 PathProgramCache]: Analyzing trace with hash 521236977, now seen corresponding path program 1 times [2019-01-12 15:37:19,842 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:19,842 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:19,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:19,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:19,843 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:19,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:20,336 WARN L181 SmtUtils]: Spent 302.00 ms on a formula simplification. DAG size of input: 13 DAG size of output: 7 [2019-01-12 15:37:20,565 WARN L181 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 15 DAG size of output: 10 [2019-01-12 15:37:20,575 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-01-12 15:37:20,575 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:20,575 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:20,576 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:37:20,576 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:37:20,576 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:20,576 INFO L87 Difference]: Start difference. First operand 1192 states and 1529 transitions. Second operand 5 states. [2019-01-12 15:37:20,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:20,989 INFO L93 Difference]: Finished difference Result 2120 states and 2752 transitions. [2019-01-12 15:37:20,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-12 15:37:20,989 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 127 [2019-01-12 15:37:20,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:20,991 INFO L225 Difference]: With dead ends: 2120 [2019-01-12 15:37:20,991 INFO L226 Difference]: Without dead ends: 1087 [2019-01-12 15:37:20,992 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:37:20,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1087 states. [2019-01-12 15:37:21,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1087 to 1087. [2019-01-12 15:37:21,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1087 states. [2019-01-12 15:37:21,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1087 states to 1087 states and 1399 transitions. [2019-01-12 15:37:21,207 INFO L78 Accepts]: Start accepts. Automaton has 1087 states and 1399 transitions. Word has length 127 [2019-01-12 15:37:21,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:21,207 INFO L480 AbstractCegarLoop]: Abstraction has 1087 states and 1399 transitions. [2019-01-12 15:37:21,207 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:37:21,208 INFO L276 IsEmpty]: Start isEmpty. Operand 1087 states and 1399 transitions. [2019-01-12 15:37:21,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2019-01-12 15:37:21,209 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:21,209 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:21,210 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:21,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:21,210 INFO L82 PathProgramCache]: Analyzing trace with hash 1548088909, now seen corresponding path program 1 times [2019-01-12 15:37:21,210 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:21,210 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:21,211 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:21,211 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:21,211 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:21,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:21,837 WARN L181 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2019-01-12 15:37:22,040 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 19 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:22,041 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:22,041 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:22,053 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:22,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:22,166 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:22,272 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-12 15:37:22,291 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:22,291 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 16 [2019-01-12 15:37:22,291 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-01-12 15:37:22,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-01-12 15:37:22,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-01-12 15:37:22,292 INFO L87 Difference]: Start difference. First operand 1087 states and 1399 transitions. Second operand 16 states. [2019-01-12 15:37:28,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:28,608 INFO L93 Difference]: Finished difference Result 4686 states and 6174 transitions. [2019-01-12 15:37:28,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2019-01-12 15:37:28,609 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 127 [2019-01-12 15:37:28,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:28,612 INFO L225 Difference]: With dead ends: 4686 [2019-01-12 15:37:28,613 INFO L226 Difference]: Without dead ends: 3763 [2019-01-12 15:37:28,616 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2980 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=1258, Invalid=7114, Unknown=0, NotChecked=0, Total=8372 [2019-01-12 15:37:28,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3763 states. [2019-01-12 15:37:28,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3763 to 1231. [2019-01-12 15:37:28,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1231 states. [2019-01-12 15:37:28,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1231 states to 1231 states and 1583 transitions. [2019-01-12 15:37:28,963 INFO L78 Accepts]: Start accepts. Automaton has 1231 states and 1583 transitions. Word has length 127 [2019-01-12 15:37:28,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:28,963 INFO L480 AbstractCegarLoop]: Abstraction has 1231 states and 1583 transitions. [2019-01-12 15:37:28,963 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-01-12 15:37:28,963 INFO L276 IsEmpty]: Start isEmpty. Operand 1231 states and 1583 transitions. [2019-01-12 15:37:28,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2019-01-12 15:37:28,965 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:28,966 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:28,966 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:28,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:28,966 INFO L82 PathProgramCache]: Analyzing trace with hash 406746349, now seen corresponding path program 1 times [2019-01-12 15:37:28,966 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:28,967 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:28,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:28,968 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:28,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:28,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:29,419 WARN L181 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 20 DAG size of output: 7 [2019-01-12 15:37:29,487 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 21 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:29,488 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:29,489 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:29,498 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:29,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:29,613 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:29,798 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-01-12 15:37:29,817 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:29,818 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2019-01-12 15:37:29,818 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-01-12 15:37:29,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-01-12 15:37:29,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2019-01-12 15:37:29,819 INFO L87 Difference]: Start difference. First operand 1231 states and 1583 transitions. Second operand 15 states. [2019-01-12 15:37:33,081 WARN L181 SmtUtils]: Spent 101.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2019-01-12 15:37:34,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:34,489 INFO L93 Difference]: Finished difference Result 4404 states and 5867 transitions. [2019-01-12 15:37:34,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2019-01-12 15:37:34,491 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 130 [2019-01-12 15:37:34,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:34,494 INFO L225 Difference]: With dead ends: 4404 [2019-01-12 15:37:34,494 INFO L226 Difference]: Without dead ends: 3379 [2019-01-12 15:37:34,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1657 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=806, Invalid=4306, Unknown=0, NotChecked=0, Total=5112 [2019-01-12 15:37:34,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3379 states. [2019-01-12 15:37:34,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3379 to 1242. [2019-01-12 15:37:34,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1242 states. [2019-01-12 15:37:34,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1242 states to 1242 states and 1602 transitions. [2019-01-12 15:37:34,890 INFO L78 Accepts]: Start accepts. Automaton has 1242 states and 1602 transitions. Word has length 130 [2019-01-12 15:37:34,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:34,891 INFO L480 AbstractCegarLoop]: Abstraction has 1242 states and 1602 transitions. [2019-01-12 15:37:34,891 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-01-12 15:37:34,891 INFO L276 IsEmpty]: Start isEmpty. Operand 1242 states and 1602 transitions. [2019-01-12 15:37:34,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-01-12 15:37:34,893 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:34,893 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:34,893 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:34,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:34,893 INFO L82 PathProgramCache]: Analyzing trace with hash 665207461, now seen corresponding path program 1 times [2019-01-12 15:37:34,894 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:34,894 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:34,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:34,895 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:34,895 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:34,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:35,182 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 32 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:35,183 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:35,183 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:35,199 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:35,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:35,321 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:35,420 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-12 15:37:35,449 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:35,450 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2019-01-12 15:37:35,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-01-12 15:37:35,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-01-12 15:37:35,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2019-01-12 15:37:35,451 INFO L87 Difference]: Start difference. First operand 1242 states and 1602 transitions. Second operand 15 states. [2019-01-12 15:37:37,378 WARN L181 SmtUtils]: Spent 170.00 ms on a formula simplification that was a NOOP. DAG size: 22 [2019-01-12 15:37:44,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:44,826 INFO L93 Difference]: Finished difference Result 7126 states and 9387 transitions. [2019-01-12 15:37:44,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 109 states. [2019-01-12 15:37:44,827 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 135 [2019-01-12 15:37:44,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:44,832 INFO L225 Difference]: With dead ends: 7126 [2019-01-12 15:37:44,832 INFO L226 Difference]: Without dead ends: 6022 [2019-01-12 15:37:44,837 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 182 SyntacticMatches, 0 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4799 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=2570, Invalid=11950, Unknown=0, NotChecked=0, Total=14520 [2019-01-12 15:37:44,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6022 states. [2019-01-12 15:37:45,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6022 to 1268. [2019-01-12 15:37:45,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1268 states. [2019-01-12 15:37:45,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1268 states to 1268 states and 1618 transitions. [2019-01-12 15:37:45,390 INFO L78 Accepts]: Start accepts. Automaton has 1268 states and 1618 transitions. Word has length 135 [2019-01-12 15:37:45,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:45,390 INFO L480 AbstractCegarLoop]: Abstraction has 1268 states and 1618 transitions. [2019-01-12 15:37:45,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-01-12 15:37:45,390 INFO L276 IsEmpty]: Start isEmpty. Operand 1268 states and 1618 transitions. [2019-01-12 15:37:45,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-01-12 15:37:45,392 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:45,393 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:45,393 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:45,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:45,393 INFO L82 PathProgramCache]: Analyzing trace with hash 1616018719, now seen corresponding path program 1 times [2019-01-12 15:37:45,393 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:45,393 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:45,394 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:45,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:45,395 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:45,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:45,760 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 16 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:45,760 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:45,760 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:45,771 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:45,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:45,895 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:46,690 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 26 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:46,709 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-12 15:37:46,709 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 12] total 18 [2019-01-12 15:37:46,710 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-01-12 15:37:46,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-01-12 15:37:46,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2019-01-12 15:37:46,710 INFO L87 Difference]: Start difference. First operand 1268 states and 1618 transitions. Second operand 19 states. [2019-01-12 15:37:52,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:52,311 INFO L93 Difference]: Finished difference Result 5004 states and 6472 transitions. [2019-01-12 15:37:52,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2019-01-12 15:37:52,313 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 135 [2019-01-12 15:37:52,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:52,316 INFO L225 Difference]: With dead ends: 5004 [2019-01-12 15:37:52,316 INFO L226 Difference]: Without dead ends: 3964 [2019-01-12 15:37:52,321 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 224 GetRequests, 121 SyntacticMatches, 4 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3560 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=1965, Invalid=8135, Unknown=0, NotChecked=0, Total=10100 [2019-01-12 15:37:52,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3964 states. [2019-01-12 15:37:52,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3964 to 1876. [2019-01-12 15:37:52,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1876 states. [2019-01-12 15:37:52,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1876 states to 1876 states and 2405 transitions. [2019-01-12 15:37:52,958 INFO L78 Accepts]: Start accepts. Automaton has 1876 states and 2405 transitions. Word has length 135 [2019-01-12 15:37:52,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:52,958 INFO L480 AbstractCegarLoop]: Abstraction has 1876 states and 2405 transitions. [2019-01-12 15:37:52,959 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-01-12 15:37:52,959 INFO L276 IsEmpty]: Start isEmpty. Operand 1876 states and 2405 transitions. [2019-01-12 15:37:52,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-01-12 15:37:52,961 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:52,961 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:52,962 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:52,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:52,962 INFO L82 PathProgramCache]: Analyzing trace with hash 1144223334, now seen corresponding path program 1 times [2019-01-12 15:37:52,962 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:52,962 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:52,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:52,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:52,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:52,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:53,167 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2019-01-12 15:37:53,168 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:53,168 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:37:53,168 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:37:53,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:37:53,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:53,172 INFO L87 Difference]: Start difference. First operand 1876 states and 2405 transitions. Second operand 4 states. [2019-01-12 15:37:53,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:53,738 INFO L93 Difference]: Finished difference Result 3201 states and 4152 transitions. [2019-01-12 15:37:53,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:37:53,740 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 136 [2019-01-12 15:37:53,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:53,742 INFO L225 Difference]: With dead ends: 3201 [2019-01-12 15:37:53,742 INFO L226 Difference]: Without dead ends: 1516 [2019-01-12 15:37:53,745 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:37:53,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1516 states. [2019-01-12 15:37:54,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1516 to 1516. [2019-01-12 15:37:54,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1516 states. [2019-01-12 15:37:54,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1516 states to 1516 states and 1934 transitions. [2019-01-12 15:37:54,212 INFO L78 Accepts]: Start accepts. Automaton has 1516 states and 1934 transitions. Word has length 136 [2019-01-12 15:37:54,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:54,212 INFO L480 AbstractCegarLoop]: Abstraction has 1516 states and 1934 transitions. [2019-01-12 15:37:54,212 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:37:54,213 INFO L276 IsEmpty]: Start isEmpty. Operand 1516 states and 1934 transitions. [2019-01-12 15:37:54,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-01-12 15:37:54,214 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:54,215 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:54,215 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:54,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:54,215 INFO L82 PathProgramCache]: Analyzing trace with hash 2032965332, now seen corresponding path program 1 times [2019-01-12 15:37:54,215 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:54,216 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:54,216 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:54,216 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:54,217 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:54,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:54,504 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-01-12 15:37:54,505 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:37:54,505 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:37:54,505 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:37:54,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:37:54,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:37:54,506 INFO L87 Difference]: Start difference. First operand 1516 states and 1934 transitions. Second operand 6 states. [2019-01-12 15:37:56,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:37:56,951 INFO L93 Difference]: Finished difference Result 8106 states and 10460 transitions. [2019-01-12 15:37:56,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-01-12 15:37:56,952 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 137 [2019-01-12 15:37:56,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:37:56,959 INFO L225 Difference]: With dead ends: 8106 [2019-01-12 15:37:56,960 INFO L226 Difference]: Without dead ends: 6781 [2019-01-12 15:37:56,964 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-01-12 15:37:56,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6781 states. [2019-01-12 15:37:57,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6781 to 1885. [2019-01-12 15:37:57,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1885 states. [2019-01-12 15:37:57,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1885 states to 1885 states and 2365 transitions. [2019-01-12 15:37:57,559 INFO L78 Accepts]: Start accepts. Automaton has 1885 states and 2365 transitions. Word has length 137 [2019-01-12 15:37:57,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:37:57,559 INFO L480 AbstractCegarLoop]: Abstraction has 1885 states and 2365 transitions. [2019-01-12 15:37:57,559 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:37:57,559 INFO L276 IsEmpty]: Start isEmpty. Operand 1885 states and 2365 transitions. [2019-01-12 15:37:57,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-01-12 15:37:57,562 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:37:57,563 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:37:57,563 INFO L423 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:37:57,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:37:57,564 INFO L82 PathProgramCache]: Analyzing trace with hash 81063849, now seen corresponding path program 1 times [2019-01-12 15:37:57,564 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:37:57,564 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:37:57,570 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:57,573 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:57,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:37:57,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:57,828 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:37:57,828 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:37:57,828 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:37:57,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:37:57,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:37:57,958 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:37:58,036 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-12 15:37:58,057 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-12 15:37:58,057 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 13 [2019-01-12 15:37:58,058 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-01-12 15:37:58,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-01-12 15:37:58,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2019-01-12 15:37:58,058 INFO L87 Difference]: Start difference. First operand 1885 states and 2365 transitions. Second operand 13 states. [2019-01-12 15:38:03,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:38:03,956 INFO L93 Difference]: Finished difference Result 7564 states and 9676 transitions. [2019-01-12 15:38:03,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-01-12 15:38:03,958 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 139 [2019-01-12 15:38:03,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:38:03,964 INFO L225 Difference]: With dead ends: 7564 [2019-01-12 15:38:03,964 INFO L226 Difference]: Without dead ends: 5850 [2019-01-12 15:38:03,968 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1832 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=878, Invalid=4672, Unknown=0, NotChecked=0, Total=5550 [2019-01-12 15:38:03,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5850 states. [2019-01-12 15:38:04,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5850 to 1978. [2019-01-12 15:38:04,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1978 states. [2019-01-12 15:38:04,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1978 states to 1978 states and 2489 transitions. [2019-01-12 15:38:04,570 INFO L78 Accepts]: Start accepts. Automaton has 1978 states and 2489 transitions. Word has length 139 [2019-01-12 15:38:04,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:38:04,570 INFO L480 AbstractCegarLoop]: Abstraction has 1978 states and 2489 transitions. [2019-01-12 15:38:04,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-01-12 15:38:04,571 INFO L276 IsEmpty]: Start isEmpty. Operand 1978 states and 2489 transitions. [2019-01-12 15:38:04,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-01-12 15:38:04,573 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:38:04,573 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:38:04,573 INFO L423 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:38:04,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:38:04,574 INFO L82 PathProgramCache]: Analyzing trace with hash -122865786, now seen corresponding path program 1 times [2019-01-12 15:38:04,574 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:38:04,574 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:38:04,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:04,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:04,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:04,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:04,841 WARN L181 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 3 [2019-01-12 15:38:05,008 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 15 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:38:05,008 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:38:05,008 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:38:05,020 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:05,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:05,179 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:38:05,361 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 15 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:38:05,382 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-12 15:38:05,382 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 9] total 11 [2019-01-12 15:38:05,382 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-01-12 15:38:05,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-01-12 15:38:05,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2019-01-12 15:38:05,384 INFO L87 Difference]: Start difference. First operand 1978 states and 2489 transitions. Second operand 12 states. [2019-01-12 15:38:07,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:38:07,715 INFO L93 Difference]: Finished difference Result 5604 states and 7097 transitions. [2019-01-12 15:38:07,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-01-12 15:38:07,717 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 139 [2019-01-12 15:38:07,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:38:07,721 INFO L225 Difference]: With dead ends: 5604 [2019-01-12 15:38:07,721 INFO L226 Difference]: Without dead ends: 3817 [2019-01-12 15:38:07,724 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 128 SyntacticMatches, 10 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=278, Invalid=778, Unknown=0, NotChecked=0, Total=1056 [2019-01-12 15:38:07,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3817 states. [2019-01-12 15:38:08,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3817 to 1911. [2019-01-12 15:38:08,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1911 states. [2019-01-12 15:38:08,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1911 states to 1911 states and 2403 transitions. [2019-01-12 15:38:08,320 INFO L78 Accepts]: Start accepts. Automaton has 1911 states and 2403 transitions. Word has length 139 [2019-01-12 15:38:08,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:38:08,320 INFO L480 AbstractCegarLoop]: Abstraction has 1911 states and 2403 transitions. [2019-01-12 15:38:08,320 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-01-12 15:38:08,320 INFO L276 IsEmpty]: Start isEmpty. Operand 1911 states and 2403 transitions. [2019-01-12 15:38:08,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-01-12 15:38:08,323 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:38:08,323 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:38:08,323 INFO L423 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:38:08,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:38:08,324 INFO L82 PathProgramCache]: Analyzing trace with hash 1504281713, now seen corresponding path program 1 times [2019-01-12 15:38:08,324 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:38:08,324 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:38:08,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:08,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:08,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:08,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:08,699 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:38:08,699 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:38:08,699 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:38:08,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:08,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:08,831 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:38:08,881 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:38:08,899 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-12 15:38:08,900 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 8 [2019-01-12 15:38:08,900 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-01-12 15:38:08,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-01-12 15:38:08,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:38:08,901 INFO L87 Difference]: Start difference. First operand 1911 states and 2403 transitions. Second operand 8 states. [2019-01-12 15:38:11,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:38:11,628 INFO L93 Difference]: Finished difference Result 7857 states and 9974 transitions. [2019-01-12 15:38:11,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-01-12 15:38:11,629 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 140 [2019-01-12 15:38:11,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:38:11,635 INFO L225 Difference]: With dead ends: 7857 [2019-01-12 15:38:11,635 INFO L226 Difference]: Without dead ends: 6137 [2019-01-12 15:38:11,638 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 139 SyntacticMatches, 5 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=129, Invalid=423, Unknown=0, NotChecked=0, Total=552 [2019-01-12 15:38:11,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6137 states. [2019-01-12 15:38:12,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6137 to 3072. [2019-01-12 15:38:12,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3072 states. [2019-01-12 15:38:12,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3072 states to 3072 states and 3876 transitions. [2019-01-12 15:38:12,700 INFO L78 Accepts]: Start accepts. Automaton has 3072 states and 3876 transitions. Word has length 140 [2019-01-12 15:38:12,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:38:12,700 INFO L480 AbstractCegarLoop]: Abstraction has 3072 states and 3876 transitions. [2019-01-12 15:38:12,701 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-01-12 15:38:12,701 INFO L276 IsEmpty]: Start isEmpty. Operand 3072 states and 3876 transitions. [2019-01-12 15:38:12,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-01-12 15:38:12,704 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:38:12,704 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:38:12,704 INFO L423 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:38:12,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:38:12,706 INFO L82 PathProgramCache]: Analyzing trace with hash 1622723187, now seen corresponding path program 1 times [2019-01-12 15:38:12,706 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:38:12,706 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:38:12,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:12,707 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:12,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:12,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:12,924 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2019-01-12 15:38:12,925 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:38:12,925 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-12 15:38:12,925 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-12 15:38:12,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-12 15:38:12,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:38:12,926 INFO L87 Difference]: Start difference. First operand 3072 states and 3876 transitions. Second operand 4 states. [2019-01-12 15:38:13,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:38:13,830 INFO L93 Difference]: Finished difference Result 5371 states and 6836 transitions. [2019-01-12 15:38:13,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-12 15:38:13,831 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 140 [2019-01-12 15:38:13,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:38:13,834 INFO L225 Difference]: With dead ends: 5371 [2019-01-12 15:38:13,834 INFO L226 Difference]: Without dead ends: 2490 [2019-01-12 15:38:13,837 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-01-12 15:38:13,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2490 states. [2019-01-12 15:38:14,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2490 to 2479. [2019-01-12 15:38:14,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2479 states. [2019-01-12 15:38:14,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2479 states to 2479 states and 3124 transitions. [2019-01-12 15:38:14,649 INFO L78 Accepts]: Start accepts. Automaton has 2479 states and 3124 transitions. Word has length 140 [2019-01-12 15:38:14,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:38:14,649 INFO L480 AbstractCegarLoop]: Abstraction has 2479 states and 3124 transitions. [2019-01-12 15:38:14,649 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-12 15:38:14,649 INFO L276 IsEmpty]: Start isEmpty. Operand 2479 states and 3124 transitions. [2019-01-12 15:38:14,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2019-01-12 15:38:14,652 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:38:14,652 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:38:14,652 INFO L423 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:38:14,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:38:14,652 INFO L82 PathProgramCache]: Analyzing trace with hash -340552402, now seen corresponding path program 1 times [2019-01-12 15:38:14,653 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:38:14,653 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:38:14,654 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:14,654 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:14,654 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:14,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:14,979 WARN L181 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 9 DAG size of output: 8 [2019-01-12 15:38:15,237 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 8 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:38:15,237 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:38:15,237 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:38:15,250 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:15,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:15,371 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:38:15,454 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 8 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:38:15,484 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-12 15:38:15,484 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2019-01-12 15:38:15,485 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-01-12 15:38:15,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-01-12 15:38:15,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-01-12 15:38:15,485 INFO L87 Difference]: Start difference. First operand 2479 states and 3124 transitions. Second operand 8 states. [2019-01-12 15:38:18,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:38:18,600 INFO L93 Difference]: Finished difference Result 9333 states and 11952 transitions. [2019-01-12 15:38:18,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-01-12 15:38:18,600 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 143 [2019-01-12 15:38:18,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:38:18,607 INFO L225 Difference]: With dead ends: 9333 [2019-01-12 15:38:18,607 INFO L226 Difference]: Without dead ends: 7065 [2019-01-12 15:38:18,611 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 152 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2019-01-12 15:38:18,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7065 states. [2019-01-12 15:38:19,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7065 to 2537. [2019-01-12 15:38:19,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2537 states. [2019-01-12 15:38:19,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2537 states to 2537 states and 3178 transitions. [2019-01-12 15:38:19,536 INFO L78 Accepts]: Start accepts. Automaton has 2537 states and 3178 transitions. Word has length 143 [2019-01-12 15:38:19,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:38:19,536 INFO L480 AbstractCegarLoop]: Abstraction has 2537 states and 3178 transitions. [2019-01-12 15:38:19,536 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-01-12 15:38:19,537 INFO L276 IsEmpty]: Start isEmpty. Operand 2537 states and 3178 transitions. [2019-01-12 15:38:19,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2019-01-12 15:38:19,539 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:38:19,539 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:38:19,539 INFO L423 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:38:19,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:38:19,540 INFO L82 PathProgramCache]: Analyzing trace with hash -1882876842, now seen corresponding path program 1 times [2019-01-12 15:38:19,540 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:38:19,540 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:38:19,541 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:19,543 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:19,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:19,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:19,825 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 24 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-01-12 15:38:19,826 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:38:19,826 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-12 15:38:19,826 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-12 15:38:19,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-12 15:38:19,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-01-12 15:38:19,827 INFO L87 Difference]: Start difference. First operand 2537 states and 3178 transitions. Second operand 6 states. [2019-01-12 15:38:22,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:38:22,418 INFO L93 Difference]: Finished difference Result 8787 states and 11214 transitions. [2019-01-12 15:38:22,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-12 15:38:22,418 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 144 [2019-01-12 15:38:22,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:38:22,425 INFO L225 Difference]: With dead ends: 8787 [2019-01-12 15:38:22,426 INFO L226 Difference]: Without dead ends: 6461 [2019-01-12 15:38:22,430 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-01-12 15:38:22,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6461 states. [2019-01-12 15:38:23,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6461 to 2563. [2019-01-12 15:38:23,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2563 states. [2019-01-12 15:38:23,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2563 states to 2563 states and 3207 transitions. [2019-01-12 15:38:23,396 INFO L78 Accepts]: Start accepts. Automaton has 2563 states and 3207 transitions. Word has length 144 [2019-01-12 15:38:23,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:38:23,397 INFO L480 AbstractCegarLoop]: Abstraction has 2563 states and 3207 transitions. [2019-01-12 15:38:23,397 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-12 15:38:23,397 INFO L276 IsEmpty]: Start isEmpty. Operand 2563 states and 3207 transitions. [2019-01-12 15:38:23,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-01-12 15:38:23,399 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:38:23,399 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:38:23,400 INFO L423 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:38:23,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:38:23,400 INFO L82 PathProgramCache]: Analyzing trace with hash 439953908, now seen corresponding path program 1 times [2019-01-12 15:38:23,400 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:38:23,400 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:38:23,401 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:23,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:23,401 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:23,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:24,034 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 10 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:38:24,035 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-12 15:38:24,035 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-12 15:38:24,055 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:24,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:38:24,168 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-12 15:38:24,304 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 17 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:38:24,322 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-12 15:38:24,322 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2019-01-12 15:38:24,323 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-01-12 15:38:24,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-01-12 15:38:24,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2019-01-12 15:38:24,323 INFO L87 Difference]: Start difference. First operand 2563 states and 3207 transitions. Second operand 12 states. [2019-01-12 15:38:26,913 WARN L181 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 39 [2019-01-12 15:38:29,928 WARN L181 SmtUtils]: Spent 169.00 ms on a formula simplification that was a NOOP. DAG size: 23 [2019-01-12 15:38:36,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:38:36,600 INFO L93 Difference]: Finished difference Result 17408 states and 22423 transitions. [2019-01-12 15:38:36,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 124 states. [2019-01-12 15:38:36,602 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 145 [2019-01-12 15:38:36,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:38:36,615 INFO L225 Difference]: With dead ends: 17408 [2019-01-12 15:38:36,615 INFO L226 Difference]: Without dead ends: 15056 [2019-01-12 15:38:36,621 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 325 GetRequests, 194 SyntacticMatches, 0 SemanticMatches, 131 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7279 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=2964, Invalid=14592, Unknown=0, NotChecked=0, Total=17556 [2019-01-12 15:38:36,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15056 states. [2019-01-12 15:38:37,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15056 to 3238. [2019-01-12 15:38:37,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3238 states. [2019-01-12 15:38:37,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3238 states to 3238 states and 4045 transitions. [2019-01-12 15:38:37,874 INFO L78 Accepts]: Start accepts. Automaton has 3238 states and 4045 transitions. Word has length 145 [2019-01-12 15:38:37,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:38:37,874 INFO L480 AbstractCegarLoop]: Abstraction has 3238 states and 4045 transitions. [2019-01-12 15:38:37,874 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-01-12 15:38:37,874 INFO L276 IsEmpty]: Start isEmpty. Operand 3238 states and 4045 transitions. [2019-01-12 15:38:37,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-01-12 15:38:37,877 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:38:37,877 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:38:37,877 INFO L423 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:38:37,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:38:37,878 INFO L82 PathProgramCache]: Analyzing trace with hash -372990953, now seen corresponding path program 1 times [2019-01-12 15:38:37,878 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:38:37,878 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:38:37,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:37,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:38:37,879 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:38:37,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-12 15:38:37,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-12 15:38:38,047 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2019-01-12 15:38:38,251 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.01 03:38:38 BoogieIcfgContainer [2019-01-12 15:38:38,252 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-01-12 15:38:38,252 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-01-12 15:38:38,252 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-01-12 15:38:38,252 INFO L276 PluginConnector]: Witness Printer initialized [2019-01-12 15:38:38,253 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:36:34" (3/4) ... [2019-01-12 15:38:38,261 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2019-01-12 15:38:38,614 INFO L145 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-01-12 15:38:38,617 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-01-12 15:38:38,618 INFO L168 Benchmark]: Toolchain (without parser) took 127309.78 ms. Allocated memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: 1.7 GB). Free memory was 944.6 MB in the beginning and 2.6 GB in the end (delta: -1.7 GB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-01-12 15:38:38,620 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 972.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-01-12 15:38:38,620 INFO L168 Benchmark]: CACSL2BoogieTranslator took 538.37 ms. Allocated memory is still 1.0 GB. Free memory was 944.6 MB in the beginning and 923.2 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2019-01-12 15:38:38,620 INFO L168 Benchmark]: Boogie Procedure Inliner took 152.72 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 923.2 MB in the beginning and 1.1 GB in the end (delta: -208.4 MB). Peak memory consumption was 14.0 MB. Max. memory is 11.5 GB. [2019-01-12 15:38:38,621 INFO L168 Benchmark]: Boogie Preprocessor took 59.54 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2019-01-12 15:38:38,623 INFO L168 Benchmark]: RCFGBuilder took 2173.00 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 90.2 MB). Peak memory consumption was 90.2 MB. Max. memory is 11.5 GB. [2019-01-12 15:38:38,623 INFO L168 Benchmark]: TraceAbstraction took 124015.51 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 794.3 MB in the end (delta: 240.5 MB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. [2019-01-12 15:38:38,623 INFO L168 Benchmark]: Witness Printer took 365.05 ms. Allocated memory was 2.6 GB in the beginning and 2.7 GB in the end (delta: 125.8 MB). Free memory was 794.3 MB in the beginning and 2.6 GB in the end (delta: -1.8 GB). Peak memory consumption was 245.8 kB. Max. memory is 11.5 GB. [2019-01-12 15:38:38,628 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 972.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 538.37 ms. Allocated memory is still 1.0 GB. Free memory was 944.6 MB in the beginning and 923.2 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 152.72 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 923.2 MB in the beginning and 1.1 GB in the end (delta: -208.4 MB). Peak memory consumption was 14.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 59.54 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * RCFGBuilder took 2173.00 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 90.2 MB). Peak memory consumption was 90.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 124015.51 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 794.3 MB in the end (delta: 240.5 MB). Peak memory consumption was 1.7 GB. Max. memory is 11.5 GB. * Witness Printer took 365.05 ms. Allocated memory was 2.6 GB in the beginning and 2.7 GB in the end (delta: 125.8 MB). Free memory was 794.3 MB in the beginning and 2.6 GB in the end (delta: -1.8 GB). Peak memory consumption was 245.8 kB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 662]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L69] msg_t nomsg = (msg_t )-1; [L70] port_t cs1 ; [L71] int8_t cs1_old ; [L72] int8_t cs1_new ; [L73] port_t cs2 ; [L74] int8_t cs2_old ; [L75] int8_t cs2_new ; [L76] port_t s1s2 ; [L77] int8_t s1s2_old ; [L78] int8_t s1s2_new ; [L79] port_t s1s1 ; [L80] int8_t s1s1_old ; [L81] int8_t s1s1_new ; [L82] port_t s2s1 ; [L83] int8_t s2s1_old ; [L84] int8_t s2s1_new ; [L85] port_t s2s2 ; [L86] int8_t s2s2_old ; [L87] int8_t s2s2_new ; [L88] port_t s1p ; [L89] int8_t s1p_old ; [L90] int8_t s1p_new ; [L91] port_t s2p ; [L92] int8_t s2p_old ; [L93] int8_t s2p_new ; [L96] _Bool side1Failed ; [L97] _Bool side2Failed ; [L98] msg_t side1_written ; [L99] msg_t side2_written ; [L102] static _Bool side1Failed_History_0 ; [L103] static _Bool side1Failed_History_1 ; [L104] static _Bool side1Failed_History_2 ; [L105] static _Bool side2Failed_History_0 ; [L106] static _Bool side2Failed_History_1 ; [L107] static _Bool side2Failed_History_2 ; [L108] static int8_t active_side_History_0 ; [L109] static int8_t active_side_History_1 ; [L110] static int8_t active_side_History_2 ; [L111] static msg_t manual_selection_History_0 ; [L112] static msg_t manual_selection_History_1 ; [L113] static msg_t manual_selection_History_2 ; [L463] void (*nodes[4])(void) = { & Console_task_each_pals_period, & Side1_activestandby_task_each_pals_period, & Side2_activestandby_task_each_pals_period, & Pendulum_prism_task_each_pals_period}; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L585] int c1 ; [L586] int i2 ; [L589] c1 = 0 [L590] side1Failed = __VERIFIER_nondet_bool() [L591] side2Failed = __VERIFIER_nondet_bool() [L592] side1_written = __VERIFIER_nondet_char() [L593] side2_written = __VERIFIER_nondet_char() [L594] side1Failed_History_0 = __VERIFIER_nondet_bool() [L595] side1Failed_History_1 = __VERIFIER_nondet_bool() [L596] side1Failed_History_2 = __VERIFIER_nondet_bool() [L597] side2Failed_History_0 = __VERIFIER_nondet_bool() [L598] side2Failed_History_1 = __VERIFIER_nondet_bool() [L599] side2Failed_History_2 = __VERIFIER_nondet_bool() [L600] active_side_History_0 = __VERIFIER_nondet_char() [L601] active_side_History_1 = __VERIFIER_nondet_char() [L602] active_side_History_2 = __VERIFIER_nondet_char() [L603] manual_selection_History_0 = __VERIFIER_nondet_char() [L604] manual_selection_History_1 = __VERIFIER_nondet_char() [L605] manual_selection_History_2 = __VERIFIER_nondet_char() [L239] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L242] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L245] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L248] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L251] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L254] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L257] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L260] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L263] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L269] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L272] COND FALSE !((int )manual_selection_History_2 != 0) [L275] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 = init() [L608] cs1_old = nomsg [L609] cs1_new = nomsg [L610] cs2_old = nomsg [L611] cs2_new = nomsg [L612] s1s2_old = nomsg [L613] s1s2_new = nomsg [L614] s1s1_old = nomsg [L615] s1s1_new = nomsg [L616] s2s1_old = nomsg [L617] s2s1_new = nomsg [L618] s2s2_old = nomsg [L619] s2s2_new = nomsg [L620] s1p_old = nomsg [L621] s1p_new = nomsg [L622] s2p_old = nomsg [L623] s2p_new = nomsg [L624] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE i2 < 10 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND TRUE (int )side1 == (int )side2 [L390] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L451] COND FALSE !((int )side2 == 0) [L454] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=5, cs1_old=-1, cs2=0, cs2_new=5, cs2_old=-1, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND TRUE ! tmp___0 [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L501] tmp___1 = read_side1_failed_history((unsigned char)1) [L502] COND TRUE ! tmp___1 [L130] COND TRUE (int )index == 0 [L131] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L503] tmp___2 = read_side1_failed_history((unsigned char)0) [L504] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L545] tmp___11 = read_side1_failed_history((unsigned char)1) [L546] COND TRUE ! tmp___11 [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L547] tmp___12 = read_side2_failed_history((unsigned char)1) [L548] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L190] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L193] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L196] COND TRUE (int )index == 2 [L197] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L561] tmp___20 = read_active_side_history((unsigned char)2) [L562] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L660] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L649] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=5, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L625] COND TRUE i2 < 10 [L293] msg_t manual_selection ; [L294] char tmp ; [L297] tmp = __VERIFIER_nondet_char() [L298] manual_selection = tmp [L209] manual_selection_History_2 = manual_selection_History_1 [L210] manual_selection_History_1 = manual_selection_History_0 [L211] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L300] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L301] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=-1, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L301] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L302] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L308] int8_t side1 ; [L309] int8_t side2 ; [L310] msg_t manual_selection ; [L311] int8_t next_state ; [L314] side1 = nomsg [L315] side2 = nomsg [L316] manual_selection = (msg_t )0 [L317] side1Failed = __VERIFIER_nondet_bool() [L119] side1Failed_History_2 = side1Failed_History_1 [L120] side1Failed_History_1 = side1Failed_History_0 [L121] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L319] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L320] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L321] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L321] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L322] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L322] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L323] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L365] int8_t side1 ; [L366] int8_t side2 ; [L367] msg_t manual_selection ; [L368] int8_t next_state ; [L371] side1 = nomsg [L372] side2 = nomsg [L373] manual_selection = (msg_t )0 [L374] side2Failed = __VERIFIER_nondet_bool() [L149] side2Failed_History_2 = side2Failed_History_1 [L150] side2Failed_History_1 = side2Failed_History_0 [L151] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=5, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L376] COND FALSE !(\read(side2Failed)) [L383] side1 = s1s2_old [L384] s1s2_old = nomsg [L385] side2 = s2s2_old [L386] s2s2_old = nomsg [L387] manual_selection = cs2_old [L388] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L389] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L392] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L393] COND TRUE (int )side2 != (int )nomsg [L394] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L413] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L414] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L414] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L415] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L415] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L416] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L422] int8_t active_side ; [L423] int8_t tmp ; [L424] int8_t side1 ; [L425] int8_t side2 ; [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L428] tmp = read_active_side_history((unsigned char)0) [L429] active_side = tmp [L430] side1 = nomsg [L431] side2 = nomsg [L432] side1 = s1p_old [L433] s1p_old = nomsg [L434] side2 = s2p_old [L435] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L436] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L451] COND TRUE (int )side2 == 0 [L452] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L179] active_side_History_2 = active_side_History_1 [L180] active_side_History_1 = active_side_History_0 [L181] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=5, cs2=0, cs2_new=0, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L631] cs1_old = cs1_new [L632] cs1_new = nomsg [L633] cs2_old = cs2_new [L634] cs2_new = nomsg [L635] s1s2_old = s1s2_new [L636] s1s2_new = nomsg [L637] s1s1_old = s1s1_new [L638] s1s1_new = nomsg [L639] s2s1_old = s2s1_new [L640] s2s1_new = nomsg [L641] s2s2_old = s2s2_new [L642] s2s2_new = nomsg [L643] s1p_old = s1p_new [L644] s1p_new = nomsg [L645] s2p_old = s2p_new [L646] s2p_new = nomsg [L466] int tmp ; [L467] msg_t tmp___0 ; [L468] _Bool tmp___1 ; [L469] _Bool tmp___2 ; [L470] _Bool tmp___3 ; [L471] _Bool tmp___4 ; [L472] int8_t tmp___5 ; [L473] _Bool tmp___6 ; [L474] _Bool tmp___7 ; [L475] _Bool tmp___8 ; [L476] int8_t tmp___9 ; [L477] _Bool tmp___10 ; [L478] _Bool tmp___11 ; [L479] _Bool tmp___12 ; [L480] msg_t tmp___13 ; [L481] _Bool tmp___14 ; [L482] _Bool tmp___15 ; [L483] _Bool tmp___16 ; [L484] _Bool tmp___17 ; [L485] int8_t tmp___18 ; [L486] int8_t tmp___19 ; [L487] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L493] COND TRUE ! side2Failed [L494] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L220] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L223] COND TRUE (int )index == 1 [L224] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L499] tmp___0 = read_manual_selection_history((unsigned char)1) [L500] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L130] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L133] COND TRUE (int )index == 1 [L134] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] tmp___7 = read_side1_failed_history((unsigned char)1) [L530] COND TRUE \read(tmp___7) [L160] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L163] COND TRUE (int )index == 1 [L164] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L531] tmp___8 = read_side2_failed_history((unsigned char)1) [L532] COND TRUE ! tmp___8 [L190] COND TRUE (int )index == 0 [L191] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L533] tmp___5 = read_active_side_history((unsigned char)0) [L534] COND FALSE !(! ((int )tmp___5 == 2)) [L160] COND TRUE (int )index == 0 [L161] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] tmp___6 = read_side2_failed_history((unsigned char)0) [L538] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L539] COND TRUE ! ((int )side2_written == 1) [L540] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L647] c1 = check() [L660] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L662] __VERIFIER_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=0, cs2=0, cs2_new=-1, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=5, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 293 locations, 23 error locations. UNSAFE Result, 123.9s OverallTime, 49 OverallIterations, 2 TraceHistogramMax, 87.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 26382 SDtfs, 59385 SDslu, 99132 SDs, 0 SdLazy, 19515 SolverSat, 945 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 29.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2645 GetRequests, 1666 SyntacticMatches, 32 SemanticMatches, 947 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26632 ImplicationChecksByTransitivity, 37.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3238occurred in iteration=48, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 13.7s AutomataMinimizationTime, 48 MinimizatonAttempts, 62931 StatesRemovedByMinimization, 44 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.6s SsaConstructionTime, 1.8s SatisfiabilityAnalysisTime, 17.9s InterpolantComputationTime, 6105 NumberOfCodeBlocks, 6105 NumberOfCodeBlocksAsserted, 60 NumberOfCheckSat, 5901 ConstructedInterpolants, 0 QuantifiedInterpolants, 2396917 SizeOfPredicates, 53 NumberOfNonLiveVariables, 8422 ConjunctsInSsa, 168 ConjunctsInUnsatCore, 59 InterpolantComputations, 43 PerfectInterpolantSequences, 829/1084 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...