./Ultimate.py --spec /storage/repos/svcomp/c/properties/unreach-call.prp --file /storage/repos/svcomp/c/systemc/transmitter.05_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 0ed9222f Calling Ultimate with: java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i /storage/repos/svcomp/c/systemc/transmitter.05_false-unreach-call_false-termination.cil.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8ef5d3a30c95e1a42cc229ca801f47c5cf92951a .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.24-0ed9222-m [2019-01-12 15:24:42,531 INFO L170 SettingsManager]: Resetting all preferences to default values... [2019-01-12 15:24:42,533 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2019-01-12 15:24:42,545 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-01-12 15:24:42,545 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-01-12 15:24:42,546 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-01-12 15:24:42,548 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-01-12 15:24:42,550 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2019-01-12 15:24:42,551 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-01-12 15:24:42,552 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-01-12 15:24:42,554 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-01-12 15:24:42,554 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-01-12 15:24:42,555 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-01-12 15:24:42,556 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-01-12 15:24:42,557 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-01-12 15:24:42,558 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-01-12 15:24:42,559 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-01-12 15:24:42,561 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-01-12 15:24:42,563 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2019-01-12 15:24:42,565 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-01-12 15:24:42,566 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-01-12 15:24:42,567 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-01-12 15:24:42,570 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-01-12 15:24:42,571 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-01-12 15:24:42,571 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-01-12 15:24:42,572 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-01-12 15:24:42,573 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-01-12 15:24:42,574 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-01-12 15:24:42,575 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2019-01-12 15:24:42,576 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-01-12 15:24:42,576 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2019-01-12 15:24:42,577 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-01-12 15:24:42,577 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-01-12 15:24:42,577 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2019-01-12 15:24:42,579 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2019-01-12 15:24:42,579 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2019-01-12 15:24:42,580 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-01-12 15:24:42,595 INFO L110 SettingsManager]: Loading preferences was successful [2019-01-12 15:24:42,596 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2019-01-12 15:24:42,597 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-01-12 15:24:42,597 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2019-01-12 15:24:42,598 INFO L133 SettingsManager]: * Use SBE=true [2019-01-12 15:24:42,598 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-01-12 15:24:42,598 INFO L133 SettingsManager]: * sizeof long=4 [2019-01-12 15:24:42,598 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2019-01-12 15:24:42,599 INFO L133 SettingsManager]: * sizeof POINTER=4 [2019-01-12 15:24:42,599 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2019-01-12 15:24:42,599 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-01-12 15:24:42,599 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-01-12 15:24:42,599 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-01-12 15:24:42,600 INFO L133 SettingsManager]: * sizeof long double=12 [2019-01-12 15:24:42,600 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2019-01-12 15:24:42,600 INFO L133 SettingsManager]: * Use constant arrays=true [2019-01-12 15:24:42,600 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-01-12 15:24:42,600 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-01-12 15:24:42,600 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-01-12 15:24:42,602 INFO L133 SettingsManager]: * To the following directory=./dump/ [2019-01-12 15:24:42,602 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2019-01-12 15:24:42,603 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-12 15:24:42,603 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-01-12 15:24:42,603 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-01-12 15:24:42,603 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-01-12 15:24:42,603 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2019-01-12 15:24:42,603 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-01-12 15:24:42,604 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-01-12 15:24:42,605 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8ef5d3a30c95e1a42cc229ca801f47c5cf92951a [2019-01-12 15:24:42,643 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-01-12 15:24:42,660 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-01-12 15:24:42,667 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-01-12 15:24:42,669 INFO L271 PluginConnector]: Initializing CDTParser... [2019-01-12 15:24:42,669 INFO L276 PluginConnector]: CDTParser initialized [2019-01-12 15:24:42,671 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/svcomp/c/systemc/transmitter.05_false-unreach-call_false-termination.cil.c [2019-01-12 15:24:42,735 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b0f095f0/266a784cccc749a0a801f3c09f9e5afe/FLAGe23a0cfee [2019-01-12 15:24:43,218 INFO L307 CDTParser]: Found 1 translation units. [2019-01-12 15:24:43,219 INFO L161 CDTParser]: Scanning /storage/repos/svcomp/c/systemc/transmitter.05_false-unreach-call_false-termination.cil.c [2019-01-12 15:24:43,241 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b0f095f0/266a784cccc749a0a801f3c09f9e5afe/FLAGe23a0cfee [2019-01-12 15:24:43,519 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0b0f095f0/266a784cccc749a0a801f3c09f9e5afe [2019-01-12 15:24:43,522 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-01-12 15:24:43,524 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-01-12 15:24:43,525 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-01-12 15:24:43,525 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-01-12 15:24:43,529 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2019-01-12 15:24:43,530 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.01 03:24:43" (1/1) ... [2019-01-12 15:24:43,533 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f15c795 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:43, skipping insertion in model container [2019-01-12 15:24:43,534 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.01 03:24:43" (1/1) ... [2019-01-12 15:24:43,542 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-01-12 15:24:43,601 INFO L176 MainTranslator]: Built tables and reachable declarations [2019-01-12 15:24:43,867 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-12 15:24:43,876 INFO L191 MainTranslator]: Completed pre-run [2019-01-12 15:24:43,984 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-12 15:24:44,013 INFO L195 MainTranslator]: Completed translation [2019-01-12 15:24:44,014 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44 WrapperNode [2019-01-12 15:24:44,014 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-01-12 15:24:44,015 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-01-12 15:24:44,015 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-01-12 15:24:44,015 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2019-01-12 15:24:44,105 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,118 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,185 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-01-12 15:24:44,185 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-01-12 15:24:44,185 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-01-12 15:24:44,186 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2019-01-12 15:24:44,201 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,201 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,220 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,224 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,242 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,277 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,287 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... [2019-01-12 15:24:44,296 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-01-12 15:24:44,297 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-01-12 15:24:44,297 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-01-12 15:24:44,297 INFO L276 PluginConnector]: RCFGBuilder initialized [2019-01-12 15:24:44,298 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-12 15:24:44,366 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-01-12 15:24:44,366 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-01-12 15:24:46,920 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-01-12 15:24:46,920 INFO L286 CfgBuilder]: Removed 181 assue(true) statements. [2019-01-12 15:24:46,922 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:24:46 BoogieIcfgContainer [2019-01-12 15:24:46,922 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-01-12 15:24:46,923 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-01-12 15:24:46,923 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-01-12 15:24:46,926 INFO L276 PluginConnector]: TraceAbstraction initialized [2019-01-12 15:24:46,927 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.01 03:24:43" (1/3) ... [2019-01-12 15:24:46,928 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e9823cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.01 03:24:46, skipping insertion in model container [2019-01-12 15:24:46,928 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.01 03:24:44" (2/3) ... [2019-01-12 15:24:46,928 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e9823cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.01 03:24:46, skipping insertion in model container [2019-01-12 15:24:46,928 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:24:46" (3/3) ... [2019-01-12 15:24:46,930 INFO L112 eAbstractionObserver]: Analyzing ICFG transmitter.05_false-unreach-call_false-termination.cil.c [2019-01-12 15:24:46,940 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-01-12 15:24:46,949 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-01-12 15:24:46,967 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-01-12 15:24:47,003 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2019-01-12 15:24:47,004 INFO L382 AbstractCegarLoop]: Interprodecural is true [2019-01-12 15:24:47,004 INFO L383 AbstractCegarLoop]: Hoare is true [2019-01-12 15:24:47,005 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-01-12 15:24:47,005 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-01-12 15:24:47,005 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-01-12 15:24:47,005 INFO L387 AbstractCegarLoop]: Difference is false [2019-01-12 15:24:47,006 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-01-12 15:24:47,006 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-01-12 15:24:47,036 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states. [2019-01-12 15:24:47,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:47,048 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:47,049 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:47,052 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:47,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:47,058 INFO L82 PathProgramCache]: Analyzing trace with hash 1912114834, now seen corresponding path program 1 times [2019-01-12 15:24:47,059 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:47,060 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:47,098 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:47,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:47,099 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:47,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:47,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:47,269 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:47,270 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:24:47,275 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:47,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:47,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:47,294 INFO L87 Difference]: Start difference. First operand 486 states. Second operand 3 states. [2019-01-12 15:24:47,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:47,428 INFO L93 Difference]: Finished difference Result 967 states and 1501 transitions. [2019-01-12 15:24:47,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:47,430 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:47,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:47,450 INFO L225 Difference]: With dead ends: 967 [2019-01-12 15:24:47,450 INFO L226 Difference]: Without dead ends: 482 [2019-01-12 15:24:47,456 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:47,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 482 states. [2019-01-12 15:24:47,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 482 to 482. [2019-01-12 15:24:47,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 482 states. [2019-01-12 15:24:47,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 730 transitions. [2019-01-12 15:24:47,538 INFO L78 Accepts]: Start accepts. Automaton has 482 states and 730 transitions. Word has length 85 [2019-01-12 15:24:47,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:47,538 INFO L480 AbstractCegarLoop]: Abstraction has 482 states and 730 transitions. [2019-01-12 15:24:47,538 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:47,540 INFO L276 IsEmpty]: Start isEmpty. Operand 482 states and 730 transitions. [2019-01-12 15:24:47,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:47,545 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:47,545 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:47,546 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:47,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:47,546 INFO L82 PathProgramCache]: Analyzing trace with hash -1325014384, now seen corresponding path program 1 times [2019-01-12 15:24:47,546 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:47,547 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:47,549 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:47,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:47,549 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:47,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:47,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:47,653 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:47,653 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:47,656 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:47,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:47,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:47,659 INFO L87 Difference]: Start difference. First operand 482 states and 730 transitions. Second operand 3 states. [2019-01-12 15:24:47,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:47,954 INFO L93 Difference]: Finished difference Result 1320 states and 1994 transitions. [2019-01-12 15:24:47,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:47,955 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:47,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:47,962 INFO L225 Difference]: With dead ends: 1320 [2019-01-12 15:24:47,962 INFO L226 Difference]: Without dead ends: 848 [2019-01-12 15:24:47,965 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:47,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 848 states. [2019-01-12 15:24:48,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 848 to 846. [2019-01-12 15:24:48,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:48,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1268 transitions. [2019-01-12 15:24:48,053 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1268 transitions. Word has length 85 [2019-01-12 15:24:48,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:48,054 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1268 transitions. [2019-01-12 15:24:48,054 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:48,055 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1268 transitions. [2019-01-12 15:24:48,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:48,059 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:48,059 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:48,059 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:48,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:48,060 INFO L82 PathProgramCache]: Analyzing trace with hash -1311229201, now seen corresponding path program 1 times [2019-01-12 15:24:48,060 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:48,060 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:48,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:48,063 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:48,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:48,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:48,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:48,196 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:48,196 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:48,197 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:48,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:48,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:48,199 INFO L87 Difference]: Start difference. First operand 846 states and 1268 transitions. Second operand 3 states. [2019-01-12 15:24:48,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:48,348 INFO L93 Difference]: Finished difference Result 1681 states and 2519 transitions. [2019-01-12 15:24:48,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:48,349 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:48,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:48,356 INFO L225 Difference]: With dead ends: 1681 [2019-01-12 15:24:48,356 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:48,358 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:48,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:48,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:48,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:48,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1260 transitions. [2019-01-12 15:24:48,411 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1260 transitions. Word has length 85 [2019-01-12 15:24:48,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:48,411 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1260 transitions. [2019-01-12 15:24:48,411 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:48,412 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1260 transitions. [2019-01-12 15:24:48,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:48,414 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:48,415 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:48,415 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:48,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:48,416 INFO L82 PathProgramCache]: Analyzing trace with hash -86597841, now seen corresponding path program 1 times [2019-01-12 15:24:48,416 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:48,416 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:48,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:48,418 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:48,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:48,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:48,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:48,546 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:48,546 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:48,547 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:48,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:48,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:48,549 INFO L87 Difference]: Start difference. First operand 846 states and 1260 transitions. Second operand 3 states. [2019-01-12 15:24:48,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:48,715 INFO L93 Difference]: Finished difference Result 1680 states and 2502 transitions. [2019-01-12 15:24:48,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:48,716 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:48,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:48,721 INFO L225 Difference]: With dead ends: 1680 [2019-01-12 15:24:48,722 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:48,723 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:48,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:48,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:48,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:48,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1252 transitions. [2019-01-12 15:24:48,765 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1252 transitions. Word has length 85 [2019-01-12 15:24:48,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:48,765 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1252 transitions. [2019-01-12 15:24:48,765 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:48,765 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1252 transitions. [2019-01-12 15:24:48,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:48,769 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:48,769 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:48,769 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:48,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:48,770 INFO L82 PathProgramCache]: Analyzing trace with hash -1571114257, now seen corresponding path program 1 times [2019-01-12 15:24:48,770 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:48,770 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:48,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:48,771 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:48,771 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:48,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:48,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:48,890 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:48,891 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:48,891 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:48,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:48,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:48,892 INFO L87 Difference]: Start difference. First operand 846 states and 1252 transitions. Second operand 3 states. [2019-01-12 15:24:49,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:49,048 INFO L93 Difference]: Finished difference Result 1678 states and 2483 transitions. [2019-01-12 15:24:49,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:49,049 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:49,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:49,054 INFO L225 Difference]: With dead ends: 1678 [2019-01-12 15:24:49,054 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:49,056 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:49,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:49,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:49,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:49,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1244 transitions. [2019-01-12 15:24:49,105 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1244 transitions. Word has length 85 [2019-01-12 15:24:49,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:49,105 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1244 transitions. [2019-01-12 15:24:49,105 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:49,106 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1244 transitions. [2019-01-12 15:24:49,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:49,107 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:49,107 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:49,107 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:49,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:49,108 INFO L82 PathProgramCache]: Analyzing trace with hash -1353664849, now seen corresponding path program 1 times [2019-01-12 15:24:49,108 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:49,108 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:49,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:49,109 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:49,110 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:49,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:49,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:49,206 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:49,206 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:49,207 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:49,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:49,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:49,208 INFO L87 Difference]: Start difference. First operand 846 states and 1244 transitions. Second operand 3 states. [2019-01-12 15:24:49,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:49,425 INFO L93 Difference]: Finished difference Result 1677 states and 2466 transitions. [2019-01-12 15:24:49,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:49,426 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:49,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:49,432 INFO L225 Difference]: With dead ends: 1677 [2019-01-12 15:24:49,432 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:49,434 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:49,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:49,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:49,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:49,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1236 transitions. [2019-01-12 15:24:49,494 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1236 transitions. Word has length 85 [2019-01-12 15:24:49,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:49,495 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1236 transitions. [2019-01-12 15:24:49,495 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:49,495 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1236 transitions. [2019-01-12 15:24:49,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:49,496 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:49,497 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:49,497 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:49,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:49,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1839938287, now seen corresponding path program 1 times [2019-01-12 15:24:49,497 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:49,497 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:49,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:49,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:49,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:49,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:49,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:49,602 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:49,602 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:49,603 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:49,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:49,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:49,607 INFO L87 Difference]: Start difference. First operand 846 states and 1236 transitions. Second operand 3 states. [2019-01-12 15:24:50,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:50,030 INFO L93 Difference]: Finished difference Result 1676 states and 2449 transitions. [2019-01-12 15:24:50,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:50,031 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:50,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:50,035 INFO L225 Difference]: With dead ends: 1676 [2019-01-12 15:24:50,036 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:50,037 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:50,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:50,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:50,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:50,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1216 transitions. [2019-01-12 15:24:50,076 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1216 transitions. Word has length 85 [2019-01-12 15:24:50,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:50,076 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1216 transitions. [2019-01-12 15:24:50,076 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:50,076 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1216 transitions. [2019-01-12 15:24:50,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:50,077 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:50,077 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:50,077 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:50,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:50,078 INFO L82 PathProgramCache]: Analyzing trace with hash -1688218612, now seen corresponding path program 1 times [2019-01-12 15:24:50,078 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:50,078 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:50,079 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:50,079 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:50,079 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:50,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:50,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:50,153 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:50,153 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:50,153 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:50,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:50,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:50,154 INFO L87 Difference]: Start difference. First operand 846 states and 1216 transitions. Second operand 3 states. [2019-01-12 15:24:50,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:50,553 INFO L93 Difference]: Finished difference Result 1675 states and 2408 transitions. [2019-01-12 15:24:50,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:50,554 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:50,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:50,558 INFO L225 Difference]: With dead ends: 1675 [2019-01-12 15:24:50,558 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:50,560 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:50,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:50,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:50,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:50,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1196 transitions. [2019-01-12 15:24:50,598 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1196 transitions. Word has length 85 [2019-01-12 15:24:50,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:50,598 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1196 transitions. [2019-01-12 15:24:50,598 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:50,598 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1196 transitions. [2019-01-12 15:24:50,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:50,599 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:50,599 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:50,600 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:50,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:50,600 INFO L82 PathProgramCache]: Analyzing trace with hash -1961990068, now seen corresponding path program 1 times [2019-01-12 15:24:50,600 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:50,600 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:50,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:50,601 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:50,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:50,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:50,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:50,673 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:50,673 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:50,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:50,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:50,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:50,674 INFO L87 Difference]: Start difference. First operand 846 states and 1196 transitions. Second operand 3 states. [2019-01-12 15:24:51,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:51,059 INFO L93 Difference]: Finished difference Result 1674 states and 2367 transitions. [2019-01-12 15:24:51,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:51,059 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:51,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:51,064 INFO L225 Difference]: With dead ends: 1674 [2019-01-12 15:24:51,064 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:51,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:51,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:51,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:51,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:51,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1176 transitions. [2019-01-12 15:24:51,103 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1176 transitions. Word has length 85 [2019-01-12 15:24:51,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:51,104 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1176 transitions. [2019-01-12 15:24:51,104 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:51,104 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1176 transitions. [2019-01-12 15:24:51,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:51,105 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:51,105 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:51,105 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:51,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:51,106 INFO L82 PathProgramCache]: Analyzing trace with hash -1893352853, now seen corresponding path program 1 times [2019-01-12 15:24:51,106 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:51,106 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:51,107 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:51,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:51,107 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:51,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:51,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:51,191 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:51,191 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:51,192 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:51,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:51,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:51,192 INFO L87 Difference]: Start difference. First operand 846 states and 1176 transitions. Second operand 3 states. [2019-01-12 15:24:51,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:51,592 INFO L93 Difference]: Finished difference Result 1673 states and 2326 transitions. [2019-01-12 15:24:51,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:51,592 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:51,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:51,598 INFO L225 Difference]: With dead ends: 1673 [2019-01-12 15:24:51,598 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:51,600 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:51,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:51,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:51,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:51,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1156 transitions. [2019-01-12 15:24:51,654 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1156 transitions. Word has length 85 [2019-01-12 15:24:51,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:51,655 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1156 transitions. [2019-01-12 15:24:51,655 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:51,655 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1156 transitions. [2019-01-12 15:24:51,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:51,656 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:51,656 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:51,656 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:51,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:51,657 INFO L82 PathProgramCache]: Analyzing trace with hash 367812267, now seen corresponding path program 1 times [2019-01-12 15:24:51,657 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:51,657 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:51,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:51,658 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:51,658 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:51,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:51,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:51,735 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:51,735 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:51,736 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:51,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:51,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:51,736 INFO L87 Difference]: Start difference. First operand 846 states and 1156 transitions. Second operand 3 states. [2019-01-12 15:24:52,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:52,149 INFO L93 Difference]: Finished difference Result 1672 states and 2285 transitions. [2019-01-12 15:24:52,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:52,150 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:52,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:52,155 INFO L225 Difference]: With dead ends: 1672 [2019-01-12 15:24:52,156 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:52,158 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:52,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:52,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:52,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:52,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1136 transitions. [2019-01-12 15:24:52,219 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1136 transitions. Word has length 85 [2019-01-12 15:24:52,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:52,219 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1136 transitions. [2019-01-12 15:24:52,220 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:52,220 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1136 transitions. [2019-01-12 15:24:52,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:52,220 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:52,221 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:52,221 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:52,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:52,221 INFO L82 PathProgramCache]: Analyzing trace with hash 613218122, now seen corresponding path program 1 times [2019-01-12 15:24:52,221 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:52,222 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:52,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:52,222 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:52,223 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:52,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:52,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:52,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:52,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:24:52,357 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:52,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:52,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:52,358 INFO L87 Difference]: Start difference. First operand 846 states and 1136 transitions. Second operand 3 states. [2019-01-12 15:24:52,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:52,530 INFO L93 Difference]: Finished difference Result 1679 states and 2253 transitions. [2019-01-12 15:24:52,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:52,530 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:52,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:52,535 INFO L225 Difference]: With dead ends: 1679 [2019-01-12 15:24:52,535 INFO L226 Difference]: Without dead ends: 846 [2019-01-12 15:24:52,537 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:52,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2019-01-12 15:24:52,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 846. [2019-01-12 15:24:52,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2019-01-12 15:24:52,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 1128 transitions. [2019-01-12 15:24:52,579 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 1128 transitions. Word has length 85 [2019-01-12 15:24:52,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:52,579 INFO L480 AbstractCegarLoop]: Abstraction has 846 states and 1128 transitions. [2019-01-12 15:24:52,579 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:52,580 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 1128 transitions. [2019-01-12 15:24:52,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-01-12 15:24:52,581 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:52,581 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:52,581 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:52,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:52,581 INFO L82 PathProgramCache]: Analyzing trace with hash 675257736, now seen corresponding path program 1 times [2019-01-12 15:24:52,582 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:52,582 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:52,582 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:52,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:52,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:52,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:52,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:52,689 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:52,689 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:24:52,689 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:52,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:52,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:52,690 INFO L87 Difference]: Start difference. First operand 846 states and 1128 transitions. Second operand 3 states. [2019-01-12 15:24:53,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:53,241 INFO L93 Difference]: Finished difference Result 2409 states and 3196 transitions. [2019-01-12 15:24:53,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:53,242 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 85 [2019-01-12 15:24:53,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:53,252 INFO L225 Difference]: With dead ends: 2409 [2019-01-12 15:24:53,252 INFO L226 Difference]: Without dead ends: 1636 [2019-01-12 15:24:53,255 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:53,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1636 states. [2019-01-12 15:24:53,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1636 to 1558. [2019-01-12 15:24:53,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1558 states. [2019-01-12 15:24:53,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1558 states to 1558 states and 2051 transitions. [2019-01-12 15:24:53,344 INFO L78 Accepts]: Start accepts. Automaton has 1558 states and 2051 transitions. Word has length 85 [2019-01-12 15:24:53,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:53,344 INFO L480 AbstractCegarLoop]: Abstraction has 1558 states and 2051 transitions. [2019-01-12 15:24:53,344 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:53,345 INFO L276 IsEmpty]: Start isEmpty. Operand 1558 states and 2051 transitions. [2019-01-12 15:24:53,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2019-01-12 15:24:53,370 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:53,371 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:53,371 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:53,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:53,371 INFO L82 PathProgramCache]: Analyzing trace with hash -1992098123, now seen corresponding path program 1 times [2019-01-12 15:24:53,372 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:53,372 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:53,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:53,373 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:53,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:53,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:53,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:53,446 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:53,446 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:24:53,446 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:53,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:53,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:53,447 INFO L87 Difference]: Start difference. First operand 1558 states and 2051 transitions. Second operand 3 states. [2019-01-12 15:24:54,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:54,033 INFO L93 Difference]: Finished difference Result 4298 states and 5657 transitions. [2019-01-12 15:24:54,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:54,034 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 86 [2019-01-12 15:24:54,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:54,052 INFO L225 Difference]: With dead ends: 4298 [2019-01-12 15:24:54,052 INFO L226 Difference]: Without dead ends: 2882 [2019-01-12 15:24:54,056 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:54,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2882 states. [2019-01-12 15:24:54,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2882 to 2756. [2019-01-12 15:24:54,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2756 states. [2019-01-12 15:24:54,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2756 states to 2756 states and 3610 transitions. [2019-01-12 15:24:54,240 INFO L78 Accepts]: Start accepts. Automaton has 2756 states and 3610 transitions. Word has length 86 [2019-01-12 15:24:54,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:54,241 INFO L480 AbstractCegarLoop]: Abstraction has 2756 states and 3610 transitions. [2019-01-12 15:24:54,241 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:54,241 INFO L276 IsEmpty]: Start isEmpty. Operand 2756 states and 3610 transitions. [2019-01-12 15:24:54,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2019-01-12 15:24:54,242 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:54,242 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:54,243 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:54,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:54,243 INFO L82 PathProgramCache]: Analyzing trace with hash -1848388678, now seen corresponding path program 1 times [2019-01-12 15:24:54,243 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:54,243 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:54,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:54,244 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:54,244 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:54,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:54,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:54,335 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:54,335 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:24:54,336 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:54,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:54,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:54,336 INFO L87 Difference]: Start difference. First operand 2756 states and 3610 transitions. Second operand 3 states. [2019-01-12 15:24:55,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:55,031 INFO L93 Difference]: Finished difference Result 7908 states and 10340 transitions. [2019-01-12 15:24:55,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:55,032 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 87 [2019-01-12 15:24:55,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:55,056 INFO L225 Difference]: With dead ends: 7908 [2019-01-12 15:24:55,057 INFO L226 Difference]: Without dead ends: 5294 [2019-01-12 15:24:55,063 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:55,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5294 states. [2019-01-12 15:24:55,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5294 to 5100. [2019-01-12 15:24:55,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5100 states. [2019-01-12 15:24:55,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5100 states to 5100 states and 6642 transitions. [2019-01-12 15:24:55,367 INFO L78 Accepts]: Start accepts. Automaton has 5100 states and 6642 transitions. Word has length 87 [2019-01-12 15:24:55,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:55,367 INFO L480 AbstractCegarLoop]: Abstraction has 5100 states and 6642 transitions. [2019-01-12 15:24:55,367 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:55,368 INFO L276 IsEmpty]: Start isEmpty. Operand 5100 states and 6642 transitions. [2019-01-12 15:24:55,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2019-01-12 15:24:55,369 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:55,370 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:55,370 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:55,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:55,371 INFO L82 PathProgramCache]: Analyzing trace with hash -281630728, now seen corresponding path program 1 times [2019-01-12 15:24:55,371 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:55,371 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:55,372 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:55,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:55,372 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:55,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:55,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:55,444 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:55,444 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:24:55,444 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:55,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:55,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:55,445 INFO L87 Difference]: Start difference. First operand 5100 states and 6642 transitions. Second operand 3 states. [2019-01-12 15:24:55,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:55,901 INFO L93 Difference]: Finished difference Result 9988 states and 13021 transitions. [2019-01-12 15:24:55,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:55,902 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 87 [2019-01-12 15:24:55,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:55,931 INFO L225 Difference]: With dead ends: 9988 [2019-01-12 15:24:55,932 INFO L226 Difference]: Without dead ends: 4966 [2019-01-12 15:24:55,942 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:55,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4966 states. [2019-01-12 15:24:56,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4966 to 4966. [2019-01-12 15:24:56,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4966 states. [2019-01-12 15:24:56,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4966 states to 4966 states and 6476 transitions. [2019-01-12 15:24:56,291 INFO L78 Accepts]: Start accepts. Automaton has 4966 states and 6476 transitions. Word has length 87 [2019-01-12 15:24:56,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:56,291 INFO L480 AbstractCegarLoop]: Abstraction has 4966 states and 6476 transitions. [2019-01-12 15:24:56,291 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:56,292 INFO L276 IsEmpty]: Start isEmpty. Operand 4966 states and 6476 transitions. [2019-01-12 15:24:56,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2019-01-12 15:24:56,293 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:56,293 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:56,293 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:56,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:56,294 INFO L82 PathProgramCache]: Analyzing trace with hash 1875736048, now seen corresponding path program 1 times [2019-01-12 15:24:56,294 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:56,294 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:56,295 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:56,295 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:56,295 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:56,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:56,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:56,385 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:56,385 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:24:56,385 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:56,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:56,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:56,386 INFO L87 Difference]: Start difference. First operand 4966 states and 6476 transitions. Second operand 3 states. [2019-01-12 15:24:57,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:57,247 INFO L93 Difference]: Finished difference Result 14238 states and 18538 transitions. [2019-01-12 15:24:57,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:57,247 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 88 [2019-01-12 15:24:57,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:57,288 INFO L225 Difference]: With dead ends: 14238 [2019-01-12 15:24:57,288 INFO L226 Difference]: Without dead ends: 9414 [2019-01-12 15:24:57,300 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:57,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9414 states. [2019-01-12 15:24:57,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9414 to 9140. [2019-01-12 15:24:57,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9140 states. [2019-01-12 15:24:57,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9140 states to 9140 states and 11860 transitions. [2019-01-12 15:24:57,869 INFO L78 Accepts]: Start accepts. Automaton has 9140 states and 11860 transitions. Word has length 88 [2019-01-12 15:24:57,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:57,870 INFO L480 AbstractCegarLoop]: Abstraction has 9140 states and 11860 transitions. [2019-01-12 15:24:57,870 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:57,870 INFO L276 IsEmpty]: Start isEmpty. Operand 9140 states and 11860 transitions. [2019-01-12 15:24:57,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2019-01-12 15:24:57,872 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:57,872 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:57,872 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:57,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:57,873 INFO L82 PathProgramCache]: Analyzing trace with hash 41013040, now seen corresponding path program 1 times [2019-01-12 15:24:57,873 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:57,873 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:57,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:57,874 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:57,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:57,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:57,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:57,936 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:57,936 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:24:57,936 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:57,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:57,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:57,937 INFO L87 Difference]: Start difference. First operand 9140 states and 11860 transitions. Second operand 3 states. [2019-01-12 15:24:58,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:24:58,443 INFO L93 Difference]: Finished difference Result 18056 states and 23445 transitions. [2019-01-12 15:24:58,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:24:58,443 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 88 [2019-01-12 15:24:58,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:24:58,465 INFO L225 Difference]: With dead ends: 18056 [2019-01-12 15:24:58,465 INFO L226 Difference]: Without dead ends: 9008 [2019-01-12 15:24:58,479 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:58,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9008 states. [2019-01-12 15:24:59,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9008 to 9008. [2019-01-12 15:24:59,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9008 states. [2019-01-12 15:24:59,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9008 states to 9008 states and 11698 transitions. [2019-01-12 15:24:59,090 INFO L78 Accepts]: Start accepts. Automaton has 9008 states and 11698 transitions. Word has length 88 [2019-01-12 15:24:59,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:24:59,090 INFO L480 AbstractCegarLoop]: Abstraction has 9008 states and 11698 transitions. [2019-01-12 15:24:59,091 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:24:59,091 INFO L276 IsEmpty]: Start isEmpty. Operand 9008 states and 11698 transitions. [2019-01-12 15:24:59,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-01-12 15:24:59,093 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:24:59,093 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:24:59,093 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:24:59,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:24:59,094 INFO L82 PathProgramCache]: Analyzing trace with hash -465206145, now seen corresponding path program 1 times [2019-01-12 15:24:59,094 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:24:59,094 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:24:59,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:59,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:24:59,095 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:24:59,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:24:59,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:24:59,188 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:24:59,189 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:24:59,189 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:24:59,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:24:59,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:24:59,190 INFO L87 Difference]: Start difference. First operand 9008 states and 11698 transitions. Second operand 3 states. [2019-01-12 15:25:00,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:25:00,887 INFO L93 Difference]: Finished difference Result 25648 states and 33248 transitions. [2019-01-12 15:25:00,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:25:00,888 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-01-12 15:25:00,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:25:00,941 INFO L225 Difference]: With dead ends: 25648 [2019-01-12 15:25:00,941 INFO L226 Difference]: Without dead ends: 16782 [2019-01-12 15:25:00,963 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:00,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16782 states. [2019-01-12 15:25:02,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16782 to 16460. [2019-01-12 15:25:02,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16460 states. [2019-01-12 15:25:02,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16460 states to 16460 states and 21266 transitions. [2019-01-12 15:25:02,060 INFO L78 Accepts]: Start accepts. Automaton has 16460 states and 21266 transitions. Word has length 89 [2019-01-12 15:25:02,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:25:02,061 INFO L480 AbstractCegarLoop]: Abstraction has 16460 states and 21266 transitions. [2019-01-12 15:25:02,061 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:25:02,061 INFO L276 IsEmpty]: Start isEmpty. Operand 16460 states and 21266 transitions. [2019-01-12 15:25:02,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-01-12 15:25:02,063 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:25:02,064 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:25:02,064 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:25:02,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:25:02,064 INFO L82 PathProgramCache]: Analyzing trace with hash -270255493, now seen corresponding path program 1 times [2019-01-12 15:25:02,064 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:25:02,064 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:25:02,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:02,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:25:02,065 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:02,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:25:02,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:25:02,123 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:25:02,124 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:25:02,124 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:25:02,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:25:02,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:02,125 INFO L87 Difference]: Start difference. First operand 16460 states and 21266 transitions. Second operand 3 states. [2019-01-12 15:25:03,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:25:03,207 INFO L93 Difference]: Finished difference Result 32684 states and 42245 transitions. [2019-01-12 15:25:03,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:25:03,208 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-01-12 15:25:03,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:25:03,259 INFO L225 Difference]: With dead ends: 32684 [2019-01-12 15:25:03,259 INFO L226 Difference]: Without dead ends: 16330 [2019-01-12 15:25:03,294 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:03,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16330 states. [2019-01-12 15:25:04,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16330 to 16330. [2019-01-12 15:25:04,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16330 states. [2019-01-12 15:25:04,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16330 states to 16330 states and 21108 transitions. [2019-01-12 15:25:04,785 INFO L78 Accepts]: Start accepts. Automaton has 16330 states and 21108 transitions. Word has length 89 [2019-01-12 15:25:04,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:25:04,785 INFO L480 AbstractCegarLoop]: Abstraction has 16330 states and 21108 transitions. [2019-01-12 15:25:04,786 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:25:04,786 INFO L276 IsEmpty]: Start isEmpty. Operand 16330 states and 21108 transitions. [2019-01-12 15:25:04,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-01-12 15:25:04,788 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:25:04,788 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:25:04,788 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:25:04,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:25:04,788 INFO L82 PathProgramCache]: Analyzing trace with hash 1860831531, now seen corresponding path program 1 times [2019-01-12 15:25:04,789 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:25:04,789 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:25:04,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:04,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:25:04,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:04,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:25:04,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:25:04,914 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:25:04,914 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:25:04,915 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:25:04,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:25:04,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:04,917 INFO L87 Difference]: Start difference. First operand 16330 states and 21108 transitions. Second operand 3 states. [2019-01-12 15:25:07,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:25:07,529 INFO L93 Difference]: Finished difference Result 48414 states and 62601 transitions. [2019-01-12 15:25:07,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:25:07,532 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 90 [2019-01-12 15:25:07,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:25:07,608 INFO L225 Difference]: With dead ends: 48414 [2019-01-12 15:25:07,608 INFO L226 Difference]: Without dead ends: 32194 [2019-01-12 15:25:07,635 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:07,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32194 states. [2019-01-12 15:25:09,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32194 to 32066. [2019-01-12 15:25:09,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32066 states. [2019-01-12 15:25:09,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32066 states to 32066 states and 41178 transitions. [2019-01-12 15:25:09,394 INFO L78 Accepts]: Start accepts. Automaton has 32066 states and 41178 transitions. Word has length 90 [2019-01-12 15:25:09,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:25:09,394 INFO L480 AbstractCegarLoop]: Abstraction has 32066 states and 41178 transitions. [2019-01-12 15:25:09,394 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:25:09,395 INFO L276 IsEmpty]: Start isEmpty. Operand 32066 states and 41178 transitions. [2019-01-12 15:25:09,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2019-01-12 15:25:09,406 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:25:09,407 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:25:09,407 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:25:09,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:25:09,407 INFO L82 PathProgramCache]: Analyzing trace with hash -1352583657, now seen corresponding path program 1 times [2019-01-12 15:25:09,408 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:25:09,408 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:25:09,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:09,409 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:25:09,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:09,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:25:09,504 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:25:09,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:25:09,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:25:09,505 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:25:09,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:25:09,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:09,506 INFO L87 Difference]: Start difference. First operand 32066 states and 41178 transitions. Second operand 3 states. [2019-01-12 15:25:12,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:25:12,612 INFO L93 Difference]: Finished difference Result 95594 states and 122647 transitions. [2019-01-12 15:25:12,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:25:12,613 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 111 [2019-01-12 15:25:12,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:25:12,745 INFO L225 Difference]: With dead ends: 95594 [2019-01-12 15:25:12,745 INFO L226 Difference]: Without dead ends: 63668 [2019-01-12 15:25:12,781 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:12,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63668 states. [2019-01-12 15:25:15,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63668 to 63668. [2019-01-12 15:25:15,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63668 states. [2019-01-12 15:25:15,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63668 states to 63668 states and 81494 transitions. [2019-01-12 15:25:15,321 INFO L78 Accepts]: Start accepts. Automaton has 63668 states and 81494 transitions. Word has length 111 [2019-01-12 15:25:15,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:25:15,321 INFO L480 AbstractCegarLoop]: Abstraction has 63668 states and 81494 transitions. [2019-01-12 15:25:15,321 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:25:15,321 INFO L276 IsEmpty]: Start isEmpty. Operand 63668 states and 81494 transitions. [2019-01-12 15:25:15,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-01-12 15:25:15,368 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:25:15,368 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:25:15,368 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:25:15,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:25:15,369 INFO L82 PathProgramCache]: Analyzing trace with hash 734407375, now seen corresponding path program 1 times [2019-01-12 15:25:15,369 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:25:15,369 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:25:15,370 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:15,370 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:25:15,370 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:15,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:25:15,475 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2019-01-12 15:25:15,475 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:25:15,476 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:25:15,476 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:25:15,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:25:15,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:15,477 INFO L87 Difference]: Start difference. First operand 63668 states and 81494 transitions. Second operand 3 states. [2019-01-12 15:25:18,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:25:18,709 INFO L93 Difference]: Finished difference Result 155852 states and 199384 transitions. [2019-01-12 15:25:18,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:25:18,710 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 152 [2019-01-12 15:25:18,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:25:18,841 INFO L225 Difference]: With dead ends: 155852 [2019-01-12 15:25:18,841 INFO L226 Difference]: Without dead ends: 92306 [2019-01-12 15:25:18,911 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:19,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92306 states. [2019-01-12 15:25:22,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92306 to 92048. [2019-01-12 15:25:22,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92048 states. [2019-01-12 15:25:22,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92048 states to 92048 states and 117198 transitions. [2019-01-12 15:25:22,389 INFO L78 Accepts]: Start accepts. Automaton has 92048 states and 117198 transitions. Word has length 152 [2019-01-12 15:25:22,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:25:22,389 INFO L480 AbstractCegarLoop]: Abstraction has 92048 states and 117198 transitions. [2019-01-12 15:25:22,389 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:25:22,389 INFO L276 IsEmpty]: Start isEmpty. Operand 92048 states and 117198 transitions. [2019-01-12 15:25:22,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-01-12 15:25:22,434 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:25:22,434 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:25:22,435 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:25:22,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:25:22,435 INFO L82 PathProgramCache]: Analyzing trace with hash -1781759337, now seen corresponding path program 1 times [2019-01-12 15:25:22,435 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:25:22,435 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:25:22,438 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:22,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:25:22,439 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:22,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:25:22,537 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2019-01-12 15:25:22,537 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:25:22,537 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:25:22,537 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:25:22,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:25:22,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:22,538 INFO L87 Difference]: Start difference. First operand 92048 states and 117198 transitions. Second operand 3 states. [2019-01-12 15:25:27,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:25:27,005 INFO L93 Difference]: Finished difference Result 225404 states and 286908 transitions. [2019-01-12 15:25:27,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:25:27,006 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 152 [2019-01-12 15:25:27,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:25:27,216 INFO L225 Difference]: With dead ends: 225404 [2019-01-12 15:25:27,216 INFO L226 Difference]: Without dead ends: 133502 [2019-01-12 15:25:27,306 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:27,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133502 states. [2019-01-12 15:25:34,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133502 to 133116. [2019-01-12 15:25:34,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133116 states. [2019-01-12 15:25:35,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133116 states to 133116 states and 168662 transitions. [2019-01-12 15:25:35,032 INFO L78 Accepts]: Start accepts. Automaton has 133116 states and 168662 transitions. Word has length 152 [2019-01-12 15:25:35,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:25:35,033 INFO L480 AbstractCegarLoop]: Abstraction has 133116 states and 168662 transitions. [2019-01-12 15:25:35,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:25:35,033 INFO L276 IsEmpty]: Start isEmpty. Operand 133116 states and 168662 transitions. [2019-01-12 15:25:35,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-01-12 15:25:35,077 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:25:35,077 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:25:35,078 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:25:35,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:25:35,078 INFO L82 PathProgramCache]: Analyzing trace with hash 66864795, now seen corresponding path program 1 times [2019-01-12 15:25:35,078 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:25:35,078 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:25:35,079 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:35,079 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:25:35,079 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:35,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:25:35,194 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2019-01-12 15:25:35,194 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:25:35,194 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:25:35,194 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:25:35,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:25:35,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:35,197 INFO L87 Difference]: Start difference. First operand 133116 states and 168662 transitions. Second operand 3 states. [2019-01-12 15:25:42,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:25:42,065 INFO L93 Difference]: Finished difference Result 325972 states and 412968 transitions. [2019-01-12 15:25:42,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:25:42,066 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 152 [2019-01-12 15:25:42,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:25:42,332 INFO L225 Difference]: With dead ends: 325972 [2019-01-12 15:25:42,333 INFO L226 Difference]: Without dead ends: 193026 [2019-01-12 15:25:42,439 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:42,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193026 states. [2019-01-12 15:25:48,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193026 to 192448. [2019-01-12 15:25:48,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192448 states. [2019-01-12 15:25:48,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192448 states to 192448 states and 242726 transitions. [2019-01-12 15:25:48,682 INFO L78 Accepts]: Start accepts. Automaton has 192448 states and 242726 transitions. Word has length 152 [2019-01-12 15:25:48,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:25:48,682 INFO L480 AbstractCegarLoop]: Abstraction has 192448 states and 242726 transitions. [2019-01-12 15:25:48,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:25:48,683 INFO L276 IsEmpty]: Start isEmpty. Operand 192448 states and 242726 transitions. [2019-01-12 15:25:48,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-01-12 15:25:48,761 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:25:48,762 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:25:48,762 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:25:48,762 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:25:48,762 INFO L82 PathProgramCache]: Analyzing trace with hash -1013280947, now seen corresponding path program 1 times [2019-01-12 15:25:48,762 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:25:48,762 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:25:48,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:48,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:25:48,764 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:25:48,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:25:48,863 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2019-01-12 15:25:48,863 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:25:48,863 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-12 15:25:48,864 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:25:48,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:25:48,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:25:48,865 INFO L87 Difference]: Start difference. First operand 192448 states and 242726 transitions. Second operand 3 states. [2019-01-12 15:26:01,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:26:01,970 INFO L93 Difference]: Finished difference Result 470804 states and 593244 transitions. [2019-01-12 15:26:01,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:26:01,971 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 152 [2019-01-12 15:26:01,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:26:02,276 INFO L225 Difference]: With dead ends: 470804 [2019-01-12 15:26:02,276 INFO L226 Difference]: Without dead ends: 278450 [2019-01-12 15:26:02,398 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:26:02,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278450 states. [2019-01-12 15:26:11,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278450 to 277584. [2019-01-12 15:26:11,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277584 states. [2019-01-12 15:26:11,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277584 states to 277584 states and 348030 transitions. [2019-01-12 15:26:11,808 INFO L78 Accepts]: Start accepts. Automaton has 277584 states and 348030 transitions. Word has length 152 [2019-01-12 15:26:11,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:26:11,808 INFO L480 AbstractCegarLoop]: Abstraction has 277584 states and 348030 transitions. [2019-01-12 15:26:11,808 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:26:11,808 INFO L276 IsEmpty]: Start isEmpty. Operand 277584 states and 348030 transitions. [2019-01-12 15:26:11,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-01-12 15:26:11,888 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:26:11,888 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:26:11,889 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:26:11,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:26:11,889 INFO L82 PathProgramCache]: Analyzing trace with hash 371466903, now seen corresponding path program 1 times [2019-01-12 15:26:11,889 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:26:11,889 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:26:11,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:26:11,890 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:26:11,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:26:11,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:26:12,147 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-01-12 15:26:12,148 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:26:12,148 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:26:12,148 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:26:12,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:26:12,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:26:12,149 INFO L87 Difference]: Start difference. First operand 277584 states and 348030 transitions. Second operand 5 states. [2019-01-12 15:26:40,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:26:40,262 INFO L93 Difference]: Finished difference Result 877260 states and 1093999 transitions. [2019-01-12 15:26:40,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:26:40,262 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 152 [2019-01-12 15:26:40,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:26:40,988 INFO L225 Difference]: With dead ends: 877260 [2019-01-12 15:26:40,989 INFO L226 Difference]: Without dead ends: 599844 [2019-01-12 15:26:41,191 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:26:41,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 599844 states. [2019-01-12 15:26:55,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 599844 to 285036. [2019-01-12 15:26:55,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285036 states. [2019-01-12 15:26:55,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285036 states to 285036 states and 353642 transitions. [2019-01-12 15:26:55,805 INFO L78 Accepts]: Start accepts. Automaton has 285036 states and 353642 transitions. Word has length 152 [2019-01-12 15:26:55,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:26:55,805 INFO L480 AbstractCegarLoop]: Abstraction has 285036 states and 353642 transitions. [2019-01-12 15:26:55,805 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:26:55,805 INFO L276 IsEmpty]: Start isEmpty. Operand 285036 states and 353642 transitions. [2019-01-12 15:26:55,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-01-12 15:26:55,880 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:26:55,881 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:26:55,881 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:26:55,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:26:55,881 INFO L82 PathProgramCache]: Analyzing trace with hash -416127077, now seen corresponding path program 1 times [2019-01-12 15:26:55,882 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:26:55,882 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:26:55,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:26:55,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:26:55,883 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:26:55,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:26:56,131 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-01-12 15:26:56,132 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:26:56,132 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:26:56,133 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:26:56,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:26:56,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:26:56,133 INFO L87 Difference]: Start difference. First operand 285036 states and 353642 transitions. Second operand 5 states. [2019-01-12 15:27:16,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:27:16,412 INFO L93 Difference]: Finished difference Result 676654 states and 843889 transitions. [2019-01-12 15:27:16,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:27:16,413 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 152 [2019-01-12 15:27:16,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:27:16,911 INFO L225 Difference]: With dead ends: 676654 [2019-01-12 15:27:16,912 INFO L226 Difference]: Without dead ends: 391800 [2019-01-12 15:27:17,086 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:27:17,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391800 states. [2019-01-12 15:27:38,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391800 to 285900. [2019-01-12 15:27:38,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285900 states. [2019-01-12 15:27:39,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285900 states to 285900 states and 350470 transitions. [2019-01-12 15:27:39,182 INFO L78 Accepts]: Start accepts. Automaton has 285900 states and 350470 transitions. Word has length 152 [2019-01-12 15:27:39,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:27:39,183 INFO L480 AbstractCegarLoop]: Abstraction has 285900 states and 350470 transitions. [2019-01-12 15:27:39,183 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:27:39,183 INFO L276 IsEmpty]: Start isEmpty. Operand 285900 states and 350470 transitions. [2019-01-12 15:27:39,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2019-01-12 15:27:39,275 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:27:39,276 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:27:39,276 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:27:39,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:27:39,276 INFO L82 PathProgramCache]: Analyzing trace with hash 40007839, now seen corresponding path program 1 times [2019-01-12 15:27:39,276 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:27:39,276 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:27:39,277 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:27:39,277 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:27:39,278 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:27:39,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:27:39,373 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:27:39,374 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:27:39,374 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:27:39,374 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:27:39,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:27:39,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:27:39,378 INFO L87 Difference]: Start difference. First operand 285900 states and 350470 transitions. Second operand 3 states. [2019-01-12 15:27:54,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:27:54,661 INFO L93 Difference]: Finished difference Result 430292 states and 528647 transitions. [2019-01-12 15:27:54,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:27:54,661 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 152 [2019-01-12 15:27:54,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:27:55,044 INFO L225 Difference]: With dead ends: 430292 [2019-01-12 15:27:55,044 INFO L226 Difference]: Without dead ends: 285900 [2019-01-12 15:27:55,168 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:27:55,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285900 states. [2019-01-12 15:28:09,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285900 to 285254. [2019-01-12 15:28:09,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285254 states. [2019-01-12 15:28:09,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285254 states to 285254 states and 347016 transitions. [2019-01-12 15:28:09,994 INFO L78 Accepts]: Start accepts. Automaton has 285254 states and 347016 transitions. Word has length 152 [2019-01-12 15:28:09,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:28:09,995 INFO L480 AbstractCegarLoop]: Abstraction has 285254 states and 347016 transitions. [2019-01-12 15:28:09,995 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:28:09,995 INFO L276 IsEmpty]: Start isEmpty. Operand 285254 states and 347016 transitions. [2019-01-12 15:28:10,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2019-01-12 15:28:10,065 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:28:10,065 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:28:10,065 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:28:10,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:28:10,066 INFO L82 PathProgramCache]: Analyzing trace with hash -226089385, now seen corresponding path program 1 times [2019-01-12 15:28:10,066 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:28:10,066 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:28:10,067 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:28:10,067 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:28:10,067 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:28:10,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:28:10,234 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-01-12 15:28:10,234 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:28:10,234 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:28:10,234 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:28:10,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:28:10,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:28:10,235 INFO L87 Difference]: Start difference. First operand 285254 states and 347016 transitions. Second operand 5 states. [2019-01-12 15:28:38,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:28:38,615 INFO L93 Difference]: Finished difference Result 685202 states and 838953 transitions. [2019-01-12 15:28:38,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:28:38,616 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 153 [2019-01-12 15:28:38,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:28:39,087 INFO L225 Difference]: With dead ends: 685202 [2019-01-12 15:28:39,088 INFO L226 Difference]: Without dead ends: 400058 [2019-01-12 15:28:39,252 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:28:39,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 400058 states. [2019-01-12 15:28:57,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 400058 to 286550. [2019-01-12 15:28:57,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286550 states. [2019-01-12 15:28:57,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286550 states to 286550 states and 344420 transitions. [2019-01-12 15:28:57,490 INFO L78 Accepts]: Start accepts. Automaton has 286550 states and 344420 transitions. Word has length 153 [2019-01-12 15:28:57,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:28:57,490 INFO L480 AbstractCegarLoop]: Abstraction has 286550 states and 344420 transitions. [2019-01-12 15:28:57,490 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:28:57,490 INFO L276 IsEmpty]: Start isEmpty. Operand 286550 states and 344420 transitions. [2019-01-12 15:28:57,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2019-01-12 15:28:57,556 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:28:57,557 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:28:57,557 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:28:57,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:28:57,557 INFO L82 PathProgramCache]: Analyzing trace with hash 2018469013, now seen corresponding path program 1 times [2019-01-12 15:28:57,558 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:28:57,558 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:28:57,558 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:28:57,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:28:57,559 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:28:57,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:28:57,730 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-01-12 15:28:57,730 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:28:57,730 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:28:57,730 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:28:57,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:28:57,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:28:57,731 INFO L87 Difference]: Start difference. First operand 286550 states and 344420 transitions. Second operand 5 states. [2019-01-12 15:29:24,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:29:24,622 INFO L93 Difference]: Finished difference Result 670414 states and 810865 transitions. [2019-01-12 15:29:24,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:29:24,623 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 153 [2019-01-12 15:29:24,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:29:25,040 INFO L225 Difference]: With dead ends: 670414 [2019-01-12 15:29:25,040 INFO L226 Difference]: Without dead ends: 384022 [2019-01-12 15:29:25,192 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:29:25,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 384022 states. [2019-01-12 15:29:52,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 384022 to 287414. [2019-01-12 15:29:52,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287414 states. [2019-01-12 15:29:52,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287414 states to 287414 states and 341248 transitions. [2019-01-12 15:29:52,510 INFO L78 Accepts]: Start accepts. Automaton has 287414 states and 341248 transitions. Word has length 153 [2019-01-12 15:29:52,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:29:52,510 INFO L480 AbstractCegarLoop]: Abstraction has 287414 states and 341248 transitions. [2019-01-12 15:29:52,510 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:29:52,510 INFO L276 IsEmpty]: Start isEmpty. Operand 287414 states and 341248 transitions. [2019-01-12 15:29:53,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2019-01-12 15:29:53,294 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:29:53,294 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:29:53,294 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:29:53,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:29:53,297 INFO L82 PathProgramCache]: Analyzing trace with hash -90249455, now seen corresponding path program 1 times [2019-01-12 15:29:53,297 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:29:53,297 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:29:53,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:29:53,299 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:29:53,299 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:29:53,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:29:53,581 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2019-01-12 15:29:53,582 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:29:53,582 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:29:53,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:29:53,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:29:53,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:29:53,583 INFO L87 Difference]: Start difference. First operand 287414 states and 341248 transitions. Second operand 5 states. [2019-01-12 15:30:19,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:30:19,253 INFO L93 Difference]: Finished difference Result 557010 states and 664761 transitions. [2019-01-12 15:30:19,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:30:19,254 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 153 [2019-01-12 15:30:19,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:30:19,561 INFO L225 Difference]: With dead ends: 557010 [2019-01-12 15:30:19,562 INFO L226 Difference]: Without dead ends: 269706 [2019-01-12 15:30:19,688 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:30:19,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269706 states. [2019-01-12 15:30:35,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269706 to 194908. [2019-01-12 15:30:35,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194908 states. [2019-01-12 15:30:35,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194908 states to 194908 states and 228974 transitions. [2019-01-12 15:30:35,519 INFO L78 Accepts]: Start accepts. Automaton has 194908 states and 228974 transitions. Word has length 153 [2019-01-12 15:30:35,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:30:35,520 INFO L480 AbstractCegarLoop]: Abstraction has 194908 states and 228974 transitions. [2019-01-12 15:30:35,520 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:30:35,520 INFO L276 IsEmpty]: Start isEmpty. Operand 194908 states and 228974 transitions. [2019-01-12 15:30:35,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2019-01-12 15:30:35,566 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:30:35,567 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:30:35,567 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:30:35,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:30:35,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1391161611, now seen corresponding path program 1 times [2019-01-12 15:30:35,567 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:30:35,567 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:30:35,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:30:35,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:30:35,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:30:35,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:30:35,667 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:30:35,668 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:30:35,668 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:30:35,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:30:35,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:30:35,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:30:35,669 INFO L87 Difference]: Start difference. First operand 194908 states and 228974 transitions. Second operand 3 states. [2019-01-12 15:30:49,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:30:49,268 INFO L93 Difference]: Finished difference Result 313016 states and 368590 transitions. [2019-01-12 15:30:49,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:30:49,269 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 155 [2019-01-12 15:30:49,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:30:49,454 INFO L225 Difference]: With dead ends: 313016 [2019-01-12 15:30:49,454 INFO L226 Difference]: Without dead ends: 162514 [2019-01-12 15:30:49,541 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:30:49,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162514 states. [2019-01-12 15:31:01,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162514 to 162510. [2019-01-12 15:31:01,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162510 states. [2019-01-12 15:31:02,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162510 states to 162510 states and 190822 transitions. [2019-01-12 15:31:02,013 INFO L78 Accepts]: Start accepts. Automaton has 162510 states and 190822 transitions. Word has length 155 [2019-01-12 15:31:02,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:31:02,014 INFO L480 AbstractCegarLoop]: Abstraction has 162510 states and 190822 transitions. [2019-01-12 15:31:02,014 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:31:02,014 INFO L276 IsEmpty]: Start isEmpty. Operand 162510 states and 190822 transitions. [2019-01-12 15:31:02,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2019-01-12 15:31:02,065 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:31:02,065 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:31:02,065 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:31:02,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:31:02,066 INFO L82 PathProgramCache]: Analyzing trace with hash 1227902601, now seen corresponding path program 1 times [2019-01-12 15:31:02,066 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:31:02,066 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:31:02,067 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:31:02,067 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:31:02,067 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:31:02,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:31:02,162 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:31:02,163 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:31:02,163 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:31:02,164 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:31:02,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:31:02,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:31:02,164 INFO L87 Difference]: Start difference. First operand 162510 states and 190822 transitions. Second operand 3 states. [2019-01-12 15:31:15,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:31:15,458 INFO L93 Difference]: Finished difference Result 264524 states and 311390 transitions. [2019-01-12 15:31:15,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:31:15,459 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 200 [2019-01-12 15:31:15,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:31:15,576 INFO L225 Difference]: With dead ends: 264524 [2019-01-12 15:31:15,576 INFO L226 Difference]: Without dead ends: 129414 [2019-01-12 15:31:15,622 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:31:15,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129414 states. [2019-01-12 15:31:25,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129414 to 129410. [2019-01-12 15:31:25,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129410 states. [2019-01-12 15:31:25,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129410 states to 129410 states and 151858 transitions. [2019-01-12 15:31:25,520 INFO L78 Accepts]: Start accepts. Automaton has 129410 states and 151858 transitions. Word has length 200 [2019-01-12 15:31:25,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:31:25,521 INFO L480 AbstractCegarLoop]: Abstraction has 129410 states and 151858 transitions. [2019-01-12 15:31:25,521 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:31:25,521 INFO L276 IsEmpty]: Start isEmpty. Operand 129410 states and 151858 transitions. [2019-01-12 15:31:25,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2019-01-12 15:31:25,572 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:31:25,572 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:31:25,572 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:31:25,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:31:25,572 INFO L82 PathProgramCache]: Analyzing trace with hash -855006846, now seen corresponding path program 1 times [2019-01-12 15:31:25,573 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:31:25,573 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:31:25,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:31:25,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:31:25,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:31:25,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:31:25,682 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:31:25,682 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:31:25,682 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:31:25,682 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:31:25,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:31:25,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:31:25,683 INFO L87 Difference]: Start difference. First operand 129410 states and 151858 transitions. Second operand 3 states. [2019-01-12 15:31:36,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:31:36,790 INFO L93 Difference]: Finished difference Result 241948 states and 284406 transitions. [2019-01-12 15:31:36,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:31:36,791 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 245 [2019-01-12 15:31:36,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:31:36,928 INFO L225 Difference]: With dead ends: 241948 [2019-01-12 15:31:36,928 INFO L226 Difference]: Without dead ends: 129414 [2019-01-12 15:31:36,991 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:31:37,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129414 states. [2019-01-12 15:31:47,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129414 to 129410. [2019-01-12 15:31:47,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129410 states. [2019-01-12 15:31:47,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129410 states to 129410 states and 151498 transitions. [2019-01-12 15:31:47,204 INFO L78 Accepts]: Start accepts. Automaton has 129410 states and 151498 transitions. Word has length 245 [2019-01-12 15:31:47,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:31:47,204 INFO L480 AbstractCegarLoop]: Abstraction has 129410 states and 151498 transitions. [2019-01-12 15:31:47,204 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:31:47,205 INFO L276 IsEmpty]: Start isEmpty. Operand 129410 states and 151498 transitions. [2019-01-12 15:31:47,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 288 [2019-01-12 15:31:47,268 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:31:47,268 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:31:47,269 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:31:47,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:31:47,269 INFO L82 PathProgramCache]: Analyzing trace with hash 649016126, now seen corresponding path program 1 times [2019-01-12 15:31:47,269 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:31:47,269 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:31:47,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:31:47,270 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:31:47,270 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:31:47,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:31:47,387 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:31:47,387 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:31:47,387 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:31:47,389 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:31:47,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:31:47,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:31:47,390 INFO L87 Difference]: Start difference. First operand 129410 states and 151498 transitions. Second operand 3 states. [2019-01-12 15:31:58,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:31:58,458 INFO L93 Difference]: Finished difference Result 242136 states and 283875 transitions. [2019-01-12 15:31:58,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:31:58,459 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 287 [2019-01-12 15:31:58,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:31:58,587 INFO L225 Difference]: With dead ends: 242136 [2019-01-12 15:31:58,587 INFO L226 Difference]: Without dead ends: 129602 [2019-01-12 15:31:58,637 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:31:58,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129602 states. [2019-01-12 15:32:08,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129602 to 129410. [2019-01-12 15:32:08,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129410 states. [2019-01-12 15:32:08,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129410 states to 129410 states and 149322 transitions. [2019-01-12 15:32:08,664 INFO L78 Accepts]: Start accepts. Automaton has 129410 states and 149322 transitions. Word has length 287 [2019-01-12 15:32:08,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:32:08,665 INFO L480 AbstractCegarLoop]: Abstraction has 129410 states and 149322 transitions. [2019-01-12 15:32:08,665 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:32:08,665 INFO L276 IsEmpty]: Start isEmpty. Operand 129410 states and 149322 transitions. [2019-01-12 15:32:08,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 292 [2019-01-12 15:32:08,726 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:32:08,726 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:32:08,727 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:32:08,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:32:08,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1338236076, now seen corresponding path program 1 times [2019-01-12 15:32:08,727 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:32:08,727 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:32:08,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:32:08,728 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:32:08,728 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:32:08,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:32:08,879 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-01-12 15:32:08,879 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:32:08,879 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-12 15:32:08,880 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-12 15:32:08,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-12 15:32:08,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-12 15:32:08,880 INFO L87 Difference]: Start difference. First operand 129410 states and 149322 transitions. Second operand 5 states. [2019-01-12 15:32:22,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:32:22,220 INFO L93 Difference]: Finished difference Result 272016 states and 316677 transitions. [2019-01-12 15:32:22,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-12 15:32:22,220 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 291 [2019-01-12 15:32:22,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:32:22,378 INFO L225 Difference]: With dead ends: 272016 [2019-01-12 15:32:22,379 INFO L226 Difference]: Without dead ends: 142680 [2019-01-12 15:32:22,464 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-01-12 15:32:22,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142680 states. [2019-01-12 15:32:31,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142680 to 100498. [2019-01-12 15:32:31,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100498 states. [2019-01-12 15:32:31,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100498 states to 100498 states and 114880 transitions. [2019-01-12 15:32:31,189 INFO L78 Accepts]: Start accepts. Automaton has 100498 states and 114880 transitions. Word has length 291 [2019-01-12 15:32:31,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:32:31,190 INFO L480 AbstractCegarLoop]: Abstraction has 100498 states and 114880 transitions. [2019-01-12 15:32:31,190 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-12 15:32:31,190 INFO L276 IsEmpty]: Start isEmpty. Operand 100498 states and 114880 transitions. [2019-01-12 15:32:31,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2019-01-12 15:32:31,232 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:32:31,232 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:32:31,232 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:32:31,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:32:31,233 INFO L82 PathProgramCache]: Analyzing trace with hash 2115683789, now seen corresponding path program 1 times [2019-01-12 15:32:31,233 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:32:31,233 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:32:31,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:32:31,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:32:31,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:32:31,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:32:31,356 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:32:31,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:32:31,356 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:32:31,357 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:32:31,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:32:31,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:32:31,357 INFO L87 Difference]: Start difference. First operand 100498 states and 114880 transitions. Second operand 3 states. [2019-01-12 15:32:40,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:32:40,065 INFO L93 Difference]: Finished difference Result 190740 states and 218348 transitions. [2019-01-12 15:32:40,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:32:40,066 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 293 [2019-01-12 15:32:40,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:32:40,164 INFO L225 Difference]: With dead ends: 190740 [2019-01-12 15:32:40,164 INFO L226 Difference]: Without dead ends: 100502 [2019-01-12 15:32:40,221 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:32:40,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100502 states. [2019-01-12 15:32:52,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100502 to 100498. [2019-01-12 15:32:52,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100498 states. [2019-01-12 15:32:52,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100498 states to 100498 states and 114400 transitions. [2019-01-12 15:32:52,181 INFO L78 Accepts]: Start accepts. Automaton has 100498 states and 114400 transitions. Word has length 293 [2019-01-12 15:32:52,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:32:52,181 INFO L480 AbstractCegarLoop]: Abstraction has 100498 states and 114400 transitions. [2019-01-12 15:32:52,181 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:32:52,181 INFO L276 IsEmpty]: Start isEmpty. Operand 100498 states and 114400 transitions. [2019-01-12 15:32:52,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2019-01-12 15:32:52,217 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:32:52,217 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:32:52,217 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:32:52,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:32:52,218 INFO L82 PathProgramCache]: Analyzing trace with hash 1405770907, now seen corresponding path program 1 times [2019-01-12 15:32:52,218 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:32:52,218 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:32:52,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:32:52,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:32:52,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:32:52,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:32:52,346 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:32:52,347 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:32:52,347 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:32:52,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:32:52,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:32:52,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:32:52,348 INFO L87 Difference]: Start difference. First operand 100498 states and 114400 transitions. Second operand 3 states. [2019-01-12 15:33:01,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:33:01,328 INFO L93 Difference]: Finished difference Result 176712 states and 201577 transitions. [2019-01-12 15:33:01,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:33:01,329 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 336 [2019-01-12 15:33:01,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:33:01,423 INFO L225 Difference]: With dead ends: 176712 [2019-01-12 15:33:01,423 INFO L226 Difference]: Without dead ends: 100626 [2019-01-12 15:33:01,467 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:33:01,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100626 states. [2019-01-12 15:33:10,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100626 to 100498. [2019-01-12 15:33:10,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100498 states. [2019-01-12 15:33:10,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100498 states to 100498 states and 113008 transitions. [2019-01-12 15:33:10,147 INFO L78 Accepts]: Start accepts. Automaton has 100498 states and 113008 transitions. Word has length 336 [2019-01-12 15:33:10,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:33:10,148 INFO L480 AbstractCegarLoop]: Abstraction has 100498 states and 113008 transitions. [2019-01-12 15:33:10,148 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:33:10,148 INFO L276 IsEmpty]: Start isEmpty. Operand 100498 states and 113008 transitions. [2019-01-12 15:33:10,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 341 [2019-01-12 15:33:10,183 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:33:10,184 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:33:10,184 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:33:10,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:33:10,184 INFO L82 PathProgramCache]: Analyzing trace with hash -522043604, now seen corresponding path program 1 times [2019-01-12 15:33:10,184 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:33:10,184 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:33:10,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:33:10,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:33:10,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:33:10,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:33:10,308 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:33:10,308 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:33:10,308 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:33:10,309 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:33:10,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:33:10,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:33:10,309 INFO L87 Difference]: Start difference. First operand 100498 states and 113008 transitions. Second operand 3 states. [2019-01-12 15:33:19,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:33:19,350 INFO L93 Difference]: Finished difference Result 168432 states and 189737 transitions. [2019-01-12 15:33:19,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:33:19,351 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 340 [2019-01-12 15:33:19,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:33:19,448 INFO L225 Difference]: With dead ends: 168432 [2019-01-12 15:33:19,448 INFO L226 Difference]: Without dead ends: 100626 [2019-01-12 15:33:19,486 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:33:19,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100626 states. [2019-01-12 15:33:28,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100626 to 100498. [2019-01-12 15:33:28,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100498 states. [2019-01-12 15:33:28,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100498 states to 100498 states and 111808 transitions. [2019-01-12 15:33:28,334 INFO L78 Accepts]: Start accepts. Automaton has 100498 states and 111808 transitions. Word has length 340 [2019-01-12 15:33:28,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:33:28,335 INFO L480 AbstractCegarLoop]: Abstraction has 100498 states and 111808 transitions. [2019-01-12 15:33:28,335 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:33:28,335 INFO L276 IsEmpty]: Start isEmpty. Operand 100498 states and 111808 transitions. [2019-01-12 15:33:28,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 345 [2019-01-12 15:33:28,371 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:33:28,372 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:33:28,372 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:33:28,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:33:28,372 INFO L82 PathProgramCache]: Analyzing trace with hash -461725018, now seen corresponding path program 1 times [2019-01-12 15:33:28,372 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:33:28,372 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:33:28,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:33:28,373 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:33:28,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:33:28,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:33:28,474 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-01-12 15:33:28,474 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:33:28,475 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:33:28,475 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:33:28,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:33:28,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:33:28,476 INFO L87 Difference]: Start difference. First operand 100498 states and 111808 transitions. Second operand 3 states. [2019-01-12 15:33:34,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:33:34,456 INFO L93 Difference]: Finished difference Result 166480 states and 184379 transitions. [2019-01-12 15:33:34,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:33:34,457 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 344 [2019-01-12 15:33:34,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:33:34,497 INFO L225 Difference]: With dead ends: 166480 [2019-01-12 15:33:34,497 INFO L226 Difference]: Without dead ends: 39644 [2019-01-12 15:33:34,557 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:33:34,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39644 states. [2019-01-12 15:33:37,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39644 to 38396. [2019-01-12 15:33:37,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38396 states. [2019-01-12 15:33:37,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38396 states to 38396 states and 41594 transitions. [2019-01-12 15:33:37,932 INFO L78 Accepts]: Start accepts. Automaton has 38396 states and 41594 transitions. Word has length 344 [2019-01-12 15:33:37,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:33:37,933 INFO L480 AbstractCegarLoop]: Abstraction has 38396 states and 41594 transitions. [2019-01-12 15:33:37,933 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:33:37,933 INFO L276 IsEmpty]: Start isEmpty. Operand 38396 states and 41594 transitions. [2019-01-12 15:33:37,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 349 [2019-01-12 15:33:37,958 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:33:37,958 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:33:37,959 INFO L423 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:33:37,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:33:37,959 INFO L82 PathProgramCache]: Analyzing trace with hash -787209040, now seen corresponding path program 1 times [2019-01-12 15:33:37,959 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:33:37,959 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:33:37,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:33:37,960 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:33:37,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:33:37,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-12 15:33:38,157 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-12 15:33:38,157 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-12 15:33:38,158 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-12 15:33:38,161 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-12 15:33:38,161 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-12 15:33:38,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:33:38,162 INFO L87 Difference]: Start difference. First operand 38396 states and 41594 transitions. Second operand 3 states. [2019-01-12 15:33:41,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-12 15:33:41,745 INFO L93 Difference]: Finished difference Result 68182 states and 73937 transitions. [2019-01-12 15:33:41,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-12 15:33:41,746 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 348 [2019-01-12 15:33:41,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-12 15:33:41,783 INFO L225 Difference]: With dead ends: 68182 [2019-01-12 15:33:41,783 INFO L226 Difference]: Without dead ends: 38396 [2019-01-12 15:33:41,806 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-12 15:33:41,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38396 states. [2019-01-12 15:33:45,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38396 to 38396. [2019-01-12 15:33:45,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38396 states. [2019-01-12 15:33:45,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38396 states to 38396 states and 41252 transitions. [2019-01-12 15:33:45,140 INFO L78 Accepts]: Start accepts. Automaton has 38396 states and 41252 transitions. Word has length 348 [2019-01-12 15:33:45,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-12 15:33:45,141 INFO L480 AbstractCegarLoop]: Abstraction has 38396 states and 41252 transitions. [2019-01-12 15:33:45,141 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-12 15:33:45,141 INFO L276 IsEmpty]: Start isEmpty. Operand 38396 states and 41252 transitions. [2019-01-12 15:33:45,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2019-01-12 15:33:45,167 INFO L394 BasicCegarLoop]: Found error trace [2019-01-12 15:33:45,168 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-12 15:33:45,168 INFO L423 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-01-12 15:33:45,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-12 15:33:45,168 INFO L82 PathProgramCache]: Analyzing trace with hash -286182510, now seen corresponding path program 1 times [2019-01-12 15:33:45,169 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-12 15:33:45,169 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-12 15:33:45,169 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:33:45,170 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-12 15:33:45,170 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-12 15:33:45,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-12 15:33:45,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-12 15:33:45,420 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2019-01-12 15:33:45,684 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.01 03:33:45 BoogieIcfgContainer [2019-01-12 15:33:45,685 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-01-12 15:33:45,685 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-01-12 15:33:45,685 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-01-12 15:33:45,685 INFO L276 PluginConnector]: Witness Printer initialized [2019-01-12 15:33:45,686 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.01 03:24:46" (3/4) ... [2019-01-12 15:33:45,691 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2019-01-12 15:33:46,014 INFO L145 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-01-12 15:33:46,014 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-01-12 15:33:46,015 INFO L168 Benchmark]: Toolchain (without parser) took 542492.35 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.3 GB). Free memory was 951.4 MB in the beginning and 2.7 GB in the end (delta: -1.8 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. [2019-01-12 15:33:46,018 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-01-12 15:33:46,018 INFO L168 Benchmark]: CACSL2BoogieTranslator took 489.40 ms. Allocated memory is still 1.0 GB. Free memory was 951.4 MB in the beginning and 929.9 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2019-01-12 15:33:46,019 INFO L168 Benchmark]: Boogie Procedure Inliner took 169.93 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.6 MB). Free memory was 929.9 MB in the beginning and 1.1 GB in the end (delta: -166.0 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. [2019-01-12 15:33:46,021 INFO L168 Benchmark]: Boogie Preprocessor took 110.87 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 13.8 MB). Peak memory consumption was 13.8 MB. Max. memory is 11.5 GB. [2019-01-12 15:33:46,021 INFO L168 Benchmark]: RCFGBuilder took 2625.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 979.9 MB in the end (delta: 102.2 MB). Peak memory consumption was 102.2 MB. Max. memory is 11.5 GB. [2019-01-12 15:33:46,021 INFO L168 Benchmark]: TraceAbstraction took 538761.60 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 979.9 MB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-01-12 15:33:46,024 INFO L168 Benchmark]: Witness Printer took 329.44 ms. Allocated memory is still 7.3 GB. Free memory was 2.8 GB in the beginning and 2.7 GB in the end (delta: 78.7 MB). Peak memory consumption was 78.7 MB. Max. memory is 11.5 GB. [2019-01-12 15:33:46,027 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 489.40 ms. Allocated memory is still 1.0 GB. Free memory was 951.4 MB in the beginning and 929.9 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 169.93 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.6 MB). Free memory was 929.9 MB in the beginning and 1.1 GB in the end (delta: -166.0 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 110.87 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 13.8 MB). Peak memory consumption was 13.8 MB. Max. memory is 11.5 GB. * RCFGBuilder took 2625.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 979.9 MB in the end (delta: 102.2 MB). Peak memory consumption was 102.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 538761.60 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 979.9 MB in the beginning and 2.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 329.44 ms. Allocated memory is still 7.3 GB. Free memory was 2.8 GB in the beginning and 2.7 GB in the end (delta: 78.7 MB). Peak memory consumption was 78.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int t3_pc = 0; [L19] int t4_pc = 0; [L20] int t5_pc = 0; [L21] int m_st ; [L22] int t1_st ; [L23] int t2_st ; [L24] int t3_st ; [L25] int t4_st ; [L26] int t5_st ; [L27] int m_i ; [L28] int t1_i ; [L29] int t2_i ; [L30] int t3_i ; [L31] int t4_i ; [L32] int t5_i ; [L33] int M_E = 2; [L34] int T1_E = 2; [L35] int T2_E = 2; [L36] int T3_E = 2; [L37] int T4_E = 2; [L38] int T5_E = 2; [L39] int E_1 = 2; [L40] int E_2 = 2; [L41] int E_3 = 2; [L42] int E_4 = 2; [L43] int E_5 = 2; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0, T5_E=2, t5_i=0, t5_pc=0, t5_st=0] [L935] int __retres1 ; [L846] m_i = 1 [L847] t1_i = 1 [L848] t2_i = 1 [L849] t3_i = 1 [L850] t4_i = 1 [L851] t5_i = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L876] int kernel_st ; [L877] int tmp ; [L878] int tmp___0 ; [L882] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L391] COND TRUE m_i == 1 [L392] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L396] COND TRUE t1_i == 1 [L397] t1_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L401] COND TRUE t2_i == 1 [L402] t2_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L406] COND TRUE t3_i == 1 [L407] t3_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L411] COND TRUE t4_i == 1 [L412] t4_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L416] COND TRUE t5_i == 1 [L417] t5_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L576] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L581] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L586] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L591] COND FALSE !(T3_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L596] COND FALSE !(T4_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L601] COND FALSE !(T5_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L606] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L611] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L616] COND FALSE !(E_3 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L621] COND FALSE !(E_4 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L626] COND FALSE !(E_5 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L699] int tmp ; [L700] int tmp___0 ; [L701] int tmp___1 ; [L702] int tmp___2 ; [L703] int tmp___3 ; [L704] int tmp___4 ; [L266] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L269] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L279] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L281] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L708] tmp = is_master_triggered() [L710] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L285] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L288] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L298] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L300] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L716] tmp___0 = is_transmit1_triggered() [L718] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L304] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L307] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L317] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L319] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L724] tmp___1 = is_transmit2_triggered() [L726] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L323] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L326] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L336] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L338] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L732] tmp___2 = is_transmit3_triggered() [L734] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L342] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L345] COND FALSE !(t4_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L355] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L357] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L740] tmp___3 = is_transmit4_triggered() [L742] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L361] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L364] COND FALSE !(t5_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L374] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L376] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L748] tmp___4 = is_transmit5_triggered() [L750] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L639] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L644] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L649] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L654] COND FALSE !(T3_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L659] COND FALSE !(T4_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L664] COND FALSE !(T5_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L669] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L674] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L679] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L684] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L689] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L890] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L893] kernel_st = 1 [L467] int tmp ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L471] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L426] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L429] COND TRUE m_st == 0 [L430] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L462] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L474] tmp = exists_runnable_thread() [L476] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L481] COND TRUE m_st == 0 [L482] int tmp_ndt_1; [L483] tmp_ndt_1 = __VERIFIER_nondet_int() [L484] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L495] COND TRUE t1_st == 0 [L496] int tmp_ndt_2; [L497] tmp_ndt_2 = __VERIFIER_nondet_int() [L498] COND TRUE \read(tmp_ndt_2) [L500] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L96] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L107] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L109] t1_pc = 1 [L110] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L509] COND TRUE t2_st == 0 [L510] int tmp_ndt_3; [L511] tmp_ndt_3 = __VERIFIER_nondet_int() [L512] COND TRUE \read(tmp_ndt_3) [L514] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L131] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L142] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L144] t2_pc = 1 [L145] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L523] COND TRUE t3_st == 0 [L524] int tmp_ndt_4; [L525] tmp_ndt_4 = __VERIFIER_nondet_int() [L526] COND TRUE \read(tmp_ndt_4) [L528] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L166] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L177] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L179] t3_pc = 1 [L180] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L537] COND TRUE t4_st == 0 [L538] int tmp_ndt_5; [L539] tmp_ndt_5 = __VERIFIER_nondet_int() [L540] COND TRUE \read(tmp_ndt_5) [L542] t4_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L201] COND TRUE t4_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L212] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L214] t4_pc = 1 [L215] t4_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=0] [L551] COND TRUE t5_st == 0 [L552] int tmp_ndt_6; [L553] tmp_ndt_6 = __VERIFIER_nondet_int() [L554] COND TRUE \read(tmp_ndt_6) [L556] t5_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1] [L236] COND TRUE t5_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1] [L247] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1] [L249] t5_pc = 1 [L250] t5_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L471] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L426] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L429] COND TRUE m_st == 0 [L430] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L462] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L474] tmp = exists_runnable_thread() [L476] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L481] COND TRUE m_st == 0 [L482] int tmp_ndt_1; [L483] tmp_ndt_1 = __VERIFIER_nondet_int() [L484] COND TRUE \read(tmp_ndt_1) [L486] m_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L55] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L66] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L69] E_1 = 1 [L699] int tmp ; [L700] int tmp___0 ; [L701] int tmp___1 ; [L702] int tmp___2 ; [L703] int tmp___3 ; [L704] int tmp___4 ; [L266] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L269] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L279] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L281] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L708] tmp = is_master_triggered() [L710] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L285] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L288] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L289] COND TRUE E_1 == 1 [L290] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L300] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L716] tmp___0 = is_transmit1_triggered() [L718] COND TRUE \read(tmp___0) [L719] t1_st = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L304] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L307] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L308] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L317] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L319] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L724] tmp___1 = is_transmit2_triggered() [L726] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L323] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L326] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L327] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L336] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L338] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L732] tmp___2 = is_transmit3_triggered() [L734] COND FALSE !(\read(tmp___2)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L342] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L345] COND TRUE t4_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L346] COND FALSE !(E_4 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L355] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L357] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L740] tmp___3 = is_transmit4_triggered() [L742] COND FALSE !(\read(tmp___3)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L361] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L364] COND TRUE t5_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L365] COND FALSE !(E_5 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L374] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L376] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L748] tmp___4 = is_transmit5_triggered() [L750] COND FALSE !(\read(tmp___4)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L71] E_1 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L74] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L76] m_pc = 1 [L77] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L495] COND TRUE t1_st == 0 [L496] int tmp_ndt_2; [L497] tmp_ndt_2 = __VERIFIER_nondet_int() [L498] COND TRUE \read(tmp_ndt_2) [L500] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L96] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L99] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L115] E_2 = 1 [L699] int tmp ; [L700] int tmp___0 ; [L701] int tmp___1 ; [L702] int tmp___2 ; [L703] int tmp___3 ; [L704] int tmp___4 ; [L266] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L269] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L270] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L279] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L281] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L708] tmp = is_master_triggered() [L710] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L285] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L288] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L289] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L298] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L300] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L716] tmp___0 = is_transmit1_triggered() [L718] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L304] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L307] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L308] COND TRUE E_2 == 1 [L309] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L319] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L724] tmp___1 = is_transmit2_triggered() [L726] COND TRUE \read(tmp___1) [L727] t2_st = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L323] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L326] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L327] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L336] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L338] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L732] tmp___2 = is_transmit3_triggered() [L734] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L342] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L345] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L346] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L355] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L357] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L740] tmp___3 = is_transmit4_triggered() [L742] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L361] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L364] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L365] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L374] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L376] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L748] tmp___4 = is_transmit5_triggered() [L750] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L117] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L107] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L109] t1_pc = 1 [L110] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L509] COND TRUE t2_st == 0 [L510] int tmp_ndt_3; [L511] tmp_ndt_3 = __VERIFIER_nondet_int() [L512] COND TRUE \read(tmp_ndt_3) [L514] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L131] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L134] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L150] E_3 = 1 [L699] int tmp ; [L700] int tmp___0 ; [L701] int tmp___1 ; [L702] int tmp___2 ; [L703] int tmp___3 ; [L704] int tmp___4 ; [L266] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L269] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L270] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L279] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L281] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L708] tmp = is_master_triggered() [L710] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L285] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L288] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L289] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L298] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L300] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L716] tmp___0 = is_transmit1_triggered() [L718] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L304] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L307] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L308] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L317] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L319] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L724] tmp___1 = is_transmit2_triggered() [L726] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L323] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L326] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L327] COND TRUE E_3 == 1 [L328] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L338] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L732] tmp___2 = is_transmit3_triggered() [L734] COND TRUE \read(tmp___2) [L735] t3_st = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L342] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L345] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L346] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L355] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L357] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L740] tmp___3 = is_transmit4_triggered() [L742] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L361] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L364] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L365] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L374] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L376] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L748] tmp___4 = is_transmit5_triggered() [L750] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L152] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L142] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L144] t2_pc = 1 [L145] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L523] COND TRUE t3_st == 0 [L524] int tmp_ndt_4; [L525] tmp_ndt_4 = __VERIFIER_nondet_int() [L526] COND TRUE \read(tmp_ndt_4) [L528] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L166] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L169] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L185] E_4 = 1 [L699] int tmp ; [L700] int tmp___0 ; [L701] int tmp___1 ; [L702] int tmp___2 ; [L703] int tmp___3 ; [L704] int tmp___4 ; [L266] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L269] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L270] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L279] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L281] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L708] tmp = is_master_triggered() [L710] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L285] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L288] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L289] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L298] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L300] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L716] tmp___0 = is_transmit1_triggered() [L718] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L304] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L307] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L308] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L317] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L319] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L724] tmp___1 = is_transmit2_triggered() [L726] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L323] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L326] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L327] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L336] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L338] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L732] tmp___2 = is_transmit3_triggered() [L734] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L342] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L345] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L346] COND TRUE E_4 == 1 [L347] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L357] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L740] tmp___3 = is_transmit4_triggered() [L742] COND TRUE \read(tmp___3) [L743] t4_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L361] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L364] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L365] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L374] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L376] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L748] tmp___4 = is_transmit5_triggered() [L750] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L187] E_4 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L177] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L179] t3_pc = 1 [L180] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L537] COND TRUE t4_st == 0 [L538] int tmp_ndt_5; [L539] tmp_ndt_5 = __VERIFIER_nondet_int() [L540] COND TRUE \read(tmp_ndt_5) [L542] t4_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L201] COND FALSE !(t4_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L204] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L220] E_5 = 1 [L699] int tmp ; [L700] int tmp___0 ; [L701] int tmp___1 ; [L702] int tmp___2 ; [L703] int tmp___3 ; [L704] int tmp___4 ; [L266] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L269] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L270] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L279] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L281] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L708] tmp = is_master_triggered() [L710] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L285] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L288] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L289] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L298] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L300] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L716] tmp___0 = is_transmit1_triggered() [L718] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L304] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L307] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L308] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L317] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L319] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L724] tmp___1 = is_transmit2_triggered() [L726] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L323] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L326] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L327] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L336] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L338] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L732] tmp___2 = is_transmit3_triggered() [L734] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L342] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L345] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L346] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L355] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L357] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L740] tmp___3 = is_transmit4_triggered() [L742] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L361] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L364] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L365] COND TRUE E_5 == 1 [L366] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L376] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2] [L748] tmp___4 = is_transmit5_triggered() [L750] COND TRUE \read(tmp___4) [L751] t5_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0] [L222] E_5 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0] [L212] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0] [L214] t4_pc = 1 [L215] t4_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=0] [L551] COND TRUE t5_st == 0 [L552] int tmp_ndt_6; [L553] tmp_ndt_6 = __VERIFIER_nondet_int() [L554] COND TRUE \read(tmp_ndt_6) [L556] t5_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1] [L236] COND FALSE !(t5_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1] [L239] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1] [L11] __VERIFIER_error() VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 486 locations, 1 error locations. UNSAFE Result, 538.6s OverallTime, 43 OverallIterations, 2 TraceHistogramMax, 293.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 30896 SDtfs, 29124 SDslu, 20042 SDs, 0 SdLazy, 931 SolverSat, 486 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 140 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=287414occurred in iteration=31, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 236.9s AutomataMinimizationTime, 42 MinimizatonAttempts, 753374 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 3.7s InterpolantComputationTime, 6634 NumberOfCodeBlocks, 6634 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 6240 ConstructedInterpolants, 0 QuantifiedInterpolants, 1667330 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 42 InterpolantComputations, 42 PerfectInterpolantSequences, 495/495 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...