./Ultimate.py --spec /storage/repos/svcomp/c/properties/valid-memsafety.prp --file /storage/repos/svcomp/c/ldv-memsafety/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 0ed9222f Calling Ultimate with: java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx12G -Xms1G -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerMemDerefMemtrack.xml -i /storage/repos/svcomp/c/ldv-memsafety/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 68d161eb03bccd8280d2086bc4cdb7b46f7ee157 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-deref) --- Real Ultimate output --- This is Ultimate 0.1.24-0ed9222-m [2019-01-14 19:05:56,565 INFO L170 SettingsManager]: Resetting all preferences to default values... [2019-01-14 19:05:56,567 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2019-01-14 19:05:56,583 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-01-14 19:05:56,583 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-01-14 19:05:56,584 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-01-14 19:05:56,586 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-01-14 19:05:56,588 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2019-01-14 19:05:56,589 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-01-14 19:05:56,590 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-01-14 19:05:56,591 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-01-14 19:05:56,592 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-01-14 19:05:56,593 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-01-14 19:05:56,594 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-01-14 19:05:56,595 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-01-14 19:05:56,596 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-01-14 19:05:56,597 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-01-14 19:05:56,599 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-01-14 19:05:56,601 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2019-01-14 19:05:56,603 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-01-14 19:05:56,604 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-01-14 19:05:56,605 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-01-14 19:05:56,608 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-01-14 19:05:56,608 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-01-14 19:05:56,609 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-01-14 19:05:56,610 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-01-14 19:05:56,611 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-01-14 19:05:56,612 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-01-14 19:05:56,613 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2019-01-14 19:05:56,614 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-01-14 19:05:56,615 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2019-01-14 19:05:56,615 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-01-14 19:05:56,616 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-01-14 19:05:56,616 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2019-01-14 19:05:56,617 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2019-01-14 19:05:56,618 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2019-01-14 19:05:56,619 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2019-01-14 19:05:56,645 INFO L110 SettingsManager]: Loading preferences was successful [2019-01-14 19:05:56,645 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2019-01-14 19:05:56,647 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-01-14 19:05:56,648 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2019-01-14 19:05:56,648 INFO L133 SettingsManager]: * Use SBE=true [2019-01-14 19:05:56,648 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-01-14 19:05:56,648 INFO L133 SettingsManager]: * sizeof long=4 [2019-01-14 19:05:56,649 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2019-01-14 19:05:56,650 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2019-01-14 19:05:56,650 INFO L133 SettingsManager]: * sizeof POINTER=4 [2019-01-14 19:05:56,650 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2019-01-14 19:05:56,650 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2019-01-14 19:05:56,650 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2019-01-14 19:05:56,650 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2019-01-14 19:05:56,651 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-01-14 19:05:56,652 INFO L133 SettingsManager]: * sizeof long double=12 [2019-01-14 19:05:56,652 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-01-14 19:05:56,652 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-01-14 19:05:56,652 INFO L133 SettingsManager]: * To the following directory=./dump/ [2019-01-14 19:05:56,652 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2019-01-14 19:05:56,652 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-14 19:05:56,653 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-01-14 19:05:56,653 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-01-14 19:05:56,653 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2019-01-14 19:05:56,653 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-01-14 19:05:56,653 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68d161eb03bccd8280d2086bc4cdb7b46f7ee157 [2019-01-14 19:05:56,705 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-01-14 19:05:56,723 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-01-14 19:05:56,730 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-01-14 19:05:56,731 INFO L271 PluginConnector]: Initializing CDTParser... [2019-01-14 19:05:56,732 INFO L276 PluginConnector]: CDTParser initialized [2019-01-14 19:05:56,733 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/svcomp/c/ldv-memsafety/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c [2019-01-14 19:05:56,789 INFO L221 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f0ee2524c/30c710c090304cba8c803ef8dd6c5e9e/FLAG1b7134e2a [2019-01-14 19:05:57,244 INFO L307 CDTParser]: Found 1 translation units. [2019-01-14 19:05:57,245 INFO L161 CDTParser]: Scanning /storage/repos/svcomp/c/ldv-memsafety/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c [2019-01-14 19:05:57,251 INFO L355 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f0ee2524c/30c710c090304cba8c803ef8dd6c5e9e/FLAG1b7134e2a [2019-01-14 19:05:57,641 INFO L363 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f0ee2524c/30c710c090304cba8c803ef8dd6c5e9e [2019-01-14 19:05:57,644 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-01-14 19:05:57,646 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-01-14 19:05:57,649 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-01-14 19:05:57,650 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-01-14 19:05:57,654 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2019-01-14 19:05:57,654 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,658 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@70ee0c5b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57, skipping insertion in model container [2019-01-14 19:05:57,658 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,666 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-01-14 19:05:57,686 INFO L176 MainTranslator]: Built tables and reachable declarations [2019-01-14 19:05:57,885 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-14 19:05:57,896 INFO L191 MainTranslator]: Completed pre-run [2019-01-14 19:05:57,918 INFO L208 PostProcessor]: Analyzing one entry point: main [2019-01-14 19:05:57,936 INFO L195 MainTranslator]: Completed translation [2019-01-14 19:05:57,937 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57 WrapperNode [2019-01-14 19:05:57,937 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-01-14 19:05:57,938 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-01-14 19:05:57,938 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-01-14 19:05:57,938 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2019-01-14 19:05:57,954 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,955 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,965 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,965 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,974 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,982 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,983 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (1/1) ... [2019-01-14 19:05:57,988 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-01-14 19:05:57,988 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-01-14 19:05:57,988 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-01-14 19:05:57,988 INFO L276 PluginConnector]: RCFGBuilder initialized [2019-01-14 19:05:57,989 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-01-14 19:05:58,120 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2019-01-14 19:05:58,120 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-01-14 19:05:58,120 INFO L138 BoogieDeclarations]: Found implementation of procedure foo [2019-01-14 19:05:58,121 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2019-01-14 19:05:58,121 INFO L130 BoogieDeclarations]: Found specification of procedure foo [2019-01-14 19:05:58,121 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-01-14 19:05:58,121 INFO L130 BoogieDeclarations]: Found specification of procedure main [2019-01-14 19:05:58,121 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-01-14 19:05:58,121 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-01-14 19:05:58,121 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-01-14 19:05:58,122 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2019-01-14 19:05:58,122 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-01-14 19:05:58,619 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-01-14 19:05:58,620 INFO L286 CfgBuilder]: Removed 3 assue(true) statements. [2019-01-14 19:05:58,621 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.01 07:05:58 BoogieIcfgContainer [2019-01-14 19:05:58,621 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-01-14 19:05:58,623 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-01-14 19:05:58,623 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-01-14 19:05:58,626 INFO L276 PluginConnector]: TraceAbstraction initialized [2019-01-14 19:05:58,626 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.01 07:05:57" (1/3) ... [2019-01-14 19:05:58,627 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1ca26c39 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.01 07:05:58, skipping insertion in model container [2019-01-14 19:05:58,627 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.01 07:05:57" (2/3) ... [2019-01-14 19:05:58,628 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1ca26c39 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.01 07:05:58, skipping insertion in model container [2019-01-14 19:05:58,628 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.01 07:05:58" (3/3) ... [2019-01-14 19:05:58,630 INFO L112 eAbstractionObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration_false-valid-deref-write.c [2019-01-14 19:05:58,639 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-01-14 19:05:58,647 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 8 error locations. [2019-01-14 19:05:58,664 INFO L257 AbstractCegarLoop]: Starting to check reachability of 8 error locations. [2019-01-14 19:05:58,691 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2019-01-14 19:05:58,692 INFO L382 AbstractCegarLoop]: Interprodecural is true [2019-01-14 19:05:58,692 INFO L383 AbstractCegarLoop]: Hoare is false [2019-01-14 19:05:58,693 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-01-14 19:05:58,693 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-01-14 19:05:58,693 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-01-14 19:05:58,693 INFO L387 AbstractCegarLoop]: Difference is false [2019-01-14 19:05:58,693 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-01-14 19:05:58,693 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-01-14 19:05:58,709 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2019-01-14 19:05:58,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-01-14 19:05:58,720 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:05:58,721 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:05:58,723 INFO L423 AbstractCegarLoop]: === Iteration 1 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:05:58,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:05:58,729 INFO L82 PathProgramCache]: Analyzing trace with hash 1909189377, now seen corresponding path program 1 times [2019-01-14 19:05:58,731 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:05:58,731 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:05:58,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:05:58,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:05:58,777 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:05:58,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:05:58,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:05:58,909 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-14 19:05:58,909 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-01-14 19:05:58,913 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-14 19:05:58,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-14 19:05:58,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-14 19:05:58,929 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 3 states. [2019-01-14 19:05:59,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:05:59,104 INFO L93 Difference]: Finished difference Result 58 states and 63 transitions. [2019-01-14 19:05:59,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-14 19:05:59,106 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 [2019-01-14 19:05:59,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:05:59,114 INFO L225 Difference]: With dead ends: 58 [2019-01-14 19:05:59,114 INFO L226 Difference]: Without dead ends: 54 [2019-01-14 19:05:59,116 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-14 19:05:59,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2019-01-14 19:05:59,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 39. [2019-01-14 19:05:59,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2019-01-14 19:05:59,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 42 transitions. [2019-01-14 19:05:59,156 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 42 transitions. Word has length 10 [2019-01-14 19:05:59,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:05:59,156 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 42 transitions. [2019-01-14 19:05:59,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-14 19:05:59,156 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 42 transitions. [2019-01-14 19:05:59,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-01-14 19:05:59,157 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:05:59,157 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:05:59,157 INFO L423 AbstractCegarLoop]: === Iteration 2 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:05:59,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:05:59,158 INFO L82 PathProgramCache]: Analyzing trace with hash -941983064, now seen corresponding path program 1 times [2019-01-14 19:05:59,158 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:05:59,158 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:05:59,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:05:59,159 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:05:59,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:05:59,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:05:59,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:05:59,206 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-14 19:05:59,206 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-14 19:05:59,209 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-14 19:05:59,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-14 19:05:59,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-14 19:05:59,210 INFO L87 Difference]: Start difference. First operand 39 states and 42 transitions. Second operand 3 states. [2019-01-14 19:05:59,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:05:59,327 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2019-01-14 19:05:59,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-14 19:05:59,330 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2019-01-14 19:05:59,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:05:59,334 INFO L225 Difference]: With dead ends: 49 [2019-01-14 19:05:59,336 INFO L226 Difference]: Without dead ends: 49 [2019-01-14 19:05:59,337 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-14 19:05:59,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2019-01-14 19:05:59,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 41. [2019-01-14 19:05:59,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2019-01-14 19:05:59,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2019-01-14 19:05:59,348 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 11 [2019-01-14 19:05:59,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:05:59,350 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2019-01-14 19:05:59,350 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-14 19:05:59,350 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2019-01-14 19:05:59,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2019-01-14 19:05:59,351 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:05:59,351 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:05:59,351 INFO L423 AbstractCegarLoop]: === Iteration 3 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:05:59,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:05:59,352 INFO L82 PathProgramCache]: Analyzing trace with hash 863296133, now seen corresponding path program 1 times [2019-01-14 19:05:59,352 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:05:59,352 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:05:59,355 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:05:59,356 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:05:59,356 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:05:59,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:05:59,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:05:59,530 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-14 19:05:59,530 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-01-14 19:05:59,531 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-14 19:05:59,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-14 19:05:59,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-14 19:05:59,532 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand 5 states. [2019-01-14 19:05:59,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:05:59,690 INFO L93 Difference]: Finished difference Result 40 states and 44 transitions. [2019-01-14 19:05:59,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-14 19:05:59,691 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 [2019-01-14 19:05:59,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:05:59,692 INFO L225 Difference]: With dead ends: 40 [2019-01-14 19:05:59,692 INFO L226 Difference]: Without dead ends: 40 [2019-01-14 19:05:59,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-01-14 19:05:59,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2019-01-14 19:05:59,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2019-01-14 19:05:59,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2019-01-14 19:05:59,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 44 transitions. [2019-01-14 19:05:59,698 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 44 transitions. Word has length 12 [2019-01-14 19:05:59,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:05:59,698 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 44 transitions. [2019-01-14 19:05:59,698 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-14 19:05:59,699 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 44 transitions. [2019-01-14 19:05:59,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2019-01-14 19:05:59,699 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:05:59,699 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:05:59,700 INFO L423 AbstractCegarLoop]: === Iteration 4 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:05:59,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:05:59,700 INFO L82 PathProgramCache]: Analyzing trace with hash 863296134, now seen corresponding path program 1 times [2019-01-14 19:05:59,700 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:05:59,701 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:05:59,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:05:59,702 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:05:59,702 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:05:59,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:00,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:06:00,007 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-14 19:06:00,007 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-01-14 19:06:00,007 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-14 19:06:00,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-14 19:06:00,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-01-14 19:06:00,008 INFO L87 Difference]: Start difference. First operand 40 states and 44 transitions. Second operand 6 states. [2019-01-14 19:06:00,134 WARN L181 SmtUtils]: Spent 100.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2019-01-14 19:06:00,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:00,262 INFO L93 Difference]: Finished difference Result 42 states and 46 transitions. [2019-01-14 19:06:00,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-14 19:06:00,263 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 [2019-01-14 19:06:00,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:00,264 INFO L225 Difference]: With dead ends: 42 [2019-01-14 19:06:00,265 INFO L226 Difference]: Without dead ends: 42 [2019-01-14 19:06:00,265 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-01-14 19:06:00,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2019-01-14 19:06:00,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 39. [2019-01-14 19:06:00,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2019-01-14 19:06:00,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 43 transitions. [2019-01-14 19:06:00,271 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 43 transitions. Word has length 12 [2019-01-14 19:06:00,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:00,271 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 43 transitions. [2019-01-14 19:06:00,271 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-14 19:06:00,272 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 43 transitions. [2019-01-14 19:06:00,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-01-14 19:06:00,272 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:00,272 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:00,273 INFO L423 AbstractCegarLoop]: === Iteration 5 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:00,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:00,273 INFO L82 PathProgramCache]: Analyzing trace with hash 143250926, now seen corresponding path program 1 times [2019-01-14 19:06:00,273 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:00,273 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:00,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:00,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:00,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:00,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:00,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:06:00,364 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-14 19:06:00,364 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-14 19:06:00,364 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-14 19:06:00,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-14 19:06:00,365 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-14 19:06:00,365 INFO L87 Difference]: Start difference. First operand 39 states and 43 transitions. Second operand 3 states. [2019-01-14 19:06:00,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:00,418 INFO L93 Difference]: Finished difference Result 37 states and 41 transitions. [2019-01-14 19:06:00,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-14 19:06:00,420 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 [2019-01-14 19:06:00,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:00,421 INFO L225 Difference]: With dead ends: 37 [2019-01-14 19:06:00,421 INFO L226 Difference]: Without dead ends: 37 [2019-01-14 19:06:00,422 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-14 19:06:00,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2019-01-14 19:06:00,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2019-01-14 19:06:00,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2019-01-14 19:06:00,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 41 transitions. [2019-01-14 19:06:00,427 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 41 transitions. Word has length 15 [2019-01-14 19:06:00,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:00,427 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 41 transitions. [2019-01-14 19:06:00,427 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-14 19:06:00,428 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 41 transitions. [2019-01-14 19:06:00,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-01-14 19:06:00,428 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:00,429 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:00,430 INFO L423 AbstractCegarLoop]: === Iteration 6 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:00,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:00,430 INFO L82 PathProgramCache]: Analyzing trace with hash 143250927, now seen corresponding path program 1 times [2019-01-14 19:06:00,430 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:00,431 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:00,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:00,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:00,432 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:00,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:00,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:06:00,639 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-14 19:06:00,639 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-01-14 19:06:00,639 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-01-14 19:06:00,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-01-14 19:06:00,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-01-14 19:06:00,640 INFO L87 Difference]: Start difference. First operand 37 states and 41 transitions. Second operand 6 states. [2019-01-14 19:06:00,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:00,999 INFO L93 Difference]: Finished difference Result 56 states and 61 transitions. [2019-01-14 19:06:01,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-14 19:06:01,000 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 [2019-01-14 19:06:01,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:01,002 INFO L225 Difference]: With dead ends: 56 [2019-01-14 19:06:01,002 INFO L226 Difference]: Without dead ends: 56 [2019-01-14 19:06:01,003 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-01-14 19:06:01,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2019-01-14 19:06:01,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 41. [2019-01-14 19:06:01,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2019-01-14 19:06:01,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 46 transitions. [2019-01-14 19:06:01,013 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 46 transitions. Word has length 15 [2019-01-14 19:06:01,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:01,014 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 46 transitions. [2019-01-14 19:06:01,014 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-01-14 19:06:01,014 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 46 transitions. [2019-01-14 19:06:01,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-01-14 19:06:01,015 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:01,015 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:01,015 INFO L423 AbstractCegarLoop]: === Iteration 7 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:01,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:01,016 INFO L82 PathProgramCache]: Analyzing trace with hash 1623425863, now seen corresponding path program 1 times [2019-01-14 19:06:01,016 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:01,016 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:01,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:01,017 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:01,017 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:01,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:01,116 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:06:01,116 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:01,116 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:01,129 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:01,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:01,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:01,200 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:06:01,219 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:01,219 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2019-01-14 19:06:01,220 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-01-14 19:06:01,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-01-14 19:06:01,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-14 19:06:01,220 INFO L87 Difference]: Start difference. First operand 41 states and 46 transitions. Second operand 4 states. [2019-01-14 19:06:01,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:01,272 INFO L93 Difference]: Finished difference Result 52 states and 59 transitions. [2019-01-14 19:06:01,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-01-14 19:06:01,274 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-01-14 19:06:01,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:01,275 INFO L225 Difference]: With dead ends: 52 [2019-01-14 19:06:01,275 INFO L226 Difference]: Without dead ends: 52 [2019-01-14 19:06:01,276 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 3 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-01-14 19:06:01,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2019-01-14 19:06:01,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 46. [2019-01-14 19:06:01,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2019-01-14 19:06:01,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 52 transitions. [2019-01-14 19:06:01,282 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 52 transitions. Word has length 16 [2019-01-14 19:06:01,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:01,283 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 52 transitions. [2019-01-14 19:06:01,283 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-01-14 19:06:01,283 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 52 transitions. [2019-01-14 19:06:01,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-01-14 19:06:01,284 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:01,284 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:01,284 INFO L423 AbstractCegarLoop]: === Iteration 8 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:01,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:01,285 INFO L82 PathProgramCache]: Analyzing trace with hash 2121234190, now seen corresponding path program 1 times [2019-01-14 19:06:01,285 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:01,285 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:01,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:01,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:01,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:01,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:01,409 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:06:01,409 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:01,409 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:01,419 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:01,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:01,440 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:01,532 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:06:01,558 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:01,558 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2019-01-14 19:06:01,559 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-01-14 19:06:01,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-01-14 19:06:01,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2019-01-14 19:06:01,560 INFO L87 Difference]: Start difference. First operand 46 states and 52 transitions. Second operand 9 states. [2019-01-14 19:06:01,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:01,938 INFO L93 Difference]: Finished difference Result 64 states and 68 transitions. [2019-01-14 19:06:01,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-01-14 19:06:01,942 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 20 [2019-01-14 19:06:01,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:01,943 INFO L225 Difference]: With dead ends: 64 [2019-01-14 19:06:01,943 INFO L226 Difference]: Without dead ends: 58 [2019-01-14 19:06:01,944 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 17 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2019-01-14 19:06:01,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2019-01-14 19:06:01,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 42. [2019-01-14 19:06:01,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2019-01-14 19:06:01,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 45 transitions. [2019-01-14 19:06:01,954 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 45 transitions. Word has length 20 [2019-01-14 19:06:01,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:01,954 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 45 transitions. [2019-01-14 19:06:01,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-01-14 19:06:01,954 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 45 transitions. [2019-01-14 19:06:01,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-01-14 19:06:01,959 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:01,959 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:01,960 INFO L423 AbstractCegarLoop]: === Iteration 9 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:01,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:01,961 INFO L82 PathProgramCache]: Analyzing trace with hash -1483602424, now seen corresponding path program 2 times [2019-01-14 19:06:01,961 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:01,962 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:01,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:01,964 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:01,966 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:01,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:02,109 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-01-14 19:06:02,110 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:02,110 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:02,125 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:06:02,146 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:06:02,146 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:02,149 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:02,264 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-01-14 19:06:02,283 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:02,283 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 12 [2019-01-14 19:06:02,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-01-14 19:06:02,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-01-14 19:06:02,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2019-01-14 19:06:02,284 INFO L87 Difference]: Start difference. First operand 42 states and 45 transitions. Second operand 12 states. [2019-01-14 19:06:02,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:02,840 INFO L93 Difference]: Finished difference Result 70 states and 73 transitions. [2019-01-14 19:06:02,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-01-14 19:06:02,841 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 21 [2019-01-14 19:06:02,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:02,842 INFO L225 Difference]: With dead ends: 70 [2019-01-14 19:06:02,843 INFO L226 Difference]: Without dead ends: 70 [2019-01-14 19:06:02,843 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=172, Unknown=0, NotChecked=0, Total=240 [2019-01-14 19:06:02,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2019-01-14 19:06:02,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 58. [2019-01-14 19:06:02,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2019-01-14 19:06:02,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 61 transitions. [2019-01-14 19:06:02,849 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 61 transitions. Word has length 21 [2019-01-14 19:06:02,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:02,849 INFO L480 AbstractCegarLoop]: Abstraction has 58 states and 61 transitions. [2019-01-14 19:06:02,849 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-01-14 19:06:02,849 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 61 transitions. [2019-01-14 19:06:02,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-01-14 19:06:02,850 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:02,850 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:02,851 INFO L423 AbstractCegarLoop]: === Iteration 10 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:02,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:02,851 INFO L82 PathProgramCache]: Analyzing trace with hash -523456177, now seen corresponding path program 2 times [2019-01-14 19:06:02,851 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:02,851 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:02,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:02,852 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:02,852 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:02,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:02,903 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-14 19:06:02,903 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-01-14 19:06:02,904 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-01-14 19:06:02,904 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-01-14 19:06:02,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-01-14 19:06:02,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-14 19:06:02,905 INFO L87 Difference]: Start difference. First operand 58 states and 61 transitions. Second operand 3 states. [2019-01-14 19:06:02,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:02,946 INFO L93 Difference]: Finished difference Result 62 states and 65 transitions. [2019-01-14 19:06:02,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-01-14 19:06:02,947 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-01-14 19:06:02,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:02,949 INFO L225 Difference]: With dead ends: 62 [2019-01-14 19:06:02,949 INFO L226 Difference]: Without dead ends: 62 [2019-01-14 19:06:02,950 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-01-14 19:06:02,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2019-01-14 19:06:02,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 60. [2019-01-14 19:06:02,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2019-01-14 19:06:02,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 63 transitions. [2019-01-14 19:06:02,956 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 63 transitions. Word has length 25 [2019-01-14 19:06:02,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:02,956 INFO L480 AbstractCegarLoop]: Abstraction has 60 states and 63 transitions. [2019-01-14 19:06:02,956 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-01-14 19:06:02,956 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 63 transitions. [2019-01-14 19:06:02,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-01-14 19:06:02,957 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:02,958 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:02,958 INFO L423 AbstractCegarLoop]: === Iteration 11 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:02,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:02,958 INFO L82 PathProgramCache]: Analyzing trace with hash 2020089664, now seen corresponding path program 1 times [2019-01-14 19:06:02,958 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:02,959 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:02,959 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:02,959 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:02,960 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:02,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:03,043 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2019-01-14 19:06:03,044 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:03,044 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:03,054 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:03,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:03,087 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:03,267 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-14 19:06:03,285 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:03,285 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 4] total 10 [2019-01-14 19:06:03,286 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-01-14 19:06:03,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-01-14 19:06:03,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2019-01-14 19:06:03,287 INFO L87 Difference]: Start difference. First operand 60 states and 63 transitions. Second operand 10 states. [2019-01-14 19:06:03,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:03,514 INFO L93 Difference]: Finished difference Result 74 states and 78 transitions. [2019-01-14 19:06:03,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-01-14 19:06:03,515 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2019-01-14 19:06:03,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:03,517 INFO L225 Difference]: With dead ends: 74 [2019-01-14 19:06:03,517 INFO L226 Difference]: Without dead ends: 74 [2019-01-14 19:06:03,517 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2019-01-14 19:06:03,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2019-01-14 19:06:03,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 49. [2019-01-14 19:06:03,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2019-01-14 19:06:03,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 50 transitions. [2019-01-14 19:06:03,522 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 50 transitions. Word has length 31 [2019-01-14 19:06:03,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:03,523 INFO L480 AbstractCegarLoop]: Abstraction has 49 states and 50 transitions. [2019-01-14 19:06:03,523 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-01-14 19:06:03,523 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 50 transitions. [2019-01-14 19:06:03,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-01-14 19:06:03,524 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:03,524 INFO L402 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:03,525 INFO L423 AbstractCegarLoop]: === Iteration 12 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:03,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:03,525 INFO L82 PathProgramCache]: Analyzing trace with hash -1710006518, now seen corresponding path program 1 times [2019-01-14 19:06:03,525 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:03,525 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:03,526 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:03,526 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:03,526 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:03,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:03,658 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 27 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2019-01-14 19:06:03,658 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:03,658 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:03,677 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:03,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:03,706 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:03,724 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 27 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2019-01-14 19:06:03,746 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:03,746 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2019-01-14 19:06:03,747 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-01-14 19:06:03,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-01-14 19:06:03,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-14 19:06:03,747 INFO L87 Difference]: Start difference. First operand 49 states and 50 transitions. Second operand 5 states. [2019-01-14 19:06:03,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:03,944 INFO L93 Difference]: Finished difference Result 60 states and 62 transitions. [2019-01-14 19:06:03,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-01-14 19:06:03,945 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-01-14 19:06:03,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:03,947 INFO L225 Difference]: With dead ends: 60 [2019-01-14 19:06:03,947 INFO L226 Difference]: Without dead ends: 60 [2019-01-14 19:06:03,948 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 40 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-01-14 19:06:03,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2019-01-14 19:06:03,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 54. [2019-01-14 19:06:03,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2019-01-14 19:06:03,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 56 transitions. [2019-01-14 19:06:03,953 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 56 transitions. Word has length 42 [2019-01-14 19:06:03,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:03,955 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 56 transitions. [2019-01-14 19:06:03,955 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-01-14 19:06:03,955 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 56 transitions. [2019-01-14 19:06:03,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-01-14 19:06:03,956 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:03,957 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:03,958 INFO L423 AbstractCegarLoop]: === Iteration 13 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:03,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:03,958 INFO L82 PathProgramCache]: Analyzing trace with hash -1860847279, now seen corresponding path program 1 times [2019-01-14 19:06:03,958 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:03,959 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:03,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:03,961 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:03,961 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:03,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:04,211 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 4 proven. 42 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-01-14 19:06:04,212 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:04,212 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:04,225 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:04,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:04,262 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:04,379 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 32 proven. 7 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-01-14 19:06:04,398 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:04,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 15 [2019-01-14 19:06:04,398 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-01-14 19:06:04,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-01-14 19:06:04,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2019-01-14 19:06:04,400 INFO L87 Difference]: Start difference. First operand 54 states and 56 transitions. Second operand 15 states. [2019-01-14 19:06:04,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:04,670 INFO L93 Difference]: Finished difference Result 62 states and 63 transitions. [2019-01-14 19:06:04,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-01-14 19:06:04,671 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 46 [2019-01-14 19:06:04,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:04,673 INFO L225 Difference]: With dead ends: 62 [2019-01-14 19:06:04,673 INFO L226 Difference]: Without dead ends: 59 [2019-01-14 19:06:04,674 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=92, Invalid=288, Unknown=0, NotChecked=0, Total=380 [2019-01-14 19:06:04,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2019-01-14 19:06:04,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 54. [2019-01-14 19:06:04,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2019-01-14 19:06:04,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 55 transitions. [2019-01-14 19:06:04,678 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 55 transitions. Word has length 46 [2019-01-14 19:06:04,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:04,679 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 55 transitions. [2019-01-14 19:06:04,679 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-01-14 19:06:04,679 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 55 transitions. [2019-01-14 19:06:04,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2019-01-14 19:06:04,680 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:04,680 INFO L402 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:04,681 INFO L423 AbstractCegarLoop]: === Iteration 14 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:04,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:04,681 INFO L82 PathProgramCache]: Analyzing trace with hash -374076379, now seen corresponding path program 2 times [2019-01-14 19:06:04,681 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:04,681 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:04,682 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:04,682 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:04,682 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:04,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:04,869 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 55 proven. 7 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-14 19:06:04,870 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:04,870 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:04,879 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:06:04,915 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:06:04,915 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:04,918 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:05,019 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 60 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2019-01-14 19:06:05,037 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:05,037 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 15 [2019-01-14 19:06:05,038 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-01-14 19:06:05,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-01-14 19:06:05,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2019-01-14 19:06:05,039 INFO L87 Difference]: Start difference. First operand 54 states and 55 transitions. Second operand 15 states. [2019-01-14 19:06:05,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:05,345 INFO L93 Difference]: Finished difference Result 83 states and 84 transitions. [2019-01-14 19:06:05,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-01-14 19:06:05,347 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 47 [2019-01-14 19:06:05,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:05,348 INFO L225 Difference]: With dead ends: 83 [2019-01-14 19:06:05,348 INFO L226 Difference]: Without dead ends: 83 [2019-01-14 19:06:05,352 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=113, Invalid=267, Unknown=0, NotChecked=0, Total=380 [2019-01-14 19:06:05,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2019-01-14 19:06:05,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 78. [2019-01-14 19:06:05,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2019-01-14 19:06:05,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 79 transitions. [2019-01-14 19:06:05,361 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 79 transitions. Word has length 47 [2019-01-14 19:06:05,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:05,361 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 79 transitions. [2019-01-14 19:06:05,361 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-01-14 19:06:05,361 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 79 transitions. [2019-01-14 19:06:05,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-01-14 19:06:05,363 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:05,363 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:05,363 INFO L423 AbstractCegarLoop]: === Iteration 15 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:05,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:05,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1743494932, now seen corresponding path program 2 times [2019-01-14 19:06:05,364 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:05,364 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:05,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:05,365 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:05,365 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:05,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:05,545 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2019-01-14 19:06:05,546 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:05,546 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:05,557 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:06:05,589 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:06:05,589 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:05,592 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:05,660 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2019-01-14 19:06:05,660 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-01-14 19:06:05,701 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 12 [2019-01-14 19:06:05,709 INFO L701 Elim1Store]: detected not equals via solver [2019-01-14 19:06:05,710 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2019-01-14 19:06:05,710 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2019-01-14 19:06:05,720 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-01-14 19:06:05,730 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2019-01-14 19:06:05,731 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:24, output treesize:17 [2019-01-14 19:06:06,023 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2019-01-14 19:06:06,044 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:06,044 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 7 [2019-01-14 19:06:06,044 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-01-14 19:06:06,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-01-14 19:06:06,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-01-14 19:06:06,045 INFO L87 Difference]: Start difference. First operand 78 states and 79 transitions. Second operand 8 states. [2019-01-14 19:06:06,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:06,128 INFO L93 Difference]: Finished difference Result 82 states and 83 transitions. [2019-01-14 19:06:06,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-14 19:06:06,130 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2019-01-14 19:06:06,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:06,131 INFO L225 Difference]: With dead ends: 82 [2019-01-14 19:06:06,132 INFO L226 Difference]: Without dead ends: 82 [2019-01-14 19:06:06,132 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 48 SyntacticMatches, 4 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-01-14 19:06:06,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2019-01-14 19:06:06,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 80. [2019-01-14 19:06:06,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2019-01-14 19:06:06,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 81 transitions. [2019-01-14 19:06:06,136 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 81 transitions. Word has length 51 [2019-01-14 19:06:06,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:06,136 INFO L480 AbstractCegarLoop]: Abstraction has 80 states and 81 transitions. [2019-01-14 19:06:06,137 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-01-14 19:06:06,137 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 81 transitions. [2019-01-14 19:06:06,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2019-01-14 19:06:06,138 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:06,138 INFO L402 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:06,138 INFO L423 AbstractCegarLoop]: === Iteration 16 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:06,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:06,139 INFO L82 PathProgramCache]: Analyzing trace with hash 1240037378, now seen corresponding path program 3 times [2019-01-14 19:06:06,139 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:06,139 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:06,140 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:06,140 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:06,140 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:06,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:06,295 INFO L134 CoverageAnalysis]: Checked inductivity of 191 backedges. 104 proven. 13 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2019-01-14 19:06:06,295 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:06,296 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:06,308 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:06:06,358 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2019-01-14 19:06:06,358 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:06,361 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:06,427 INFO L134 CoverageAnalysis]: Checked inductivity of 191 backedges. 104 proven. 13 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2019-01-14 19:06:06,455 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:06,455 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2019-01-14 19:06:06,456 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-01-14 19:06:06,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-01-14 19:06:06,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2019-01-14 19:06:06,456 INFO L87 Difference]: Start difference. First operand 80 states and 81 transitions. Second operand 11 states. [2019-01-14 19:06:06,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:06,709 INFO L93 Difference]: Finished difference Result 110 states and 112 transitions. [2019-01-14 19:06:06,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-01-14 19:06:06,710 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 73 [2019-01-14 19:06:06,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:06,711 INFO L225 Difference]: With dead ends: 110 [2019-01-14 19:06:06,712 INFO L226 Difference]: Without dead ends: 110 [2019-01-14 19:06:06,712 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2019-01-14 19:06:06,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2019-01-14 19:06:06,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 104. [2019-01-14 19:06:06,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2019-01-14 19:06:06,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 106 transitions. [2019-01-14 19:06:06,717 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 106 transitions. Word has length 73 [2019-01-14 19:06:06,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:06,717 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 106 transitions. [2019-01-14 19:06:06,717 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-01-14 19:06:06,717 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2019-01-14 19:06:06,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-01-14 19:06:06,721 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:06,721 INFO L402 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:06,723 INFO L423 AbstractCegarLoop]: === Iteration 17 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:06,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:06,723 INFO L82 PathProgramCache]: Analyzing trace with hash -976841143, now seen corresponding path program 3 times [2019-01-14 19:06:06,723 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:06,723 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:06,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:06,726 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:06,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:06,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:07,548 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 69 proven. 103 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2019-01-14 19:06:07,549 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:07,549 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:07,562 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:06:07,584 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2019-01-14 19:06:07,584 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:07,589 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:07,717 WARN L181 SmtUtils]: Spent 125.00 ms on a formula simplification that was a NOOP. DAG size: 18 [2019-01-14 19:06:07,728 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2019-01-14 19:06:07,729 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2019-01-14 19:06:07,833 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 12 [2019-01-14 19:06:07,848 INFO L701 Elim1Store]: detected not equals via solver [2019-01-14 19:06:07,849 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2019-01-14 19:06:07,849 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2019-01-14 19:06:07,862 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2019-01-14 19:06:07,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2019-01-14 19:06:07,871 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:21, output treesize:14 [2019-01-14 19:06:08,459 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 183 trivial. 0 not checked. [2019-01-14 19:06:08,478 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2019-01-14 19:06:08,478 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [14] total 19 [2019-01-14 19:06:08,479 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-01-14 19:06:08,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-01-14 19:06:08,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2019-01-14 19:06:08,480 INFO L87 Difference]: Start difference. First operand 104 states and 106 transitions. Second operand 19 states. [2019-01-14 19:06:09,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:09,164 INFO L93 Difference]: Finished difference Result 127 states and 129 transitions. [2019-01-14 19:06:09,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-01-14 19:06:09,165 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 77 [2019-01-14 19:06:09,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:09,167 INFO L225 Difference]: With dead ends: 127 [2019-01-14 19:06:09,167 INFO L226 Difference]: Without dead ends: 121 [2019-01-14 19:06:09,168 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 71 SyntacticMatches, 5 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 172 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=166, Invalid=646, Unknown=0, NotChecked=0, Total=812 [2019-01-14 19:06:09,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2019-01-14 19:06:09,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 112. [2019-01-14 19:06:09,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2019-01-14 19:06:09,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 114 transitions. [2019-01-14 19:06:09,172 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 114 transitions. Word has length 77 [2019-01-14 19:06:09,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:09,173 INFO L480 AbstractCegarLoop]: Abstraction has 112 states and 114 transitions. [2019-01-14 19:06:09,173 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-01-14 19:06:09,173 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 114 transitions. [2019-01-14 19:06:09,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2019-01-14 19:06:09,174 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:09,174 INFO L402 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:09,175 INFO L423 AbstractCegarLoop]: === Iteration 18 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:09,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:09,175 INFO L82 PathProgramCache]: Analyzing trace with hash -1811005430, now seen corresponding path program 4 times [2019-01-14 19:06:09,175 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:09,175 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:09,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:09,176 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:09,176 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:09,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:09,400 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 165 proven. 21 refuted. 0 times theorem prover too weak. 249 trivial. 0 not checked. [2019-01-14 19:06:09,401 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:09,401 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:09,413 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:06:09,455 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:06:09,456 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:09,460 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:09,502 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 165 proven. 21 refuted. 0 times theorem prover too weak. 249 trivial. 0 not checked. [2019-01-14 19:06:09,521 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:09,521 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 9 [2019-01-14 19:06:09,521 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-01-14 19:06:09,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-01-14 19:06:09,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-01-14 19:06:09,522 INFO L87 Difference]: Start difference. First operand 112 states and 114 transitions. Second operand 10 states. [2019-01-14 19:06:10,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:10,002 INFO L93 Difference]: Finished difference Result 120 states and 122 transitions. [2019-01-14 19:06:10,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-01-14 19:06:10,003 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 104 [2019-01-14 19:06:10,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:10,004 INFO L225 Difference]: With dead ends: 120 [2019-01-14 19:06:10,004 INFO L226 Difference]: Without dead ends: 120 [2019-01-14 19:06:10,004 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 100 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-01-14 19:06:10,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2019-01-14 19:06:10,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 113. [2019-01-14 19:06:10,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2019-01-14 19:06:10,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 115 transitions. [2019-01-14 19:06:10,008 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 115 transitions. Word has length 104 [2019-01-14 19:06:10,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:10,009 INFO L480 AbstractCegarLoop]: Abstraction has 113 states and 115 transitions. [2019-01-14 19:06:10,009 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-01-14 19:06:10,009 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 115 transitions. [2019-01-14 19:06:10,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2019-01-14 19:06:10,010 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:10,010 INFO L402 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:10,011 INFO L423 AbstractCegarLoop]: === Iteration 19 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:10,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:10,011 INFO L82 PathProgramCache]: Analyzing trace with hash 241027877, now seen corresponding path program 5 times [2019-01-14 19:06:10,011 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:10,011 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:10,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:10,012 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:10,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:10,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:11,033 INFO L134 CoverageAnalysis]: Checked inductivity of 500 backedges. 250 proven. 28 refuted. 0 times theorem prover too weak. 222 trivial. 0 not checked. [2019-01-14 19:06:11,033 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:11,033 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:11,042 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:06:11,104 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2019-01-14 19:06:11,104 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:11,108 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:11,241 INFO L134 CoverageAnalysis]: Checked inductivity of 500 backedges. 213 proven. 38 refuted. 0 times theorem prover too weak. 249 trivial. 0 not checked. [2019-01-14 19:06:11,268 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:11,268 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 7] total 18 [2019-01-14 19:06:11,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-01-14 19:06:11,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-01-14 19:06:11,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=285, Unknown=0, NotChecked=0, Total=342 [2019-01-14 19:06:11,270 INFO L87 Difference]: Start difference. First operand 113 states and 115 transitions. Second operand 19 states. [2019-01-14 19:06:11,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:11,785 INFO L93 Difference]: Finished difference Result 175 states and 181 transitions. [2019-01-14 19:06:11,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-01-14 19:06:11,787 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 109 [2019-01-14 19:06:11,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:11,788 INFO L225 Difference]: With dead ends: 175 [2019-01-14 19:06:11,789 INFO L226 Difference]: Without dead ends: 175 [2019-01-14 19:06:11,789 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=118, Invalid=532, Unknown=0, NotChecked=0, Total=650 [2019-01-14 19:06:11,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2019-01-14 19:06:11,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 149. [2019-01-14 19:06:11,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2019-01-14 19:06:11,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 153 transitions. [2019-01-14 19:06:11,795 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 153 transitions. Word has length 109 [2019-01-14 19:06:11,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:11,795 INFO L480 AbstractCegarLoop]: Abstraction has 149 states and 153 transitions. [2019-01-14 19:06:11,795 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-01-14 19:06:11,795 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 153 transitions. [2019-01-14 19:06:11,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2019-01-14 19:06:11,796 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:11,797 INFO L402 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:11,797 INFO L423 AbstractCegarLoop]: === Iteration 20 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:11,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:11,797 INFO L82 PathProgramCache]: Analyzing trace with hash -937043486, now seen corresponding path program 6 times [2019-01-14 19:06:11,797 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:11,797 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:11,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:11,798 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:11,798 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:11,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:12,071 INFO L134 CoverageAnalysis]: Checked inductivity of 955 backedges. 553 proven. 153 refuted. 0 times theorem prover too weak. 249 trivial. 0 not checked. [2019-01-14 19:06:12,072 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:12,072 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:12,081 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:06:12,147 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2019-01-14 19:06:12,147 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:12,151 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:12,306 INFO L134 CoverageAnalysis]: Checked inductivity of 955 backedges. 396 proven. 49 refuted. 0 times theorem prover too weak. 510 trivial. 0 not checked. [2019-01-14 19:06:12,328 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:12,328 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 11] total 26 [2019-01-14 19:06:12,328 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-01-14 19:06:12,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-01-14 19:06:12,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=558, Unknown=0, NotChecked=0, Total=650 [2019-01-14 19:06:12,329 INFO L87 Difference]: Start difference. First operand 149 states and 153 transitions. Second operand 26 states. [2019-01-14 19:06:13,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:13,780 INFO L93 Difference]: Finished difference Result 250 states and 256 transitions. [2019-01-14 19:06:13,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-01-14 19:06:13,782 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 145 [2019-01-14 19:06:13,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:13,784 INFO L225 Difference]: With dead ends: 250 [2019-01-14 19:06:13,784 INFO L226 Difference]: Without dead ends: 250 [2019-01-14 19:06:13,785 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 803 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=644, Invalid=2662, Unknown=0, NotChecked=0, Total=3306 [2019-01-14 19:06:13,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2019-01-14 19:06:13,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 204. [2019-01-14 19:06:13,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2019-01-14 19:06:13,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 209 transitions. [2019-01-14 19:06:13,791 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 209 transitions. Word has length 145 [2019-01-14 19:06:13,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:13,792 INFO L480 AbstractCegarLoop]: Abstraction has 204 states and 209 transitions. [2019-01-14 19:06:13,792 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-01-14 19:06:13,792 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 209 transitions. [2019-01-14 19:06:13,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2019-01-14 19:06:13,794 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:13,794 INFO L402 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:13,794 INFO L423 AbstractCegarLoop]: === Iteration 21 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:13,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:13,795 INFO L82 PathProgramCache]: Analyzing trace with hash 1055653604, now seen corresponding path program 7 times [2019-01-14 19:06:13,795 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:13,795 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:13,796 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:13,796 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:13,796 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:13,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:14,100 INFO L134 CoverageAnalysis]: Checked inductivity of 1678 backedges. 957 proven. 273 refuted. 0 times theorem prover too weak. 448 trivial. 0 not checked. [2019-01-14 19:06:14,100 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:14,101 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:14,112 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:14,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:14,183 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:14,324 INFO L134 CoverageAnalysis]: Checked inductivity of 1678 backedges. 1018 proven. 55 refuted. 0 times theorem prover too weak. 605 trivial. 0 not checked. [2019-01-14 19:06:14,342 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:14,342 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 14] total 24 [2019-01-14 19:06:14,343 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-01-14 19:06:14,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-01-14 19:06:14,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=440, Unknown=0, NotChecked=0, Total=552 [2019-01-14 19:06:14,344 INFO L87 Difference]: Start difference. First operand 204 states and 209 transitions. Second operand 24 states. [2019-01-14 19:06:14,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:14,846 INFO L93 Difference]: Finished difference Result 224 states and 226 transitions. [2019-01-14 19:06:14,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-01-14 19:06:14,848 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 186 [2019-01-14 19:06:14,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:14,849 INFO L225 Difference]: With dead ends: 224 [2019-01-14 19:06:14,849 INFO L226 Difference]: Without dead ends: 203 [2019-01-14 19:06:14,850 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 182 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 267 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=278, Invalid=912, Unknown=0, NotChecked=0, Total=1190 [2019-01-14 19:06:14,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2019-01-14 19:06:14,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 200. [2019-01-14 19:06:14,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2019-01-14 19:06:14,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 201 transitions. [2019-01-14 19:06:14,856 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 201 transitions. Word has length 186 [2019-01-14 19:06:14,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:14,856 INFO L480 AbstractCegarLoop]: Abstraction has 200 states and 201 transitions. [2019-01-14 19:06:14,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-01-14 19:06:14,856 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 201 transitions. [2019-01-14 19:06:14,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2019-01-14 19:06:14,858 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:14,858 INFO L402 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:14,859 INFO L423 AbstractCegarLoop]: === Iteration 22 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:14,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:14,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1146107562, now seen corresponding path program 8 times [2019-01-14 19:06:14,859 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:14,859 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:14,860 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:14,860 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:14,860 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:14,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:15,296 INFO L134 CoverageAnalysis]: Checked inductivity of 1937 backedges. 723 proven. 76 refuted. 0 times theorem prover too weak. 1138 trivial. 0 not checked. [2019-01-14 19:06:15,296 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:15,296 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:15,307 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:06:15,392 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:06:15,393 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:15,396 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:15,555 INFO L134 CoverageAnalysis]: Checked inductivity of 1937 backedges. 675 proven. 87 refuted. 0 times theorem prover too weak. 1175 trivial. 0 not checked. [2019-01-14 19:06:15,573 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:15,573 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 8] total 20 [2019-01-14 19:06:15,574 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-01-14 19:06:15,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-01-14 19:06:15,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=355, Unknown=0, NotChecked=0, Total=420 [2019-01-14 19:06:15,575 INFO L87 Difference]: Start difference. First operand 200 states and 201 transitions. Second operand 21 states. [2019-01-14 19:06:16,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:16,173 INFO L93 Difference]: Finished difference Result 268 states and 272 transitions. [2019-01-14 19:06:16,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-01-14 19:06:16,177 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 196 [2019-01-14 19:06:16,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:16,179 INFO L225 Difference]: With dead ends: 268 [2019-01-14 19:06:16,180 INFO L226 Difference]: Without dead ends: 268 [2019-01-14 19:06:16,180 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 218 GetRequests, 189 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=158, Invalid=772, Unknown=0, NotChecked=0, Total=930 [2019-01-14 19:06:16,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2019-01-14 19:06:16,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 246. [2019-01-14 19:06:16,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2019-01-14 19:06:16,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 249 transitions. [2019-01-14 19:06:16,187 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 249 transitions. Word has length 196 [2019-01-14 19:06:16,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:16,187 INFO L480 AbstractCegarLoop]: Abstraction has 246 states and 249 transitions. [2019-01-14 19:06:16,187 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-01-14 19:06:16,187 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 249 transitions. [2019-01-14 19:06:16,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2019-01-14 19:06:16,190 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:16,190 INFO L402 BasicCegarLoop]: trace histogram [34, 33, 33, 33, 33, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:16,191 INFO L423 AbstractCegarLoop]: === Iteration 23 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:16,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:16,191 INFO L82 PathProgramCache]: Analyzing trace with hash 1428696967, now seen corresponding path program 9 times [2019-01-14 19:06:16,191 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:16,191 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:16,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:16,192 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:16,192 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:16,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:16,704 INFO L134 CoverageAnalysis]: Checked inductivity of 3093 backedges. 1600 proven. 318 refuted. 0 times theorem prover too weak. 1175 trivial. 0 not checked. [2019-01-14 19:06:16,704 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:16,704 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:16,714 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:06:16,797 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2019-01-14 19:06:16,798 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:16,803 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:17,026 INFO L134 CoverageAnalysis]: Checked inductivity of 3093 backedges. 1513 proven. 318 refuted. 0 times theorem prover too weak. 1262 trivial. 0 not checked. [2019-01-14 19:06:17,044 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:17,044 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 16] total 32 [2019-01-14 19:06:17,045 INFO L459 AbstractCegarLoop]: Interpolant automaton has 32 states [2019-01-14 19:06:17,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2019-01-14 19:06:17,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=819, Unknown=0, NotChecked=0, Total=992 [2019-01-14 19:06:17,048 INFO L87 Difference]: Start difference. First operand 246 states and 249 transitions. Second operand 32 states. [2019-01-14 19:06:18,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:18,294 INFO L93 Difference]: Finished difference Result 310 states and 315 transitions. [2019-01-14 19:06:18,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-01-14 19:06:18,295 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 242 [2019-01-14 19:06:18,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:18,310 INFO L225 Difference]: With dead ends: 310 [2019-01-14 19:06:18,310 INFO L226 Difference]: Without dead ends: 310 [2019-01-14 19:06:18,312 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 285 GetRequests, 233 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 721 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=653, Invalid=2209, Unknown=0, NotChecked=0, Total=2862 [2019-01-14 19:06:18,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states. [2019-01-14 19:06:18,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 303. [2019-01-14 19:06:18,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 303 states. [2019-01-14 19:06:18,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 308 transitions. [2019-01-14 19:06:18,324 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 308 transitions. Word has length 242 [2019-01-14 19:06:18,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:18,325 INFO L480 AbstractCegarLoop]: Abstraction has 303 states and 308 transitions. [2019-01-14 19:06:18,325 INFO L481 AbstractCegarLoop]: Interpolant automaton has 32 states. [2019-01-14 19:06:18,325 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 308 transitions. [2019-01-14 19:06:18,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2019-01-14 19:06:18,329 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:18,329 INFO L402 BasicCegarLoop]: trace histogram [35, 34, 34, 34, 34, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:18,330 INFO L423 AbstractCegarLoop]: === Iteration 24 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:18,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:18,331 INFO L82 PathProgramCache]: Analyzing trace with hash -300291550, now seen corresponding path program 10 times [2019-01-14 19:06:18,331 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:18,331 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:18,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:18,334 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:18,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:18,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:18,645 INFO L134 CoverageAnalysis]: Checked inductivity of 3266 backedges. 1078 proven. 109 refuted. 0 times theorem prover too weak. 2079 trivial. 0 not checked. [2019-01-14 19:06:18,645 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:18,645 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:18,655 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:06:18,749 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:06:18,749 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:18,754 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:18,885 INFO L134 CoverageAnalysis]: Checked inductivity of 3266 backedges. 1047 proven. 119 refuted. 0 times theorem prover too weak. 2100 trivial. 0 not checked. [2019-01-14 19:06:18,903 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:18,904 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 9] total 21 [2019-01-14 19:06:18,904 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-01-14 19:06:18,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-01-14 19:06:18,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2019-01-14 19:06:18,905 INFO L87 Difference]: Start difference. First operand 303 states and 308 transitions. Second operand 22 states. [2019-01-14 19:06:20,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:20,108 INFO L93 Difference]: Finished difference Result 429 states and 440 transitions. [2019-01-14 19:06:20,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-01-14 19:06:20,109 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 247 [2019-01-14 19:06:20,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:20,113 INFO L225 Difference]: With dead ends: 429 [2019-01-14 19:06:20,113 INFO L226 Difference]: Without dead ends: 429 [2019-01-14 19:06:20,114 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 239 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=178, Invalid=944, Unknown=0, NotChecked=0, Total=1122 [2019-01-14 19:06:20,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states. [2019-01-14 19:06:20,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 403. [2019-01-14 19:06:20,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 403 states. [2019-01-14 19:06:20,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 403 states to 403 states and 413 transitions. [2019-01-14 19:06:20,128 INFO L78 Accepts]: Start accepts. Automaton has 403 states and 413 transitions. Word has length 247 [2019-01-14 19:06:20,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:20,128 INFO L480 AbstractCegarLoop]: Abstraction has 403 states and 413 transitions. [2019-01-14 19:06:20,128 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-01-14 19:06:20,128 INFO L276 IsEmpty]: Start isEmpty. Operand 403 states and 413 transitions. [2019-01-14 19:06:20,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2019-01-14 19:06:20,132 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:20,132 INFO L402 BasicCegarLoop]: trace histogram [42, 41, 41, 41, 41, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:20,134 INFO L423 AbstractCegarLoop]: === Iteration 25 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:20,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:20,134 INFO L82 PathProgramCache]: Analyzing trace with hash -1077850677, now seen corresponding path program 11 times [2019-01-14 19:06:20,134 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:20,134 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:20,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:20,135 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:20,135 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:20,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:20,928 INFO L134 CoverageAnalysis]: Checked inductivity of 4728 backedges. 2076 proven. 584 refuted. 0 times theorem prover too weak. 2068 trivial. 0 not checked. [2019-01-14 19:06:20,929 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:20,929 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:20,953 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:06:21,237 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2019-01-14 19:06:21,238 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:21,243 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:21,756 INFO L134 CoverageAnalysis]: Checked inductivity of 4728 backedges. 2905 proven. 456 refuted. 0 times theorem prover too weak. 1367 trivial. 0 not checked. [2019-01-14 19:06:21,775 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:21,775 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 20] total 41 [2019-01-14 19:06:21,776 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2019-01-14 19:06:21,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2019-01-14 19:06:21,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=1429, Unknown=0, NotChecked=0, Total=1640 [2019-01-14 19:06:21,777 INFO L87 Difference]: Start difference. First operand 403 states and 413 transitions. Second operand 41 states. [2019-01-14 19:06:24,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:24,088 INFO L93 Difference]: Finished difference Result 320 states and 323 transitions. [2019-01-14 19:06:24,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-01-14 19:06:24,089 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 293 [2019-01-14 19:06:24,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:24,091 INFO L225 Difference]: With dead ends: 320 [2019-01-14 19:06:24,091 INFO L226 Difference]: Without dead ends: 311 [2019-01-14 19:06:24,093 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 356 GetRequests, 278 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1758 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=970, Invalid=5350, Unknown=0, NotChecked=0, Total=6320 [2019-01-14 19:06:24,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2019-01-14 19:06:24,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 307. [2019-01-14 19:06:24,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2019-01-14 19:06:24,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 310 transitions. [2019-01-14 19:06:24,102 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 310 transitions. Word has length 293 [2019-01-14 19:06:24,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:24,102 INFO L480 AbstractCegarLoop]: Abstraction has 307 states and 310 transitions. [2019-01-14 19:06:24,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2019-01-14 19:06:24,102 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 310 transitions. [2019-01-14 19:06:24,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 299 [2019-01-14 19:06:24,108 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:24,108 INFO L402 BasicCegarLoop]: trace histogram [43, 42, 42, 42, 42, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:24,108 INFO L423 AbstractCegarLoop]: === Iteration 26 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:24,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:24,109 INFO L82 PathProgramCache]: Analyzing trace with hash -1652634800, now seen corresponding path program 12 times [2019-01-14 19:06:24,109 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:24,109 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:24,109 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:24,110 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:24,112 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:24,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:24,831 INFO L134 CoverageAnalysis]: Checked inductivity of 4942 backedges. 2419 proven. 423 refuted. 0 times theorem prover too weak. 2100 trivial. 0 not checked. [2019-01-14 19:06:24,831 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:24,831 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:24,841 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:06:25,077 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 16 check-sat command(s) [2019-01-14 19:06:25,077 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:25,084 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:26,328 INFO L134 CoverageAnalysis]: Checked inductivity of 4942 backedges. 1527 proven. 148 refuted. 0 times theorem prover too weak. 3267 trivial. 0 not checked. [2019-01-14 19:06:26,346 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:26,347 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 14] total 35 [2019-01-14 19:06:26,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2019-01-14 19:06:26,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2019-01-14 19:06:26,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=1023, Unknown=0, NotChecked=0, Total=1190 [2019-01-14 19:06:26,349 INFO L87 Difference]: Start difference. First operand 307 states and 310 transitions. Second operand 35 states. [2019-01-14 19:06:27,757 WARN L181 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 18 DAG size of output: 15 [2019-01-14 19:06:29,128 WARN L181 SmtUtils]: Spent 121.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2019-01-14 19:06:29,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:29,718 INFO L93 Difference]: Finished difference Result 433 states and 439 transitions. [2019-01-14 19:06:29,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2019-01-14 19:06:29,719 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 298 [2019-01-14 19:06:29,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:29,723 INFO L225 Difference]: With dead ends: 433 [2019-01-14 19:06:29,723 INFO L226 Difference]: Without dead ends: 433 [2019-01-14 19:06:29,727 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 374 GetRequests, 288 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2201 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=1334, Invalid=6322, Unknown=0, NotChecked=0, Total=7656 [2019-01-14 19:06:29,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 433 states. [2019-01-14 19:06:29,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 433 to 372. [2019-01-14 19:06:29,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372 states. [2019-01-14 19:06:29,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 377 transitions. [2019-01-14 19:06:29,738 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 377 transitions. Word has length 298 [2019-01-14 19:06:29,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:29,738 INFO L480 AbstractCegarLoop]: Abstraction has 372 states and 377 transitions. [2019-01-14 19:06:29,739 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2019-01-14 19:06:29,741 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 377 transitions. [2019-01-14 19:06:29,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2019-01-14 19:06:29,744 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:29,744 INFO L402 BasicCegarLoop]: trace histogram [52, 51, 51, 51, 51, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:29,744 INFO L423 AbstractCegarLoop]: === Iteration 27 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:29,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:29,745 INFO L82 PathProgramCache]: Analyzing trace with hash -197186291, now seen corresponding path program 13 times [2019-01-14 19:06:29,745 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:29,745 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:29,745 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:29,746 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:29,749 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:29,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:30,814 INFO L134 CoverageAnalysis]: Checked inductivity of 7225 backedges. 3495 proven. 648 refuted. 0 times theorem prover too weak. 3082 trivial. 0 not checked. [2019-01-14 19:06:30,815 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:30,815 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:30,825 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:30,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:30,944 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:31,421 INFO L134 CoverageAnalysis]: Checked inductivity of 7225 backedges. 3589 proven. 148 refuted. 0 times theorem prover too weak. 3488 trivial. 0 not checked. [2019-01-14 19:06:31,440 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:31,440 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 20] total 33 [2019-01-14 19:06:31,441 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2019-01-14 19:06:31,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2019-01-14 19:06:31,441 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=217, Invalid=839, Unknown=0, NotChecked=0, Total=1056 [2019-01-14 19:06:31,442 INFO L87 Difference]: Start difference. First operand 372 states and 377 transitions. Second operand 33 states. [2019-01-14 19:06:32,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:32,368 INFO L93 Difference]: Finished difference Result 392 states and 394 transitions. [2019-01-14 19:06:32,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-01-14 19:06:32,369 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 354 [2019-01-14 19:06:32,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:32,372 INFO L225 Difference]: With dead ends: 392 [2019-01-14 19:06:32,372 INFO L226 Difference]: Without dead ends: 371 [2019-01-14 19:06:32,373 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 395 GetRequests, 347 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 657 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=563, Invalid=1887, Unknown=0, NotChecked=0, Total=2450 [2019-01-14 19:06:32,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-01-14 19:06:32,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 368. [2019-01-14 19:06:32,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2019-01-14 19:06:32,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 369 transitions. [2019-01-14 19:06:32,382 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 369 transitions. Word has length 354 [2019-01-14 19:06:32,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:32,385 INFO L480 AbstractCegarLoop]: Abstraction has 368 states and 369 transitions. [2019-01-14 19:06:32,385 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2019-01-14 19:06:32,385 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 369 transitions. [2019-01-14 19:06:32,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 365 [2019-01-14 19:06:32,389 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:32,389 INFO L402 BasicCegarLoop]: trace histogram [54, 53, 53, 53, 53, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:32,389 INFO L423 AbstractCegarLoop]: === Iteration 28 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:32,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:32,390 INFO L82 PathProgramCache]: Analyzing trace with hash -1526039033, now seen corresponding path program 14 times [2019-01-14 19:06:32,390 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:32,390 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:32,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:32,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:32,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:32,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:32,762 INFO L134 CoverageAnalysis]: Checked inductivity of 7760 backedges. 2189 proven. 193 refuted. 0 times theorem prover too weak. 5378 trivial. 0 not checked. [2019-01-14 19:06:32,763 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:32,763 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:32,773 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:06:32,907 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:06:32,907 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:32,913 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:33,121 INFO L134 CoverageAnalysis]: Checked inductivity of 7760 backedges. 2148 proven. 198 refuted. 0 times theorem prover too weak. 5414 trivial. 0 not checked. [2019-01-14 19:06:33,139 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:33,140 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 11] total 25 [2019-01-14 19:06:33,141 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2019-01-14 19:06:33,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-01-14 19:06:33,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=553, Unknown=0, NotChecked=0, Total=650 [2019-01-14 19:06:33,142 INFO L87 Difference]: Start difference. First operand 368 states and 369 transitions. Second operand 26 states. [2019-01-14 19:06:34,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:34,670 INFO L93 Difference]: Finished difference Result 451 states and 455 transitions. [2019-01-14 19:06:34,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-01-14 19:06:34,672 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 364 [2019-01-14 19:06:34,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:34,675 INFO L225 Difference]: With dead ends: 451 [2019-01-14 19:06:34,676 INFO L226 Difference]: Without dead ends: 451 [2019-01-14 19:06:34,677 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 391 GetRequests, 354 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=215, Invalid=1267, Unknown=0, NotChecked=0, Total=1482 [2019-01-14 19:06:34,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 451 states. [2019-01-14 19:06:34,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 451 to 429. [2019-01-14 19:06:34,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 429 states. [2019-01-14 19:06:34,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 429 states and 432 transitions. [2019-01-14 19:06:34,688 INFO L78 Accepts]: Start accepts. Automaton has 429 states and 432 transitions. Word has length 364 [2019-01-14 19:06:34,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:34,689 INFO L480 AbstractCegarLoop]: Abstraction has 429 states and 432 transitions. [2019-01-14 19:06:34,689 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2019-01-14 19:06:34,689 INFO L276 IsEmpty]: Start isEmpty. Operand 429 states and 432 transitions. [2019-01-14 19:06:34,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 426 [2019-01-14 19:06:34,694 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:34,694 INFO L402 BasicCegarLoop]: trace histogram [64, 63, 63, 63, 63, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:34,694 INFO L423 AbstractCegarLoop]: === Iteration 29 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:34,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:34,695 INFO L82 PathProgramCache]: Analyzing trace with hash 321506027, now seen corresponding path program 15 times [2019-01-14 19:06:34,695 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:34,695 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:34,699 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:34,699 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:34,699 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:34,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:35,328 INFO L134 CoverageAnalysis]: Checked inductivity of 10890 backedges. 4798 proven. 678 refuted. 0 times theorem prover too weak. 5414 trivial. 0 not checked. [2019-01-14 19:06:35,329 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:35,329 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:35,338 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:06:35,454 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2019-01-14 19:06:35,454 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:35,462 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:36,140 INFO L134 CoverageAnalysis]: Checked inductivity of 10890 backedges. 4600 proven. 678 refuted. 0 times theorem prover too weak. 5612 trivial. 0 not checked. [2019-01-14 19:06:36,169 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:36,169 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 19] total 41 [2019-01-14 19:06:36,170 INFO L459 AbstractCegarLoop]: Interpolant automaton has 41 states [2019-01-14 19:06:36,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2019-01-14 19:06:36,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=296, Invalid=1344, Unknown=0, NotChecked=0, Total=1640 [2019-01-14 19:06:36,173 INFO L87 Difference]: Start difference. First operand 429 states and 432 transitions. Second operand 41 states. [2019-01-14 19:06:37,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:37,719 INFO L93 Difference]: Finished difference Result 508 states and 513 transitions. [2019-01-14 19:06:37,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-01-14 19:06:37,720 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 425 [2019-01-14 19:06:37,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:37,724 INFO L225 Difference]: With dead ends: 508 [2019-01-14 19:06:37,725 INFO L226 Difference]: Without dead ends: 508 [2019-01-14 19:06:37,727 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 483 GetRequests, 413 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1393 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1184, Invalid=3928, Unknown=0, NotChecked=0, Total=5112 [2019-01-14 19:06:37,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2019-01-14 19:06:37,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 501. [2019-01-14 19:06:37,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 501 states. [2019-01-14 19:06:37,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 501 states to 501 states and 506 transitions. [2019-01-14 19:06:37,739 INFO L78 Accepts]: Start accepts. Automaton has 501 states and 506 transitions. Word has length 425 [2019-01-14 19:06:37,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:37,740 INFO L480 AbstractCegarLoop]: Abstraction has 501 states and 506 transitions. [2019-01-14 19:06:37,740 INFO L481 AbstractCegarLoop]: Interpolant automaton has 41 states. [2019-01-14 19:06:37,740 INFO L276 IsEmpty]: Start isEmpty. Operand 501 states and 506 transitions. [2019-01-14 19:06:37,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 431 [2019-01-14 19:06:37,745 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:37,745 INFO L402 BasicCegarLoop]: trace histogram [65, 64, 64, 64, 64, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:37,746 INFO L423 AbstractCegarLoop]: === Iteration 30 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:37,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:37,746 INFO L82 PathProgramCache]: Analyzing trace with hash -867500726, now seen corresponding path program 16 times [2019-01-14 19:06:37,746 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:37,746 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:37,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:37,750 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:37,750 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:37,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:38,544 INFO L134 CoverageAnalysis]: Checked inductivity of 11216 backedges. 2995 proven. 244 refuted. 0 times theorem prover too weak. 7977 trivial. 0 not checked. [2019-01-14 19:06:38,544 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:38,544 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:38,561 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:06:38,730 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:06:38,731 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:38,739 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:38,960 INFO L134 CoverageAnalysis]: Checked inductivity of 11216 backedges. 2907 proven. 245 refuted. 0 times theorem prover too weak. 8064 trivial. 0 not checked. [2019-01-14 19:06:38,979 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:38,980 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 28 [2019-01-14 19:06:38,980 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2019-01-14 19:06:38,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-01-14 19:06:38,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=697, Unknown=0, NotChecked=0, Total=812 [2019-01-14 19:06:38,981 INFO L87 Difference]: Start difference. First operand 501 states and 506 transitions. Second operand 29 states. [2019-01-14 19:06:40,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:40,837 INFO L93 Difference]: Finished difference Result 657 states and 668 transitions. [2019-01-14 19:06:40,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-01-14 19:06:40,838 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 430 [2019-01-14 19:06:40,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:40,843 INFO L225 Difference]: With dead ends: 657 [2019-01-14 19:06:40,843 INFO L226 Difference]: Without dead ends: 657 [2019-01-14 19:06:40,844 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 461 GetRequests, 419 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 321 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=261, Invalid=1631, Unknown=0, NotChecked=0, Total=1892 [2019-01-14 19:06:40,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 657 states. [2019-01-14 19:06:40,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 657 to 631. [2019-01-14 19:06:40,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 631 states. [2019-01-14 19:06:40,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 631 states to 631 states and 641 transitions. [2019-01-14 19:06:40,859 INFO L78 Accepts]: Start accepts. Automaton has 631 states and 641 transitions. Word has length 430 [2019-01-14 19:06:40,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:40,860 INFO L480 AbstractCegarLoop]: Abstraction has 631 states and 641 transitions. [2019-01-14 19:06:40,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2019-01-14 19:06:40,860 INFO L276 IsEmpty]: Start isEmpty. Operand 631 states and 641 transitions. [2019-01-14 19:06:40,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2019-01-14 19:06:40,866 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:40,866 INFO L402 BasicCegarLoop]: trace histogram [75, 74, 74, 74, 74, 11, 11, 11, 10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:40,866 INFO L423 AbstractCegarLoop]: === Iteration 31 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:40,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:40,869 INFO L82 PathProgramCache]: Analyzing trace with hash -666277688, now seen corresponding path program 17 times [2019-01-14 19:06:40,869 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:40,869 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:40,870 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:40,871 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:40,872 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:40,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:42,041 INFO L134 CoverageAnalysis]: Checked inductivity of 14928 backedges. 5709 proven. 1205 refuted. 0 times theorem prover too weak. 8014 trivial. 0 not checked. [2019-01-14 19:06:42,042 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:42,042 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:42,052 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:06:42,373 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 22 check-sat command(s) [2019-01-14 19:06:42,373 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:42,383 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:43,320 INFO L134 CoverageAnalysis]: Checked inductivity of 14928 backedges. 9196 proven. 987 refuted. 0 times theorem prover too weak. 4745 trivial. 0 not checked. [2019-01-14 19:06:43,339 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:43,339 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 26] total 53 [2019-01-14 19:06:43,340 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2019-01-14 19:06:43,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2019-01-14 19:06:43,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=366, Invalid=2390, Unknown=0, NotChecked=0, Total=2756 [2019-01-14 19:06:43,342 INFO L87 Difference]: Start difference. First operand 631 states and 641 transitions. Second operand 53 states. [2019-01-14 19:06:46,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:46,323 INFO L93 Difference]: Finished difference Result 518 states and 521 transitions. [2019-01-14 19:06:46,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-01-14 19:06:46,324 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 491 [2019-01-14 19:06:46,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:46,327 INFO L225 Difference]: With dead ends: 518 [2019-01-14 19:06:46,327 INFO L226 Difference]: Without dead ends: 509 [2019-01-14 19:06:46,330 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 570 GetRequests, 470 SyntacticMatches, 0 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2895 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1619, Invalid=8683, Unknown=0, NotChecked=0, Total=10302 [2019-01-14 19:06:46,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 509 states. [2019-01-14 19:06:46,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 509 to 505. [2019-01-14 19:06:46,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 505 states. [2019-01-14 19:06:46,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 505 states to 505 states and 508 transitions. [2019-01-14 19:06:46,341 INFO L78 Accepts]: Start accepts. Automaton has 505 states and 508 transitions. Word has length 491 [2019-01-14 19:06:46,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:46,343 INFO L480 AbstractCegarLoop]: Abstraction has 505 states and 508 transitions. [2019-01-14 19:06:46,343 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2019-01-14 19:06:46,343 INFO L276 IsEmpty]: Start isEmpty. Operand 505 states and 508 transitions. [2019-01-14 19:06:46,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2019-01-14 19:06:46,348 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:46,348 INFO L402 BasicCegarLoop]: trace histogram [76, 75, 75, 75, 75, 11, 11, 11, 10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:46,348 INFO L423 AbstractCegarLoop]: === Iteration 32 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:46,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:46,351 INFO L82 PathProgramCache]: Analyzing trace with hash -1675425945, now seen corresponding path program 18 times [2019-01-14 19:06:46,351 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:46,351 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:46,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:46,352 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:46,352 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:46,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:46,965 INFO L134 CoverageAnalysis]: Checked inductivity of 15310 backedges. 6418 proven. 828 refuted. 0 times theorem prover too weak. 8064 trivial. 0 not checked. [2019-01-14 19:06:46,965 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:46,965 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:46,974 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:06:47,624 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 20 check-sat command(s) [2019-01-14 19:06:47,624 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:47,632 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:48,266 INFO L134 CoverageAnalysis]: Checked inductivity of 15310 backedges. 3819 proven. 301 refuted. 0 times theorem prover too weak. 11190 trivial. 0 not checked. [2019-01-14 19:06:48,285 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:48,286 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 17] total 44 [2019-01-14 19:06:48,287 INFO L459 AbstractCegarLoop]: Interpolant automaton has 44 states [2019-01-14 19:06:48,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-01-14 19:06:48,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=269, Invalid=1623, Unknown=0, NotChecked=0, Total=1892 [2019-01-14 19:06:48,288 INFO L87 Difference]: Start difference. First operand 505 states and 508 transitions. Second operand 44 states. [2019-01-14 19:06:51,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:51,668 INFO L93 Difference]: Finished difference Result 661 states and 667 transitions. [2019-01-14 19:06:51,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 101 states. [2019-01-14 19:06:51,670 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 496 [2019-01-14 19:06:51,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:51,675 INFO L225 Difference]: With dead ends: 661 [2019-01-14 19:06:51,675 INFO L226 Difference]: Without dead ends: 661 [2019-01-14 19:06:51,677 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 599 GetRequests, 483 SyntacticMatches, 0 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4274 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=2222, Invalid=11584, Unknown=0, NotChecked=0, Total=13806 [2019-01-14 19:06:51,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 661 states. [2019-01-14 19:06:51,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 661 to 585. [2019-01-14 19:06:51,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 585 states. [2019-01-14 19:06:51,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 590 transitions. [2019-01-14 19:06:51,689 INFO L78 Accepts]: Start accepts. Automaton has 585 states and 590 transitions. Word has length 496 [2019-01-14 19:06:51,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:51,690 INFO L480 AbstractCegarLoop]: Abstraction has 585 states and 590 transitions. [2019-01-14 19:06:51,690 INFO L481 AbstractCegarLoop]: Interpolant automaton has 44 states. [2019-01-14 19:06:51,690 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 590 transitions. [2019-01-14 19:06:51,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 568 [2019-01-14 19:06:51,697 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:51,698 INFO L402 BasicCegarLoop]: trace histogram [88, 87, 87, 87, 87, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:51,698 INFO L423 AbstractCegarLoop]: === Iteration 33 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:51,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:51,698 INFO L82 PathProgramCache]: Analyzing trace with hash -1497007777, now seen corresponding path program 19 times [2019-01-14 19:06:51,698 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:51,698 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:51,702 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:51,702 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:51,702 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:51,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:52,487 INFO L134 CoverageAnalysis]: Checked inductivity of 20485 backedges. 8490 proven. 1167 refuted. 0 times theorem prover too weak. 10828 trivial. 0 not checked. [2019-01-14 19:06:52,487 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:52,487 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:52,497 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:52,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:52,699 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:53,161 INFO L134 CoverageAnalysis]: Checked inductivity of 20485 backedges. 8617 proven. 286 refuted. 0 times theorem prover too weak. 11582 trivial. 0 not checked. [2019-01-14 19:06:53,180 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:53,180 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 26] total 42 [2019-01-14 19:06:53,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2019-01-14 19:06:53,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2019-01-14 19:06:53,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=1364, Unknown=0, NotChecked=0, Total=1722 [2019-01-14 19:06:53,182 INFO L87 Difference]: Start difference. First operand 585 states and 590 transitions. Second operand 42 states. [2019-01-14 19:06:54,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:54,124 INFO L93 Difference]: Finished difference Result 605 states and 607 transitions. [2019-01-14 19:06:54,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-01-14 19:06:54,127 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 567 [2019-01-14 19:06:54,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:54,130 INFO L225 Difference]: With dead ends: 605 [2019-01-14 19:06:54,130 INFO L226 Difference]: Without dead ends: 584 [2019-01-14 19:06:54,131 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 620 GetRequests, 557 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1218 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=947, Invalid=3213, Unknown=0, NotChecked=0, Total=4160 [2019-01-14 19:06:54,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 584 states. [2019-01-14 19:06:54,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 584 to 581. [2019-01-14 19:06:54,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 581 states. [2019-01-14 19:06:54,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 581 states to 581 states and 582 transitions. [2019-01-14 19:06:54,144 INFO L78 Accepts]: Start accepts. Automaton has 581 states and 582 transitions. Word has length 567 [2019-01-14 19:06:54,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:54,144 INFO L480 AbstractCegarLoop]: Abstraction has 581 states and 582 transitions. [2019-01-14 19:06:54,144 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2019-01-14 19:06:54,144 INFO L276 IsEmpty]: Start isEmpty. Operand 581 states and 582 transitions. [2019-01-14 19:06:54,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 578 [2019-01-14 19:06:54,151 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:54,151 INFO L402 BasicCegarLoop]: trace histogram [90, 89, 89, 89, 89, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:54,152 INFO L423 AbstractCegarLoop]: === Iteration 34 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:54,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:54,152 INFO L82 PathProgramCache]: Analyzing trace with hash 35953893, now seen corresponding path program 20 times [2019-01-14 19:06:54,152 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:54,152 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:54,157 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:54,157 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:06:54,157 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:54,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:06:56,491 INFO L134 CoverageAnalysis]: Checked inductivity of 21386 backedges. 5114 proven. 364 refuted. 0 times theorem prover too weak. 15908 trivial. 0 not checked. [2019-01-14 19:06:56,491 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:06:56,491 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:06:56,503 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:06:56,698 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:06:56,698 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:06:56,707 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:06:57,380 INFO L134 CoverageAnalysis]: Checked inductivity of 21386 backedges. 4917 proven. 354 refuted. 0 times theorem prover too weak. 16115 trivial. 0 not checked. [2019-01-14 19:06:57,399 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:06:57,399 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 14] total 34 [2019-01-14 19:06:57,400 INFO L459 AbstractCegarLoop]: Interpolant automaton has 35 states [2019-01-14 19:06:57,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2019-01-14 19:06:57,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=1033, Unknown=0, NotChecked=0, Total=1190 [2019-01-14 19:06:57,401 INFO L87 Difference]: Start difference. First operand 581 states and 582 transitions. Second operand 35 states. [2019-01-14 19:06:59,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:06:59,268 INFO L93 Difference]: Finished difference Result 679 states and 683 transitions. [2019-01-14 19:06:59,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-01-14 19:06:59,270 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 577 [2019-01-14 19:06:59,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:06:59,276 INFO L225 Difference]: With dead ends: 679 [2019-01-14 19:06:59,276 INFO L226 Difference]: Without dead ends: 679 [2019-01-14 19:06:59,276 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 613 GetRequests, 564 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=335, Invalid=2215, Unknown=0, NotChecked=0, Total=2550 [2019-01-14 19:06:59,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 679 states. [2019-01-14 19:06:59,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 679 to 657. [2019-01-14 19:06:59,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 657 states. [2019-01-14 19:06:59,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 657 states to 657 states and 660 transitions. [2019-01-14 19:06:59,293 INFO L78 Accepts]: Start accepts. Automaton has 657 states and 660 transitions. Word has length 577 [2019-01-14 19:06:59,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:06:59,294 INFO L480 AbstractCegarLoop]: Abstraction has 657 states and 660 transitions. [2019-01-14 19:06:59,294 INFO L481 AbstractCegarLoop]: Interpolant automaton has 35 states. [2019-01-14 19:06:59,294 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 660 transitions. [2019-01-14 19:06:59,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 654 [2019-01-14 19:06:59,301 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:06:59,302 INFO L402 BasicCegarLoop]: trace histogram [103, 102, 102, 102, 102, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:06:59,302 INFO L423 AbstractCegarLoop]: === Iteration 35 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:06:59,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:06:59,302 INFO L82 PathProgramCache]: Analyzing trace with hash -1741773022, now seen corresponding path program 21 times [2019-01-14 19:06:59,302 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:06:59,303 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:06:59,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:59,307 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:06:59,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:06:59,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:01,469 INFO L134 CoverageAnalysis]: Checked inductivity of 27957 backedges. 10669 proven. 1173 refuted. 0 times theorem prover too weak. 16115 trivial. 0 not checked. [2019-01-14 19:07:01,469 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:01,469 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:01,481 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:07:01,672 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2019-01-14 19:07:01,672 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:01,680 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:02,944 INFO L134 CoverageAnalysis]: Checked inductivity of 27957 backedges. 10315 proven. 1173 refuted. 0 times theorem prover too weak. 16469 trivial. 0 not checked. [2019-01-14 19:07:02,963 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:02,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 23] total 51 [2019-01-14 19:07:02,964 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2019-01-14 19:07:02,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2019-01-14 19:07:02,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=458, Invalid=2092, Unknown=0, NotChecked=0, Total=2550 [2019-01-14 19:07:02,965 INFO L87 Difference]: Start difference. First operand 657 states and 660 transitions. Second operand 51 states. [2019-01-14 19:07:05,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:05,441 INFO L93 Difference]: Finished difference Result 751 states and 756 transitions. [2019-01-14 19:07:05,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-01-14 19:07:05,443 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 653 [2019-01-14 19:07:05,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:05,446 INFO L225 Difference]: With dead ends: 751 [2019-01-14 19:07:05,446 INFO L226 Difference]: Without dead ends: 751 [2019-01-14 19:07:05,447 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 726 GetRequests, 637 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2364 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=1891, Invalid=6299, Unknown=0, NotChecked=0, Total=8190 [2019-01-14 19:07:05,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 751 states. [2019-01-14 19:07:05,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 751 to 744. [2019-01-14 19:07:05,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 744 states. [2019-01-14 19:07:05,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 744 states to 744 states and 749 transitions. [2019-01-14 19:07:05,460 INFO L78 Accepts]: Start accepts. Automaton has 744 states and 749 transitions. Word has length 653 [2019-01-14 19:07:05,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:05,461 INFO L480 AbstractCegarLoop]: Abstraction has 744 states and 749 transitions. [2019-01-14 19:07:05,461 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2019-01-14 19:07:05,461 INFO L276 IsEmpty]: Start isEmpty. Operand 744 states and 749 transitions. [2019-01-14 19:07:05,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 659 [2019-01-14 19:07:05,469 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:05,470 INFO L402 BasicCegarLoop]: trace histogram [104, 103, 103, 103, 103, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:05,470 INFO L423 AbstractCegarLoop]: === Iteration 36 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:05,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:05,470 INFO L82 PathProgramCache]: Analyzing trace with hash 1104503271, now seen corresponding path program 22 times [2019-01-14 19:07:05,471 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:05,474 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:05,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:05,475 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:05,475 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:05,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:06,054 INFO L134 CoverageAnalysis]: Checked inductivity of 28481 backedges. 6259 proven. 433 refuted. 0 times theorem prover too weak. 21789 trivial. 0 not checked. [2019-01-14 19:07:06,054 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:06,055 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:06,064 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:07:06,362 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:07:06,363 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:06,372 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:06,733 INFO L134 CoverageAnalysis]: Checked inductivity of 28481 backedges. 6198 proven. 416 refuted. 0 times theorem prover too weak. 21867 trivial. 0 not checked. [2019-01-14 19:07:06,753 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:06,753 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 15] total 33 [2019-01-14 19:07:06,754 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2019-01-14 19:07:06,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2019-01-14 19:07:06,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=963, Unknown=0, NotChecked=0, Total=1122 [2019-01-14 19:07:06,755 INFO L87 Difference]: Start difference. First operand 744 states and 749 transitions. Second operand 34 states. [2019-01-14 19:07:08,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:08,677 INFO L93 Difference]: Finished difference Result 930 states and 941 transitions. [2019-01-14 19:07:08,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-01-14 19:07:08,679 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 658 [2019-01-14 19:07:08,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:08,682 INFO L225 Difference]: With dead ends: 930 [2019-01-14 19:07:08,683 INFO L226 Difference]: Without dead ends: 930 [2019-01-14 19:07:08,684 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 694 GetRequests, 644 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 436 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=325, Invalid=2327, Unknown=0, NotChecked=0, Total=2652 [2019-01-14 19:07:08,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 930 states. [2019-01-14 19:07:08,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 930 to 904. [2019-01-14 19:07:08,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 904 states. [2019-01-14 19:07:08,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 904 states to 904 states and 914 transitions. [2019-01-14 19:07:08,704 INFO L78 Accepts]: Start accepts. Automaton has 904 states and 914 transitions. Word has length 658 [2019-01-14 19:07:08,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:08,705 INFO L480 AbstractCegarLoop]: Abstraction has 904 states and 914 transitions. [2019-01-14 19:07:08,706 INFO L481 AbstractCegarLoop]: Interpolant automaton has 34 states. [2019-01-14 19:07:08,706 INFO L276 IsEmpty]: Start isEmpty. Operand 904 states and 914 transitions. [2019-01-14 19:07:08,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 735 [2019-01-14 19:07:08,716 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:08,717 INFO L402 BasicCegarLoop]: trace histogram [117, 116, 116, 116, 116, 14, 14, 14, 13, 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:08,717 INFO L423 AbstractCegarLoop]: === Iteration 37 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:08,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:08,718 INFO L82 PathProgramCache]: Analyzing trace with hash -402943376, now seen corresponding path program 23 times [2019-01-14 19:07:08,720 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:08,720 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:08,721 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:08,722 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:08,722 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:08,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:10,923 INFO L134 CoverageAnalysis]: Checked inductivity of 36000 backedges. 12150 proven. 2051 refuted. 0 times theorem prover too weak. 21799 trivial. 0 not checked. [2019-01-14 19:07:10,923 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:10,923 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:10,934 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:07:11,579 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 25 check-sat command(s) [2019-01-14 19:07:11,579 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:11,592 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:12,657 INFO L134 CoverageAnalysis]: Checked inductivity of 36000 backedges. 17896 proven. 1767 refuted. 0 times theorem prover too weak. 16337 trivial. 0 not checked. [2019-01-14 19:07:12,676 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:12,677 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 32] total 65 [2019-01-14 19:07:12,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 65 states [2019-01-14 19:07:12,678 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2019-01-14 19:07:12,678 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=556, Invalid=3604, Unknown=0, NotChecked=0, Total=4160 [2019-01-14 19:07:12,679 INFO L87 Difference]: Start difference. First operand 904 states and 914 transitions. Second operand 65 states. [2019-01-14 19:07:16,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:16,719 INFO L93 Difference]: Finished difference Result 761 states and 764 transitions. [2019-01-14 19:07:16,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2019-01-14 19:07:16,721 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 734 [2019-01-14 19:07:16,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:16,724 INFO L225 Difference]: With dead ends: 761 [2019-01-14 19:07:16,725 INFO L226 Difference]: Without dead ends: 752 [2019-01-14 19:07:16,727 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 839 GetRequests, 707 SyntacticMatches, 0 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5595 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=2644, Invalid=15178, Unknown=0, NotChecked=0, Total=17822 [2019-01-14 19:07:16,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 752 states. [2019-01-14 19:07:16,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 752 to 748. [2019-01-14 19:07:16,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 748 states. [2019-01-14 19:07:16,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 748 states to 748 states and 751 transitions. [2019-01-14 19:07:16,747 INFO L78 Accepts]: Start accepts. Automaton has 748 states and 751 transitions. Word has length 734 [2019-01-14 19:07:16,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:16,748 INFO L480 AbstractCegarLoop]: Abstraction has 748 states and 751 transitions. [2019-01-14 19:07:16,748 INFO L481 AbstractCegarLoop]: Interpolant automaton has 65 states. [2019-01-14 19:07:16,748 INFO L276 IsEmpty]: Start isEmpty. Operand 748 states and 751 transitions. [2019-01-14 19:07:16,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 740 [2019-01-14 19:07:16,759 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:16,760 INFO L402 BasicCegarLoop]: trace histogram [118, 117, 117, 117, 117, 14, 14, 14, 13, 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:16,760 INFO L423 AbstractCegarLoop]: === Iteration 38 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:16,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:16,760 INFO L82 PathProgramCache]: Analyzing trace with hash 79086155, now seen corresponding path program 24 times [2019-01-14 19:07:16,761 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:16,761 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:16,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:16,761 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:16,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:16,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:17,767 INFO L134 CoverageAnalysis]: Checked inductivity of 36595 backedges. 13360 proven. 1368 refuted. 0 times theorem prover too weak. 21867 trivial. 0 not checked. [2019-01-14 19:07:17,768 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:17,768 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:17,778 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:07:18,912 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 26 check-sat command(s) [2019-01-14 19:07:18,912 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:18,925 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:19,524 INFO L134 CoverageAnalysis]: Checked inductivity of 36595 backedges. 7677 proven. 508 refuted. 0 times theorem prover too weak. 28410 trivial. 0 not checked. [2019-01-14 19:07:19,544 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:19,544 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 20] total 53 [2019-01-14 19:07:19,545 INFO L459 AbstractCegarLoop]: Interpolant automaton has 53 states [2019-01-14 19:07:19,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2019-01-14 19:07:19,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=398, Invalid=2358, Unknown=0, NotChecked=0, Total=2756 [2019-01-14 19:07:19,546 INFO L87 Difference]: Start difference. First operand 748 states and 751 transitions. Second operand 53 states. [2019-01-14 19:07:23,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:23,816 INFO L93 Difference]: Finished difference Result 934 states and 940 transitions. [2019-01-14 19:07:23,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 128 states. [2019-01-14 19:07:23,817 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 739 [2019-01-14 19:07:23,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:23,821 INFO L225 Difference]: With dead ends: 934 [2019-01-14 19:07:23,821 INFO L226 Difference]: Without dead ends: 934 [2019-01-14 19:07:23,823 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 869 GetRequests, 723 SyntacticMatches, 0 SemanticMatches, 146 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7022 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=3308, Invalid=18448, Unknown=0, NotChecked=0, Total=21756 [2019-01-14 19:07:23,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 934 states. [2019-01-14 19:07:23,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 934 to 843. [2019-01-14 19:07:23,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 843 states. [2019-01-14 19:07:23,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 843 states to 843 states and 848 transitions. [2019-01-14 19:07:23,837 INFO L78 Accepts]: Start accepts. Automaton has 843 states and 848 transitions. Word has length 739 [2019-01-14 19:07:23,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:23,839 INFO L480 AbstractCegarLoop]: Abstraction has 843 states and 848 transitions. [2019-01-14 19:07:23,839 INFO L481 AbstractCegarLoop]: Interpolant automaton has 53 states. [2019-01-14 19:07:23,839 INFO L276 IsEmpty]: Start isEmpty. Operand 843 states and 848 transitions. [2019-01-14 19:07:23,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 826 [2019-01-14 19:07:23,849 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:23,849 INFO L402 BasicCegarLoop]: trace histogram [133, 132, 132, 132, 132, 15, 15, 15, 14, 14, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:23,850 INFO L423 AbstractCegarLoop]: === Iteration 39 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:23,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:23,850 INFO L82 PathProgramCache]: Analyzing trace with hash -1645932632, now seen corresponding path program 25 times [2019-01-14 19:07:23,850 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:23,850 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:23,855 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:23,855 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:23,855 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:23,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:24,905 INFO L134 CoverageAnalysis]: Checked inductivity of 46399 backedges. 16752 proven. 1830 refuted. 0 times theorem prover too weak. 27817 trivial. 0 not checked. [2019-01-14 19:07:24,906 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:24,906 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:24,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:07:25,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:25,191 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:25,914 INFO L134 CoverageAnalysis]: Checked inductivity of 46399 backedges. 16912 proven. 469 refuted. 0 times theorem prover too weak. 29018 trivial. 0 not checked. [2019-01-14 19:07:25,934 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:25,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 32] total 51 [2019-01-14 19:07:25,935 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2019-01-14 19:07:25,936 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2019-01-14 19:07:25,936 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=535, Invalid=2015, Unknown=0, NotChecked=0, Total=2550 [2019-01-14 19:07:25,936 INFO L87 Difference]: Start difference. First operand 843 states and 848 transitions. Second operand 51 states. [2019-01-14 19:07:27,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:27,891 INFO L93 Difference]: Finished difference Result 863 states and 865 transitions. [2019-01-14 19:07:27,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-01-14 19:07:27,892 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 825 [2019-01-14 19:07:27,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:27,896 INFO L225 Difference]: With dead ends: 863 [2019-01-14 19:07:27,896 INFO L226 Difference]: Without dead ends: 842 [2019-01-14 19:07:27,897 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 890 GetRequests, 812 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1950 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1430, Invalid=4890, Unknown=0, NotChecked=0, Total=6320 [2019-01-14 19:07:27,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 842 states. [2019-01-14 19:07:27,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 842 to 839. [2019-01-14 19:07:27,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 839 states. [2019-01-14 19:07:27,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 839 states to 839 states and 840 transitions. [2019-01-14 19:07:27,911 INFO L78 Accepts]: Start accepts. Automaton has 839 states and 840 transitions. Word has length 825 [2019-01-14 19:07:27,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:27,911 INFO L480 AbstractCegarLoop]: Abstraction has 839 states and 840 transitions. [2019-01-14 19:07:27,912 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2019-01-14 19:07:27,912 INFO L276 IsEmpty]: Start isEmpty. Operand 839 states and 840 transitions. [2019-01-14 19:07:27,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 836 [2019-01-14 19:07:27,922 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:27,923 INFO L402 BasicCegarLoop]: trace histogram [135, 134, 134, 134, 134, 15, 15, 15, 14, 14, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:27,923 INFO L423 AbstractCegarLoop]: === Iteration 40 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:27,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:27,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1746428258, now seen corresponding path program 26 times [2019-01-14 19:07:27,926 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:27,926 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:27,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:27,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:07:27,927 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:28,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:28,714 INFO L134 CoverageAnalysis]: Checked inductivity of 47756 backedges. 9458 proven. 589 refuted. 0 times theorem prover too weak. 37709 trivial. 0 not checked. [2019-01-14 19:07:28,714 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:28,714 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:28,724 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:07:28,998 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:07:28,998 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:29,009 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:29,519 INFO L134 CoverageAnalysis]: Checked inductivity of 47756 backedges. 9387 proven. 555 refuted. 0 times theorem prover too weak. 37814 trivial. 0 not checked. [2019-01-14 19:07:29,538 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:29,538 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 17] total 37 [2019-01-14 19:07:29,539 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2019-01-14 19:07:29,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2019-01-14 19:07:29,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=196, Invalid=1210, Unknown=0, NotChecked=0, Total=1406 [2019-01-14 19:07:29,540 INFO L87 Difference]: Start difference. First operand 839 states and 840 transitions. Second operand 38 states. [2019-01-14 19:07:32,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:32,385 INFO L93 Difference]: Finished difference Result 952 states and 956 transitions. [2019-01-14 19:07:32,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-01-14 19:07:32,388 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 835 [2019-01-14 19:07:32,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:32,391 INFO L225 Difference]: With dead ends: 952 [2019-01-14 19:07:32,391 INFO L226 Difference]: Without dead ends: 952 [2019-01-14 19:07:32,392 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 874 GetRequests, 819 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 528 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=374, Invalid=2818, Unknown=0, NotChecked=0, Total=3192 [2019-01-14 19:07:32,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 952 states. [2019-01-14 19:07:32,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 952 to 930. [2019-01-14 19:07:32,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 930 states. [2019-01-14 19:07:32,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 930 states to 930 states and 933 transitions. [2019-01-14 19:07:32,406 INFO L78 Accepts]: Start accepts. Automaton has 930 states and 933 transitions. Word has length 835 [2019-01-14 19:07:32,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:32,407 INFO L480 AbstractCegarLoop]: Abstraction has 930 states and 933 transitions. [2019-01-14 19:07:32,407 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2019-01-14 19:07:32,407 INFO L276 IsEmpty]: Start isEmpty. Operand 930 states and 933 transitions. [2019-01-14 19:07:32,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 927 [2019-01-14 19:07:32,420 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:32,420 INFO L402 BasicCegarLoop]: trace histogram [151, 150, 150, 150, 150, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:32,420 INFO L423 AbstractCegarLoop]: === Iteration 41 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:32,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:32,424 INFO L82 PathProgramCache]: Analyzing trace with hash -848043632, now seen corresponding path program 27 times [2019-01-14 19:07:32,424 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:32,424 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:32,424 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:32,425 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:32,427 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:32,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:33,724 INFO L134 CoverageAnalysis]: Checked inductivity of 59640 backedges. 20023 proven. 1803 refuted. 0 times theorem prover too weak. 37814 trivial. 0 not checked. [2019-01-14 19:07:33,724 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:33,724 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:33,734 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:07:34,009 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2019-01-14 19:07:34,009 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:34,018 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:34,883 INFO L134 CoverageAnalysis]: Checked inductivity of 59640 backedges. 19468 proven. 1803 refuted. 0 times theorem prover too weak. 38369 trivial. 0 not checked. [2019-01-14 19:07:34,901 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:34,902 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 25] total 59 [2019-01-14 19:07:34,903 INFO L459 AbstractCegarLoop]: Interpolant automaton has 59 states [2019-01-14 19:07:34,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2019-01-14 19:07:34,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=650, Invalid=2772, Unknown=0, NotChecked=0, Total=3422 [2019-01-14 19:07:34,904 INFO L87 Difference]: Start difference. First operand 930 states and 933 transitions. Second operand 59 states. [2019-01-14 19:07:37,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:37,553 INFO L93 Difference]: Finished difference Result 1039 states and 1044 transitions. [2019-01-14 19:07:37,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-01-14 19:07:37,555 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 926 [2019-01-14 19:07:37,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:37,560 INFO L225 Difference]: With dead ends: 1039 [2019-01-14 19:07:37,560 INFO L226 Difference]: Without dead ends: 1039 [2019-01-14 19:07:37,561 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1014 GetRequests, 908 SyntacticMatches, 0 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3385 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=2732, Invalid=8824, Unknown=0, NotChecked=0, Total=11556 [2019-01-14 19:07:37,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1039 states. [2019-01-14 19:07:37,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1039 to 1032. [2019-01-14 19:07:37,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1032 states. [2019-01-14 19:07:37,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1032 states to 1032 states and 1037 transitions. [2019-01-14 19:07:37,579 INFO L78 Accepts]: Start accepts. Automaton has 1032 states and 1037 transitions. Word has length 926 [2019-01-14 19:07:37,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:37,580 INFO L480 AbstractCegarLoop]: Abstraction has 1032 states and 1037 transitions. [2019-01-14 19:07:37,580 INFO L481 AbstractCegarLoop]: Interpolant automaton has 59 states. [2019-01-14 19:07:37,581 INFO L276 IsEmpty]: Start isEmpty. Operand 1032 states and 1037 transitions. [2019-01-14 19:07:37,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 932 [2019-01-14 19:07:37,593 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:37,594 INFO L402 BasicCegarLoop]: trace histogram [152, 151, 151, 151, 151, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:37,594 INFO L423 AbstractCegarLoop]: === Iteration 42 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:37,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:37,595 INFO L82 PathProgramCache]: Analyzing trace with hash 401870661, now seen corresponding path program 28 times [2019-01-14 19:07:37,597 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:37,598 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:37,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:37,598 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:37,598 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:37,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:38,881 INFO L134 CoverageAnalysis]: Checked inductivity of 60407 backedges. 11956 proven. 676 refuted. 0 times theorem prover too weak. 47775 trivial. 0 not checked. [2019-01-14 19:07:38,882 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:38,882 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:38,892 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:07:39,497 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:07:39,497 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:39,512 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:40,180 INFO L134 CoverageAnalysis]: Checked inductivity of 60407 backedges. 11325 proven. 632 refuted. 0 times theorem prover too weak. 48450 trivial. 0 not checked. [2019-01-14 19:07:40,202 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:40,202 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 18] total 53 [2019-01-14 19:07:40,203 INFO L459 AbstractCegarLoop]: Interpolant automaton has 54 states [2019-01-14 19:07:40,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2019-01-14 19:07:40,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=2484, Unknown=0, NotChecked=0, Total=2862 [2019-01-14 19:07:40,204 INFO L87 Difference]: Start difference. First operand 1032 states and 1037 transitions. Second operand 54 states. [2019-01-14 19:07:43,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:43,710 INFO L93 Difference]: Finished difference Result 1244 states and 1255 transitions. [2019-01-14 19:07:43,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2019-01-14 19:07:43,712 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 931 [2019-01-14 19:07:43,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:43,717 INFO L225 Difference]: With dead ends: 1244 [2019-01-14 19:07:43,717 INFO L226 Difference]: Without dead ends: 1244 [2019-01-14 19:07:43,718 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 987 GetRequests, 914 SyntacticMatches, 1 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1171 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=681, Invalid=4721, Unknown=0, NotChecked=0, Total=5402 [2019-01-14 19:07:43,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1244 states. [2019-01-14 19:07:43,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1244 to 1222. [2019-01-14 19:07:43,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1222 states. [2019-01-14 19:07:43,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1222 states to 1222 states and 1232 transitions. [2019-01-14 19:07:43,736 INFO L78 Accepts]: Start accepts. Automaton has 1222 states and 1232 transitions. Word has length 931 [2019-01-14 19:07:43,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:43,737 INFO L480 AbstractCegarLoop]: Abstraction has 1222 states and 1232 transitions. [2019-01-14 19:07:43,737 INFO L481 AbstractCegarLoop]: Interpolant automaton has 54 states. [2019-01-14 19:07:43,737 INFO L276 IsEmpty]: Start isEmpty. Operand 1222 states and 1232 transitions. [2019-01-14 19:07:43,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1023 [2019-01-14 19:07:43,751 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:43,752 INFO L402 BasicCegarLoop]: trace histogram [168, 167, 167, 167, 167, 17, 17, 17, 16, 16, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:43,752 INFO L423 AbstractCegarLoop]: === Iteration 43 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:43,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:43,752 INFO L82 PathProgramCache]: Analyzing trace with hash -1689975411, now seen corresponding path program 29 times [2019-01-14 19:07:43,753 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:43,756 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:43,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:43,757 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:43,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:43,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:45,069 INFO L134 CoverageAnalysis]: Checked inductivity of 73695 backedges. 22209 proven. 3122 refuted. 0 times theorem prover too weak. 48364 trivial. 0 not checked. [2019-01-14 19:07:45,070 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:45,070 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:45,080 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:07:46,409 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2019-01-14 19:07:46,409 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:46,427 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:47,979 INFO L134 CoverageAnalysis]: Checked inductivity of 73695 backedges. 37420 proven. 3556 refuted. 0 times theorem prover too weak. 32719 trivial. 0 not checked. [2019-01-14 19:07:48,000 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:48,000 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 38] total 77 [2019-01-14 19:07:48,002 INFO L459 AbstractCegarLoop]: Interpolant automaton has 77 states [2019-01-14 19:07:48,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2019-01-14 19:07:48,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=796, Invalid=5056, Unknown=0, NotChecked=0, Total=5852 [2019-01-14 19:07:48,002 INFO L87 Difference]: Start difference. First operand 1222 states and 1232 transitions. Second operand 77 states. [2019-01-14 19:07:52,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:52,555 INFO L93 Difference]: Finished difference Result 1049 states and 1052 transitions. [2019-01-14 19:07:52,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2019-01-14 19:07:52,556 INFO L78 Accepts]: Start accepts. Automaton has 77 states. Word has length 1022 [2019-01-14 19:07:52,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:52,561 INFO L225 Difference]: With dead ends: 1049 [2019-01-14 19:07:52,561 INFO L226 Difference]: Without dead ends: 1040 [2019-01-14 19:07:52,563 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1138 GetRequests, 989 SyntacticMatches, 0 SemanticMatches, 149 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6784 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=3510, Invalid=19140, Unknown=0, NotChecked=0, Total=22650 [2019-01-14 19:07:52,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1040 states. [2019-01-14 19:07:52,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1040 to 1036. [2019-01-14 19:07:52,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1036 states. [2019-01-14 19:07:52,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1036 states to 1036 states and 1039 transitions. [2019-01-14 19:07:52,574 INFO L78 Accepts]: Start accepts. Automaton has 1036 states and 1039 transitions. Word has length 1022 [2019-01-14 19:07:52,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:52,577 INFO L480 AbstractCegarLoop]: Abstraction has 1036 states and 1039 transitions. [2019-01-14 19:07:52,577 INFO L481 AbstractCegarLoop]: Interpolant automaton has 77 states. [2019-01-14 19:07:52,577 INFO L276 IsEmpty]: Start isEmpty. Operand 1036 states and 1039 transitions. [2019-01-14 19:07:52,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1028 [2019-01-14 19:07:52,589 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:52,589 INFO L402 BasicCegarLoop]: trace histogram [169, 168, 168, 168, 168, 17, 17, 17, 16, 16, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:52,590 INFO L423 AbstractCegarLoop]: === Iteration 44 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:52,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:52,590 INFO L82 PathProgramCache]: Analyzing trace with hash -697239742, now seen corresponding path program 30 times [2019-01-14 19:07:52,590 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:52,590 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:52,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:52,597 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:52,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:52,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:07:54,021 INFO L134 CoverageAnalysis]: Checked inductivity of 74548 backedges. 24055 proven. 2043 refuted. 0 times theorem prover too weak. 48450 trivial. 0 not checked. [2019-01-14 19:07:54,022 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:07:54,022 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:07:54,032 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:07:55,733 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 35 check-sat command(s) [2019-01-14 19:07:55,733 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:07:55,749 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:07:56,875 INFO L134 CoverageAnalysis]: Checked inductivity of 74548 backedges. 23423 proven. 2043 refuted. 0 times theorem prover too weak. 49082 trivial. 0 not checked. [2019-01-14 19:07:56,897 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:07:56,898 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 26] total 62 [2019-01-14 19:07:56,899 INFO L459 AbstractCegarLoop]: Interpolant automaton has 62 states [2019-01-14 19:07:56,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2019-01-14 19:07:56,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=723, Invalid=3059, Unknown=0, NotChecked=0, Total=3782 [2019-01-14 19:07:56,900 INFO L87 Difference]: Start difference. First operand 1036 states and 1039 transitions. Second operand 62 states. [2019-01-14 19:07:59,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:07:59,264 INFO L93 Difference]: Finished difference Result 1145 states and 1150 transitions. [2019-01-14 19:07:59,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2019-01-14 19:07:59,267 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 1027 [2019-01-14 19:07:59,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:07:59,271 INFO L225 Difference]: With dead ends: 1145 [2019-01-14 19:07:59,271 INFO L226 Difference]: Without dead ends: 1145 [2019-01-14 19:07:59,273 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1120 GetRequests, 1008 SyntacticMatches, 0 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3801 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=3053, Invalid=9829, Unknown=0, NotChecked=0, Total=12882 [2019-01-14 19:07:59,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1145 states. [2019-01-14 19:07:59,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1145 to 1138. [2019-01-14 19:07:59,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1138 states. [2019-01-14 19:07:59,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1138 states to 1138 states and 1143 transitions. [2019-01-14 19:07:59,283 INFO L78 Accepts]: Start accepts. Automaton has 1138 states and 1143 transitions. Word has length 1027 [2019-01-14 19:07:59,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:07:59,284 INFO L480 AbstractCegarLoop]: Abstraction has 1138 states and 1143 transitions. [2019-01-14 19:07:59,284 INFO L481 AbstractCegarLoop]: Interpolant automaton has 62 states. [2019-01-14 19:07:59,284 INFO L276 IsEmpty]: Start isEmpty. Operand 1138 states and 1143 transitions. [2019-01-14 19:07:59,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1033 [2019-01-14 19:07:59,297 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:07:59,297 INFO L402 BasicCegarLoop]: trace histogram [170, 169, 169, 169, 169, 17, 17, 17, 16, 16, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:07:59,298 INFO L423 AbstractCegarLoop]: === Iteration 45 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:07:59,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:07:59,298 INFO L82 PathProgramCache]: Analyzing trace with hash 548287687, now seen corresponding path program 31 times [2019-01-14 19:07:59,298 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:07:59,298 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:07:59,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:59,304 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:07:59,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:07:59,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:00,289 INFO L134 CoverageAnalysis]: Checked inductivity of 75406 backedges. 13593 proven. 769 refuted. 0 times theorem prover too weak. 61044 trivial. 0 not checked. [2019-01-14 19:08:00,290 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:08:00,290 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:08:00,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:08:00,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:00,660 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:08:01,349 INFO L134 CoverageAnalysis]: Checked inductivity of 75406 backedges. 13512 proven. 714 refuted. 0 times theorem prover too weak. 61180 trivial. 0 not checked. [2019-01-14 19:08:01,369 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:08:01,369 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 19] total 41 [2019-01-14 19:08:01,370 INFO L459 AbstractCegarLoop]: Interpolant automaton has 42 states [2019-01-14 19:08:01,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2019-01-14 19:08:01,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=1485, Unknown=0, NotChecked=0, Total=1722 [2019-01-14 19:08:01,371 INFO L87 Difference]: Start difference. First operand 1138 states and 1143 transitions. Second operand 42 states. [2019-01-14 19:08:05,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:08:05,055 INFO L93 Difference]: Finished difference Result 1364 states and 1375 transitions. [2019-01-14 19:08:05,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2019-01-14 19:08:05,059 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 1032 [2019-01-14 19:08:05,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:08:05,066 INFO L225 Difference]: With dead ends: 1364 [2019-01-14 19:08:05,066 INFO L226 Difference]: Without dead ends: 1364 [2019-01-14 19:08:05,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1076 GetRequests, 1014 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=443, Invalid=3589, Unknown=0, NotChecked=0, Total=4032 [2019-01-14 19:08:05,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1364 states. [2019-01-14 19:08:05,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1364 to 1338. [2019-01-14 19:08:05,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1338 states. [2019-01-14 19:08:05,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1338 states to 1338 states and 1348 transitions. [2019-01-14 19:08:05,081 INFO L78 Accepts]: Start accepts. Automaton has 1338 states and 1348 transitions. Word has length 1032 [2019-01-14 19:08:05,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:08:05,082 INFO L480 AbstractCegarLoop]: Abstraction has 1338 states and 1348 transitions. [2019-01-14 19:08:05,082 INFO L481 AbstractCegarLoop]: Interpolant automaton has 42 states. [2019-01-14 19:08:05,082 INFO L276 IsEmpty]: Start isEmpty. Operand 1338 states and 1348 transitions. [2019-01-14 19:08:05,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1129 [2019-01-14 19:08:05,095 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:08:05,096 INFO L402 BasicCegarLoop]: trace histogram [187, 186, 186, 186, 186, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:08:05,096 INFO L423 AbstractCegarLoop]: === Iteration 46 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:08:05,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:08:05,096 INFO L82 PathProgramCache]: Analyzing trace with hash 1455325456, now seen corresponding path program 32 times [2019-01-14 19:08:05,097 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:08:05,101 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:08:05,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:05,101 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:08:05,101 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:05,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:06,667 INFO L134 CoverageAnalysis]: Checked inductivity of 91123 backedges. 26506 proven. 3529 refuted. 0 times theorem prover too weak. 61088 trivial. 0 not checked. [2019-01-14 19:08:06,667 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:08:06,667 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:08:06,677 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:08:07,051 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:08:07,051 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:08:07,065 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:08:08,503 INFO L134 CoverageAnalysis]: Checked inductivity of 91123 backedges. 39629 proven. 616 refuted. 0 times theorem prover too weak. 50878 trivial. 0 not checked. [2019-01-14 19:08:08,523 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:08:08,523 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 36] total 77 [2019-01-14 19:08:08,524 INFO L459 AbstractCegarLoop]: Interpolant automaton has 77 states [2019-01-14 19:08:08,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2019-01-14 19:08:08,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=887, Invalid=4965, Unknown=0, NotChecked=0, Total=5852 [2019-01-14 19:08:08,525 INFO L87 Difference]: Start difference. First operand 1338 states and 1348 transitions. Second operand 77 states. [2019-01-14 19:08:12,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:08:12,280 INFO L93 Difference]: Finished difference Result 1155 states and 1158 transitions. [2019-01-14 19:08:12,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2019-01-14 19:08:12,282 INFO L78 Accepts]: Start accepts. Automaton has 77 states. Word has length 1128 [2019-01-14 19:08:12,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:08:12,287 INFO L225 Difference]: With dead ends: 1155 [2019-01-14 19:08:12,287 INFO L226 Difference]: Without dead ends: 1146 [2019-01-14 19:08:12,289 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1239 GetRequests, 1096 SyntacticMatches, 0 SemanticMatches, 143 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6478 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=3173, Invalid=17707, Unknown=0, NotChecked=0, Total=20880 [2019-01-14 19:08:12,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1146 states. [2019-01-14 19:08:12,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1146 to 1142. [2019-01-14 19:08:12,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1142 states. [2019-01-14 19:08:12,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1142 states to 1142 states and 1145 transitions. [2019-01-14 19:08:12,298 INFO L78 Accepts]: Start accepts. Automaton has 1142 states and 1145 transitions. Word has length 1128 [2019-01-14 19:08:12,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:08:12,299 INFO L480 AbstractCegarLoop]: Abstraction has 1142 states and 1145 transitions. [2019-01-14 19:08:12,299 INFO L481 AbstractCegarLoop]: Interpolant automaton has 77 states. [2019-01-14 19:08:12,299 INFO L276 IsEmpty]: Start isEmpty. Operand 1142 states and 1145 transitions. [2019-01-14 19:08:12,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1134 [2019-01-14 19:08:12,311 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:08:12,311 INFO L402 BasicCegarLoop]: trace histogram [188, 187, 187, 187, 187, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:08:12,311 INFO L423 AbstractCegarLoop]: === Iteration 47 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:08:12,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:08:12,312 INFO L82 PathProgramCache]: Analyzing trace with hash -1908118869, now seen corresponding path program 33 times [2019-01-14 19:08:12,312 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:08:12,312 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:08:12,313 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:12,313 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:08:12,313 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:12,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:14,032 INFO L134 CoverageAnalysis]: Checked inductivity of 92072 backedges. 28594 proven. 2298 refuted. 0 times theorem prover too weak. 61180 trivial. 0 not checked. [2019-01-14 19:08:14,032 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:08:14,032 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:08:14,043 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:08:14,481 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 19 check-sat command(s) [2019-01-14 19:08:14,481 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:08:14,492 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:08:16,019 INFO L134 CoverageAnalysis]: Checked inductivity of 92072 backedges. 27880 proven. 2298 refuted. 0 times theorem prover too weak. 61894 trivial. 0 not checked. [2019-01-14 19:08:16,038 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:08:16,039 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 27] total 65 [2019-01-14 19:08:16,040 INFO L459 AbstractCegarLoop]: Interpolant automaton has 65 states [2019-01-14 19:08:16,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2019-01-14 19:08:16,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=800, Invalid=3360, Unknown=0, NotChecked=0, Total=4160 [2019-01-14 19:08:16,041 INFO L87 Difference]: Start difference. First operand 1142 states and 1145 transitions. Second operand 65 states. [2019-01-14 19:08:18,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:08:18,699 INFO L93 Difference]: Finished difference Result 1256 states and 1261 transitions. [2019-01-14 19:08:18,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-01-14 19:08:18,701 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 1133 [2019-01-14 19:08:18,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:08:18,705 INFO L225 Difference]: With dead ends: 1256 [2019-01-14 19:08:18,705 INFO L226 Difference]: Without dead ends: 1256 [2019-01-14 19:08:18,706 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1231 GetRequests, 1113 SyntacticMatches, 0 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4241 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=3392, Invalid=10888, Unknown=0, NotChecked=0, Total=14280 [2019-01-14 19:08:18,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1256 states. [2019-01-14 19:08:18,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1256 to 1249. [2019-01-14 19:08:18,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1249 states. [2019-01-14 19:08:18,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1249 states to 1249 states and 1254 transitions. [2019-01-14 19:08:18,722 INFO L78 Accepts]: Start accepts. Automaton has 1249 states and 1254 transitions. Word has length 1133 [2019-01-14 19:08:18,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:08:18,722 INFO L480 AbstractCegarLoop]: Abstraction has 1249 states and 1254 transitions. [2019-01-14 19:08:18,722 INFO L481 AbstractCegarLoop]: Interpolant automaton has 65 states. [2019-01-14 19:08:18,722 INFO L276 IsEmpty]: Start isEmpty. Operand 1249 states and 1254 transitions. [2019-01-14 19:08:18,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1139 [2019-01-14 19:08:18,732 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:08:18,732 INFO L402 BasicCegarLoop]: trace histogram [189, 188, 188, 188, 188, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:08:18,733 INFO L423 AbstractCegarLoop]: === Iteration 48 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:08:18,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:08:18,733 INFO L82 PathProgramCache]: Analyzing trace with hash -1485351030, now seen corresponding path program 34 times [2019-01-14 19:08:18,734 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:08:18,734 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:08:18,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:18,734 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:08:18,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:18,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:19,741 INFO L134 CoverageAnalysis]: Checked inductivity of 93026 backedges. 16131 proven. 868 refuted. 0 times theorem prover too weak. 76027 trivial. 0 not checked. [2019-01-14 19:08:19,741 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:08:19,742 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:08:19,752 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:08:20,747 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:08:20,747 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:08:20,764 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:08:21,541 INFO L134 CoverageAnalysis]: Checked inductivity of 93026 backedges. 15963 proven. 801 refuted. 0 times theorem prover too weak. 76262 trivial. 0 not checked. [2019-01-14 19:08:21,563 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:08:21,563 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 20] total 44 [2019-01-14 19:08:21,564 INFO L459 AbstractCegarLoop]: Interpolant automaton has 45 states [2019-01-14 19:08:21,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2019-01-14 19:08:21,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=1717, Unknown=0, NotChecked=0, Total=1980 [2019-01-14 19:08:21,565 INFO L87 Difference]: Start difference. First operand 1249 states and 1254 transitions. Second operand 45 states. [2019-01-14 19:08:25,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:08:25,174 INFO L93 Difference]: Finished difference Result 1485 states and 1496 transitions. [2019-01-14 19:08:25,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-01-14 19:08:25,176 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 1138 [2019-01-14 19:08:25,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:08:25,181 INFO L225 Difference]: With dead ends: 1485 [2019-01-14 19:08:25,182 INFO L226 Difference]: Without dead ends: 1485 [2019-01-14 19:08:25,182 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1185 GetRequests, 1119 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 789 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=497, Invalid=4059, Unknown=0, NotChecked=0, Total=4556 [2019-01-14 19:08:25,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1485 states. [2019-01-14 19:08:25,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1485 to 1459. [2019-01-14 19:08:25,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1459 states. [2019-01-14 19:08:25,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1459 states to 1459 states and 1469 transitions. [2019-01-14 19:08:25,196 INFO L78 Accepts]: Start accepts. Automaton has 1459 states and 1469 transitions. Word has length 1138 [2019-01-14 19:08:25,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:08:25,197 INFO L480 AbstractCegarLoop]: Abstraction has 1459 states and 1469 transitions. [2019-01-14 19:08:25,197 INFO L481 AbstractCegarLoop]: Interpolant automaton has 45 states. [2019-01-14 19:08:25,197 INFO L276 IsEmpty]: Start isEmpty. Operand 1459 states and 1469 transitions. [2019-01-14 19:08:25,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1240 [2019-01-14 19:08:25,212 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:08:25,212 INFO L402 BasicCegarLoop]: trace histogram [207, 206, 206, 206, 206, 19, 19, 19, 18, 18, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:08:25,213 INFO L423 AbstractCegarLoop]: === Iteration 49 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:08:25,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:08:25,215 INFO L82 PathProgramCache]: Analyzing trace with hash 775919112, now seen corresponding path program 35 times [2019-01-14 19:08:25,215 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:08:25,215 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:08:25,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:25,219 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:08:25,219 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:25,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:26,846 INFO L134 CoverageAnalysis]: Checked inductivity of 111450 backedges. 31325 proven. 3961 refuted. 0 times theorem prover too weak. 76164 trivial. 0 not checked. [2019-01-14 19:08:26,846 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:08:26,846 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:08:26,857 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:08:28,926 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 45 check-sat command(s) [2019-01-14 19:08:28,926 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:08:28,948 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:08:31,341 INFO L134 CoverageAnalysis]: Checked inductivity of 111450 backedges. 50996 proven. 6057 refuted. 0 times theorem prover too weak. 54397 trivial. 0 not checked. [2019-01-14 19:08:31,364 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:08:31,364 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 42] total 85 [2019-01-14 19:08:31,366 INFO L459 AbstractCegarLoop]: Interpolant automaton has 85 states [2019-01-14 19:08:31,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2019-01-14 19:08:31,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=961, Invalid=6179, Unknown=0, NotChecked=0, Total=7140 [2019-01-14 19:08:31,367 INFO L87 Difference]: Start difference. First operand 1459 states and 1469 transitions. Second operand 85 states. [2019-01-14 19:08:36,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:08:36,558 INFO L93 Difference]: Finished difference Result 1266 states and 1269 transitions. [2019-01-14 19:08:36,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2019-01-14 19:08:36,560 INFO L78 Accepts]: Start accepts. Automaton has 85 states. Word has length 1239 [2019-01-14 19:08:36,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:08:36,565 INFO L225 Difference]: With dead ends: 1266 [2019-01-14 19:08:36,565 INFO L226 Difference]: Without dead ends: 1257 [2019-01-14 19:08:36,569 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1369 GetRequests, 1202 SyntacticMatches, 0 SemanticMatches, 167 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8749 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=4284, Invalid=24108, Unknown=0, NotChecked=0, Total=28392 [2019-01-14 19:08:36,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1257 states. [2019-01-14 19:08:36,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1257 to 1253. [2019-01-14 19:08:36,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1253 states. [2019-01-14 19:08:36,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1253 states to 1253 states and 1256 transitions. [2019-01-14 19:08:36,587 INFO L78 Accepts]: Start accepts. Automaton has 1253 states and 1256 transitions. Word has length 1239 [2019-01-14 19:08:36,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:08:36,588 INFO L480 AbstractCegarLoop]: Abstraction has 1253 states and 1256 transitions. [2019-01-14 19:08:36,588 INFO L481 AbstractCegarLoop]: Interpolant automaton has 85 states. [2019-01-14 19:08:36,588 INFO L276 IsEmpty]: Start isEmpty. Operand 1253 states and 1256 transitions. [2019-01-14 19:08:36,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1245 [2019-01-14 19:08:36,632 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:08:36,633 INFO L402 BasicCegarLoop]: trace histogram [208, 207, 207, 207, 207, 19, 19, 19, 18, 18, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:08:36,633 INFO L423 AbstractCegarLoop]: === Iteration 50 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:08:36,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:08:36,636 INFO L82 PathProgramCache]: Analyzing trace with hash -1962245081, now seen corresponding path program 36 times [2019-01-14 19:08:36,637 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:08:36,637 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:08:36,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:36,637 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:08:36,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:36,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:38,497 INFO L134 CoverageAnalysis]: Checked inductivity of 112500 backedges. 33670 proven. 2568 refuted. 0 times theorem prover too weak. 76262 trivial. 0 not checked. [2019-01-14 19:08:38,497 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:08:38,497 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:08:38,508 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:08:39,738 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 39 check-sat command(s) [2019-01-14 19:08:39,738 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:08:39,753 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:08:40,841 INFO L134 CoverageAnalysis]: Checked inductivity of 112500 backedges. 18596 proven. 893 refuted. 0 times theorem prover too weak. 93011 trivial. 0 not checked. [2019-01-14 19:08:40,863 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:08:40,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 22] total 67 [2019-01-14 19:08:40,865 INFO L459 AbstractCegarLoop]: Interpolant automaton has 67 states [2019-01-14 19:08:40,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2019-01-14 19:08:40,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=686, Invalid=3736, Unknown=0, NotChecked=0, Total=4422 [2019-01-14 19:08:40,866 INFO L87 Difference]: Start difference. First operand 1253 states and 1256 transitions. Second operand 67 states. [2019-01-14 19:08:44,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:08:44,748 INFO L93 Difference]: Finished difference Result 1380 states and 1386 transitions. [2019-01-14 19:08:44,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2019-01-14 19:08:44,750 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 1244 [2019-01-14 19:08:44,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:08:44,755 INFO L225 Difference]: With dead ends: 1380 [2019-01-14 19:08:44,755 INFO L226 Difference]: Without dead ends: 1380 [2019-01-14 19:08:44,757 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1348 GetRequests, 1224 SyntacticMatches, 0 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3743 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=3576, Invalid=12174, Unknown=0, NotChecked=0, Total=15750 [2019-01-14 19:08:44,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1380 states. [2019-01-14 19:08:44,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1380 to 1370. [2019-01-14 19:08:44,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1370 states. [2019-01-14 19:08:44,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1370 states to 1370 states and 1376 transitions. [2019-01-14 19:08:44,770 INFO L78 Accepts]: Start accepts. Automaton has 1370 states and 1376 transitions. Word has length 1244 [2019-01-14 19:08:44,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:08:44,772 INFO L480 AbstractCegarLoop]: Abstraction has 1370 states and 1376 transitions. [2019-01-14 19:08:44,772 INFO L481 AbstractCegarLoop]: Interpolant automaton has 67 states. [2019-01-14 19:08:44,772 INFO L276 IsEmpty]: Start isEmpty. Operand 1370 states and 1376 transitions. [2019-01-14 19:08:44,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1255 [2019-01-14 19:08:44,789 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:08:44,789 INFO L402 BasicCegarLoop]: trace histogram [210, 209, 209, 209, 209, 19, 19, 19, 18, 18, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:08:44,790 INFO L423 AbstractCegarLoop]: === Iteration 51 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:08:44,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:08:44,790 INFO L82 PathProgramCache]: Analyzing trace with hash 1445425069, now seen corresponding path program 37 times [2019-01-14 19:08:44,790 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:08:44,790 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:08:44,796 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:44,797 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:08:44,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:44,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:46,145 INFO L134 CoverageAnalysis]: Checked inductivity of 114615 backedges. 20625 proven. 993 refuted. 0 times theorem prover too weak. 92997 trivial. 0 not checked. [2019-01-14 19:08:46,145 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:08:46,145 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:08:46,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:08:46,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:46,585 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:08:48,208 INFO L134 CoverageAnalysis]: Checked inductivity of 114615 backedges. 20664 proven. 954 refuted. 0 times theorem prover too weak. 92997 trivial. 0 not checked. [2019-01-14 19:08:48,227 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:08:48,228 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 43] total 66 [2019-01-14 19:08:48,229 INFO L459 AbstractCegarLoop]: Interpolant automaton has 66 states [2019-01-14 19:08:48,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2019-01-14 19:08:48,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=991, Invalid=3299, Unknown=0, NotChecked=0, Total=4290 [2019-01-14 19:08:48,230 INFO L87 Difference]: Start difference. First operand 1370 states and 1376 transitions. Second operand 66 states. [2019-01-14 19:08:50,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:08:50,807 INFO L93 Difference]: Finished difference Result 1601 states and 1611 transitions. [2019-01-14 19:08:50,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-01-14 19:08:50,809 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 1254 [2019-01-14 19:08:50,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:08:50,814 INFO L225 Difference]: With dead ends: 1601 [2019-01-14 19:08:50,815 INFO L226 Difference]: Without dead ends: 1601 [2019-01-14 19:08:50,815 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1336 GetRequests, 1233 SyntacticMatches, 0 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1823 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=2782, Invalid=8138, Unknown=0, NotChecked=0, Total=10920 [2019-01-14 19:08:50,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1601 states. [2019-01-14 19:08:50,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1601 to 1590. [2019-01-14 19:08:50,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1590 states. [2019-01-14 19:08:50,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1590 states to 1590 states and 1600 transitions. [2019-01-14 19:08:50,829 INFO L78 Accepts]: Start accepts. Automaton has 1590 states and 1600 transitions. Word has length 1254 [2019-01-14 19:08:50,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:08:50,830 INFO L480 AbstractCegarLoop]: Abstraction has 1590 states and 1600 transitions. [2019-01-14 19:08:50,830 INFO L481 AbstractCegarLoop]: Interpolant automaton has 66 states. [2019-01-14 19:08:50,830 INFO L276 IsEmpty]: Start isEmpty. Operand 1590 states and 1600 transitions. [2019-01-14 19:08:50,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1356 [2019-01-14 19:08:50,843 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:08:50,844 INFO L402 BasicCegarLoop]: trace histogram [228, 227, 227, 227, 227, 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:08:50,844 INFO L423 AbstractCegarLoop]: === Iteration 52 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:08:50,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:08:50,844 INFO L82 PathProgramCache]: Analyzing trace with hash -862088469, now seen corresponding path program 38 times [2019-01-14 19:08:50,845 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:08:50,845 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:08:50,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:50,845 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:08:50,846 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:50,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:08:52,576 INFO L134 CoverageAnalysis]: Checked inductivity of 134979 backedges. 36696 proven. 4418 refuted. 0 times theorem prover too weak. 93865 trivial. 0 not checked. [2019-01-14 19:08:52,577 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:08:52,577 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:08:52,587 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:08:53,036 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:08:53,037 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:08:53,053 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:08:54,983 INFO L134 CoverageAnalysis]: Checked inductivity of 134979 backedges. 54954 proven. 783 refuted. 0 times theorem prover too weak. 79242 trivial. 0 not checked. [2019-01-14 19:08:55,003 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:08:55,003 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 40] total 85 [2019-01-14 19:08:55,004 INFO L459 AbstractCegarLoop]: Interpolant automaton has 85 states [2019-01-14 19:08:55,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2019-01-14 19:08:55,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1084, Invalid=6056, Unknown=0, NotChecked=0, Total=7140 [2019-01-14 19:08:55,006 INFO L87 Difference]: Start difference. First operand 1590 states and 1600 transitions. Second operand 85 states. [2019-01-14 19:08:59,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:08:59,916 INFO L93 Difference]: Finished difference Result 1382 states and 1385 transitions. [2019-01-14 19:08:59,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 101 states. [2019-01-14 19:08:59,918 INFO L78 Accepts]: Start accepts. Automaton has 85 states. Word has length 1355 [2019-01-14 19:08:59,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:08:59,923 INFO L225 Difference]: With dead ends: 1382 [2019-01-14 19:08:59,923 INFO L226 Difference]: Without dead ends: 1373 [2019-01-14 19:08:59,925 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1478 GetRequests, 1319 SyntacticMatches, 0 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8078 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=3902, Invalid=21858, Unknown=0, NotChecked=0, Total=25760 [2019-01-14 19:08:59,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1373 states. [2019-01-14 19:08:59,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1373 to 1369. [2019-01-14 19:08:59,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1369 states. [2019-01-14 19:08:59,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1369 states to 1369 states and 1372 transitions. [2019-01-14 19:08:59,938 INFO L78 Accepts]: Start accepts. Automaton has 1369 states and 1372 transitions. Word has length 1355 [2019-01-14 19:08:59,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:08:59,939 INFO L480 AbstractCegarLoop]: Abstraction has 1369 states and 1372 transitions. [2019-01-14 19:08:59,939 INFO L481 AbstractCegarLoop]: Interpolant automaton has 85 states. [2019-01-14 19:08:59,939 INFO L276 IsEmpty]: Start isEmpty. Operand 1369 states and 1372 transitions. [2019-01-14 19:08:59,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1361 [2019-01-14 19:08:59,951 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:08:59,952 INFO L402 BasicCegarLoop]: trace histogram [229, 228, 228, 228, 228, 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:08:59,952 INFO L423 AbstractCegarLoop]: === Iteration 53 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:08:59,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:08:59,953 INFO L82 PathProgramCache]: Analyzing trace with hash -1077882064, now seen corresponding path program 39 times [2019-01-14 19:08:59,953 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:08:59,953 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:08:59,954 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:08:59,954 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:08:59,954 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:00,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:09:01,667 INFO L134 CoverageAnalysis]: Checked inductivity of 136135 backedges. 39313 proven. 2853 refuted. 0 times theorem prover too weak. 93969 trivial. 0 not checked. [2019-01-14 19:09:01,667 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:09:01,667 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:09:01,677 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:09:02,140 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 21 check-sat command(s) [2019-01-14 19:09:02,140 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:09:02,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:09:03,527 INFO L134 CoverageAnalysis]: Checked inductivity of 136135 backedges. 38420 proven. 2853 refuted. 0 times theorem prover too weak. 94862 trivial. 0 not checked. [2019-01-14 19:09:03,547 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:09:03,547 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 29] total 71 [2019-01-14 19:09:03,548 INFO L459 AbstractCegarLoop]: Interpolant automaton has 71 states [2019-01-14 19:09:03,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2019-01-14 19:09:03,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=4004, Unknown=0, NotChecked=0, Total=4970 [2019-01-14 19:09:03,549 INFO L87 Difference]: Start difference. First operand 1369 states and 1372 transitions. Second operand 71 states. [2019-01-14 19:09:06,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:09:06,530 INFO L93 Difference]: Finished difference Result 1493 states and 1498 transitions. [2019-01-14 19:09:06,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-01-14 19:09:06,532 INFO L78 Accepts]: Start accepts. Automaton has 71 states. Word has length 1360 [2019-01-14 19:09:06,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:09:06,538 INFO L225 Difference]: With dead ends: 1493 [2019-01-14 19:09:06,538 INFO L226 Difference]: Without dead ends: 1493 [2019-01-14 19:09:06,540 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1468 GetRequests, 1338 SyntacticMatches, 0 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5193 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=4124, Invalid=13168, Unknown=0, NotChecked=0, Total=17292 [2019-01-14 19:09:06,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1493 states. [2019-01-14 19:09:06,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1493 to 1486. [2019-01-14 19:09:06,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1486 states. [2019-01-14 19:09:06,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1486 states to 1486 states and 1491 transitions. [2019-01-14 19:09:06,560 INFO L78 Accepts]: Start accepts. Automaton has 1486 states and 1491 transitions. Word has length 1360 [2019-01-14 19:09:06,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:09:06,561 INFO L480 AbstractCegarLoop]: Abstraction has 1486 states and 1491 transitions. [2019-01-14 19:09:06,561 INFO L481 AbstractCegarLoop]: Interpolant automaton has 71 states. [2019-01-14 19:09:06,561 INFO L276 IsEmpty]: Start isEmpty. Operand 1486 states and 1491 transitions. [2019-01-14 19:09:06,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1366 [2019-01-14 19:09:06,573 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:09:06,574 INFO L402 BasicCegarLoop]: trace histogram [230, 229, 229, 229, 229, 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:09:06,574 INFO L423 AbstractCegarLoop]: === Iteration 54 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:09:06,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:09:06,575 INFO L82 PathProgramCache]: Analyzing trace with hash -1160826203, now seen corresponding path program 40 times [2019-01-14 19:09:06,575 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:09:06,575 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:09:06,577 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:06,577 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:09:06,577 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:06,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:09:07,792 INFO L134 CoverageAnalysis]: Checked inductivity of 137296 backedges. 22074 proven. 1084 refuted. 0 times theorem prover too weak. 114138 trivial. 0 not checked. [2019-01-14 19:09:07,792 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:09:07,793 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:09:07,803 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:09:09,020 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:09:09,021 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:09:09,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:09:10,107 INFO L134 CoverageAnalysis]: Checked inductivity of 137296 backedges. 21717 proven. 990 refuted. 0 times theorem prover too weak. 114589 trivial. 0 not checked. [2019-01-14 19:09:10,130 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:09:10,131 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 22] total 50 [2019-01-14 19:09:10,132 INFO L459 AbstractCegarLoop]: Interpolant automaton has 51 states [2019-01-14 19:09:10,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2019-01-14 19:09:10,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=2229, Unknown=0, NotChecked=0, Total=2550 [2019-01-14 19:09:10,133 INFO L87 Difference]: Start difference. First operand 1486 states and 1491 transitions. Second operand 51 states. [2019-01-14 19:09:13,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:09:13,378 INFO L93 Difference]: Finished difference Result 1742 states and 1753 transitions. [2019-01-14 19:09:13,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-01-14 19:09:13,379 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 1365 [2019-01-14 19:09:13,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:09:13,385 INFO L225 Difference]: With dead ends: 1742 [2019-01-14 19:09:13,385 INFO L226 Difference]: Without dead ends: 1742 [2019-01-14 19:09:13,386 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1418 GetRequests, 1344 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1051 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=614, Invalid=5086, Unknown=0, NotChecked=0, Total=5700 [2019-01-14 19:09:13,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1742 states. [2019-01-14 19:09:13,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1742 to 1716. [2019-01-14 19:09:13,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1716 states. [2019-01-14 19:09:13,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1716 states to 1716 states and 1726 transitions. [2019-01-14 19:09:13,402 INFO L78 Accepts]: Start accepts. Automaton has 1716 states and 1726 transitions. Word has length 1365 [2019-01-14 19:09:13,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:09:13,403 INFO L480 AbstractCegarLoop]: Abstraction has 1716 states and 1726 transitions. [2019-01-14 19:09:13,403 INFO L481 AbstractCegarLoop]: Interpolant automaton has 51 states. [2019-01-14 19:09:13,403 INFO L276 IsEmpty]: Start isEmpty. Operand 1716 states and 1726 transitions. [2019-01-14 19:09:13,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1477 [2019-01-14 19:09:13,417 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:09:13,418 INFO L402 BasicCegarLoop]: trace histogram [250, 249, 249, 249, 249, 21, 21, 21, 20, 20, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:09:13,418 INFO L423 AbstractCegarLoop]: === Iteration 55 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:09:13,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:09:13,419 INFO L82 PathProgramCache]: Analyzing trace with hash 1797808493, now seen corresponding path program 41 times [2019-01-14 19:09:13,419 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:09:13,419 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:09:13,419 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:13,419 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:09:13,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:13,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:09:15,277 INFO L134 CoverageAnalysis]: Checked inductivity of 162028 backedges. 42649 proven. 4900 refuted. 0 times theorem prover too weak. 114479 trivial. 0 not checked. [2019-01-14 19:09:15,277 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:09:15,277 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:09:15,286 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:09:20,592 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2019-01-14 19:09:20,592 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:09:20,622 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:09:22,999 INFO L134 CoverageAnalysis]: Checked inductivity of 162028 backedges. 67896 proven. 8842 refuted. 0 times theorem prover too weak. 85290 trivial. 0 not checked. [2019-01-14 19:09:23,024 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:09:23,025 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 46] total 93 [2019-01-14 19:09:23,026 INFO L459 AbstractCegarLoop]: Interpolant automaton has 93 states [2019-01-14 19:09:23,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2019-01-14 19:09:23,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1146, Invalid=7410, Unknown=0, NotChecked=0, Total=8556 [2019-01-14 19:09:23,028 INFO L87 Difference]: Start difference. First operand 1716 states and 1726 transitions. Second operand 93 states. [2019-01-14 19:09:24,306 WARN L181 SmtUtils]: Spent 325.00 ms on a formula simplification. DAG size of input: 16 DAG size of output: 12 [2019-01-14 19:09:30,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:09:30,294 INFO L93 Difference]: Finished difference Result 1503 states and 1506 transitions. [2019-01-14 19:09:30,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2019-01-14 19:09:30,296 INFO L78 Accepts]: Start accepts. Automaton has 93 states. Word has length 1476 [2019-01-14 19:09:30,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:09:30,302 INFO L225 Difference]: With dead ends: 1503 [2019-01-14 19:09:30,302 INFO L226 Difference]: Without dead ends: 1494 [2019-01-14 19:09:30,306 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1620 GetRequests, 1435 SyntacticMatches, 0 SemanticMatches, 185 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10950 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=5154, Invalid=29628, Unknown=0, NotChecked=0, Total=34782 [2019-01-14 19:09:30,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1494 states. [2019-01-14 19:09:30,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1494 to 1490. [2019-01-14 19:09:30,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1490 states. [2019-01-14 19:09:30,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1490 states to 1490 states and 1493 transitions. [2019-01-14 19:09:30,320 INFO L78 Accepts]: Start accepts. Automaton has 1490 states and 1493 transitions. Word has length 1476 [2019-01-14 19:09:30,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:09:30,321 INFO L480 AbstractCegarLoop]: Abstraction has 1490 states and 1493 transitions. [2019-01-14 19:09:30,321 INFO L481 AbstractCegarLoop]: Interpolant automaton has 93 states. [2019-01-14 19:09:30,321 INFO L276 IsEmpty]: Start isEmpty. Operand 1490 states and 1493 transitions. [2019-01-14 19:09:30,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1482 [2019-01-14 19:09:30,335 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:09:30,336 INFO L402 BasicCegarLoop]: trace histogram [251, 250, 250, 250, 250, 21, 21, 21, 20, 20, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:09:30,337 INFO L423 AbstractCegarLoop]: === Iteration 56 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:09:30,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:09:30,337 INFO L82 PathProgramCache]: Analyzing trace with hash -667535262, now seen corresponding path program 42 times [2019-01-14 19:09:30,337 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:09:30,337 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:09:30,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:30,338 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:09:30,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:30,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:09:32,231 INFO L134 CoverageAnalysis]: Checked inductivity of 163295 backedges. 45553 proven. 3153 refuted. 0 times theorem prover too weak. 114589 trivial. 0 not checked. [2019-01-14 19:09:32,232 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:09:32,232 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:09:32,241 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:09:34,875 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2019-01-14 19:09:34,875 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:09:34,894 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:09:36,424 INFO L134 CoverageAnalysis]: Checked inductivity of 163295 backedges. 44563 proven. 3153 refuted. 0 times theorem prover too weak. 115579 trivial. 0 not checked. [2019-01-14 19:09:36,446 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:09:36,447 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 30] total 74 [2019-01-14 19:09:36,448 INFO L459 AbstractCegarLoop]: Interpolant automaton has 74 states [2019-01-14 19:09:36,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2019-01-14 19:09:36,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1055, Invalid=4347, Unknown=0, NotChecked=0, Total=5402 [2019-01-14 19:09:36,450 INFO L87 Difference]: Start difference. First operand 1490 states and 1493 transitions. Second operand 74 states. [2019-01-14 19:09:40,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:09:40,100 INFO L93 Difference]: Finished difference Result 1619 states and 1624 transitions. [2019-01-14 19:09:40,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2019-01-14 19:09:40,102 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 1481 [2019-01-14 19:09:40,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:09:40,107 INFO L225 Difference]: With dead ends: 1619 [2019-01-14 19:09:40,107 INFO L226 Difference]: Without dead ends: 1619 [2019-01-14 19:09:40,111 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1594 GetRequests, 1458 SyntacticMatches, 0 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5705 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=4517, Invalid=14389, Unknown=0, NotChecked=0, Total=18906 [2019-01-14 19:09:40,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1619 states. [2019-01-14 19:09:40,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1619 to 1612. [2019-01-14 19:09:40,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1612 states. [2019-01-14 19:09:40,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1612 states to 1612 states and 1617 transitions. [2019-01-14 19:09:40,125 INFO L78 Accepts]: Start accepts. Automaton has 1612 states and 1617 transitions. Word has length 1481 [2019-01-14 19:09:40,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:09:40,126 INFO L480 AbstractCegarLoop]: Abstraction has 1612 states and 1617 transitions. [2019-01-14 19:09:40,126 INFO L481 AbstractCegarLoop]: Interpolant automaton has 74 states. [2019-01-14 19:09:40,126 INFO L276 IsEmpty]: Start isEmpty. Operand 1612 states and 1617 transitions. [2019-01-14 19:09:40,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1487 [2019-01-14 19:09:40,141 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:09:40,141 INFO L402 BasicCegarLoop]: trace histogram [252, 251, 251, 251, 251, 21, 21, 21, 20, 20, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:09:40,142 INFO L423 AbstractCegarLoop]: === Iteration 57 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:09:40,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:09:40,142 INFO L82 PathProgramCache]: Analyzing trace with hash 9778855, now seen corresponding path program 43 times [2019-01-14 19:09:40,142 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:09:40,143 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:09:40,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:40,143 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:09:40,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:40,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:09:41,367 INFO L134 CoverageAnalysis]: Checked inductivity of 164567 backedges. 25151 proven. 1201 refuted. 0 times theorem prover too weak. 138215 trivial. 0 not checked. [2019-01-14 19:09:41,367 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:09:41,367 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:09:41,378 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:09:41,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:09:41,883 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:09:43,031 INFO L134 CoverageAnalysis]: Checked inductivity of 164567 backedges. 25050 proven. 1092 refuted. 0 times theorem prover too weak. 138425 trivial. 0 not checked. [2019-01-14 19:09:43,051 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:09:43,052 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 23] total 49 [2019-01-14 19:09:43,053 INFO L459 AbstractCegarLoop]: Interpolant automaton has 50 states [2019-01-14 19:09:43,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2019-01-14 19:09:43,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=331, Invalid=2119, Unknown=0, NotChecked=0, Total=2450 [2019-01-14 19:09:43,054 INFO L87 Difference]: Start difference. First operand 1612 states and 1617 transitions. Second operand 50 states. [2019-01-14 19:09:46,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:09:46,614 INFO L93 Difference]: Finished difference Result 1878 states and 1889 transitions. [2019-01-14 19:09:46,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2019-01-14 19:09:46,616 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 1486 [2019-01-14 19:09:46,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:09:46,621 INFO L225 Difference]: With dead ends: 1878 [2019-01-14 19:09:46,621 INFO L226 Difference]: Without dead ends: 1878 [2019-01-14 19:09:46,622 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1538 GetRequests, 1464 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 952 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=577, Invalid=5123, Unknown=0, NotChecked=0, Total=5700 [2019-01-14 19:09:46,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1878 states. [2019-01-14 19:09:46,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1878 to 1852. [2019-01-14 19:09:46,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1852 states. [2019-01-14 19:09:46,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1852 states to 1852 states and 1862 transitions. [2019-01-14 19:09:46,636 INFO L78 Accepts]: Start accepts. Automaton has 1852 states and 1862 transitions. Word has length 1486 [2019-01-14 19:09:46,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:09:46,637 INFO L480 AbstractCegarLoop]: Abstraction has 1852 states and 1862 transitions. [2019-01-14 19:09:46,637 INFO L481 AbstractCegarLoop]: Interpolant automaton has 50 states. [2019-01-14 19:09:46,637 INFO L276 IsEmpty]: Start isEmpty. Operand 1852 states and 1862 transitions. [2019-01-14 19:09:46,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1603 [2019-01-14 19:09:46,653 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:09:46,654 INFO L402 BasicCegarLoop]: trace histogram [273, 272, 272, 272, 272, 22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:09:46,654 INFO L423 AbstractCegarLoop]: === Iteration 58 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:09:46,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:09:46,655 INFO L82 PathProgramCache]: Analyzing trace with hash 1962499760, now seen corresponding path program 44 times [2019-01-14 19:09:46,655 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:09:46,655 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:09:46,655 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:46,656 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:09:46,656 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:46,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:09:48,739 INFO L134 CoverageAnalysis]: Checked inductivity of 192930 backedges. 49214 proven. 5407 refuted. 0 times theorem prover too weak. 138309 trivial. 0 not checked. [2019-01-14 19:09:48,739 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:09:48,740 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:09:48,750 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:09:49,285 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:09:49,285 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:09:49,304 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:09:51,656 INFO L134 CoverageAnalysis]: Checked inductivity of 192930 backedges. 73783 proven. 970 refuted. 0 times theorem prover too weak. 118177 trivial. 0 not checked. [2019-01-14 19:09:51,676 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:09:51,677 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 44] total 93 [2019-01-14 19:09:51,678 INFO L459 AbstractCegarLoop]: Interpolant automaton has 93 states [2019-01-14 19:09:51,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2019-01-14 19:09:51,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1301, Invalid=7255, Unknown=0, NotChecked=0, Total=8556 [2019-01-14 19:09:51,680 INFO L87 Difference]: Start difference. First operand 1852 states and 1862 transitions. Second operand 93 states. [2019-01-14 19:09:57,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:09:57,008 INFO L93 Difference]: Finished difference Result 1629 states and 1632 transitions. [2019-01-14 19:09:57,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 111 states. [2019-01-14 19:09:57,010 INFO L78 Accepts]: Start accepts. Automaton has 93 states. Word has length 1602 [2019-01-14 19:09:57,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:09:57,015 INFO L225 Difference]: With dead ends: 1629 [2019-01-14 19:09:57,015 INFO L226 Difference]: Without dead ends: 1620 [2019-01-14 19:09:57,017 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1737 GetRequests, 1562 SyntacticMatches, 0 SemanticMatches, 175 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9854 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=4707, Invalid=26445, Unknown=0, NotChecked=0, Total=31152 [2019-01-14 19:09:57,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1620 states. [2019-01-14 19:09:57,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1620 to 1616. [2019-01-14 19:09:57,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1616 states. [2019-01-14 19:09:57,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1616 states to 1616 states and 1619 transitions. [2019-01-14 19:09:57,035 INFO L78 Accepts]: Start accepts. Automaton has 1616 states and 1619 transitions. Word has length 1602 [2019-01-14 19:09:57,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:09:57,038 INFO L480 AbstractCegarLoop]: Abstraction has 1616 states and 1619 transitions. [2019-01-14 19:09:57,038 INFO L481 AbstractCegarLoop]: Interpolant automaton has 93 states. [2019-01-14 19:09:57,038 INFO L276 IsEmpty]: Start isEmpty. Operand 1616 states and 1619 transitions. [2019-01-14 19:09:57,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1608 [2019-01-14 19:09:57,057 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:09:57,058 INFO L402 BasicCegarLoop]: trace histogram [274, 273, 273, 273, 273, 22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:09:57,058 INFO L423 AbstractCegarLoop]: === Iteration 59 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:09:57,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:09:57,059 INFO L82 PathProgramCache]: Analyzing trace with hash -1747254261, now seen corresponding path program 45 times [2019-01-14 19:09:57,059 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:09:57,059 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:09:57,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:57,060 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:09:57,060 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:09:57,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:09:59,215 INFO L134 CoverageAnalysis]: Checked inductivity of 194313 backedges. 52420 proven. 3468 refuted. 0 times theorem prover too weak. 138425 trivial. 0 not checked. [2019-01-14 19:09:59,215 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:09:59,215 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:09:59,230 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:10:00,270 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2019-01-14 19:10:00,270 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:10:00,286 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:10:01,843 INFO L134 CoverageAnalysis]: Checked inductivity of 194313 backedges. 28595 proven. 1199 refuted. 0 times theorem prover too weak. 164519 trivial. 0 not checked. [2019-01-14 19:10:01,863 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:10:01,864 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 25] total 76 [2019-01-14 19:10:01,865 INFO L459 AbstractCegarLoop]: Interpolant automaton has 76 states [2019-01-14 19:10:01,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2019-01-14 19:10:01,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=890, Invalid=4810, Unknown=0, NotChecked=0, Total=5700 [2019-01-14 19:10:01,866 INFO L87 Difference]: Start difference. First operand 1616 states and 1619 transitions. Second operand 76 states. [2019-01-14 19:10:06,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:10:06,528 INFO L93 Difference]: Finished difference Result 1758 states and 1764 transitions. [2019-01-14 19:10:06,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2019-01-14 19:10:06,530 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 1607 [2019-01-14 19:10:06,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:10:06,535 INFO L225 Difference]: With dead ends: 1758 [2019-01-14 19:10:06,535 INFO L226 Difference]: Without dead ends: 1758 [2019-01-14 19:10:06,537 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1726 GetRequests, 1584 SyntacticMatches, 0 SemanticMatches, 142 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4961 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=4695, Invalid=15897, Unknown=0, NotChecked=0, Total=20592 [2019-01-14 19:10:06,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1758 states. [2019-01-14 19:10:06,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1758 to 1748. [2019-01-14 19:10:06,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1748 states. [2019-01-14 19:10:06,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1748 states to 1748 states and 1754 transitions. [2019-01-14 19:10:06,550 INFO L78 Accepts]: Start accepts. Automaton has 1748 states and 1754 transitions. Word has length 1607 [2019-01-14 19:10:06,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:10:06,551 INFO L480 AbstractCegarLoop]: Abstraction has 1748 states and 1754 transitions. [2019-01-14 19:10:06,551 INFO L481 AbstractCegarLoop]: Interpolant automaton has 76 states. [2019-01-14 19:10:06,551 INFO L276 IsEmpty]: Start isEmpty. Operand 1748 states and 1754 transitions. [2019-01-14 19:10:06,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1618 [2019-01-14 19:10:06,567 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:10:06,568 INFO L402 BasicCegarLoop]: trace histogram [276, 275, 275, 275, 275, 22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:10:06,568 INFO L423 AbstractCegarLoop]: === Iteration 60 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:10:06,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:10:06,569 INFO L82 PathProgramCache]: Analyzing trace with hash -1712352251, now seen corresponding path program 46 times [2019-01-14 19:10:06,569 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:10:06,569 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:10:06,570 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:06,570 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:10:06,570 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:06,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:10:08,535 INFO L134 CoverageAnalysis]: Checked inductivity of 197094 backedges. 31275 proven. 1347 refuted. 0 times theorem prover too weak. 164472 trivial. 0 not checked. [2019-01-14 19:10:08,535 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:10:08,535 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:10:08,545 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:10:09,016 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:10:09,016 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:10:09,036 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:10:11,489 INFO L134 CoverageAnalysis]: Checked inductivity of 197094 backedges. 31106 proven. 4393 refuted. 0 times theorem prover too weak. 161595 trivial. 0 not checked. [2019-01-14 19:10:11,509 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:10:11,509 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 53] total 79 [2019-01-14 19:10:11,510 INFO L459 AbstractCegarLoop]: Interpolant automaton has 79 states [2019-01-14 19:10:11,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2019-01-14 19:10:11,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1288, Invalid=4874, Unknown=0, NotChecked=0, Total=6162 [2019-01-14 19:10:11,511 INFO L87 Difference]: Start difference. First operand 1748 states and 1754 transitions. Second operand 79 states. [2019-01-14 19:10:15,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:10:15,474 INFO L93 Difference]: Finished difference Result 2009 states and 2019 transitions. [2019-01-14 19:10:15,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2019-01-14 19:10:15,476 INFO L78 Accepts]: Start accepts. Automaton has 79 states. Word has length 1617 [2019-01-14 19:10:15,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:10:15,481 INFO L225 Difference]: With dead ends: 2009 [2019-01-14 19:10:15,482 INFO L226 Difference]: Without dead ends: 2009 [2019-01-14 19:10:15,485 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1713 GetRequests, 1589 SyntacticMatches, 0 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2948 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=3549, Invalid=12201, Unknown=0, NotChecked=0, Total=15750 [2019-01-14 19:10:15,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2009 states. [2019-01-14 19:10:15,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2009 to 1998. [2019-01-14 19:10:15,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1998 states. [2019-01-14 19:10:15,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1998 states to 1998 states and 2008 transitions. [2019-01-14 19:10:15,508 INFO L78 Accepts]: Start accepts. Automaton has 1998 states and 2008 transitions. Word has length 1617 [2019-01-14 19:10:15,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:10:15,510 INFO L480 AbstractCegarLoop]: Abstraction has 1998 states and 2008 transitions. [2019-01-14 19:10:15,510 INFO L481 AbstractCegarLoop]: Interpolant automaton has 79 states. [2019-01-14 19:10:15,510 INFO L276 IsEmpty]: Start isEmpty. Operand 1998 states and 2008 transitions. [2019-01-14 19:10:15,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1734 [2019-01-14 19:10:15,540 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:10:15,541 INFO L402 BasicCegarLoop]: trace histogram [297, 296, 296, 296, 296, 23, 23, 23, 22, 22, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:10:15,542 INFO L423 AbstractCegarLoop]: === Iteration 61 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:10:15,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:10:15,545 INFO L82 PathProgramCache]: Analyzing trace with hash -1388841432, now seen corresponding path program 47 times [2019-01-14 19:10:15,545 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:10:15,545 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:10:15,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:15,546 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:10:15,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:15,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:10:18,035 INFO L134 CoverageAnalysis]: Checked inductivity of 228033 backedges. 56421 proven. 5939 refuted. 0 times theorem prover too weak. 165673 trivial. 0 not checked. [2019-01-14 19:10:18,035 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:10:18,035 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:10:18,046 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:10:23,473 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 49 check-sat command(s) [2019-01-14 19:10:23,473 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:10:23,508 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:10:26,645 INFO L134 CoverageAnalysis]: Checked inductivity of 228033 backedges. 84304 proven. 6313 refuted. 0 times theorem prover too weak. 137416 trivial. 0 not checked. [2019-01-14 19:10:26,672 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:10:26,673 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 50] total 101 [2019-01-14 19:10:26,674 INFO L459 AbstractCegarLoop]: Interpolant automaton has 101 states [2019-01-14 19:10:26,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2019-01-14 19:10:26,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1396, Invalid=8704, Unknown=0, NotChecked=0, Total=10100 [2019-01-14 19:10:26,675 INFO L87 Difference]: Start difference. First operand 1998 states and 2008 transitions. Second operand 101 states. [2019-01-14 19:10:33,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:10:33,443 INFO L93 Difference]: Finished difference Result 1760 states and 1763 transitions. [2019-01-14 19:10:33,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 121 states. [2019-01-14 19:10:33,445 INFO L78 Accepts]: Start accepts. Automaton has 101 states. Word has length 1733 [2019-01-14 19:10:33,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:10:33,450 INFO L225 Difference]: With dead ends: 1760 [2019-01-14 19:10:33,450 INFO L226 Difference]: Without dead ends: 1751 [2019-01-14 19:10:33,456 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1900 GetRequests, 1688 SyntacticMatches, 0 SemanticMatches, 212 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15151 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=6669, Invalid=38913, Unknown=0, NotChecked=0, Total=45582 [2019-01-14 19:10:33,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1751 states. [2019-01-14 19:10:33,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1751 to 1747. [2019-01-14 19:10:33,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1747 states. [2019-01-14 19:10:33,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1747 states to 1747 states and 1750 transitions. [2019-01-14 19:10:33,474 INFO L78 Accepts]: Start accepts. Automaton has 1747 states and 1750 transitions. Word has length 1733 [2019-01-14 19:10:33,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:10:33,479 INFO L480 AbstractCegarLoop]: Abstraction has 1747 states and 1750 transitions. [2019-01-14 19:10:33,479 INFO L481 AbstractCegarLoop]: Interpolant automaton has 101 states. [2019-01-14 19:10:33,479 INFO L276 IsEmpty]: Start isEmpty. Operand 1747 states and 1750 transitions. [2019-01-14 19:10:33,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1739 [2019-01-14 19:10:33,507 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:10:33,508 INFO L402 BasicCegarLoop]: trace histogram [298, 297, 297, 297, 297, 23, 23, 23, 22, 22, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:10:33,508 INFO L423 AbstractCegarLoop]: === Iteration 62 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:10:33,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:10:33,509 INFO L82 PathProgramCache]: Analyzing trace with hash -1675122425, now seen corresponding path program 48 times [2019-01-14 19:10:33,509 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:10:33,509 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:10:33,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:33,516 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:10:33,516 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:33,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:10:36,036 INFO L134 CoverageAnalysis]: Checked inductivity of 229537 backedges. 59944 proven. 3798 refuted. 0 times theorem prover too weak. 165795 trivial. 0 not checked. [2019-01-14 19:10:36,037 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:10:36,037 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:10:36,047 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:10:40,860 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 47 check-sat command(s) [2019-01-14 19:10:40,860 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:10:40,886 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:10:42,604 INFO L134 CoverageAnalysis]: Checked inductivity of 229537 backedges. 32586 proven. 1311 refuted. 0 times theorem prover too weak. 195640 trivial. 0 not checked. [2019-01-14 19:10:42,628 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:10:42,629 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 26] total 79 [2019-01-14 19:10:42,630 INFO L459 AbstractCegarLoop]: Interpolant automaton has 79 states [2019-01-14 19:10:42,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2019-01-14 19:10:42,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=964, Invalid=5198, Unknown=0, NotChecked=0, Total=6162 [2019-01-14 19:10:42,631 INFO L87 Difference]: Start difference. First operand 1747 states and 1750 transitions. Second operand 79 states. [2019-01-14 19:10:47,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:10:47,249 INFO L93 Difference]: Finished difference Result 1894 states and 1900 transitions. [2019-01-14 19:10:47,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2019-01-14 19:10:47,251 INFO L78 Accepts]: Start accepts. Automaton has 79 states. Word has length 1738 [2019-01-14 19:10:47,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:10:47,257 INFO L225 Difference]: With dead ends: 1894 [2019-01-14 19:10:47,257 INFO L226 Difference]: Without dead ends: 1894 [2019-01-14 19:10:47,260 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1862 GetRequests, 1714 SyntacticMatches, 0 SemanticMatches, 148 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5405 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=5102, Invalid=17248, Unknown=0, NotChecked=0, Total=22350 [2019-01-14 19:10:47,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1894 states. [2019-01-14 19:10:47,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1894 to 1884. [2019-01-14 19:10:47,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1884 states. [2019-01-14 19:10:47,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1884 states to 1884 states and 1890 transitions. [2019-01-14 19:10:47,282 INFO L78 Accepts]: Start accepts. Automaton has 1884 states and 1890 transitions. Word has length 1738 [2019-01-14 19:10:47,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:10:47,283 INFO L480 AbstractCegarLoop]: Abstraction has 1884 states and 1890 transitions. [2019-01-14 19:10:47,283 INFO L481 AbstractCegarLoop]: Interpolant automaton has 79 states. [2019-01-14 19:10:47,283 INFO L276 IsEmpty]: Start isEmpty. Operand 1884 states and 1890 transitions. [2019-01-14 19:10:47,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1749 [2019-01-14 19:10:47,314 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:10:47,315 INFO L402 BasicCegarLoop]: trace histogram [300, 299, 299, 299, 299, 23, 23, 23, 22, 22, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:10:47,316 INFO L423 AbstractCegarLoop]: === Iteration 63 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:10:47,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:10:47,319 INFO L82 PathProgramCache]: Analyzing trace with hash 1749257613, now seen corresponding path program 49 times [2019-01-14 19:10:47,319 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:10:47,319 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:10:47,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:47,320 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:10:47,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:47,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:10:49,532 INFO L134 CoverageAnalysis]: Checked inductivity of 232560 backedges. 35503 proven. 1477 refuted. 0 times theorem prover too weak. 195580 trivial. 0 not checked. [2019-01-14 19:10:49,532 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:10:49,532 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:10:49,542 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:10:50,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:10:50,126 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:10:52,560 INFO L134 CoverageAnalysis]: Checked inductivity of 232560 backedges. 35550 proven. 1430 refuted. 0 times theorem prover too weak. 195580 trivial. 0 not checked. [2019-01-14 19:10:52,580 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:10:52,581 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 51] total 78 [2019-01-14 19:10:52,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 78 states [2019-01-14 19:10:52,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2019-01-14 19:10:52,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1379, Invalid=4627, Unknown=0, NotChecked=0, Total=6006 [2019-01-14 19:10:52,583 INFO L87 Difference]: Start difference. First operand 1884 states and 1890 transitions. Second operand 78 states. [2019-01-14 19:10:55,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:10:55,938 INFO L93 Difference]: Finished difference Result 2155 states and 2165 transitions. [2019-01-14 19:10:55,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2019-01-14 19:10:55,940 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 1748 [2019-01-14 19:10:55,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:10:55,946 INFO L225 Difference]: With dead ends: 2155 [2019-01-14 19:10:55,947 INFO L226 Difference]: Without dead ends: 2155 [2019-01-14 19:10:55,950 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1846 GetRequests, 1723 SyntacticMatches, 0 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2621 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=3914, Invalid=11586, Unknown=0, NotChecked=0, Total=15500 [2019-01-14 19:10:55,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2155 states. [2019-01-14 19:10:55,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2155 to 2144. [2019-01-14 19:10:55,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2144 states. [2019-01-14 19:10:55,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2144 states to 2144 states and 2154 transitions. [2019-01-14 19:10:55,975 INFO L78 Accepts]: Start accepts. Automaton has 2144 states and 2154 transitions. Word has length 1748 [2019-01-14 19:10:55,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:10:55,976 INFO L480 AbstractCegarLoop]: Abstraction has 2144 states and 2154 transitions. [2019-01-14 19:10:55,976 INFO L481 AbstractCegarLoop]: Interpolant automaton has 78 states. [2019-01-14 19:10:55,976 INFO L276 IsEmpty]: Start isEmpty. Operand 2144 states and 2154 transitions. [2019-01-14 19:10:56,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1870 [2019-01-14 19:10:56,013 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:10:56,014 INFO L402 BasicCegarLoop]: trace histogram [322, 321, 321, 321, 321, 24, 24, 24, 23, 23, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:10:56,014 INFO L423 AbstractCegarLoop]: === Iteration 64 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:10:56,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:10:56,018 INFO L82 PathProgramCache]: Analyzing trace with hash -299998901, now seen corresponding path program 50 times [2019-01-14 19:10:56,018 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:10:56,018 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:10:56,019 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:56,019 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:10:56,019 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:10:56,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:10:58,776 INFO L134 CoverageAnalysis]: Checked inductivity of 267700 backedges. 64300 proven. 6496 refuted. 0 times theorem prover too weak. 196904 trivial. 0 not checked. [2019-01-14 19:10:58,776 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:10:58,776 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:10:58,787 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:10:59,412 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:10:59,412 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:10:59,436 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:11:02,566 INFO L134 CoverageAnalysis]: Checked inductivity of 267700 backedges. 96476 proven. 1177 refuted. 0 times theorem prover too weak. 170047 trivial. 0 not checked. [2019-01-14 19:11:02,587 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:11:02,588 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 48] total 101 [2019-01-14 19:11:02,589 INFO L459 AbstractCegarLoop]: Interpolant automaton has 101 states [2019-01-14 19:11:02,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2019-01-14 19:11:02,590 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1538, Invalid=8562, Unknown=0, NotChecked=0, Total=10100 [2019-01-14 19:11:02,590 INFO L87 Difference]: Start difference. First operand 2144 states and 2154 transitions. Second operand 101 states. [2019-01-14 19:11:08,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:11:08,507 INFO L93 Difference]: Finished difference Result 1896 states and 1899 transitions. [2019-01-14 19:11:08,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 121 states. [2019-01-14 19:11:08,508 INFO L78 Accepts]: Start accepts. Automaton has 101 states. Word has length 1869 [2019-01-14 19:11:08,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:11:08,514 INFO L225 Difference]: With dead ends: 1896 [2019-01-14 19:11:08,514 INFO L226 Difference]: Without dead ends: 1887 [2019-01-14 19:11:08,520 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2016 GetRequests, 1825 SyntacticMatches, 0 SemanticMatches, 191 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11806 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=5588, Invalid=31468, Unknown=0, NotChecked=0, Total=37056 [2019-01-14 19:11:08,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1887 states. [2019-01-14 19:11:08,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1887 to 1883. [2019-01-14 19:11:08,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1883 states. [2019-01-14 19:11:08,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1883 states to 1883 states and 1886 transitions. [2019-01-14 19:11:08,540 INFO L78 Accepts]: Start accepts. Automaton has 1883 states and 1886 transitions. Word has length 1869 [2019-01-14 19:11:08,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:11:08,541 INFO L480 AbstractCegarLoop]: Abstraction has 1883 states and 1886 transitions. [2019-01-14 19:11:08,541 INFO L481 AbstractCegarLoop]: Interpolant automaton has 101 states. [2019-01-14 19:11:08,542 INFO L276 IsEmpty]: Start isEmpty. Operand 1883 states and 1886 transitions. [2019-01-14 19:11:08,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1875 [2019-01-14 19:11:08,580 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:11:08,581 INFO L402 BasicCegarLoop]: trace histogram [323, 322, 322, 322, 322, 24, 24, 24, 23, 23, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:11:08,581 INFO L423 AbstractCegarLoop]: === Iteration 65 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:11:08,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:11:08,585 INFO L82 PathProgramCache]: Analyzing trace with hash 754168784, now seen corresponding path program 51 times [2019-01-14 19:11:08,585 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:11:08,585 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:11:08,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:11:08,586 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:11:08,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:11:08,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:11:11,304 INFO L134 CoverageAnalysis]: Checked inductivity of 269330 backedges. 68155 proven. 4143 refuted. 0 times theorem prover too weak. 197032 trivial. 0 not checked. [2019-01-14 19:11:11,304 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:11:11,304 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:11:11,317 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:11:12,471 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 25 check-sat command(s) [2019-01-14 19:11:12,471 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:11:12,490 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:11:14,453 INFO L134 CoverageAnalysis]: Checked inductivity of 269330 backedges. 36931 proven. 1428 refuted. 0 times theorem prover too weak. 230971 trivial. 0 not checked. [2019-01-14 19:11:14,474 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:11:14,475 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 27] total 82 [2019-01-14 19:11:14,476 INFO L459 AbstractCegarLoop]: Interpolant automaton has 82 states [2019-01-14 19:11:14,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 82 interpolants. [2019-01-14 19:11:14,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1041, Invalid=5601, Unknown=0, NotChecked=0, Total=6642 [2019-01-14 19:11:14,477 INFO L87 Difference]: Start difference. First operand 1883 states and 1886 transitions. Second operand 82 states. [2019-01-14 19:11:19,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:11:19,346 INFO L93 Difference]: Finished difference Result 2035 states and 2041 transitions. [2019-01-14 19:11:19,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2019-01-14 19:11:19,348 INFO L78 Accepts]: Start accepts. Automaton has 82 states. Word has length 1874 [2019-01-14 19:11:19,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:11:19,355 INFO L225 Difference]: With dead ends: 2035 [2019-01-14 19:11:19,355 INFO L226 Difference]: Without dead ends: 2035 [2019-01-14 19:11:19,357 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2003 GetRequests, 1849 SyntacticMatches, 0 SemanticMatches, 154 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5868 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=5526, Invalid=18654, Unknown=0, NotChecked=0, Total=24180 [2019-01-14 19:11:19,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2035 states. [2019-01-14 19:11:19,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2035 to 2025. [2019-01-14 19:11:19,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2025 states. [2019-01-14 19:11:19,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2025 states to 2025 states and 2031 transitions. [2019-01-14 19:11:19,374 INFO L78 Accepts]: Start accepts. Automaton has 2025 states and 2031 transitions. Word has length 1874 [2019-01-14 19:11:19,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:11:19,376 INFO L480 AbstractCegarLoop]: Abstraction has 2025 states and 2031 transitions. [2019-01-14 19:11:19,378 INFO L481 AbstractCegarLoop]: Interpolant automaton has 82 states. [2019-01-14 19:11:19,378 INFO L276 IsEmpty]: Start isEmpty. Operand 2025 states and 2031 transitions. [2019-01-14 19:11:19,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1885 [2019-01-14 19:11:19,404 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:11:19,405 INFO L402 BasicCegarLoop]: trace histogram [325, 324, 324, 324, 324, 24, 24, 24, 23, 23, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:11:19,405 INFO L423 AbstractCegarLoop]: === Iteration 66 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:11:19,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:11:19,406 INFO L82 PathProgramCache]: Analyzing trace with hash 1694558474, now seen corresponding path program 52 times [2019-01-14 19:11:19,406 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:11:19,406 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:11:19,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:11:19,407 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:11:19,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:11:19,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:11:21,922 INFO L134 CoverageAnalysis]: Checked inductivity of 272605 backedges. 40095 proven. 1613 refuted. 0 times theorem prover too weak. 230897 trivial. 0 not checked. [2019-01-14 19:11:21,922 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:11:21,922 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:11:21,931 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:11:22,493 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:11:22,493 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:11:22,519 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:11:25,188 INFO L134 CoverageAnalysis]: Checked inductivity of 272605 backedges. 39912 proven. 5202 refuted. 0 times theorem prover too weak. 227491 trivial. 0 not checked. [2019-01-14 19:11:25,208 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:11:25,208 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 57] total 85 [2019-01-14 19:11:25,209 INFO L459 AbstractCegarLoop]: Interpolant automaton has 85 states [2019-01-14 19:11:25,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2019-01-14 19:11:25,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1498, Invalid=5642, Unknown=0, NotChecked=0, Total=7140 [2019-01-14 19:11:25,210 INFO L87 Difference]: Start difference. First operand 2025 states and 2031 transitions. Second operand 85 states. [2019-01-14 19:11:29,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:11:29,217 INFO L93 Difference]: Finished difference Result 2306 states and 2316 transitions. [2019-01-14 19:11:29,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2019-01-14 19:11:29,219 INFO L78 Accepts]: Start accepts. Automaton has 85 states. Word has length 1884 [2019-01-14 19:11:29,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:11:29,224 INFO L225 Difference]: With dead ends: 2306 [2019-01-14 19:11:29,224 INFO L226 Difference]: Without dead ends: 2306 [2019-01-14 19:11:29,229 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1988 GetRequests, 1854 SyntacticMatches, 0 SemanticMatches, 134 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3431 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=4153, Invalid=14207, Unknown=0, NotChecked=0, Total=18360 [2019-01-14 19:11:29,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2306 states. [2019-01-14 19:11:29,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2306 to 2295. [2019-01-14 19:11:29,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2295 states. [2019-01-14 19:11:29,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2295 states to 2295 states and 2305 transitions. [2019-01-14 19:11:29,252 INFO L78 Accepts]: Start accepts. Automaton has 2295 states and 2305 transitions. Word has length 1884 [2019-01-14 19:11:29,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:11:29,253 INFO L480 AbstractCegarLoop]: Abstraction has 2295 states and 2305 transitions. [2019-01-14 19:11:29,253 INFO L481 AbstractCegarLoop]: Interpolant automaton has 85 states. [2019-01-14 19:11:29,253 INFO L276 IsEmpty]: Start isEmpty. Operand 2295 states and 2305 transitions. [2019-01-14 19:11:29,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2011 [2019-01-14 19:11:29,286 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:11:29,287 INFO L402 BasicCegarLoop]: trace histogram [348, 347, 347, 347, 347, 25, 25, 25, 24, 24, 24, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:11:29,287 INFO L423 AbstractCegarLoop]: === Iteration 67 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:11:29,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:11:29,288 INFO L82 PathProgramCache]: Analyzing trace with hash -455283635, now seen corresponding path program 53 times [2019-01-14 19:11:29,288 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:11:29,288 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:11:29,289 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:11:29,289 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:11:29,289 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:11:29,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:11:32,250 INFO L134 CoverageAnalysis]: Checked inductivity of 312309 backedges. 72881 proven. 7078 refuted. 0 times theorem prover too weak. 232350 trivial. 0 not checked. [2019-01-14 19:11:32,250 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:11:32,250 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:11:32,263 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:11:58,837 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 52 check-sat command(s) [2019-01-14 19:11:58,837 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:11:58,891 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:12:02,367 INFO L134 CoverageAnalysis]: Checked inductivity of 312309 backedges. 109022 proven. 7533 refuted. 0 times theorem prover too weak. 195754 trivial. 0 not checked. [2019-01-14 19:12:02,399 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:12:02,400 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 54] total 109 [2019-01-14 19:12:02,401 INFO L459 AbstractCegarLoop]: Interpolant automaton has 109 states [2019-01-14 19:12:02,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 109 interpolants. [2019-01-14 19:12:02,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1639, Invalid=10133, Unknown=0, NotChecked=0, Total=11772 [2019-01-14 19:12:02,402 INFO L87 Difference]: Start difference. First operand 2295 states and 2305 transitions. Second operand 109 states. [2019-01-14 19:12:10,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:12:10,729 INFO L93 Difference]: Finished difference Result 2037 states and 2040 transitions. [2019-01-14 19:12:10,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 131 states. [2019-01-14 19:12:10,732 INFO L78 Accepts]: Start accepts. Automaton has 109 states. Word has length 2010 [2019-01-14 19:12:10,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:12:10,737 INFO L225 Difference]: With dead ends: 2037 [2019-01-14 19:12:10,737 INFO L226 Difference]: Without dead ends: 2028 [2019-01-14 19:12:10,742 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2191 GetRequests, 1961 SyntacticMatches, 0 SemanticMatches, 230 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17950 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=7839, Invalid=45753, Unknown=0, NotChecked=0, Total=53592 [2019-01-14 19:12:10,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2028 states. [2019-01-14 19:12:10,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2028 to 2024. [2019-01-14 19:12:10,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2024 states. [2019-01-14 19:12:10,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2024 states to 2024 states and 2027 transitions. [2019-01-14 19:12:10,755 INFO L78 Accepts]: Start accepts. Automaton has 2024 states and 2027 transitions. Word has length 2010 [2019-01-14 19:12:10,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:12:10,757 INFO L480 AbstractCegarLoop]: Abstraction has 2024 states and 2027 transitions. [2019-01-14 19:12:10,758 INFO L481 AbstractCegarLoop]: Interpolant automaton has 109 states. [2019-01-14 19:12:10,759 INFO L276 IsEmpty]: Start isEmpty. Operand 2024 states and 2027 transitions. [2019-01-14 19:12:10,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2016 [2019-01-14 19:12:10,783 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:12:10,784 INFO L402 BasicCegarLoop]: trace histogram [349, 348, 348, 348, 348, 25, 25, 25, 24, 24, 24, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:12:10,784 INFO L423 AbstractCegarLoop]: === Iteration 68 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:12:10,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:12:10,785 INFO L82 PathProgramCache]: Analyzing trace with hash -2048382334, now seen corresponding path program 54 times [2019-01-14 19:12:10,785 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:12:10,785 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:12:10,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:12:10,786 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:12:10,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:12:10,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:12:14,028 INFO L134 CoverageAnalysis]: Checked inductivity of 314070 backedges. 77083 proven. 4503 refuted. 0 times theorem prover too weak. 232484 trivial. 0 not checked. [2019-01-14 19:12:14,028 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:12:14,028 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:12:14,037 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:12:26,177 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2019-01-14 19:12:26,177 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:12:26,212 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:12:28,529 INFO L134 CoverageAnalysis]: Checked inductivity of 314070 backedges. 41766 proven. 1729 refuted. 0 times theorem prover too weak. 270575 trivial. 0 not checked. [2019-01-14 19:12:28,555 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:12:28,555 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 31] total 86 [2019-01-14 19:12:28,557 INFO L459 AbstractCegarLoop]: Interpolant automaton has 86 states [2019-01-14 19:12:28,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2019-01-14 19:12:28,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1102, Invalid=6208, Unknown=0, NotChecked=0, Total=7310 [2019-01-14 19:12:28,558 INFO L87 Difference]: Start difference. First operand 2024 states and 2027 transitions. Second operand 86 states. [2019-01-14 19:12:37,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:12:37,368 INFO L93 Difference]: Finished difference Result 2320 states and 2326 transitions. [2019-01-14 19:12:37,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 227 states. [2019-01-14 19:12:37,370 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 2015 [2019-01-14 19:12:37,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:12:37,374 INFO L225 Difference]: With dead ends: 2320 [2019-01-14 19:12:37,374 INFO L226 Difference]: Without dead ends: 2320 [2019-01-14 19:12:37,380 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2244 GetRequests, 1988 SyntacticMatches, 0 SemanticMatches, 256 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22873 ImplicationChecksByTransitivity, 7.9s TimeCoverageRelationStatistics Valid=8984, Invalid=57322, Unknown=0, NotChecked=0, Total=66306 [2019-01-14 19:12:37,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2320 states. [2019-01-14 19:12:37,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2320 to 2174. [2019-01-14 19:12:37,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2174 states. [2019-01-14 19:12:37,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2174 states to 2174 states and 2179 transitions. [2019-01-14 19:12:37,395 INFO L78 Accepts]: Start accepts. Automaton has 2174 states and 2179 transitions. Word has length 2015 [2019-01-14 19:12:37,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:12:37,397 INFO L480 AbstractCegarLoop]: Abstraction has 2174 states and 2179 transitions. [2019-01-14 19:12:37,397 INFO L481 AbstractCegarLoop]: Interpolant automaton has 86 states. [2019-01-14 19:12:37,397 INFO L276 IsEmpty]: Start isEmpty. Operand 2174 states and 2179 transitions. [2019-01-14 19:12:37,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2157 [2019-01-14 19:12:37,422 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:12:37,423 INFO L402 BasicCegarLoop]: trace histogram [375, 374, 374, 374, 374, 26, 26, 26, 25, 25, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:12:37,424 INFO L423 AbstractCegarLoop]: === Iteration 69 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:12:37,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:12:37,424 INFO L82 PathProgramCache]: Analyzing trace with hash 2112342276, now seen corresponding path program 55 times [2019-01-14 19:12:37,425 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:12:37,425 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:12:37,425 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:12:37,425 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:12:37,426 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:12:37,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:12:40,862 INFO L134 CoverageAnalysis]: Checked inductivity of 362253 backedges. 88087 proven. 5493 refuted. 0 times theorem prover too weak. 268673 trivial. 0 not checked. [2019-01-14 19:12:40,862 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:12:40,862 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:12:40,872 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:12:41,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:12:41,596 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:12:44,135 INFO L134 CoverageAnalysis]: Checked inductivity of 362253 backedges. 88368 proven. 1525 refuted. 0 times theorem prover too weak. 272360 trivial. 0 not checked. [2019-01-14 19:12:44,156 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:12:44,157 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 54] total 84 [2019-01-14 19:12:44,158 INFO L459 AbstractCegarLoop]: Interpolant automaton has 84 states [2019-01-14 19:12:44,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2019-01-14 19:12:44,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1492, Invalid=5480, Unknown=0, NotChecked=0, Total=6972 [2019-01-14 19:12:44,159 INFO L87 Difference]: Start difference. First operand 2174 states and 2179 transitions. Second operand 84 states. [2019-01-14 19:12:48,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:12:48,443 INFO L93 Difference]: Finished difference Result 2194 states and 2196 transitions. [2019-01-14 19:12:48,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 79 states. [2019-01-14 19:12:48,445 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 2156 [2019-01-14 19:12:48,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:12:48,450 INFO L225 Difference]: With dead ends: 2194 [2019-01-14 19:12:48,451 INFO L226 Difference]: Without dead ends: 2173 [2019-01-14 19:12:48,453 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2265 GetRequests, 2132 SyntacticMatches, 0 SemanticMatches, 133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6097 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=4048, Invalid=14042, Unknown=0, NotChecked=0, Total=18090 [2019-01-14 19:12:48,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2173 states. [2019-01-14 19:12:48,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2173 to 2170. [2019-01-14 19:12:48,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2170 states. [2019-01-14 19:12:48,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2170 states to 2170 states and 2171 transitions. [2019-01-14 19:12:48,474 INFO L78 Accepts]: Start accepts. Automaton has 2170 states and 2171 transitions. Word has length 2156 [2019-01-14 19:12:48,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:12:48,475 INFO L480 AbstractCegarLoop]: Abstraction has 2170 states and 2171 transitions. [2019-01-14 19:12:48,475 INFO L481 AbstractCegarLoop]: Interpolant automaton has 84 states. [2019-01-14 19:12:48,475 INFO L276 IsEmpty]: Start isEmpty. Operand 2170 states and 2171 transitions. [2019-01-14 19:12:48,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2167 [2019-01-14 19:12:48,501 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:12:48,502 INFO L402 BasicCegarLoop]: trace histogram [377, 376, 376, 376, 376, 26, 26, 26, 25, 25, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:12:48,503 INFO L423 AbstractCegarLoop]: === Iteration 70 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:12:48,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:12:48,503 INFO L82 PathProgramCache]: Analyzing trace with hash -1713476150, now seen corresponding path program 56 times [2019-01-14 19:12:48,503 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:12:48,504 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:12:48,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:12:48,504 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:12:48,504 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:12:48,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:12:50,831 INFO L134 CoverageAnalysis]: Checked inductivity of 366052 backedges. 47123 proven. 1876 refuted. 0 times theorem prover too weak. 317053 trivial. 0 not checked. [2019-01-14 19:12:50,831 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:12:50,831 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:12:50,846 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:12:51,578 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:12:51,578 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:12:51,606 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:12:53,731 INFO L134 CoverageAnalysis]: Checked inductivity of 366052 backedges. 46875 proven. 1677 refuted. 0 times theorem prover too weak. 317500 trivial. 0 not checked. [2019-01-14 19:12:53,753 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:12:53,754 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 28] total 60 [2019-01-14 19:12:53,755 INFO L459 AbstractCegarLoop]: Interpolant automaton has 61 states [2019-01-14 19:12:53,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2019-01-14 19:12:53,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=475, Invalid=3185, Unknown=0, NotChecked=0, Total=3660 [2019-01-14 19:12:53,756 INFO L87 Difference]: Start difference. First operand 2170 states and 2171 transitions. Second operand 61 states. [2019-01-14 19:13:00,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:13:00,185 INFO L93 Difference]: Finished difference Result 2338 states and 2342 transitions. [2019-01-14 19:13:00,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2019-01-14 19:13:00,188 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 2166 [2019-01-14 19:13:00,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:13:00,194 INFO L225 Difference]: With dead ends: 2338 [2019-01-14 19:13:00,194 INFO L226 Difference]: Without dead ends: 2338 [2019-01-14 19:13:00,195 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2228 GetRequests, 2139 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1419 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=788, Invalid=7402, Unknown=0, NotChecked=0, Total=8190 [2019-01-14 19:13:00,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2338 states. [2019-01-14 19:13:00,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2338 to 2316. [2019-01-14 19:13:00,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2316 states. [2019-01-14 19:13:00,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2316 states to 2316 states and 2319 transitions. [2019-01-14 19:13:00,212 INFO L78 Accepts]: Start accepts. Automaton has 2316 states and 2319 transitions. Word has length 2166 [2019-01-14 19:13:00,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:13:00,213 INFO L480 AbstractCegarLoop]: Abstraction has 2316 states and 2319 transitions. [2019-01-14 19:13:00,213 INFO L481 AbstractCegarLoop]: Interpolant automaton has 61 states. [2019-01-14 19:13:00,213 INFO L276 IsEmpty]: Start isEmpty. Operand 2316 states and 2319 transitions. [2019-01-14 19:13:00,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2313 [2019-01-14 19:13:00,244 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:13:00,245 INFO L402 BasicCegarLoop]: trace histogram [404, 403, 403, 403, 403, 27, 27, 27, 26, 26, 26, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:13:00,245 INFO L423 AbstractCegarLoop]: === Iteration 71 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:13:00,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:13:00,246 INFO L82 PathProgramCache]: Analyzing trace with hash 1323482343, now seen corresponding path program 57 times [2019-01-14 19:13:00,246 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:13:00,246 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:13:00,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:13:00,247 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:13:00,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:13:00,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:13:03,898 INFO L134 CoverageAnalysis]: Checked inductivity of 419978 backedges. 97210 proven. 5268 refuted. 0 times theorem prover too weak. 317500 trivial. 0 not checked. [2019-01-14 19:13:03,898 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:13:03,898 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:13:03,909 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:13:07,043 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2019-01-14 19:13:07,043 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:13:07,067 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:13:10,046 INFO L134 CoverageAnalysis]: Checked inductivity of 419978 backedges. 95533 proven. 5268 refuted. 0 times theorem prover too weak. 319177 trivial. 0 not checked. [2019-01-14 19:13:10,069 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:13:10,069 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 36] total 92 [2019-01-14 19:13:10,071 INFO L459 AbstractCegarLoop]: Interpolant automaton has 92 states [2019-01-14 19:13:10,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2019-01-14 19:13:10,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1673, Invalid=6699, Unknown=0, NotChecked=0, Total=8372 [2019-01-14 19:13:10,072 INFO L87 Difference]: Start difference. First operand 2316 states and 2319 transitions. Second operand 92 states. [2019-01-14 19:13:15,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:13:15,353 INFO L93 Difference]: Finished difference Result 2480 states and 2485 transitions. [2019-01-14 19:13:15,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2019-01-14 19:13:15,356 INFO L78 Accepts]: Start accepts. Automaton has 92 states. Word has length 2312 [2019-01-14 19:13:15,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:13:15,361 INFO L225 Difference]: With dead ends: 2480 [2019-01-14 19:13:15,361 INFO L226 Difference]: Without dead ends: 2480 [2019-01-14 19:13:15,363 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2455 GetRequests, 2283 SyntacticMatches, 0 SemanticMatches, 172 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9281 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=7253, Invalid=22849, Unknown=0, NotChecked=0, Total=30102 [2019-01-14 19:13:15,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2480 states. [2019-01-14 19:13:15,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2480 to 2473. [2019-01-14 19:13:15,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2473 states. [2019-01-14 19:13:15,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2473 states to 2473 states and 2478 transitions. [2019-01-14 19:13:15,384 INFO L78 Accepts]: Start accepts. Automaton has 2473 states and 2478 transitions. Word has length 2312 [2019-01-14 19:13:15,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:13:15,385 INFO L480 AbstractCegarLoop]: Abstraction has 2473 states and 2478 transitions. [2019-01-14 19:13:15,385 INFO L481 AbstractCegarLoop]: Interpolant automaton has 92 states. [2019-01-14 19:13:15,385 INFO L276 IsEmpty]: Start isEmpty. Operand 2473 states and 2478 transitions. [2019-01-14 19:13:15,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2318 [2019-01-14 19:13:15,417 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:13:15,418 INFO L402 BasicCegarLoop]: trace histogram [405, 404, 404, 404, 404, 27, 27, 27, 26, 26, 26, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:13:15,418 INFO L423 AbstractCegarLoop]: === Iteration 72 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:13:15,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:13:15,419 INFO L82 PathProgramCache]: Analyzing trace with hash 1696940994, now seen corresponding path program 58 times [2019-01-14 19:13:15,419 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:13:15,419 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:13:15,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:13:15,420 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:13:15,420 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:13:15,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:13:17,933 INFO L134 CoverageAnalysis]: Checked inductivity of 422021 backedges. 52508 proven. 2029 refuted. 0 times theorem prover too weak. 367484 trivial. 0 not checked. [2019-01-14 19:13:17,934 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:13:17,934 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:13:17,945 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:13:19,375 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:13:19,375 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:13:19,416 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:13:21,809 INFO L134 CoverageAnalysis]: Checked inductivity of 422021 backedges. 52377 proven. 1809 refuted. 0 times theorem prover too weak. 367835 trivial. 0 not checked. [2019-01-14 19:13:21,838 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:13:21,839 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 29] total 61 [2019-01-14 19:13:21,840 INFO L459 AbstractCegarLoop]: Interpolant automaton has 62 states [2019-01-14 19:13:21,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2019-01-14 19:13:21,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=502, Invalid=3280, Unknown=0, NotChecked=0, Total=3782 [2019-01-14 19:13:21,841 INFO L87 Difference]: Start difference. First operand 2473 states and 2478 transitions. Second operand 62 states. [2019-01-14 19:13:28,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:13:28,493 INFO L93 Difference]: Finished difference Result 2799 states and 2810 transitions. [2019-01-14 19:13:28,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2019-01-14 19:13:28,494 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 2317 [2019-01-14 19:13:28,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:13:28,501 INFO L225 Difference]: With dead ends: 2799 [2019-01-14 19:13:28,501 INFO L226 Difference]: Without dead ends: 2799 [2019-01-14 19:13:28,502 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2381 GetRequests, 2289 SyntacticMatches, 0 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1465 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=808, Invalid=7934, Unknown=0, NotChecked=0, Total=8742 [2019-01-14 19:13:28,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2799 states. [2019-01-14 19:13:28,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2799 to 2773. [2019-01-14 19:13:28,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2773 states. [2019-01-14 19:13:28,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2773 states to 2773 states and 2783 transitions. [2019-01-14 19:13:28,523 INFO L78 Accepts]: Start accepts. Automaton has 2773 states and 2783 transitions. Word has length 2317 [2019-01-14 19:13:28,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:13:28,524 INFO L480 AbstractCegarLoop]: Abstraction has 2773 states and 2783 transitions. [2019-01-14 19:13:28,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 62 states. [2019-01-14 19:13:28,524 INFO L276 IsEmpty]: Start isEmpty. Operand 2773 states and 2783 transitions. [2019-01-14 19:13:28,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2464 [2019-01-14 19:13:28,560 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:13:28,561 INFO L402 BasicCegarLoop]: trace histogram [432, 431, 431, 431, 431, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:13:28,561 INFO L423 AbstractCegarLoop]: === Iteration 73 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:13:28,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:13:28,562 INFO L82 PathProgramCache]: Analyzing trace with hash -1831952213, now seen corresponding path program 59 times [2019-01-14 19:13:28,562 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:13:28,563 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:13:28,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:13:28,563 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:13:28,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:13:28,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:13:32,724 INFO L134 CoverageAnalysis]: Checked inductivity of 479793 backedges. 103136 proven. 8974 refuted. 0 times theorem prover too weak. 367683 trivial. 0 not checked. [2019-01-14 19:13:32,725 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:13:32,725 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:13:32,735 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:13:44,789 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 64 check-sat command(s) [2019-01-14 19:13:44,790 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:13:44,843 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:13:49,707 INFO L134 CoverageAnalysis]: Checked inductivity of 479793 backedges. 154469 proven. 9558 refuted. 0 times theorem prover too weak. 315766 trivial. 0 not checked. [2019-01-14 19:13:49,739 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:13:49,740 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 60] total 121 [2019-01-14 19:13:49,741 INFO L459 AbstractCegarLoop]: Interpolant automaton has 121 states [2019-01-14 19:13:49,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 121 interpolants. [2019-01-14 19:13:49,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2041, Invalid=12479, Unknown=0, NotChecked=0, Total=14520 [2019-01-14 19:13:49,743 INFO L87 Difference]: Start difference. First operand 2773 states and 2783 transitions. Second operand 121 states. [2019-01-14 19:13:59,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:13:59,682 INFO L93 Difference]: Finished difference Result 2490 states and 2493 transitions. [2019-01-14 19:13:59,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 146 states. [2019-01-14 19:13:59,684 INFO L78 Accepts]: Start accepts. Automaton has 121 states. Word has length 2463 [2019-01-14 19:13:59,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:13:59,690 INFO L225 Difference]: With dead ends: 2490 [2019-01-14 19:13:59,690 INFO L226 Difference]: Without dead ends: 2481 [2019-01-14 19:13:59,693 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2665 GetRequests, 2408 SyntacticMatches, 0 SemanticMatches, 257 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22591 ImplicationChecksByTransitivity, 8.6s TimeCoverageRelationStatistics Valid=9774, Invalid=57048, Unknown=0, NotChecked=0, Total=66822 [2019-01-14 19:13:59,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2481 states. [2019-01-14 19:13:59,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2481 to 2477. [2019-01-14 19:13:59,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2477 states. [2019-01-14 19:13:59,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2477 states to 2477 states and 2480 transitions. [2019-01-14 19:13:59,710 INFO L78 Accepts]: Start accepts. Automaton has 2477 states and 2480 transitions. Word has length 2463 [2019-01-14 19:13:59,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:13:59,712 INFO L480 AbstractCegarLoop]: Abstraction has 2477 states and 2480 transitions. [2019-01-14 19:13:59,712 INFO L481 AbstractCegarLoop]: Interpolant automaton has 121 states. [2019-01-14 19:13:59,712 INFO L276 IsEmpty]: Start isEmpty. Operand 2477 states and 2480 transitions. [2019-01-14 19:13:59,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2469 [2019-01-14 19:13:59,750 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:13:59,751 INFO L402 BasicCegarLoop]: trace histogram [433, 432, 432, 432, 432, 28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:13:59,751 INFO L423 AbstractCegarLoop]: === Iteration 74 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:13:59,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:13:59,753 INFO L82 PathProgramCache]: Analyzing trace with hash 154747760, now seen corresponding path program 60 times [2019-01-14 19:13:59,754 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:13:59,754 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:13:59,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:13:59,754 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:13:59,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:13:59,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:14:03,750 INFO L134 CoverageAnalysis]: Checked inductivity of 481977 backedges. 108469 proven. 5673 refuted. 0 times theorem prover too weak. 367835 trivial. 0 not checked. [2019-01-14 19:14:03,750 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:14:03,750 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:14:03,762 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:14:32,555 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 52 check-sat command(s) [2019-01-14 19:14:32,555 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:14:32,593 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:14:35,681 INFO L134 CoverageAnalysis]: Checked inductivity of 481977 backedges. 58287 proven. 2188 refuted. 0 times theorem prover too weak. 421502 trivial. 0 not checked. [2019-01-14 19:14:35,710 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:14:35,711 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 34] total 95 [2019-01-14 19:14:35,712 INFO L459 AbstractCegarLoop]: Interpolant automaton has 95 states [2019-01-14 19:14:35,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2019-01-14 19:14:35,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1357, Invalid=7573, Unknown=0, NotChecked=0, Total=8930 [2019-01-14 19:14:35,713 INFO L87 Difference]: Start difference. First operand 2477 states and 2480 transitions. Second operand 95 states. [2019-01-14 19:14:46,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:14:46,282 INFO L93 Difference]: Finished difference Result 2803 states and 2809 transitions. [2019-01-14 19:14:46,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 254 states. [2019-01-14 19:14:46,285 INFO L78 Accepts]: Start accepts. Automaton has 95 states. Word has length 2468 [2019-01-14 19:14:46,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:14:46,291 INFO L225 Difference]: With dead ends: 2803 [2019-01-14 19:14:46,292 INFO L226 Difference]: Without dead ends: 2803 [2019-01-14 19:14:46,302 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2724 GetRequests, 2438 SyntacticMatches, 0 SemanticMatches, 286 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28771 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=10994, Invalid=71662, Unknown=0, NotChecked=0, Total=82656 [2019-01-14 19:14:46,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2803 states. [2019-01-14 19:14:46,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2803 to 2642. [2019-01-14 19:14:46,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2642 states. [2019-01-14 19:14:46,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2642 states to 2642 states and 2647 transitions. [2019-01-14 19:14:46,329 INFO L78 Accepts]: Start accepts. Automaton has 2642 states and 2647 transitions. Word has length 2468 [2019-01-14 19:14:46,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:14:46,332 INFO L480 AbstractCegarLoop]: Abstraction has 2642 states and 2647 transitions. [2019-01-14 19:14:46,333 INFO L481 AbstractCegarLoop]: Interpolant automaton has 95 states. [2019-01-14 19:14:46,333 INFO L276 IsEmpty]: Start isEmpty. Operand 2642 states and 2647 transitions. [2019-01-14 19:14:46,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2625 [2019-01-14 19:14:46,392 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:14:46,393 INFO L402 BasicCegarLoop]: trace histogram [462, 461, 461, 461, 461, 29, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:14:46,394 INFO L423 AbstractCegarLoop]: === Iteration 75 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:14:46,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:14:46,395 INFO L82 PathProgramCache]: Analyzing trace with hash -1506860179, now seen corresponding path program 61 times [2019-01-14 19:14:46,395 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:14:46,396 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:14:46,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:14:46,402 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:14:46,402 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:14:46,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:14:50,711 INFO L134 CoverageAnalysis]: Checked inductivity of 548250 backedges. 122305 proven. 6828 refuted. 0 times theorem prover too weak. 419117 trivial. 0 not checked. [2019-01-14 19:14:50,712 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:14:50,712 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:14:50,722 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:14:51,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:14:51,614 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:14:55,165 INFO L134 CoverageAnalysis]: Checked inductivity of 548250 backedges. 122619 proven. 1918 refuted. 0 times theorem prover too weak. 423713 trivial. 0 not checked. [2019-01-14 19:14:55,187 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:14:55,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 60] total 93 [2019-01-14 19:14:55,189 INFO L459 AbstractCegarLoop]: Interpolant automaton has 93 states [2019-01-14 19:14:55,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2019-01-14 19:14:55,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1837, Invalid=6719, Unknown=0, NotChecked=0, Total=8556 [2019-01-14 19:14:55,190 INFO L87 Difference]: Start difference. First operand 2642 states and 2647 transitions. Second operand 93 states. [2019-01-14 19:14:59,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:14:59,973 INFO L93 Difference]: Finished difference Result 2662 states and 2664 transitions. [2019-01-14 19:14:59,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2019-01-14 19:14:59,976 INFO L78 Accepts]: Start accepts. Automaton has 93 states. Word has length 2624 [2019-01-14 19:14:59,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:14:59,982 INFO L225 Difference]: With dead ends: 2662 [2019-01-14 19:14:59,982 INFO L226 Difference]: Without dead ends: 2641 [2019-01-14 19:14:59,985 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2745 GetRequests, 2597 SyntacticMatches, 0 SemanticMatches, 148 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7627 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=4993, Invalid=17357, Unknown=0, NotChecked=0, Total=22350 [2019-01-14 19:14:59,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2641 states. [2019-01-14 19:14:59,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2641 to 2638. [2019-01-14 19:14:59,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2638 states. [2019-01-14 19:15:00,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2638 states to 2638 states and 2639 transitions. [2019-01-14 19:15:00,000 INFO L78 Accepts]: Start accepts. Automaton has 2638 states and 2639 transitions. Word has length 2624 [2019-01-14 19:15:00,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:15:00,002 INFO L480 AbstractCegarLoop]: Abstraction has 2638 states and 2639 transitions. [2019-01-14 19:15:00,002 INFO L481 AbstractCegarLoop]: Interpolant automaton has 93 states. [2019-01-14 19:15:00,002 INFO L276 IsEmpty]: Start isEmpty. Operand 2638 states and 2639 transitions. [2019-01-14 19:15:00,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2635 [2019-01-14 19:15:00,041 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:15:00,041 INFO L402 BasicCegarLoop]: trace histogram [464, 463, 463, 463, 463, 29, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:15:00,041 INFO L423 AbstractCegarLoop]: === Iteration 76 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:15:00,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:15:00,042 INFO L82 PathProgramCache]: Analyzing trace with hash 2134165351, now seen corresponding path program 62 times [2019-01-14 19:15:00,042 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:15:00,043 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:15:00,043 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:15:00,043 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:15:00,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:15:00,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:15:03,556 INFO L134 CoverageAnalysis]: Checked inductivity of 552925 backedges. 64779 proven. 2353 refuted. 0 times theorem prover too weak. 485793 trivial. 0 not checked. [2019-01-14 19:15:03,556 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:15:03,556 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:15:03,566 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:15:04,450 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:15:04,450 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:15:04,479 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:15:07,400 INFO L134 CoverageAnalysis]: Checked inductivity of 552925 backedges. 64638 proven. 2088 refuted. 0 times theorem prover too weak. 486199 trivial. 0 not checked. [2019-01-14 19:15:07,421 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:15:07,422 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 31] total 65 [2019-01-14 19:15:07,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 66 states [2019-01-14 19:15:07,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2019-01-14 19:15:07,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=567, Invalid=3723, Unknown=0, NotChecked=0, Total=4290 [2019-01-14 19:15:07,424 INFO L87 Difference]: Start difference. First operand 2638 states and 2639 transitions. Second operand 66 states. [2019-01-14 19:15:14,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:15:14,488 INFO L93 Difference]: Finished difference Result 2821 states and 2825 transitions. [2019-01-14 19:15:14,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 95 states. [2019-01-14 19:15:14,491 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 2634 [2019-01-14 19:15:14,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:15:14,497 INFO L225 Difference]: With dead ends: 2821 [2019-01-14 19:15:14,497 INFO L226 Difference]: Without dead ends: 2821 [2019-01-14 19:15:14,498 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2701 GetRequests, 2604 SyntacticMatches, 0 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1627 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=885, Invalid=8817, Unknown=0, NotChecked=0, Total=9702 [2019-01-14 19:15:14,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2821 states. [2019-01-14 19:15:14,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2821 to 2799. [2019-01-14 19:15:14,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2799 states. [2019-01-14 19:15:14,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2799 states to 2799 states and 2802 transitions. [2019-01-14 19:15:14,527 INFO L78 Accepts]: Start accepts. Automaton has 2799 states and 2802 transitions. Word has length 2634 [2019-01-14 19:15:14,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:15:14,529 INFO L480 AbstractCegarLoop]: Abstraction has 2799 states and 2802 transitions. [2019-01-14 19:15:14,529 INFO L481 AbstractCegarLoop]: Interpolant automaton has 66 states. [2019-01-14 19:15:14,532 INFO L276 IsEmpty]: Start isEmpty. Operand 2799 states and 2802 transitions. [2019-01-14 19:15:14,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2796 [2019-01-14 19:15:14,604 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:15:14,607 INFO L402 BasicCegarLoop]: trace histogram [494, 493, 493, 493, 493, 30, 30, 30, 29, 29, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:15:14,609 INFO L423 AbstractCegarLoop]: === Iteration 77 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:15:14,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:15:14,612 INFO L82 PathProgramCache]: Analyzing trace with hash 945686987, now seen corresponding path program 63 times [2019-01-14 19:15:14,613 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:15:14,614 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:15:14,614 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:15:14,617 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:15:14,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:15:15,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:15:19,738 INFO L134 CoverageAnalysis]: Checked inductivity of 626255 backedges. 133528 proven. 6528 refuted. 0 times theorem prover too weak. 486199 trivial. 0 not checked. [2019-01-14 19:15:19,738 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:15:19,738 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:15:19,749 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:15:23,733 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 31 check-sat command(s) [2019-01-14 19:15:23,733 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:15:23,758 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:15:27,814 INFO L134 CoverageAnalysis]: Checked inductivity of 626255 backedges. 131440 proven. 6528 refuted. 0 times theorem prover too weak. 488287 trivial. 0 not checked. [2019-01-14 19:15:27,837 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:15:27,839 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 39] total 101 [2019-01-14 19:15:27,840 INFO L459 AbstractCegarLoop]: Interpolant automaton has 101 states [2019-01-14 19:15:27,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2019-01-14 19:15:27,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2036, Invalid=8064, Unknown=0, NotChecked=0, Total=10100 [2019-01-14 19:15:27,841 INFO L87 Difference]: Start difference. First operand 2799 states and 2802 transitions. Second operand 101 states. [2019-01-14 19:15:33,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:15:33,709 INFO L93 Difference]: Finished difference Result 2978 states and 2983 transitions. [2019-01-14 19:15:33,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2019-01-14 19:15:33,712 INFO L78 Accepts]: Start accepts. Automaton has 101 states. Word has length 2795 [2019-01-14 19:15:33,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:15:33,718 INFO L225 Difference]: With dead ends: 2978 [2019-01-14 19:15:33,718 INFO L226 Difference]: Without dead ends: 2978 [2019-01-14 19:15:33,721 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2953 GetRequests, 2763 SyntacticMatches, 0 SemanticMatches, 190 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11393 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=8864, Invalid=27808, Unknown=0, NotChecked=0, Total=36672 [2019-01-14 19:15:33,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2978 states. [2019-01-14 19:15:33,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2978 to 2971. [2019-01-14 19:15:33,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2971 states. [2019-01-14 19:15:33,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2971 states to 2971 states and 2976 transitions. [2019-01-14 19:15:33,746 INFO L78 Accepts]: Start accepts. Automaton has 2971 states and 2976 transitions. Word has length 2795 [2019-01-14 19:15:33,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:15:33,747 INFO L480 AbstractCegarLoop]: Abstraction has 2971 states and 2976 transitions. [2019-01-14 19:15:33,747 INFO L481 AbstractCegarLoop]: Interpolant automaton has 101 states. [2019-01-14 19:15:33,747 INFO L276 IsEmpty]: Start isEmpty. Operand 2971 states and 2976 transitions. [2019-01-14 19:15:33,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2801 [2019-01-14 19:15:33,791 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:15:33,791 INFO L402 BasicCegarLoop]: trace histogram [495, 494, 494, 494, 494, 30, 30, 30, 29, 29, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:15:33,792 INFO L423 AbstractCegarLoop]: === Iteration 78 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:15:33,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:15:33,792 INFO L82 PathProgramCache]: Analyzing trace with hash 601825130, now seen corresponding path program 64 times [2019-01-14 19:15:33,792 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:15:33,793 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:15:33,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:15:33,793 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:15:33,793 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:15:34,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:15:37,377 INFO L134 CoverageAnalysis]: Checked inductivity of 628751 backedges. 71715 proven. 2524 refuted. 0 times theorem prover too weak. 554512 trivial. 0 not checked. [2019-01-14 19:15:37,377 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:15:37,377 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:15:37,386 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2019-01-14 19:15:46,997 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-01-14 19:15:46,997 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:15:47,045 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:15:50,411 INFO L134 CoverageAnalysis]: Checked inductivity of 628751 backedges. 71427 proven. 2235 refuted. 0 times theorem prover too weak. 555089 trivial. 0 not checked. [2019-01-14 19:15:50,445 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:15:50,446 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 32] total 68 [2019-01-14 19:15:50,447 INFO L459 AbstractCegarLoop]: Interpolant automaton has 69 states [2019-01-14 19:15:50,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2019-01-14 19:15:50,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=605, Invalid=4087, Unknown=0, NotChecked=0, Total=4692 [2019-01-14 19:15:50,448 INFO L87 Difference]: Start difference. First operand 2971 states and 2976 transitions. Second operand 69 states. [2019-01-14 19:15:57,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:15:57,235 INFO L93 Difference]: Finished difference Result 3327 states and 3338 transitions. [2019-01-14 19:15:57,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2019-01-14 19:15:57,237 INFO L78 Accepts]: Start accepts. Automaton has 69 states. Word has length 2800 [2019-01-14 19:15:57,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:15:57,245 INFO L225 Difference]: With dead ends: 3327 [2019-01-14 19:15:57,245 INFO L226 Difference]: Without dead ends: 3327 [2019-01-14 19:15:57,248 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2871 GetRequests, 2769 SyntacticMatches, 0 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1851 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=971, Invalid=9741, Unknown=0, NotChecked=0, Total=10712 [2019-01-14 19:15:57,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3327 states. [2019-01-14 19:15:57,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3327 to 3301. [2019-01-14 19:15:57,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3301 states. [2019-01-14 19:15:57,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3301 states to 3301 states and 3311 transitions. [2019-01-14 19:15:57,282 INFO L78 Accepts]: Start accepts. Automaton has 3301 states and 3311 transitions. Word has length 2800 [2019-01-14 19:15:57,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:15:57,283 INFO L480 AbstractCegarLoop]: Abstraction has 3301 states and 3311 transitions. [2019-01-14 19:15:57,283 INFO L481 AbstractCegarLoop]: Interpolant automaton has 69 states. [2019-01-14 19:15:57,283 INFO L276 IsEmpty]: Start isEmpty. Operand 3301 states and 3311 transitions. [2019-01-14 19:15:57,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2962 [2019-01-14 19:15:57,369 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:15:57,370 INFO L402 BasicCegarLoop]: trace histogram [525, 524, 524, 524, 524, 31, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:15:57,370 INFO L423 AbstractCegarLoop]: === Iteration 79 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:15:57,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:15:57,371 INFO L82 PathProgramCache]: Analyzing trace with hash -1148647064, now seen corresponding path program 65 times [2019-01-14 19:15:57,371 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:15:57,371 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:15:57,372 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:15:57,372 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:15:57,373 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:15:57,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:16:02,943 INFO L134 CoverageAnalysis]: Checked inductivity of 706803 backedges. 140789 proven. 11095 refuted. 0 times theorem prover too weak. 554919 trivial. 0 not checked. [2019-01-14 19:16:02,943 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:16:02,943 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:16:02,952 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2019-01-14 19:16:24,679 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 78 check-sat command(s) [2019-01-14 19:16:24,679 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:16:24,738 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:16:30,828 INFO L134 CoverageAnalysis]: Checked inductivity of 706803 backedges. 211036 proven. 13979 refuted. 0 times theorem prover too weak. 481788 trivial. 0 not checked. [2019-01-14 19:16:30,866 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:16:30,867 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 66] total 133 [2019-01-14 19:16:30,868 INFO L459 AbstractCegarLoop]: Interpolant automaton has 133 states [2019-01-14 19:16:30,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 133 interpolants. [2019-01-14 19:16:30,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2467, Invalid=15089, Unknown=0, NotChecked=0, Total=17556 [2019-01-14 19:16:30,870 INFO L87 Difference]: Start difference. First operand 3301 states and 3311 transitions. Second operand 133 states. [2019-01-14 19:16:42,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:16:42,721 INFO L93 Difference]: Finished difference Result 2988 states and 2991 transitions. [2019-01-14 19:16:42,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 160 states. [2019-01-14 19:16:42,724 INFO L78 Accepts]: Start accepts. Automaton has 133 states. Word has length 2961 [2019-01-14 19:16:42,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:16:42,730 INFO L225 Difference]: With dead ends: 2988 [2019-01-14 19:16:42,730 INFO L226 Difference]: Without dead ends: 2979 [2019-01-14 19:16:42,735 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3183 GetRequests, 2900 SyntacticMatches, 0 SemanticMatches, 283 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27523 ImplicationChecksByTransitivity, 9.8s TimeCoverageRelationStatistics Valid=11780, Invalid=69160, Unknown=0, NotChecked=0, Total=80940 [2019-01-14 19:16:42,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2979 states. [2019-01-14 19:16:42,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2979 to 2975. [2019-01-14 19:16:42,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2975 states. [2019-01-14 19:16:42,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2975 states to 2975 states and 2978 transitions. [2019-01-14 19:16:42,751 INFO L78 Accepts]: Start accepts. Automaton has 2975 states and 2978 transitions. Word has length 2961 [2019-01-14 19:16:42,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:16:42,752 INFO L480 AbstractCegarLoop]: Abstraction has 2975 states and 2978 transitions. [2019-01-14 19:16:42,752 INFO L481 AbstractCegarLoop]: Interpolant automaton has 133 states. [2019-01-14 19:16:42,752 INFO L276 IsEmpty]: Start isEmpty. Operand 2975 states and 2978 transitions. [2019-01-14 19:16:42,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2967 [2019-01-14 19:16:42,798 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:16:42,799 INFO L402 BasicCegarLoop]: trace histogram [526, 525, 525, 525, 525, 31, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:16:42,799 INFO L423 AbstractCegarLoop]: === Iteration 80 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:16:42,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:16:42,800 INFO L82 PathProgramCache]: Analyzing trace with hash -643366969, now seen corresponding path program 66 times [2019-01-14 19:16:42,800 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:16:42,800 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:16:42,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:16:42,801 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:16:42,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:16:43,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:16:48,295 INFO L134 CoverageAnalysis]: Checked inductivity of 709455 backedges. 147388 proven. 6978 refuted. 0 times theorem prover too weak. 555089 trivial. 0 not checked. [2019-01-14 19:16:48,295 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:16:48,296 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:16:48,306 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2019-01-14 19:17:22,857 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 63 check-sat command(s) [2019-01-14 19:17:22,857 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:17:22,901 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:17:26,959 INFO L134 CoverageAnalysis]: Checked inductivity of 709455 backedges. 78518 proven. 2387 refuted. 0 times theorem prover too weak. 628550 trivial. 0 not checked. [2019-01-14 19:17:26,990 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:17:26,991 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 34] total 103 [2019-01-14 19:17:26,993 INFO L459 AbstractCegarLoop]: Interpolant automaton has 103 states [2019-01-14 19:17:26,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2019-01-14 19:17:26,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1664, Invalid=8842, Unknown=0, NotChecked=0, Total=10506 [2019-01-14 19:17:26,994 INFO L87 Difference]: Start difference. First operand 2975 states and 2978 transitions. Second operand 103 states. [2019-01-14 19:17:34,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:17:34,142 INFO L93 Difference]: Finished difference Result 3162 states and 3168 transitions. [2019-01-14 19:17:34,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 104 states. [2019-01-14 19:17:34,144 INFO L78 Accepts]: Start accepts. Automaton has 103 states. Word has length 2966 [2019-01-14 19:17:34,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:17:34,150 INFO L225 Difference]: With dead ends: 3162 [2019-01-14 19:17:34,150 INFO L226 Difference]: Without dead ends: 3162 [2019-01-14 19:17:34,154 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3130 GetRequests, 2934 SyntacticMatches, 0 SemanticMatches, 196 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9641 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=8970, Invalid=30036, Unknown=0, NotChecked=0, Total=39006 [2019-01-14 19:17:34,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3162 states. [2019-01-14 19:17:34,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3162 to 3152. [2019-01-14 19:17:34,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3152 states. [2019-01-14 19:17:34,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3152 states to 3152 states and 3158 transitions. [2019-01-14 19:17:34,171 INFO L78 Accepts]: Start accepts. Automaton has 3152 states and 3158 transitions. Word has length 2966 [2019-01-14 19:17:34,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:17:34,173 INFO L480 AbstractCegarLoop]: Abstraction has 3152 states and 3158 transitions. [2019-01-14 19:17:34,173 INFO L481 AbstractCegarLoop]: Interpolant automaton has 103 states. [2019-01-14 19:17:34,173 INFO L276 IsEmpty]: Start isEmpty. Operand 3152 states and 3158 transitions. [2019-01-14 19:17:34,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2977 [2019-01-14 19:17:34,217 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:17:34,218 INFO L402 BasicCegarLoop]: trace histogram [528, 527, 527, 527, 527, 31, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:17:34,218 INFO L423 AbstractCegarLoop]: === Iteration 81 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:17:34,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:17:34,219 INFO L82 PathProgramCache]: Analyzing trace with hash -310569395, now seen corresponding path program 67 times [2019-01-14 19:17:34,219 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:17:34,219 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:17:34,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:17:34,220 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:17:34,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:17:34,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:17:39,365 INFO L134 CoverageAnalysis]: Checked inductivity of 714774 backedges. 83691 proven. 2733 refuted. 0 times theorem prover too weak. 628350 trivial. 0 not checked. [2019-01-14 19:17:39,366 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:17:39,366 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:17:39,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:17:40,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:17:40,382 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:17:45,269 INFO L134 CoverageAnalysis]: Checked inductivity of 714774 backedges. 83754 proven. 2670 refuted. 0 times theorem prover too weak. 628350 trivial. 0 not checked. [2019-01-14 19:17:45,292 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:17:45,293 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 67] total 102 [2019-01-14 19:17:45,294 INFO L459 AbstractCegarLoop]: Interpolant automaton has 102 states [2019-01-14 19:17:45,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 102 interpolants. [2019-01-14 19:17:45,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2347, Invalid=7955, Unknown=0, NotChecked=0, Total=10302 [2019-01-14 19:17:45,295 INFO L87 Difference]: Start difference. First operand 3152 states and 3158 transitions. Second operand 102 states. [2019-01-14 19:17:49,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:17:49,964 INFO L93 Difference]: Finished difference Result 3503 states and 3513 transitions. [2019-01-14 19:17:49,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2019-01-14 19:17:49,967 INFO L78 Accepts]: Start accepts. Automaton has 102 states. Word has length 2976 [2019-01-14 19:17:49,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:17:49,973 INFO L225 Difference]: With dead ends: 3503 [2019-01-14 19:17:49,973 INFO L226 Difference]: Without dead ends: 3503 [2019-01-14 19:17:49,976 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3106 GetRequests, 2943 SyntacticMatches, 0 SemanticMatches, 163 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4649 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=6754, Invalid=20306, Unknown=0, NotChecked=0, Total=27060 [2019-01-14 19:17:49,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3503 states. [2019-01-14 19:17:50,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3503 to 3492. [2019-01-14 19:17:50,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3492 states. [2019-01-14 19:17:50,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3492 states to 3492 states and 3502 transitions. [2019-01-14 19:17:50,006 INFO L78 Accepts]: Start accepts. Automaton has 3492 states and 3502 transitions. Word has length 2976 [2019-01-14 19:17:50,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:17:50,010 INFO L480 AbstractCegarLoop]: Abstraction has 3492 states and 3502 transitions. [2019-01-14 19:17:50,010 INFO L481 AbstractCegarLoop]: Interpolant automaton has 102 states. [2019-01-14 19:17:50,010 INFO L276 IsEmpty]: Start isEmpty. Operand 3492 states and 3502 transitions. [2019-01-14 19:17:50,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3138 [2019-01-14 19:17:50,070 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:17:50,071 INFO L402 BasicCegarLoop]: trace histogram [558, 557, 557, 557, 557, 32, 32, 32, 31, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:17:50,071 INFO L423 AbstractCegarLoop]: === Iteration 82 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:17:50,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:17:50,072 INFO L82 PathProgramCache]: Analyzing trace with hash -182742773, now seen corresponding path program 68 times [2019-01-14 19:17:50,072 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:17:50,072 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:17:50,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:17:50,073 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-01-14 19:17:50,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:17:50,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:17:56,071 INFO L134 CoverageAnalysis]: Checked inductivity of 797850 backedges. 155124 proven. 11852 refuted. 0 times theorem prover too weak. 630874 trivial. 0 not checked. [2019-01-14 19:17:56,072 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:17:56,072 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:17:56,083 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2019-01-14 19:17:57,111 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-01-14 19:17:57,111 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:17:57,143 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:18:03,384 INFO L134 CoverageAnalysis]: Checked inductivity of 797850 backedges. 233088 proven. 2205 refuted. 0 times theorem prover too weak. 562557 trivial. 0 not checked. [2019-01-14 19:18:03,406 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:18:03,408 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 64] total 133 [2019-01-14 19:18:03,409 INFO L459 AbstractCegarLoop]: Interpolant automaton has 133 states [2019-01-14 19:18:03,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 133 interpolants. [2019-01-14 19:18:03,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2686, Invalid=14870, Unknown=0, NotChecked=0, Total=17556 [2019-01-14 19:18:03,411 INFO L87 Difference]: Start difference. First operand 3492 states and 3502 transitions. Second operand 133 states. [2019-01-14 19:18:12,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:18:12,168 INFO L93 Difference]: Finished difference Result 3164 states and 3167 transitions. [2019-01-14 19:18:12,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 161 states. [2019-01-14 19:18:12,170 INFO L78 Accepts]: Start accepts. Automaton has 133 states. Word has length 3137 [2019-01-14 19:18:12,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:18:12,176 INFO L225 Difference]: With dead ends: 3164 [2019-01-14 19:18:12,176 INFO L226 Difference]: Without dead ends: 3155 [2019-01-14 19:18:12,180 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3332 GetRequests, 3077 SyntacticMatches, 0 SemanticMatches, 255 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21374 ImplicationChecksByTransitivity, 8.2s TimeCoverageRelationStatistics Valid=9872, Invalid=55920, Unknown=0, NotChecked=0, Total=65792 [2019-01-14 19:18:12,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3155 states. [2019-01-14 19:18:12,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3155 to 3151. [2019-01-14 19:18:12,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3151 states. [2019-01-14 19:18:12,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3151 states to 3151 states and 3154 transitions. [2019-01-14 19:18:12,198 INFO L78 Accepts]: Start accepts. Automaton has 3151 states and 3154 transitions. Word has length 3137 [2019-01-14 19:18:12,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:18:12,199 INFO L480 AbstractCegarLoop]: Abstraction has 3151 states and 3154 transitions. [2019-01-14 19:18:12,199 INFO L481 AbstractCegarLoop]: Interpolant automaton has 133 states. [2019-01-14 19:18:12,199 INFO L276 IsEmpty]: Start isEmpty. Operand 3151 states and 3154 transitions. [2019-01-14 19:18:12,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3143 [2019-01-14 19:18:12,251 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:18:12,251 INFO L402 BasicCegarLoop]: trace histogram [559, 558, 558, 558, 558, 32, 32, 32, 31, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:18:12,252 INFO L423 AbstractCegarLoop]: === Iteration 83 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:18:12,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:18:12,252 INFO L82 PathProgramCache]: Analyzing trace with hash -1867759088, now seen corresponding path program 69 times [2019-01-14 19:18:12,252 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:18:12,252 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:18:12,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:18:12,253 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:18:12,253 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:18:12,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-01-14 19:18:18,253 INFO L134 CoverageAnalysis]: Checked inductivity of 800668 backedges. 162175 proven. 7443 refuted. 0 times theorem prover too weak. 631050 trivial. 0 not checked. [2019-01-14 19:18:18,253 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2019-01-14 19:18:18,253 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2019-01-14 19:18:18,263 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2019-01-14 19:18:23,541 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 33 check-sat command(s) [2019-01-14 19:18:23,542 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-01-14 19:18:23,570 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2019-01-14 19:18:28,506 INFO L134 CoverageAnalysis]: Checked inductivity of 800668 backedges. 159788 proven. 7443 refuted. 0 times theorem prover too weak. 633437 trivial. 0 not checked. [2019-01-14 19:18:28,531 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-01-14 19:18:28,532 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 41] total 107 [2019-01-14 19:18:28,533 INFO L459 AbstractCegarLoop]: Interpolant automaton has 107 states [2019-01-14 19:18:28,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 107 interpolants. [2019-01-14 19:18:28,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2298, Invalid=9044, Unknown=0, NotChecked=0, Total=11342 [2019-01-14 19:18:28,535 INFO L87 Difference]: Start difference. First operand 3151 states and 3154 transitions. Second operand 107 states. [2019-01-14 19:18:34,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-01-14 19:18:34,111 INFO L93 Difference]: Finished difference Result 3335 states and 3340 transitions. [2019-01-14 19:18:34,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 105 states. [2019-01-14 19:18:34,114 INFO L78 Accepts]: Start accepts. Automaton has 107 states. Word has length 3142 [2019-01-14 19:18:34,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-01-14 19:18:34,121 INFO L225 Difference]: With dead ends: 3335 [2019-01-14 19:18:34,121 INFO L226 Difference]: Without dead ends: 3335 [2019-01-14 19:18:34,126 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3310 GetRequests, 3108 SyntacticMatches, 0 SemanticMatches, 202 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12921 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=10028, Invalid=31384, Unknown=0, NotChecked=0, Total=41412 [2019-01-14 19:18:34,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3335 states. [2019-01-14 19:18:34,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3335 to 3328. [2019-01-14 19:18:34,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3328 states. [2019-01-14 19:18:34,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3328 states to 3328 states and 3333 transitions. [2019-01-14 19:18:34,155 INFO L78 Accepts]: Start accepts. Automaton has 3328 states and 3333 transitions. Word has length 3142 [2019-01-14 19:18:34,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-01-14 19:18:34,159 INFO L480 AbstractCegarLoop]: Abstraction has 3328 states and 3333 transitions. [2019-01-14 19:18:34,159 INFO L481 AbstractCegarLoop]: Interpolant automaton has 107 states. [2019-01-14 19:18:34,159 INFO L276 IsEmpty]: Start isEmpty. Operand 3328 states and 3333 transitions. [2019-01-14 19:18:34,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3148 [2019-01-14 19:18:34,239 INFO L394 BasicCegarLoop]: Found error trace [2019-01-14 19:18:34,239 INFO L402 BasicCegarLoop]: trace histogram [560, 559, 559, 559, 559, 32, 32, 32, 31, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1] [2019-01-14 19:18:34,240 INFO L423 AbstractCegarLoop]: === Iteration 84 === [fooErr0ASSERT_VIOLATIONARRAY_INDEX, fooErr2REQUIRES_VIOLATION, fooErr1REQUIRES_VIOLATION, mainErr3REQUIRES_VIOLATION, mainErr2REQUIRES_VIOLATION, mainErr0REQUIRES_VIOLATION, mainErr4ENSURES_VIOLATIONMEMORY_LEAK, mainErr1REQUIRES_VIOLATION]=== [2019-01-14 19:18:34,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-01-14 19:18:34,240 INFO L82 PathProgramCache]: Analyzing trace with hash -486718779, now seen corresponding path program 70 times [2019-01-14 19:18:34,240 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-01-14 19:18:34,240 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-01-14 19:18:34,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:18:34,241 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2019-01-14 19:18:34,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-01-14 19:18:52,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-14 19:18:54,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-01-14 19:18:55,191 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2019-01-14 19:18:55,838 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.01 07:18:55 BoogieIcfgContainer [2019-01-14 19:18:55,839 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-01-14 19:18:55,839 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-01-14 19:18:55,839 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-01-14 19:18:55,839 INFO L276 PluginConnector]: Witness Printer initialized [2019-01-14 19:18:55,844 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.01 07:05:58" (3/4) ... [2019-01-14 19:18:55,848 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2019-01-14 19:18:56,315 INFO L145 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2019-01-14 19:18:56,315 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-01-14 19:18:56,316 INFO L168 Benchmark]: Toolchain (without parser) took 778671.09 ms. Allocated memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: 4.0 GB). Free memory was 951.3 MB in the beginning and 4.4 GB in the end (delta: -3.5 GB). Peak memory consumption was 537.8 MB. Max. memory is 11.5 GB. [2019-01-14 19:18:56,319 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-01-14 19:18:56,319 INFO L168 Benchmark]: CACSL2BoogieTranslator took 288.05 ms. Allocated memory is still 1.0 GB. Free memory was 951.3 MB in the beginning and 940.6 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2019-01-14 19:18:56,319 INFO L168 Benchmark]: Boogie Preprocessor took 50.18 ms. Allocated memory is still 1.0 GB. Free memory is still 940.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-01-14 19:18:56,320 INFO L168 Benchmark]: RCFGBuilder took 633.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.3 MB). Free memory was 940.6 MB in the beginning and 1.1 GB in the end (delta: -157.0 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. [2019-01-14 19:18:56,324 INFO L168 Benchmark]: TraceAbstraction took 777216.10 ms. Allocated memory was 1.2 GB in the beginning and 5.0 GB in the end (delta: 3.9 GB). Free memory was 1.1 GB in the beginning and 4.5 GB in the end (delta: -3.4 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-01-14 19:18:56,324 INFO L168 Benchmark]: Witness Printer took 476.40 ms. Allocated memory is still 5.0 GB. Free memory was 4.5 GB in the beginning and 4.4 GB in the end (delta: 82.9 MB). Peak memory consumption was 82.9 MB. Max. memory is 11.5 GB. [2019-01-14 19:18:56,329 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 978.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 288.05 ms. Allocated memory is still 1.0 GB. Free memory was 951.3 MB in the beginning and 940.6 MB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 50.18 ms. Allocated memory is still 1.0 GB. Free memory is still 940.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 633.14 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 135.3 MB). Free memory was 940.6 MB in the beginning and 1.1 GB in the end (delta: -157.0 MB). Peak memory consumption was 13.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 777216.10 ms. Allocated memory was 1.2 GB in the beginning and 5.0 GB in the end (delta: 3.9 GB). Free memory was 1.1 GB in the beginning and 4.5 GB in the end (delta: -3.4 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 476.40 ms. Allocated memory is still 5.0 GB. Free memory was 4.5 GB in the beginning and 4.4 GB in the end (delta: 82.9 MB). Peak memory consumption was 82.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 18]: array index can be out of bounds array index can be out of bounds We found a FailurePath: [L24] int i, b[32]; [L25] char mask[32]; [L26] i = 0 VAL [b={-1:0}, i=0, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=0, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=1, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=1, b={1:0}, b={1:0}, i=0, size=1] [L17] COND TRUE i <= size VAL [\old(size)=1, b={1:0}, b={1:0}, i=0, size=1] [L18] EXPR a[i] VAL [\old(size)=1, b={1:0}, b={1:0}, i=0, size=1] [L18] EXPR b[i] VAL [\old(size)=1, b={1:0}, b={1:0}, b[i]=147, i=0, size=1] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=1, b={1:0}, b={1:0}, i=1, size=1] [L17] COND TRUE i <= size VAL [\old(size)=1, b={1:0}, b={1:0}, i=1, size=1] [L18] EXPR a[i] VAL [\old(size)=1, b={1:0}, b={1:0}, i=1, size=1] [L18] EXPR b[i] VAL [\old(size)=1, b={1:0}, b={1:0}, b[i]=159, i=1, size=1] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=1, b={1:0}, b={1:0}, i=2, size=1] [L17] COND FALSE !(i <= size) VAL [\old(size)=1, b={1:0}, b={1:0}, i=2, size=1] [L20] return i; VAL [\old(size)=1, \result=2, b={1:0}, b={1:0}, i=2, size=1] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=2, i=0, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=2, i=0, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=1, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=1, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=2, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=2, b={1:0}, b={1:0}, i=0, size=2] [L17] COND TRUE i <= size VAL [\old(size)=2, b={1:0}, b={1:0}, i=0, size=2] [L18] EXPR a[i] VAL [\old(size)=2, b={1:0}, b={1:0}, i=0, size=2] [L18] EXPR b[i] VAL [\old(size)=2, b={1:0}, b={1:0}, b[i]=147, i=0, size=2] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=2, b={1:0}, b={1:0}, i=1, size=2] [L17] COND TRUE i <= size VAL [\old(size)=2, b={1:0}, b={1:0}, i=1, size=2] [L18] EXPR a[i] VAL [\old(size)=2, b={1:0}, b={1:0}, i=1, size=2] [L18] EXPR b[i] VAL [\old(size)=2, b={1:0}, b={1:0}, b[i]=159, i=1, size=2] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=2, b={1:0}, b={1:0}, i=2, size=2] [L17] COND TRUE i <= size VAL [\old(size)=2, b={1:0}, b={1:0}, i=2, size=2] [L18] EXPR a[i] VAL [\old(size)=2, b={1:0}, b={1:0}, i=2, size=2] [L18] EXPR b[i] VAL [\old(size)=2, b={1:0}, b={1:0}, b[i]=142, i=2, size=2] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=2, b={1:0}, b={1:0}, i=3, size=2] [L17] COND FALSE !(i <= size) VAL [\old(size)=2, b={1:0}, b={1:0}, i=3, size=2] [L20] return i; VAL [\old(size)=2, \result=3, b={1:0}, b={1:0}, i=3, size=2] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=3, i=1, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=3, i=1, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=2, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=2, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=3, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=3, b={1:0}, b={1:0}, i=0, size=3] [L17] COND TRUE i <= size VAL [\old(size)=3, b={1:0}, b={1:0}, i=0, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={1:0}, b={1:0}, i=0, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={1:0}, b={1:0}, b[i]=147, i=0, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={1:0}, b={1:0}, i=1, size=3] [L17] COND TRUE i <= size VAL [\old(size)=3, b={1:0}, b={1:0}, i=1, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={1:0}, b={1:0}, i=1, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={1:0}, b={1:0}, b[i]=159, i=1, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={1:0}, b={1:0}, i=2, size=3] [L17] COND TRUE i <= size VAL [\old(size)=3, b={1:0}, b={1:0}, i=2, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={1:0}, b={1:0}, i=2, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={1:0}, b={1:0}, b[i]=142, i=2, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={1:0}, b={1:0}, i=3, size=3] [L17] COND TRUE i <= size VAL [\old(size)=3, b={1:0}, b={1:0}, i=3, size=3] [L18] EXPR a[i] VAL [\old(size)=3, b={1:0}, b={1:0}, i=3, size=3] [L18] EXPR b[i] VAL [\old(size)=3, b={1:0}, b={1:0}, b[i]=131, i=3, size=3] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=3, b={1:0}, b={1:0}, i=4, size=3] [L17] COND FALSE !(i <= size) VAL [\old(size)=3, b={1:0}, b={1:0}, i=4, size=3] [L20] return i; VAL [\old(size)=3, \result=4, b={1:0}, b={1:0}, i=4, size=3] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=4, i=2, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=4, i=2, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=3, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=3, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=4, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=4, b={1:0}, b={1:0}, i=0, size=4] [L17] COND TRUE i <= size VAL [\old(size)=4, b={1:0}, b={1:0}, i=0, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={1:0}, b={1:0}, i=0, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={1:0}, b={1:0}, b[i]=147, i=0, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={1:0}, b={1:0}, i=1, size=4] [L17] COND TRUE i <= size VAL [\old(size)=4, b={1:0}, b={1:0}, i=1, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={1:0}, b={1:0}, i=1, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={1:0}, b={1:0}, b[i]=159, i=1, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={1:0}, b={1:0}, i=2, size=4] [L17] COND TRUE i <= size VAL [\old(size)=4, b={1:0}, b={1:0}, i=2, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={1:0}, b={1:0}, i=2, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={1:0}, b={1:0}, b[i]=142, i=2, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={1:0}, b={1:0}, i=3, size=4] [L17] COND TRUE i <= size VAL [\old(size)=4, b={1:0}, b={1:0}, i=3, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={1:0}, b={1:0}, i=3, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={1:0}, b={1:0}, b[i]=131, i=3, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={1:0}, b={1:0}, i=4, size=4] [L17] COND TRUE i <= size VAL [\old(size)=4, b={1:0}, b={1:0}, i=4, size=4] [L18] EXPR a[i] VAL [\old(size)=4, b={1:0}, b={1:0}, i=4, size=4] [L18] EXPR b[i] VAL [\old(size)=4, b={1:0}, b={1:0}, b[i]=130, i=4, size=4] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=4, b={1:0}, b={1:0}, i=5, size=4] [L17] COND FALSE !(i <= size) VAL [\old(size)=4, b={1:0}, b={1:0}, i=5, size=4] [L20] return i; VAL [\old(size)=4, \result=5, b={1:0}, b={1:0}, i=5, size=4] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=5, i=3, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=5, i=3, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=4, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=4, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=5, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=5, b={1:0}, b={1:0}, i=0, size=5] [L17] COND TRUE i <= size VAL [\old(size)=5, b={1:0}, b={1:0}, i=0, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={1:0}, b={1:0}, i=0, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={1:0}, b={1:0}, b[i]=147, i=0, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={1:0}, b={1:0}, i=1, size=5] [L17] COND TRUE i <= size VAL [\old(size)=5, b={1:0}, b={1:0}, i=1, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={1:0}, b={1:0}, i=1, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={1:0}, b={1:0}, b[i]=159, i=1, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={1:0}, b={1:0}, i=2, size=5] [L17] COND TRUE i <= size VAL [\old(size)=5, b={1:0}, b={1:0}, i=2, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={1:0}, b={1:0}, i=2, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={1:0}, b={1:0}, b[i]=142, i=2, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={1:0}, b={1:0}, i=3, size=5] [L17] COND TRUE i <= size VAL [\old(size)=5, b={1:0}, b={1:0}, i=3, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={1:0}, b={1:0}, i=3, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={1:0}, b={1:0}, b[i]=131, i=3, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={1:0}, b={1:0}, i=4, size=5] [L17] COND TRUE i <= size VAL [\old(size)=5, b={1:0}, b={1:0}, i=4, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={1:0}, b={1:0}, i=4, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={1:0}, b={1:0}, b[i]=130, i=4, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={1:0}, b={1:0}, i=5, size=5] [L17] COND TRUE i <= size VAL [\old(size)=5, b={1:0}, b={1:0}, i=5, size=5] [L18] EXPR a[i] VAL [\old(size)=5, b={1:0}, b={1:0}, i=5, size=5] [L18] EXPR b[i] VAL [\old(size)=5, b={1:0}, b={1:0}, b[i]=139, i=5, size=5] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=5, b={1:0}, b={1:0}, i=6, size=5] [L17] COND FALSE !(i <= size) VAL [\old(size)=5, b={1:0}, b={1:0}, i=6, size=5] [L20] return i; VAL [\old(size)=5, \result=6, b={1:0}, b={1:0}, i=6, size=5] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=6, i=4, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=6, i=4, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=5, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=5, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=6, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=6, b={1:0}, b={1:0}, i=0, size=6] [L17] COND TRUE i <= size VAL [\old(size)=6, b={1:0}, b={1:0}, i=0, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={1:0}, b={1:0}, i=0, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={1:0}, b={1:0}, b[i]=147, i=0, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={1:0}, b={1:0}, i=1, size=6] [L17] COND TRUE i <= size VAL [\old(size)=6, b={1:0}, b={1:0}, i=1, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={1:0}, b={1:0}, i=1, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={1:0}, b={1:0}, b[i]=159, i=1, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={1:0}, b={1:0}, i=2, size=6] [L17] COND TRUE i <= size VAL [\old(size)=6, b={1:0}, b={1:0}, i=2, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={1:0}, b={1:0}, i=2, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={1:0}, b={1:0}, b[i]=142, i=2, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={1:0}, b={1:0}, i=3, size=6] [L17] COND TRUE i <= size VAL [\old(size)=6, b={1:0}, b={1:0}, i=3, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={1:0}, b={1:0}, i=3, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={1:0}, b={1:0}, b[i]=131, i=3, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={1:0}, b={1:0}, i=4, size=6] [L17] COND TRUE i <= size VAL [\old(size)=6, b={1:0}, b={1:0}, i=4, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={1:0}, b={1:0}, i=4, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={1:0}, b={1:0}, b[i]=130, i=4, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={1:0}, b={1:0}, i=5, size=6] [L17] COND TRUE i <= size VAL [\old(size)=6, b={1:0}, b={1:0}, i=5, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={1:0}, b={1:0}, i=5, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={1:0}, b={1:0}, b[i]=139, i=5, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={1:0}, b={1:0}, i=6, size=6] [L17] COND TRUE i <= size VAL [\old(size)=6, b={1:0}, b={1:0}, i=6, size=6] [L18] EXPR a[i] VAL [\old(size)=6, b={1:0}, b={1:0}, i=6, size=6] [L18] EXPR b[i] VAL [\old(size)=6, b={1:0}, b={1:0}, b[i]=129, i=6, size=6] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=6, b={1:0}, b={1:0}, i=7, size=6] [L17] COND FALSE !(i <= size) VAL [\old(size)=6, b={1:0}, b={1:0}, i=7, size=6] [L20] return i; VAL [\old(size)=6, \result=7, b={1:0}, b={1:0}, i=7, size=6] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=7, i=5, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=7, i=5, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=6, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=6, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=7, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=7, b={1:0}, b={1:0}, i=0, size=7] [L17] COND TRUE i <= size VAL [\old(size)=7, b={1:0}, b={1:0}, i=0, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={1:0}, b={1:0}, i=0, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={1:0}, b={1:0}, b[i]=147, i=0, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={1:0}, b={1:0}, i=1, size=7] [L17] COND TRUE i <= size VAL [\old(size)=7, b={1:0}, b={1:0}, i=1, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={1:0}, b={1:0}, i=1, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={1:0}, b={1:0}, b[i]=159, i=1, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={1:0}, b={1:0}, i=2, size=7] [L17] COND TRUE i <= size VAL [\old(size)=7, b={1:0}, b={1:0}, i=2, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={1:0}, b={1:0}, i=2, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={1:0}, b={1:0}, b[i]=142, i=2, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={1:0}, b={1:0}, i=3, size=7] [L17] COND TRUE i <= size VAL [\old(size)=7, b={1:0}, b={1:0}, i=3, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={1:0}, b={1:0}, i=3, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={1:0}, b={1:0}, b[i]=131, i=3, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={1:0}, b={1:0}, i=4, size=7] [L17] COND TRUE i <= size VAL [\old(size)=7, b={1:0}, b={1:0}, i=4, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={1:0}, b={1:0}, i=4, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={1:0}, b={1:0}, b[i]=130, i=4, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={1:0}, b={1:0}, i=5, size=7] [L17] COND TRUE i <= size VAL [\old(size)=7, b={1:0}, b={1:0}, i=5, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={1:0}, b={1:0}, i=5, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={1:0}, b={1:0}, b[i]=139, i=5, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={1:0}, b={1:0}, i=6, size=7] [L17] COND TRUE i <= size VAL [\old(size)=7, b={1:0}, b={1:0}, i=6, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={1:0}, b={1:0}, i=6, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={1:0}, b={1:0}, b[i]=129, i=6, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={1:0}, b={1:0}, i=7, size=7] [L17] COND TRUE i <= size VAL [\old(size)=7, b={1:0}, b={1:0}, i=7, size=7] [L18] EXPR a[i] VAL [\old(size)=7, b={1:0}, b={1:0}, i=7, size=7] [L18] EXPR b[i] VAL [\old(size)=7, b={1:0}, b={1:0}, b[i]=148, i=7, size=7] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=7, b={1:0}, b={1:0}, i=8, size=7] [L17] COND FALSE !(i <= size) VAL [\old(size)=7, b={1:0}, b={1:0}, i=8, size=7] [L20] return i; VAL [\old(size)=7, \result=8, b={1:0}, b={1:0}, i=8, size=7] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=8, i=6, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=8, i=6, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=7, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=7, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=8, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=8, b={1:0}, b={1:0}, i=0, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=0, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=0, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=147, i=0, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=1, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=1, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=1, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=159, i=1, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=2, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=2, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=2, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=142, i=2, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=3, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=3, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=3, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=131, i=3, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=4, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=4, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=4, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=130, i=4, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=5, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=5, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=5, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=139, i=5, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=6, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=6, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=6, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=129, i=6, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=7, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=7, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=7, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=148, i=7, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=8, size=8] [L17] COND TRUE i <= size VAL [\old(size)=8, b={1:0}, b={1:0}, i=8, size=8] [L18] EXPR a[i] VAL [\old(size)=8, b={1:0}, b={1:0}, i=8, size=8] [L18] EXPR b[i] VAL [\old(size)=8, b={1:0}, b={1:0}, b[i]=154, i=8, size=8] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=8, b={1:0}, b={1:0}, i=9, size=8] [L17] COND FALSE !(i <= size) VAL [\old(size)=8, b={1:0}, b={1:0}, i=9, size=8] [L20] return i; VAL [\old(size)=8, \result=9, b={1:0}, b={1:0}, i=9, size=8] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=9, i=7, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=9, i=7, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=8, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=8, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=9, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=9, b={1:0}, b={1:0}, i=0, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=0, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=0, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=147, i=0, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=1, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=1, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=1, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=159, i=1, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=2, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=2, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=2, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=142, i=2, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=3, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=3, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=3, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=131, i=3, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=4, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=4, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=4, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=130, i=4, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=5, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=5, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=5, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=139, i=5, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=6, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=6, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=6, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=129, i=6, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=7, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=7, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=7, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=148, i=7, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=8, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=8, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=8, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=154, i=8, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=9, size=9] [L17] COND TRUE i <= size VAL [\old(size)=9, b={1:0}, b={1:0}, i=9, size=9] [L18] EXPR a[i] VAL [\old(size)=9, b={1:0}, b={1:0}, i=9, size=9] [L18] EXPR b[i] VAL [\old(size)=9, b={1:0}, b={1:0}, b[i]=135, i=9, size=9] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=9, b={1:0}, b={1:0}, i=10, size=9] [L17] COND FALSE !(i <= size) VAL [\old(size)=9, b={1:0}, b={1:0}, i=10, size=9] [L20] return i; VAL [\old(size)=9, \result=10, b={1:0}, b={1:0}, i=10, size=9] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=10, i=8, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=10, i=8, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=9, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=9, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=10, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=10, b={1:0}, b={1:0}, i=0, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=0, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=0, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=147, i=0, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=1, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=1, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=1, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=159, i=1, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=2, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=2, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=2, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=142, i=2, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=3, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=3, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=3, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=131, i=3, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=4, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=4, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=4, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=130, i=4, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=5, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=5, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=5, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=139, i=5, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=6, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=6, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=6, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=129, i=6, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=7, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=7, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=7, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=148, i=7, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=8, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=8, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=8, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=154, i=8, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=9, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=9, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=9, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=135, i=9, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=10, size=10] [L17] COND TRUE i <= size VAL [\old(size)=10, b={1:0}, b={1:0}, i=10, size=10] [L18] EXPR a[i] VAL [\old(size)=10, b={1:0}, b={1:0}, i=10, size=10] [L18] EXPR b[i] VAL [\old(size)=10, b={1:0}, b={1:0}, b[i]=149, i=10, size=10] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=10, b={1:0}, b={1:0}, i=11, size=10] [L17] COND FALSE !(i <= size) VAL [\old(size)=10, b={1:0}, b={1:0}, i=11, size=10] [L20] return i; VAL [\old(size)=10, \result=11, b={1:0}, b={1:0}, i=11, size=10] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=11, i=9, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=11, i=9, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=10, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=10, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=11, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=11, b={1:0}, b={1:0}, i=0, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=0, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=0, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=147, i=0, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=1, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=1, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=1, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=159, i=1, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=2, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=2, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=2, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=142, i=2, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=3, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=3, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=3, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=131, i=3, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=4, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=4, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=4, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=130, i=4, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=5, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=5, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=5, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=139, i=5, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=6, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=6, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=6, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=129, i=6, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=7, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=7, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=7, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=148, i=7, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=8, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=8, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=8, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=154, i=8, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=9, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=9, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=9, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=135, i=9, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=10, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=10, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=10, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=149, i=10, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=11, size=11] [L17] COND TRUE i <= size VAL [\old(size)=11, b={1:0}, b={1:0}, i=11, size=11] [L18] EXPR a[i] VAL [\old(size)=11, b={1:0}, b={1:0}, i=11, size=11] [L18] EXPR b[i] VAL [\old(size)=11, b={1:0}, b={1:0}, b[i]=145, i=11, size=11] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=11, b={1:0}, b={1:0}, i=12, size=11] [L17] COND FALSE !(i <= size) VAL [\old(size)=11, b={1:0}, b={1:0}, i=12, size=11] [L20] return i; VAL [\old(size)=11, \result=12, b={1:0}, b={1:0}, i=12, size=11] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=12, i=10, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=12, i=10, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=11, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=11, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=12, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=12, b={1:0}, b={1:0}, i=0, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=0, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=0, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=147, i=0, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=1, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=1, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=1, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=159, i=1, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=2, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=2, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=2, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=142, i=2, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=3, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=3, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=3, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=131, i=3, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=4, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=4, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=4, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=130, i=4, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=5, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=5, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=5, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=139, i=5, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=6, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=6, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=6, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=129, i=6, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=7, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=7, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=7, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=148, i=7, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=8, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=8, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=8, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=154, i=8, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=9, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=9, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=9, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=135, i=9, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=10, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=10, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=10, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=149, i=10, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=11, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=11, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=11, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=145, i=11, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=12, size=12] [L17] COND TRUE i <= size VAL [\old(size)=12, b={1:0}, b={1:0}, i=12, size=12] [L18] EXPR a[i] VAL [\old(size)=12, b={1:0}, b={1:0}, i=12, size=12] [L18] EXPR b[i] VAL [\old(size)=12, b={1:0}, b={1:0}, b[i]=150, i=12, size=12] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=12, b={1:0}, b={1:0}, i=13, size=12] [L17] COND FALSE !(i <= size) VAL [\old(size)=12, b={1:0}, b={1:0}, i=13, size=12] [L20] return i; VAL [\old(size)=12, \result=13, b={1:0}, b={1:0}, i=13, size=12] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=13, i=11, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=13, i=11, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=12, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=12, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=13, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=13, b={1:0}, b={1:0}, i=0, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=0, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=0, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=147, i=0, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=1, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=1, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=1, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=159, i=1, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=2, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=2, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=2, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=142, i=2, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=3, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=3, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=3, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=131, i=3, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=4, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=4, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=4, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=130, i=4, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=5, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=5, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=5, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=139, i=5, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=6, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=6, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=6, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=129, i=6, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=7, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=7, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=7, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=148, i=7, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=8, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=8, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=8, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=154, i=8, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=9, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=9, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=9, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=135, i=9, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=10, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=10, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=10, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=149, i=10, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=11, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=11, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=11, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=145, i=11, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=12, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=12, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=12, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=150, i=12, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=13, size=13] [L17] COND TRUE i <= size VAL [\old(size)=13, b={1:0}, b={1:0}, i=13, size=13] [L18] EXPR a[i] VAL [\old(size)=13, b={1:0}, b={1:0}, i=13, size=13] [L18] EXPR b[i] VAL [\old(size)=13, b={1:0}, b={1:0}, b[i]=156, i=13, size=13] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=13, b={1:0}, b={1:0}, i=14, size=13] [L17] COND FALSE !(i <= size) VAL [\old(size)=13, b={1:0}, b={1:0}, i=14, size=13] [L20] return i; VAL [\old(size)=13, \result=14, b={1:0}, b={1:0}, i=14, size=13] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=14, i=12, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=14, i=12, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=13, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=13, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=14, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=14, b={1:0}, b={1:0}, i=0, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=0, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=0, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=147, i=0, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=1, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=1, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=1, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=159, i=1, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=2, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=2, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=2, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=142, i=2, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=3, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=3, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=3, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=131, i=3, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=4, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=4, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=4, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=130, i=4, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=5, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=5, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=5, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=139, i=5, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=6, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=6, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=6, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=129, i=6, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=7, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=7, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=7, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=148, i=7, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=8, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=8, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=8, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=154, i=8, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=9, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=9, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=9, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=135, i=9, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=10, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=10, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=10, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=149, i=10, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=11, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=11, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=11, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=145, i=11, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=12, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=12, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=12, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=150, i=12, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=13, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=13, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=13, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=156, i=13, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=14, size=14] [L17] COND TRUE i <= size VAL [\old(size)=14, b={1:0}, b={1:0}, i=14, size=14] [L18] EXPR a[i] VAL [\old(size)=14, b={1:0}, b={1:0}, i=14, size=14] [L18] EXPR b[i] VAL [\old(size)=14, b={1:0}, b={1:0}, b[i]=153, i=14, size=14] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=14, b={1:0}, b={1:0}, i=15, size=14] [L17] COND FALSE !(i <= size) VAL [\old(size)=14, b={1:0}, b={1:0}, i=15, size=14] [L20] return i; VAL [\old(size)=14, \result=15, b={1:0}, b={1:0}, i=15, size=14] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=15, i=13, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=15, i=13, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=14, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=14, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=15, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=15, b={1:0}, b={1:0}, i=0, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=0, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=0, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=147, i=0, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=1, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=1, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=1, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=159, i=1, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=2, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=2, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=2, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=142, i=2, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=3, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=3, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=3, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=131, i=3, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=4, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=4, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=4, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=130, i=4, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=5, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=5, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=5, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=139, i=5, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=6, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=6, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=6, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=129, i=6, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=7, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=7, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=7, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=148, i=7, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=8, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=8, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=8, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=154, i=8, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=9, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=9, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=9, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=135, i=9, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=10, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=10, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=10, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=149, i=10, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=11, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=11, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=11, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=145, i=11, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=12, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=12, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=12, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=150, i=12, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=13, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=13, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=13, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=156, i=13, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=14, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=14, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=14, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=153, i=14, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=15, size=15] [L17] COND TRUE i <= size VAL [\old(size)=15, b={1:0}, b={1:0}, i=15, size=15] [L18] EXPR a[i] VAL [\old(size)=15, b={1:0}, b={1:0}, i=15, size=15] [L18] EXPR b[i] VAL [\old(size)=15, b={1:0}, b={1:0}, b[i]=136, i=15, size=15] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=15, b={1:0}, b={1:0}, i=16, size=15] [L17] COND FALSE !(i <= size) VAL [\old(size)=15, b={1:0}, b={1:0}, i=16, size=15] [L20] return i; VAL [\old(size)=15, \result=16, b={1:0}, b={1:0}, i=16, size=15] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=16, i=14, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=16, i=14, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=15, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=15, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=16, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=16, b={1:0}, b={1:0}, i=0, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=0, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=0, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=147, i=0, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=1, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=1, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=1, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=159, i=1, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=2, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=2, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=2, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=142, i=2, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=3, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=3, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=3, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=131, i=3, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=4, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=4, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=4, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=130, i=4, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=5, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=5, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=5, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=139, i=5, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=6, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=6, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=6, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=129, i=6, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=7, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=7, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=7, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=148, i=7, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=8, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=8, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=8, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=154, i=8, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=9, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=9, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=9, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=135, i=9, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=10, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=10, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=10, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=149, i=10, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=11, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=11, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=11, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=145, i=11, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=12, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=12, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=12, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=150, i=12, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=13, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=13, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=13, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=156, i=13, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=14, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=14, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=14, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=153, i=14, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=15, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=15, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=15, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=136, i=15, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=16, size=16] [L17] COND TRUE i <= size VAL [\old(size)=16, b={1:0}, b={1:0}, i=16, size=16] [L18] EXPR a[i] VAL [\old(size)=16, b={1:0}, b={1:0}, i=16, size=16] [L18] EXPR b[i] VAL [\old(size)=16, b={1:0}, b={1:0}, b[i]=138, i=16, size=16] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=16, b={1:0}, b={1:0}, i=17, size=16] [L17] COND FALSE !(i <= size) VAL [\old(size)=16, b={1:0}, b={1:0}, i=17, size=16] [L20] return i; VAL [\old(size)=16, \result=17, b={1:0}, b={1:0}, i=17, size=16] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=17, i=15, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=17, i=15, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=16, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=16, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=17, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=17, b={1:0}, b={1:0}, i=0, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=0, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=0, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=147, i=0, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=1, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=1, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=1, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=159, i=1, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=2, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=2, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=2, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=142, i=2, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=3, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=3, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=3, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=131, i=3, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=4, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=4, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=4, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=130, i=4, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=5, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=5, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=5, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=139, i=5, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=6, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=6, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=6, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=129, i=6, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=7, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=7, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=7, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=148, i=7, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=8, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=8, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=8, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=154, i=8, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=9, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=9, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=9, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=135, i=9, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=10, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=10, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=10, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=149, i=10, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=11, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=11, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=11, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=145, i=11, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=12, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=12, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=12, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=150, i=12, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=13, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=13, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=13, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=156, i=13, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=14, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=14, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=14, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=153, i=14, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=15, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=15, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=15, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=136, i=15, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=16, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=16, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=16, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=138, i=16, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=17, size=17] [L17] COND TRUE i <= size VAL [\old(size)=17, b={1:0}, b={1:0}, i=17, size=17] [L18] EXPR a[i] VAL [\old(size)=17, b={1:0}, b={1:0}, i=17, size=17] [L18] EXPR b[i] VAL [\old(size)=17, b={1:0}, b={1:0}, b[i]=151, i=17, size=17] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=17, b={1:0}, b={1:0}, i=18, size=17] [L17] COND FALSE !(i <= size) VAL [\old(size)=17, b={1:0}, b={1:0}, i=18, size=17] [L20] return i; VAL [\old(size)=17, \result=18, b={1:0}, b={1:0}, i=18, size=17] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=18, i=16, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=18, i=16, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=17, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=17, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=18, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=18, b={1:0}, b={1:0}, i=0, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=0, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=0, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=147, i=0, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=1, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=1, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=1, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=159, i=1, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=2, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=2, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=2, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=142, i=2, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=3, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=3, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=3, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=131, i=3, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=4, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=4, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=4, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=130, i=4, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=5, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=5, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=5, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=139, i=5, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=6, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=6, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=6, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=129, i=6, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=7, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=7, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=7, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=148, i=7, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=8, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=8, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=8, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=154, i=8, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=9, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=9, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=9, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=135, i=9, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=10, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=10, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=10, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=149, i=10, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=11, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=11, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=11, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=145, i=11, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=12, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=12, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=12, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=150, i=12, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=13, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=13, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=13, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=156, i=13, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=14, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=14, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=14, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=153, i=14, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=15, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=15, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=15, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=136, i=15, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=16, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=16, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=16, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=138, i=16, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=17, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=17, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=17, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=151, i=17, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=18, size=18] [L17] COND TRUE i <= size VAL [\old(size)=18, b={1:0}, b={1:0}, i=18, size=18] [L18] EXPR a[i] VAL [\old(size)=18, b={1:0}, b={1:0}, i=18, size=18] [L18] EXPR b[i] VAL [\old(size)=18, b={1:0}, b={1:0}, b[i]=140, i=18, size=18] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=18, b={1:0}, b={1:0}, i=19, size=18] [L17] COND FALSE !(i <= size) VAL [\old(size)=18, b={1:0}, b={1:0}, i=19, size=18] [L20] return i; VAL [\old(size)=18, \result=19, b={1:0}, b={1:0}, i=19, size=18] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=19, i=17, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=19, i=17, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=18, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=18, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=19, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=19, b={1:0}, b={1:0}, i=0, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=0, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=0, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=147, i=0, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=1, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=1, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=1, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=159, i=1, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=2, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=2, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=2, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=142, i=2, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=3, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=3, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=3, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=131, i=3, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=4, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=4, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=4, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=130, i=4, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=5, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=5, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=5, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=139, i=5, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=6, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=6, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=6, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=129, i=6, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=7, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=7, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=7, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=148, i=7, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=8, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=8, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=8, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=154, i=8, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=9, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=9, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=9, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=135, i=9, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=10, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=10, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=10, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=149, i=10, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=11, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=11, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=11, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=145, i=11, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=12, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=12, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=12, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=150, i=12, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=13, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=13, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=13, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=156, i=13, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=14, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=14, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=14, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=153, i=14, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=15, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=15, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=15, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=136, i=15, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=16, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=16, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=16, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=138, i=16, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=17, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=17, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=17, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=151, i=17, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=18, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=18, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=18, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=140, i=18, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=19, size=19] [L17] COND TRUE i <= size VAL [\old(size)=19, b={1:0}, b={1:0}, i=19, size=19] [L18] EXPR a[i] VAL [\old(size)=19, b={1:0}, b={1:0}, i=19, size=19] [L18] EXPR b[i] VAL [\old(size)=19, b={1:0}, b={1:0}, b[i]=132, i=19, size=19] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=19, b={1:0}, b={1:0}, i=20, size=19] [L17] COND FALSE !(i <= size) VAL [\old(size)=19, b={1:0}, b={1:0}, i=20, size=19] [L20] return i; VAL [\old(size)=19, \result=20, b={1:0}, b={1:0}, i=20, size=19] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=20, i=18, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=20, i=18, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=19, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=19, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=20, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=20, b={1:0}, b={1:0}, i=0, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=0, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=0, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=147, i=0, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=1, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=1, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=1, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=159, i=1, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=2, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=2, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=2, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=142, i=2, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=3, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=3, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=3, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=131, i=3, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=4, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=4, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=4, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=130, i=4, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=5, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=5, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=5, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=139, i=5, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=6, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=6, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=6, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=129, i=6, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=7, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=7, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=7, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=148, i=7, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=8, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=8, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=8, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=154, i=8, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=9, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=9, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=9, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=135, i=9, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=10, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=10, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=10, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=149, i=10, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=11, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=11, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=11, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=145, i=11, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=12, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=12, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=12, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=150, i=12, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=13, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=13, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=13, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=156, i=13, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=14, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=14, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=14, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=153, i=14, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=15, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=15, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=15, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=136, i=15, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=16, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=16, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=16, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=138, i=16, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=17, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=17, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=17, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=151, i=17, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=18, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=18, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=18, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=140, i=18, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=19, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=19, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=19, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=132, i=19, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=20, size=20] [L17] COND TRUE i <= size VAL [\old(size)=20, b={1:0}, b={1:0}, i=20, size=20] [L18] EXPR a[i] VAL [\old(size)=20, b={1:0}, b={1:0}, i=20, size=20] [L18] EXPR b[i] VAL [\old(size)=20, b={1:0}, b={1:0}, b[i]=133, i=20, size=20] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=20, b={1:0}, b={1:0}, i=21, size=20] [L17] COND FALSE !(i <= size) VAL [\old(size)=20, b={1:0}, b={1:0}, i=21, size=20] [L20] return i; VAL [\old(size)=20, \result=21, b={1:0}, b={1:0}, i=21, size=20] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=21, i=19, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=21, i=19, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=20, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=20, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=21, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=21, b={1:0}, b={1:0}, i=0, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=0, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=0, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=147, i=0, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=1, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=1, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=1, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=159, i=1, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=2, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=2, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=2, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=142, i=2, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=3, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=3, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=3, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=131, i=3, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=4, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=4, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=4, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=130, i=4, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=5, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=5, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=5, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=139, i=5, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=6, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=6, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=6, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=129, i=6, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=7, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=7, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=7, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=148, i=7, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=8, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=8, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=8, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=154, i=8, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=9, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=9, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=9, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=135, i=9, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=10, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=10, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=10, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=149, i=10, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=11, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=11, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=11, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=145, i=11, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=12, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=12, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=12, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=150, i=12, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=13, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=13, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=13, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=156, i=13, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=14, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=14, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=14, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=153, i=14, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=15, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=15, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=15, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=136, i=15, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=16, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=16, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=16, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=138, i=16, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=17, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=17, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=17, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=151, i=17, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=18, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=18, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=18, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=140, i=18, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=19, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=19, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=19, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=132, i=19, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=20, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=20, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=20, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=133, i=20, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=21, size=21] [L17] COND TRUE i <= size VAL [\old(size)=21, b={1:0}, b={1:0}, i=21, size=21] [L18] EXPR a[i] VAL [\old(size)=21, b={1:0}, b={1:0}, i=21, size=21] [L18] EXPR b[i] VAL [\old(size)=21, b={1:0}, b={1:0}, b[i]=137, i=21, size=21] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=21, b={1:0}, b={1:0}, i=22, size=21] [L17] COND FALSE !(i <= size) VAL [\old(size)=21, b={1:0}, b={1:0}, i=22, size=21] [L20] return i; VAL [\old(size)=21, \result=22, b={1:0}, b={1:0}, i=22, size=21] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=22, i=20, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=22, i=20, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=21, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=21, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=22, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=22, b={1:0}, b={1:0}, i=0, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=0, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=0, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=147, i=0, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=1, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=1, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=1, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=159, i=1, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=2, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=2, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=2, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=142, i=2, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=3, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=3, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=3, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=131, i=3, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=4, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=4, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=4, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=130, i=4, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=5, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=5, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=5, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=139, i=5, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=6, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=6, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=6, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=129, i=6, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=7, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=7, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=7, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=148, i=7, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=8, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=8, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=8, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=154, i=8, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=9, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=9, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=9, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=135, i=9, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=10, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=10, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=10, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=149, i=10, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=11, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=11, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=11, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=145, i=11, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=12, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=12, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=12, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=150, i=12, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=13, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=13, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=13, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=156, i=13, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=14, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=14, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=14, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=153, i=14, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=15, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=15, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=15, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=136, i=15, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=16, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=16, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=16, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=138, i=16, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=17, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=17, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=17, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=151, i=17, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=18, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=18, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=18, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=140, i=18, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=19, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=19, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=19, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=132, i=19, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=20, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=20, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=20, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=133, i=20, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=21, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=21, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=21, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=137, i=21, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=22, size=22] [L17] COND TRUE i <= size VAL [\old(size)=22, b={1:0}, b={1:0}, i=22, size=22] [L18] EXPR a[i] VAL [\old(size)=22, b={1:0}, b={1:0}, i=22, size=22] [L18] EXPR b[i] VAL [\old(size)=22, b={1:0}, b={1:0}, b[i]=157, i=22, size=22] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=22, b={1:0}, b={1:0}, i=23, size=22] [L17] COND FALSE !(i <= size) VAL [\old(size)=22, b={1:0}, b={1:0}, i=23, size=22] [L20] return i; VAL [\old(size)=22, \result=23, b={1:0}, b={1:0}, i=23, size=22] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=23, i=21, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=23, i=21, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=22, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=22, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=23, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=23, b={1:0}, b={1:0}, i=0, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=0, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=0, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=147, i=0, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=1, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=1, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=1, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=159, i=1, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=2, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=2, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=2, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=142, i=2, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=3, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=3, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=3, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=131, i=3, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=4, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=4, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=4, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=130, i=4, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=5, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=5, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=5, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=139, i=5, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=6, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=6, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=6, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=129, i=6, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=7, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=7, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=7, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=148, i=7, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=8, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=8, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=8, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=154, i=8, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=9, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=9, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=9, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=135, i=9, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=10, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=10, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=10, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=149, i=10, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=11, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=11, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=11, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=145, i=11, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=12, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=12, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=12, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=150, i=12, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=13, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=13, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=13, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=156, i=13, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=14, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=14, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=14, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=153, i=14, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=15, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=15, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=15, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=136, i=15, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=16, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=16, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=16, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=138, i=16, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=17, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=17, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=17, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=151, i=17, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=18, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=18, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=18, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=140, i=18, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=19, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=19, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=19, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=132, i=19, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=20, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=20, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=20, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=133, i=20, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=21, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=21, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=21, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=137, i=21, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=22, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=22, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=22, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=157, i=22, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=23, size=23] [L17] COND TRUE i <= size VAL [\old(size)=23, b={1:0}, b={1:0}, i=23, size=23] [L18] EXPR a[i] VAL [\old(size)=23, b={1:0}, b={1:0}, i=23, size=23] [L18] EXPR b[i] VAL [\old(size)=23, b={1:0}, b={1:0}, b[i]=161, i=23, size=23] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=23, b={1:0}, b={1:0}, i=24, size=23] [L17] COND FALSE !(i <= size) VAL [\old(size)=23, b={1:0}, b={1:0}, i=24, size=23] [L20] return i; VAL [\old(size)=23, \result=24, b={1:0}, b={1:0}, i=24, size=23] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=24, i=22, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=24, i=22, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=23, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=23, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=24, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=24, b={1:0}, b={1:0}, i=0, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=0, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=0, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=147, i=0, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=1, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=1, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=1, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=159, i=1, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=2, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=2, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=2, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=142, i=2, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=3, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=3, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=3, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=131, i=3, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=4, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=4, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=4, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=130, i=4, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=5, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=5, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=5, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=139, i=5, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=6, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=6, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=6, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=129, i=6, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=7, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=7, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=7, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=148, i=7, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=8, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=8, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=8, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=154, i=8, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=9, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=9, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=9, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=135, i=9, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=10, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=10, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=10, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=149, i=10, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=11, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=11, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=11, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=145, i=11, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=12, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=12, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=12, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=150, i=12, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=13, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=13, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=13, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=156, i=13, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=14, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=14, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=14, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=153, i=14, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=15, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=15, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=15, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=136, i=15, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=16, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=16, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=16, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=138, i=16, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=17, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=17, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=17, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=151, i=17, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=18, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=18, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=18, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=140, i=18, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=19, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=19, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=19, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=132, i=19, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=20, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=20, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=20, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=133, i=20, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=21, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=21, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=21, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=137, i=21, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=22, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=22, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=22, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=157, i=22, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=23, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=23, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=23, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=161, i=23, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=24, size=24] [L17] COND TRUE i <= size VAL [\old(size)=24, b={1:0}, b={1:0}, i=24, size=24] [L18] EXPR a[i] VAL [\old(size)=24, b={1:0}, b={1:0}, i=24, size=24] [L18] EXPR b[i] VAL [\old(size)=24, b={1:0}, b={1:0}, b[i]=143, i=24, size=24] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=24, b={1:0}, b={1:0}, i=25, size=24] [L17] COND FALSE !(i <= size) VAL [\old(size)=24, b={1:0}, b={1:0}, i=25, size=24] [L20] return i; VAL [\old(size)=24, \result=25, b={1:0}, b={1:0}, i=25, size=24] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=25, i=23, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=25, i=23, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=24, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=24, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=25, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=25, b={1:0}, b={1:0}, i=0, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=0, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=0, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=147, i=0, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=1, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=1, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=1, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=159, i=1, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=2, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=2, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=2, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=142, i=2, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=3, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=3, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=3, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=131, i=3, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=4, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=4, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=4, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=130, i=4, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=5, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=5, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=5, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=139, i=5, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=6, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=6, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=6, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=129, i=6, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=7, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=7, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=7, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=148, i=7, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=8, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=8, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=8, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=154, i=8, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=9, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=9, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=9, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=135, i=9, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=10, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=10, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=10, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=149, i=10, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=11, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=11, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=11, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=145, i=11, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=12, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=12, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=12, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=150, i=12, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=13, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=13, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=13, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=156, i=13, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=14, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=14, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=14, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=153, i=14, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=15, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=15, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=15, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=136, i=15, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=16, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=16, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=16, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=138, i=16, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=17, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=17, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=17, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=151, i=17, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=18, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=18, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=18, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=140, i=18, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=19, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=19, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=19, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=132, i=19, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=20, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=20, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=20, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=133, i=20, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=21, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=21, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=21, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=137, i=21, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=22, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=22, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=22, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=157, i=22, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=23, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=23, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=23, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=161, i=23, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=24, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=24, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=24, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=143, i=24, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=25, size=25] [L17] COND TRUE i <= size VAL [\old(size)=25, b={1:0}, b={1:0}, i=25, size=25] [L18] EXPR a[i] VAL [\old(size)=25, b={1:0}, b={1:0}, i=25, size=25] [L18] EXPR b[i] VAL [\old(size)=25, b={1:0}, b={1:0}, b[i]=152, i=25, size=25] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=25, b={1:0}, b={1:0}, i=26, size=25] [L17] COND FALSE !(i <= size) VAL [\old(size)=25, b={1:0}, b={1:0}, i=26, size=25] [L20] return i; VAL [\old(size)=25, \result=26, b={1:0}, b={1:0}, i=26, size=25] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=26, i=24, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=26, i=24, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=25, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=25, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=26, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=26, b={1:0}, b={1:0}, i=0, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=0, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=0, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=147, i=0, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=1, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=1, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=1, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=159, i=1, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=2, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=2, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=2, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=142, i=2, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=3, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=3, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=3, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=131, i=3, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=4, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=4, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=4, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=130, i=4, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=5, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=5, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=5, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=139, i=5, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=6, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=6, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=6, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=129, i=6, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=7, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=7, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=7, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=148, i=7, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=8, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=8, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=8, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=154, i=8, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=9, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=9, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=9, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=135, i=9, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=10, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=10, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=10, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=149, i=10, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=11, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=11, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=11, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=145, i=11, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=12, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=12, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=12, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=150, i=12, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=13, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=13, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=13, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=156, i=13, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=14, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=14, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=14, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=153, i=14, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=15, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=15, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=15, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=136, i=15, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=16, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=16, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=16, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=138, i=16, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=17, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=17, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=17, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=151, i=17, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=18, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=18, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=18, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=140, i=18, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=19, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=19, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=19, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=132, i=19, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=20, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=20, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=20, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=133, i=20, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=21, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=21, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=21, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=137, i=21, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=22, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=22, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=22, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=157, i=22, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=23, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=23, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=23, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=161, i=23, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=24, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=24, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=24, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=143, i=24, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=25, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=25, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=25, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=152, i=25, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=26, size=26] [L17] COND TRUE i <= size VAL [\old(size)=26, b={1:0}, b={1:0}, i=26, size=26] [L18] EXPR a[i] VAL [\old(size)=26, b={1:0}, b={1:0}, i=26, size=26] [L18] EXPR b[i] VAL [\old(size)=26, b={1:0}, b={1:0}, b[i]=144, i=26, size=26] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=26, b={1:0}, b={1:0}, i=27, size=26] [L17] COND FALSE !(i <= size) VAL [\old(size)=26, b={1:0}, b={1:0}, i=27, size=26] [L20] return i; VAL [\old(size)=26, \result=27, b={1:0}, b={1:0}, i=27, size=26] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=27, i=25, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=27, i=25, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=26, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=26, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=27, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=27, b={1:0}, b={1:0}, i=0, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=0, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=0, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=147, i=0, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=1, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=1, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=1, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=159, i=1, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=2, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=2, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=2, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=142, i=2, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=3, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=3, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=3, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=131, i=3, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=4, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=4, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=4, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=130, i=4, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=5, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=5, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=5, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=139, i=5, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=6, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=6, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=6, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=129, i=6, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=7, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=7, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=7, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=148, i=7, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=8, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=8, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=8, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=154, i=8, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=9, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=9, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=9, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=135, i=9, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=10, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=10, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=10, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=149, i=10, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=11, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=11, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=11, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=145, i=11, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=12, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=12, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=12, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=150, i=12, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=13, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=13, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=13, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=156, i=13, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=14, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=14, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=14, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=153, i=14, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=15, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=15, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=15, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=136, i=15, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=16, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=16, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=16, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=138, i=16, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=17, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=17, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=17, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=151, i=17, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=18, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=18, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=18, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=140, i=18, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=19, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=19, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=19, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=132, i=19, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=20, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=20, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=20, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=133, i=20, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=21, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=21, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=21, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=137, i=21, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=22, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=22, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=22, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=157, i=22, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=23, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=23, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=23, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=161, i=23, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=24, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=24, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=24, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=143, i=24, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=25, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=25, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=25, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=152, i=25, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=26, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=26, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=26, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=144, i=26, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=27, size=27] [L17] COND TRUE i <= size VAL [\old(size)=27, b={1:0}, b={1:0}, i=27, size=27] [L18] EXPR a[i] VAL [\old(size)=27, b={1:0}, b={1:0}, i=27, size=27] [L18] EXPR b[i] VAL [\old(size)=27, b={1:0}, b={1:0}, b[i]=162, i=27, size=27] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=27, b={1:0}, b={1:0}, i=28, size=27] [L17] COND FALSE !(i <= size) VAL [\old(size)=27, b={1:0}, b={1:0}, i=28, size=27] [L20] return i; VAL [\old(size)=27, \result=28, b={1:0}, b={1:0}, i=28, size=27] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=28, i=26, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=28, i=26, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=27, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=27, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=28, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=28, b={1:0}, b={1:0}, i=0, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=0, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=0, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=147, i=0, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=1, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=1, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=1, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=159, i=1, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=2, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=2, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=2, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=142, i=2, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=3, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=3, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=3, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=131, i=3, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=4, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=4, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=4, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=130, i=4, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=5, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=5, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=5, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=139, i=5, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=6, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=6, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=6, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=129, i=6, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=7, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=7, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=7, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=148, i=7, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=8, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=8, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=8, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=154, i=8, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=9, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=9, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=9, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=135, i=9, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=10, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=10, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=10, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=149, i=10, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=11, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=11, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=11, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=145, i=11, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=12, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=12, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=12, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=150, i=12, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=13, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=13, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=13, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=156, i=13, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=14, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=14, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=14, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=153, i=14, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=15, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=15, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=15, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=136, i=15, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=16, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=16, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=16, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=138, i=16, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=17, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=17, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=17, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=151, i=17, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=18, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=18, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=18, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=140, i=18, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=19, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=19, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=19, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=132, i=19, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=20, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=20, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=20, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=133, i=20, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=21, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=21, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=21, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=137, i=21, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=22, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=22, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=22, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=157, i=22, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=23, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=23, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=23, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=161, i=23, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=24, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=24, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=24, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=143, i=24, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=25, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=25, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=25, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=152, i=25, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=26, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=26, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=26, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=144, i=26, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=27, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=27, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=27, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=162, i=27, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=28, size=28] [L17] COND TRUE i <= size VAL [\old(size)=28, b={1:0}, b={1:0}, i=28, size=28] [L18] EXPR a[i] VAL [\old(size)=28, b={1:0}, b={1:0}, i=28, size=28] [L18] EXPR b[i] VAL [\old(size)=28, b={1:0}, b={1:0}, b[i]=158, i=28, size=28] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=28, b={1:0}, b={1:0}, i=29, size=28] [L17] COND FALSE !(i <= size) VAL [\old(size)=28, b={1:0}, b={1:0}, i=29, size=28] [L20] return i; VAL [\old(size)=28, \result=29, b={1:0}, b={1:0}, i=29, size=28] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=29, i=27, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=29, i=27, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=28, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=28, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=29, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=29, b={1:0}, b={1:0}, i=0, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=0, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=0, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=147, i=0, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=1, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=1, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=1, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=159, i=1, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=2, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=2, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=2, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=142, i=2, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=3, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=3, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=3, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=131, i=3, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=4, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=4, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=4, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=130, i=4, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=5, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=5, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=5, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=139, i=5, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=6, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=6, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=6, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=129, i=6, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=7, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=7, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=7, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=148, i=7, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=8, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=8, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=8, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=154, i=8, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=9, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=9, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=9, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=135, i=9, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=10, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=10, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=10, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=149, i=10, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=11, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=11, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=11, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=145, i=11, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=12, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=12, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=12, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=150, i=12, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=13, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=13, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=13, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=156, i=13, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=14, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=14, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=14, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=153, i=14, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=15, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=15, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=15, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=136, i=15, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=16, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=16, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=16, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=138, i=16, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=17, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=17, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=17, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=151, i=17, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=18, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=18, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=18, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=140, i=18, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=19, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=19, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=19, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=132, i=19, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=20, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=20, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=20, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=133, i=20, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=21, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=21, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=21, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=137, i=21, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=22, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=22, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=22, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=157, i=22, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=23, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=23, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=23, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=161, i=23, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=24, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=24, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=24, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=143, i=24, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=25, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=25, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=25, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=152, i=25, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=26, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=26, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=26, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=144, i=26, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=27, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=27, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=27, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=162, i=27, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=28, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=28, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=28, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=158, i=28, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=29, size=29] [L17] COND TRUE i <= size VAL [\old(size)=29, b={1:0}, b={1:0}, i=29, size=29] [L18] EXPR a[i] VAL [\old(size)=29, b={1:0}, b={1:0}, i=29, size=29] [L18] EXPR b[i] VAL [\old(size)=29, b={1:0}, b={1:0}, b[i]=141, i=29, size=29] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=29, b={1:0}, b={1:0}, i=30, size=29] [L17] COND FALSE !(i <= size) VAL [\old(size)=29, b={1:0}, b={1:0}, i=30, size=29] [L20] return i; VAL [\old(size)=29, \result=30, b={1:0}, b={1:0}, i=30, size=29] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=30, i=28, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=30, i=28, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=29, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=29, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=30, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=30, b={1:0}, b={1:0}, i=0, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=0, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=0, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=147, i=0, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=1, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=1, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=1, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=159, i=1, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=2, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=2, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=2, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=142, i=2, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=3, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=3, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=3, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=131, i=3, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=4, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=4, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=4, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=130, i=4, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=5, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=5, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=5, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=139, i=5, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=6, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=6, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=6, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=129, i=6, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=7, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=7, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=7, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=148, i=7, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=8, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=8, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=8, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=154, i=8, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=9, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=9, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=9, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=135, i=9, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=10, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=10, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=10, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=149, i=10, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=11, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=11, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=11, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=145, i=11, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=12, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=12, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=12, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=150, i=12, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=13, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=13, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=13, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=156, i=13, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=14, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=14, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=14, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=153, i=14, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=15, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=15, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=15, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=136, i=15, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=16, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=16, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=16, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=138, i=16, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=17, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=17, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=17, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=151, i=17, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=18, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=18, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=18, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=140, i=18, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=19, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=19, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=19, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=132, i=19, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=20, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=20, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=20, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=133, i=20, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=21, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=21, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=21, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=137, i=21, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=22, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=22, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=22, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=157, i=22, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=23, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=23, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=23, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=161, i=23, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=24, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=24, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=24, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=143, i=24, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=25, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=25, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=25, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=152, i=25, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=26, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=26, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=26, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=144, i=26, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=27, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=27, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=27, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=162, i=27, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=28, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=28, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=28, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=158, i=28, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=29, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=29, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=29, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=141, i=29, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=30, size=30] [L17] COND TRUE i <= size VAL [\old(size)=30, b={1:0}, b={1:0}, i=30, size=30] [L18] EXPR a[i] VAL [\old(size)=30, b={1:0}, b={1:0}, i=30, size=30] [L18] EXPR b[i] VAL [\old(size)=30, b={1:0}, b={1:0}, b[i]=160, i=30, size=30] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=30, b={1:0}, b={1:0}, i=31, size=30] [L17] COND FALSE !(i <= size) VAL [\old(size)=30, b={1:0}, b={1:0}, i=31, size=30] [L20] return i; VAL [\old(size)=30, \result=31, b={1:0}, b={1:0}, i=31, size=30] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=31, i=29, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=31, i=29, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=30, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=30, mask={1:0}] [L27] CALL, EXPR foo(mask, i + 1) VAL [\old(size)=31, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=31, b={1:0}, b={1:0}, i=0, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=0, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=0, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=147, i=0, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=1, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=1, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=1, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=159, i=1, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=2, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=2, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=2, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=142, i=2, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=3, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=3, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=3, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=131, i=3, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=4, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=4, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=4, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=130, i=4, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=5, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=5, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=5, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=139, i=5, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=6, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=6, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=6, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=129, i=6, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=7, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=7, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=7, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=148, i=7, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=8, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=8, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=8, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=154, i=8, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=9, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=9, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=9, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=135, i=9, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=10, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=10, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=10, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=149, i=10, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=11, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=11, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=11, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=145, i=11, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=12, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=12, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=12, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=150, i=12, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=13, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=13, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=13, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=156, i=13, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=14, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=14, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=14, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=153, i=14, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=15, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=15, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=15, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=136, i=15, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=16, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=16, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=16, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=138, i=16, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=17, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=17, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=17, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=151, i=17, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=18, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=18, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=18, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=140, i=18, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=19, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=19, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=19, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=132, i=19, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=20, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=20, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=20, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=133, i=20, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=21, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=21, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=21, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=137, i=21, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=22, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=22, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=22, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=157, i=22, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=23, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=23, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=23, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=161, i=23, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=24, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=24, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=24, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=143, i=24, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=25, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=25, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=25, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=152, i=25, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=26, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=26, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=26, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=144, i=26, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=27, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=27, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=27, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=162, i=27, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=28, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=28, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=28, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=158, i=28, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=29, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=29, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=29, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=141, i=29, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=30, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=30, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=30, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=160, i=30, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=31, size=31] [L17] COND TRUE i <= size VAL [\old(size)=31, b={1:0}, b={1:0}, i=31, size=31] [L18] EXPR a[i] VAL [\old(size)=31, b={1:0}, b={1:0}, i=31, size=31] [L18] EXPR b[i] VAL [\old(size)=31, b={1:0}, b={1:0}, b[i]=134, i=31, size=31] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=31, b={1:0}, b={1:0}, i=32, size=31] [L17] COND FALSE !(i <= size) VAL [\old(size)=31, b={1:0}, b={1:0}, i=32, size=31] [L20] return i; VAL [\old(size)=31, \result=32, b={1:0}, b={1:0}, i=32, size=31] [L27] RET, EXPR foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=32, i=30, mask={1:0}] [L27] b[i] = foo(mask, i + 1) VAL [b={-1:0}, foo(mask, i + 1)=32, i=30, mask={1:0}] [L26] i++ VAL [b={-1:0}, i=31, mask={1:0}] [L26] COND TRUE i < sizeof(mask) VAL [b={-1:0}, i=31, mask={1:0}] [L27] CALL foo(mask, i + 1) VAL [\old(size)=32, b={1:0}] [L15] char a[32]; [L16] int i; [L17] i = 0 VAL [\old(size)=32, b={1:0}, b={1:0}, i=0, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=0, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=0, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=147, i=0, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=1, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=1, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=1, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=159, i=1, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=2, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=2, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=2, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=142, i=2, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=3, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=3, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=3, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=131, i=3, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=4, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=4, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=4, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=130, i=4, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=5, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=5, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=5, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=139, i=5, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=6, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=6, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=6, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=129, i=6, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=7, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=7, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=7, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=148, i=7, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=8, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=8, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=8, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=154, i=8, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=9, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=9, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=9, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=135, i=9, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=10, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=10, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=10, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=149, i=10, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=11, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=11, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=11, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=145, i=11, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=12, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=12, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=12, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=150, i=12, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=13, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=13, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=13, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=156, i=13, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=14, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=14, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=14, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=153, i=14, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=15, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=15, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=15, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=136, i=15, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=16, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=16, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=16, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=138, i=16, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=17, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=17, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=17, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=151, i=17, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=18, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=18, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=18, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=140, i=18, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=19, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=19, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=19, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=132, i=19, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=20, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=20, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=20, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=133, i=20, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=21, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=21, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=21, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=137, i=21, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=22, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=22, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=22, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=157, i=22, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=23, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=23, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=23, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=161, i=23, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=24, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=24, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=24, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=143, i=24, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=25, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=25, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=25, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=152, i=25, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=26, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=26, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=26, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=144, i=26, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=27, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=27, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=27, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=162, i=27, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=28, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=28, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=28, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=158, i=28, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=29, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=29, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=29, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=141, i=29, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=30, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=30, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=30, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=160, i=30, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=31, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=31, size=32] [L18] EXPR a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=31, size=32] [L18] EXPR b[i] VAL [\old(size)=32, b={1:0}, b={1:0}, b[i]=134, i=31, size=32] [L18] a[i] = b[i] [L17] i++ VAL [\old(size)=32, b={1:0}, b={1:0}, i=32, size=32] [L17] COND TRUE i <= size VAL [\old(size)=32, b={1:0}, b={1:0}, i=32, size=32] [L18] a[i] VAL [\old(size)=32, b={1:0}, b={1:0}, i=32, size=32] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 40 locations, 8 error locations. UNSAFE Result, 777.1s OverallTime, 84 OverallIterations, 560 TraceHistogramMax, 279.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2479 SDtfs, 73856 SDslu, 42254 SDs, 0 SdLazy, 208741 SolverSat, 12002 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 124.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 97175 GetRequests, 89008 SyntacticMatches, 19 SemanticMatches, 8148 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 380553 ImplicationChecksByTransitivity, 234.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=3492occurred in iteration=81, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 1.1s AutomataMinimizationTime, 83 MinimizatonAttempts, 1397 StatesRemovedByMinimization, 81 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 7.0s SsaConstructionTime, 225.9s SatisfiabilityAnalysisTime, 191.3s InterpolantComputationTime, 184453 NumberOfCodeBlocks, 171071 NumberOfCodeBlocksAsserted, 1222 NumberOfCheckSat, 181147 ConstructedInterpolants, 116 QuantifiedInterpolants, 503368029 SizeOfPredicates, 175 NumberOfNonLiveVariables, 194826 ConjunctsInSsa, 2428 ConjunctsInUnsatCore, 159 InterpolantComputations, 8 PerfectInterpolantSequences, 26747467/27079257 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...