java -Xss1g -Xmx4000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCHC.xml --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -s ../../../trunk/examples/settings/chc/AutomizerCHC/AutomizerCHC_Goto.epf -i /storage/chc-comp/eldarica-misc/LIA/Consistency/fortune-full-nonrobust.19.smt2 -------------------------------------------------------------------------------- This is Ultimate 0.1.23-8d74a04 [2018-06-22 00:38:38,701 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-06-22 00:38:38,703 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-06-22 00:38:38,719 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-06-22 00:38:38,719 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-06-22 00:38:38,721 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-06-22 00:38:38,722 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-06-22 00:38:38,724 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-06-22 00:38:38,725 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-06-22 00:38:38,726 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-06-22 00:38:38,728 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-06-22 00:38:38,728 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-06-22 00:38:38,729 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-06-22 00:38:38,730 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-06-22 00:38:38,730 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-06-22 00:38:38,733 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-06-22 00:38:38,735 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-06-22 00:38:38,743 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-06-22 00:38:38,745 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-06-22 00:38:38,746 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-06-22 00:38:38,747 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-06-22 00:38:38,750 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-06-22 00:38:38,750 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-06-22 00:38:38,751 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-06-22 00:38:38,751 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-06-22 00:38:38,752 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-06-22 00:38:38,753 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-06-22 00:38:38,753 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-06-22 00:38:38,754 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-06-22 00:38:38,755 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-06-22 00:38:38,755 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-06-22 00:38:38,756 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-06-22 00:38:38,756 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-06-22 00:38:38,757 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-06-22 00:38:38,758 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-06-22 00:38:38,758 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/chc/AutomizerCHC/AutomizerCHC_Goto.epf [2018-06-22 00:38:38,774 INFO L110 SettingsManager]: Loading preferences was successful [2018-06-22 00:38:38,774 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-06-22 00:38:38,775 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-06-22 00:38:38,775 INFO L133 SettingsManager]: * Logger pattern=[%d{ISO8601} %-5p]: %m%n [2018-06-22 00:38:38,776 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-06-22 00:38:38,776 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-06-22 00:38:38,776 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-06-22 00:38:38,776 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-06-22 00:38:38,776 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-06-22 00:38:38,777 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-06-22 00:38:38,777 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-06-22 00:38:38,777 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-06-22 00:38:38,777 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-06-22 00:38:38,777 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-06-22 00:38:38,778 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-06-22 00:38:38,778 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-06-22 00:38:38,779 INFO L133 SettingsManager]: * Compute trace for counterexample result=false [2018-06-22 00:38:38,780 INFO L131 SettingsManager]: Preferences of SmtParser differ from their defaults: [2018-06-22 00:38:38,780 INFO L133 SettingsManager]: * Use TreeAutomizer as solver for the given file (assumes the file contains Horn clauses only).=true [2018-06-22 00:38:38,828 INFO ]: Repository-Root is: /tmp [2018-06-22 00:38:38,847 INFO ]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-06-22 00:38:38,851 INFO ]: [Toolchain 1]: Toolchain data selected. [2018-06-22 00:38:38,852 INFO ]: Initializing SmtParser... [2018-06-22 00:38:38,853 INFO ]: SmtParser initialized [2018-06-22 00:38:38,853 INFO ]: [Toolchain 1]: Parsing single file: /storage/chc-comp/eldarica-misc/LIA/Consistency/fortune-full-nonrobust.19.smt2 [2018-06-22 00:38:38,855 INFO ]: Parsing .smt2 file as a set of Horn Clauses No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-06-22 00:38:38,951 INFO ]: Executing SMT file /storage/chc-comp/eldarica-misc/LIA/Consistency/fortune-full-nonrobust.19.smt2 unknown [2018-06-22 00:38:39,558 INFO ]: Succesfully executed SMT file /storage/chc-comp/eldarica-misc/LIA/Consistency/fortune-full-nonrobust.19.smt2 [2018-06-22 00:38:39,564 INFO ]: ####################### [Toolchain 1] ####################### [2018-06-22 00:38:39,570 INFO ]: Walking toolchain with 4 elements. [2018-06-22 00:38:39,571 INFO ]: ------------------------ChcToBoogie---------------------------- [2018-06-22 00:38:39,571 INFO ]: Initializing ChcToBoogie... [2018-06-22 00:38:39,571 INFO ]: ChcToBoogie initialized [2018-06-22 00:38:39,574 INFO ]: Executing the observer ChcToBoogieObserver from plugin ChcToBoogie for "de.uni_freiburg.informatik.ultimate.source.smtparser OTHER 22.06 12:38:39" (1/1) ... [2018-06-22 00:38:39,715 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39 Unit [2018-06-22 00:38:39,715 INFO ]: ------------------------ END ChcToBoogie---------------------------- [2018-06-22 00:38:39,716 INFO ]: ------------------------Boogie Preprocessor---------------------------- [2018-06-22 00:38:39,716 INFO ]: Initializing Boogie Preprocessor... [2018-06-22 00:38:39,716 INFO ]: Boogie Preprocessor initialized [2018-06-22 00:38:39,756 INFO ]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (1/1) ... [2018-06-22 00:38:39,756 INFO ]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (1/1) ... [2018-06-22 00:38:39,781 INFO ]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (1/1) ... [2018-06-22 00:38:39,781 INFO ]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (1/1) ... [2018-06-22 00:38:39,811 INFO ]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (1/1) ... [2018-06-22 00:38:39,824 INFO ]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (1/1) ... [2018-06-22 00:38:39,829 INFO ]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (1/1) ... [2018-06-22 00:38:39,836 INFO ]: ------------------------ END Boogie Preprocessor---------------------------- [2018-06-22 00:38:39,837 INFO ]: ------------------------RCFGBuilder---------------------------- [2018-06-22 00:38:39,837 INFO ]: Initializing RCFGBuilder... [2018-06-22 00:38:39,837 INFO ]: RCFGBuilder initialized [2018-06-22 00:38:39,838 INFO ]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2018-06-22 00:38:39,860 INFO ]: Specification and implementation of procedure gotoProc given in one single declaration [2018-06-22 00:38:39,860 INFO ]: Found specification of procedure gotoProc [2018-06-22 00:38:39,860 INFO ]: Found implementation of procedure gotoProc [2018-06-22 00:38:39,860 INFO ]: Specification and implementation of procedure Ultimate.START given in one single declaration [2018-06-22 00:38:39,860 INFO ]: Found specification of procedure Ultimate.START [2018-06-22 00:38:39,860 INFO ]: Found implementation of procedure Ultimate.START Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-06-22 00:38:41,928 INFO ]: Using library mode [2018-06-22 00:38:41,928 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.06 12:38:41 BoogieIcfgContainer [2018-06-22 00:38:41,929 INFO ]: ------------------------ END RCFGBuilder---------------------------- [2018-06-22 00:38:41,930 INFO ]: ------------------------TraceAbstraction---------------------------- [2018-06-22 00:38:41,930 INFO ]: Initializing TraceAbstraction... [2018-06-22 00:38:41,933 INFO ]: TraceAbstraction initialized [2018-06-22 00:38:41,933 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.source.smtparser OTHER 22.06 12:38:39" (1/3) ... [2018-06-22 00:38:41,934 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5811e6db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction OTHER 22.06 12:38:41, skipping insertion in model container [2018-06-22 00:38:41,934 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 12:38:39" (2/3) ... [2018-06-22 00:38:41,934 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5811e6db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.06 12:38:41, skipping insertion in model container [2018-06-22 00:38:41,934 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.06 12:38:41" (3/3) ... [2018-06-22 00:38:41,936 INFO ]: Analyzing ICFG de.uni_freiburg.informatik.ultimate.plugins.chctoboogie.ChcToBoogieObserver [2018-06-22 00:38:41,945 INFO ]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-06-22 00:38:41,953 INFO ]: Appying trace abstraction to program that has 1 error locations. [2018-06-22 00:38:42,000 INFO ]: Using default assertion order modulation [2018-06-22 00:38:42,001 INFO ]: Interprodecural is true [2018-06-22 00:38:42,001 INFO ]: Hoare is false [2018-06-22 00:38:42,001 INFO ]: Compute interpolants for FPandBP [2018-06-22 00:38:42,001 INFO ]: Backedges is TWOTRACK [2018-06-22 00:38:42,001 INFO ]: Determinization is PREDICATE_ABSTRACTION [2018-06-22 00:38:42,001 INFO ]: Difference is false [2018-06-22 00:38:42,001 INFO ]: Minimize is MINIMIZE_SEVPA [2018-06-22 00:38:42,001 INFO ]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-06-22 00:38:42,019 INFO ]: Start isEmpty. Operand 147 states. [2018-06-22 00:38:42,043 INFO ]: Finished isEmpty. Found accepting run of length 9 [2018-06-22 00:38:42,043 INFO ]: Found error trace [2018-06-22 00:38:42,044 INFO ]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 00:38:42,044 INFO ]: === Iteration 1 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 00:38:42,049 INFO ]: Analyzing trace with hash 1627995017, now seen corresponding path program 1 times [2018-06-22 00:38:42,051 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 00:38:42,051 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 00:38:42,089 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:38:42,089 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 00:38:42,089 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:38:42,128 INFO ]: Conjunction of SSA is unsat [2018-06-22 00:38:42,328 INFO ]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-22 00:38:42,330 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-22 00:38:42,330 INFO ]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-06-22 00:38:42,331 INFO ]: Interpolant automaton has 4 states [2018-06-22 00:38:42,342 INFO ]: Constructing interpolant automaton starting with 4 interpolants. [2018-06-22 00:38:42,342 INFO ]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-06-22 00:38:42,344 INFO ]: Start difference. First operand 147 states. Second operand 4 states. [2018-06-22 00:38:45,180 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 00:38:45,181 INFO ]: Finished difference Result 287 states and 559 transitions. [2018-06-22 00:38:45,206 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-06-22 00:38:45,207 INFO ]: Start accepts. Automaton has 4 states. Word has length 8 [2018-06-22 00:38:45,207 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 00:38:45,251 INFO ]: With dead ends: 287 [2018-06-22 00:38:45,251 INFO ]: Without dead ends: 281 [2018-06-22 00:38:45,253 INFO ]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-06-22 00:38:45,271 INFO ]: Start minimizeSevpa. Operand 281 states. [2018-06-22 00:38:45,378 INFO ]: Finished minimizeSevpa. Reduced states from 281 to 281. [2018-06-22 00:38:45,379 INFO ]: Start removeUnreachable. Operand 281 states. [2018-06-22 00:38:45,409 INFO ]: Finished removeUnreachable. Reduced from 281 states to 281 states and 547 transitions. [2018-06-22 00:38:45,411 INFO ]: Start accepts. Automaton has 281 states and 547 transitions. Word has length 8 [2018-06-22 00:38:45,412 INFO ]: Finished accepts. word is rejected. [2018-06-22 00:38:45,412 INFO ]: Abstraction has 281 states and 547 transitions. [2018-06-22 00:38:45,412 INFO ]: Interpolant automaton has 4 states. [2018-06-22 00:38:45,412 INFO ]: Start isEmpty. Operand 281 states and 547 transitions. [2018-06-22 00:38:45,416 INFO ]: Finished isEmpty. Found accepting run of length 9 [2018-06-22 00:38:45,416 INFO ]: Found error trace [2018-06-22 00:38:45,416 INFO ]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 00:38:45,416 INFO ]: === Iteration 2 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 00:38:45,417 INFO ]: Analyzing trace with hash 1484283233, now seen corresponding path program 1 times [2018-06-22 00:38:45,417 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 00:38:45,417 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 00:38:45,417 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:38:45,417 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 00:38:45,417 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:38:45,429 INFO ]: Conjunction of SSA is unsat [2018-06-22 00:38:45,561 INFO ]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-22 00:38:45,562 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-22 00:38:45,562 INFO ]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-06-22 00:38:45,563 INFO ]: Interpolant automaton has 4 states [2018-06-22 00:38:45,563 INFO ]: Constructing interpolant automaton starting with 4 interpolants. [2018-06-22 00:38:45,563 INFO ]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-06-22 00:38:45,563 INFO ]: Start difference. First operand 281 states and 547 transitions. Second operand 4 states. [2018-06-22 00:38:47,347 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 00:38:47,347 INFO ]: Finished difference Result 420 states and 819 transitions. [2018-06-22 00:38:47,347 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-06-22 00:38:47,348 INFO ]: Start accepts. Automaton has 4 states. Word has length 8 [2018-06-22 00:38:47,348 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 00:38:47,373 INFO ]: With dead ends: 420 [2018-06-22 00:38:47,374 INFO ]: Without dead ends: 420 [2018-06-22 00:38:47,374 INFO ]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-06-22 00:38:47,375 INFO ]: Start minimizeSevpa. Operand 420 states. [2018-06-22 00:38:47,476 INFO ]: Finished minimizeSevpa. Reduced states from 420 to 420. [2018-06-22 00:38:47,476 INFO ]: Start removeUnreachable. Operand 420 states. [2018-06-22 00:38:47,496 INFO ]: Finished removeUnreachable. Reduced from 420 states to 420 states and 819 transitions. [2018-06-22 00:38:47,496 INFO ]: Start accepts. Automaton has 420 states and 819 transitions. Word has length 8 [2018-06-22 00:38:47,496 INFO ]: Finished accepts. word is rejected. [2018-06-22 00:38:47,496 INFO ]: Abstraction has 420 states and 819 transitions. [2018-06-22 00:38:47,496 INFO ]: Interpolant automaton has 4 states. [2018-06-22 00:38:47,496 INFO ]: Start isEmpty. Operand 420 states and 819 transitions. [2018-06-22 00:38:47,530 INFO ]: Finished isEmpty. Found accepting run of length 20 [2018-06-22 00:38:47,530 INFO ]: Found error trace [2018-06-22 00:38:47,530 INFO ]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 00:38:47,530 INFO ]: === Iteration 3 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 00:38:47,531 INFO ]: Analyzing trace with hash 163860046, now seen corresponding path program 1 times [2018-06-22 00:38:47,531 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 00:38:47,531 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 00:38:47,531 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:38:47,531 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 00:38:47,531 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:38:47,616 INFO ]: Conjunction of SSA is unsat [2018-06-22 00:38:48,065 INFO ]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-06-22 00:38:48,065 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-22 00:38:48,065 INFO ]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-06-22 00:38:48,065 INFO ]: Interpolant automaton has 7 states [2018-06-22 00:38:48,066 INFO ]: Constructing interpolant automaton starting with 7 interpolants. [2018-06-22 00:38:48,066 INFO ]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-06-22 00:38:48,066 INFO ]: Start difference. First operand 420 states and 819 transitions. Second operand 7 states. [2018-06-22 00:38:56,664 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 00:38:56,664 INFO ]: Finished difference Result 1545 states and 7183 transitions. [2018-06-22 00:38:56,664 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-06-22 00:38:56,664 INFO ]: Start accepts. Automaton has 7 states. Word has length 19 [2018-06-22 00:38:56,664 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 00:38:57,211 INFO ]: With dead ends: 1545 [2018-06-22 00:38:57,211 INFO ]: Without dead ends: 1545 [2018-06-22 00:38:57,212 INFO ]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=87, Invalid=255, Unknown=0, NotChecked=0, Total=342 [2018-06-22 00:38:57,213 INFO ]: Start minimizeSevpa. Operand 1545 states. [2018-06-22 00:38:57,797 INFO ]: Finished minimizeSevpa. Reduced states from 1545 to 851. [2018-06-22 00:38:57,798 INFO ]: Start removeUnreachable. Operand 851 states. [2018-06-22 00:38:57,834 INFO ]: Finished removeUnreachable. Reduced from 851 states to 851 states and 2195 transitions. [2018-06-22 00:38:57,834 INFO ]: Start accepts. Automaton has 851 states and 2195 transitions. Word has length 19 [2018-06-22 00:38:57,834 INFO ]: Finished accepts. word is rejected. [2018-06-22 00:38:57,834 INFO ]: Abstraction has 851 states and 2195 transitions. [2018-06-22 00:38:57,834 INFO ]: Interpolant automaton has 7 states. [2018-06-22 00:38:57,834 INFO ]: Start isEmpty. Operand 851 states and 2195 transitions. [2018-06-22 00:38:57,862 INFO ]: Finished isEmpty. Found accepting run of length 20 [2018-06-22 00:38:57,862 INFO ]: Found error trace [2018-06-22 00:38:57,862 INFO ]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 00:38:57,862 INFO ]: === Iteration 4 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 00:38:57,863 INFO ]: Analyzing trace with hash 1037850800, now seen corresponding path program 1 times [2018-06-22 00:38:57,863 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 00:38:57,863 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 00:38:57,865 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:38:57,865 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 00:38:57,865 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:38:57,913 INFO ]: Conjunction of SSA is unsat [2018-06-22 00:38:58,511 INFO ]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-06-22 00:38:58,511 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-22 00:38:58,511 INFO ]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-06-22 00:38:58,511 INFO ]: Interpolant automaton has 7 states [2018-06-22 00:38:58,511 INFO ]: Constructing interpolant automaton starting with 7 interpolants. [2018-06-22 00:38:58,511 INFO ]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-06-22 00:38:58,512 INFO ]: Start difference. First operand 851 states and 2195 transitions. Second operand 7 states. [2018-06-22 00:39:09,981 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 00:39:09,981 INFO ]: Finished difference Result 2727 states and 18257 transitions. [2018-06-22 00:39:09,981 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-06-22 00:39:09,982 INFO ]: Start accepts. Automaton has 7 states. Word has length 19 [2018-06-22 00:39:09,982 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 00:39:10,778 INFO ]: With dead ends: 2727 [2018-06-22 00:39:10,778 INFO ]: Without dead ends: 2727 [2018-06-22 00:39:10,778 INFO ]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=87, Invalid=255, Unknown=0, NotChecked=0, Total=342 [2018-06-22 00:39:10,780 INFO ]: Start minimizeSevpa. Operand 2727 states. [2018-06-22 00:39:12,361 INFO ]: Finished minimizeSevpa. Reduced states from 2727 to 1693. [2018-06-22 00:39:12,363 INFO ]: Start removeUnreachable. Operand 1693 states. [2018-06-22 00:39:12,514 INFO ]: Finished removeUnreachable. Reduced from 1693 states to 1693 states and 5549 transitions. [2018-06-22 00:39:12,514 INFO ]: Start accepts. Automaton has 1693 states and 5549 transitions. Word has length 19 [2018-06-22 00:39:12,514 INFO ]: Finished accepts. word is rejected. [2018-06-22 00:39:12,514 INFO ]: Abstraction has 1693 states and 5549 transitions. [2018-06-22 00:39:12,514 INFO ]: Interpolant automaton has 7 states. [2018-06-22 00:39:12,515 INFO ]: Start isEmpty. Operand 1693 states and 5549 transitions. [2018-06-22 00:39:12,542 INFO ]: Finished isEmpty. Found accepting run of length 20 [2018-06-22 00:39:12,543 INFO ]: Found error trace [2018-06-22 00:39:12,543 INFO ]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 00:39:12,543 INFO ]: === Iteration 5 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 00:39:12,544 INFO ]: Analyzing trace with hash 730143679, now seen corresponding path program 1 times [2018-06-22 00:39:12,544 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 00:39:12,544 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 00:39:12,546 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:39:12,546 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 00:39:12,546 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 00:39:12,604 INFO ]: Conjunction of SSA is sat [2018-06-22 00:39:12,614 INFO ]: Counterexample might be feasible [2018-06-22 00:39:12,637 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.06 12:39:12 BoogieIcfgContainer [2018-06-22 00:39:12,637 INFO ]: ------------------------ END TraceAbstraction---------------------------- [2018-06-22 00:39:12,638 INFO ]: Toolchain (without parser) took 33073.30 ms. Allocated memory was 308.8 MB in the beginning and 953.2 MB in the end (delta: 644.3 MB). Free memory was 237.3 MB in the beginning and 205.1 MB in the end (delta: 32.2 MB). Peak memory consumption was 676.6 MB. Max. memory is 3.6 GB. [2018-06-22 00:39:12,640 INFO ]: SmtParser took 0.07 ms. Allocated memory is still 308.8 MB. Free memory is still 273.3 MB. There was no memory consumed. Max. memory is 3.6 GB. [2018-06-22 00:39:12,640 INFO ]: ChcToBoogie took 144.80 ms. Allocated memory is still 308.8 MB. Free memory was 237.3 MB in the beginning and 231.3 MB in the end (delta: 6.0 MB). Peak memory consumption was 6.0 MB. Max. memory is 3.6 GB. [2018-06-22 00:39:12,640 INFO ]: Boogie Preprocessor took 120.60 ms. Allocated memory is still 308.8 MB. Free memory was 231.3 MB in the beginning and 227.3 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 3.6 GB. [2018-06-22 00:39:12,644 INFO ]: RCFGBuilder took 2091.52 ms. Allocated memory was 308.8 MB in the beginning and 323.5 MB in the end (delta: 14.7 MB). Free memory was 227.3 MB in the beginning and 241.9 MB in the end (delta: -14.6 MB). Peak memory consumption was 45.5 MB. Max. memory is 3.6 GB. [2018-06-22 00:39:12,644 INFO ]: TraceAbstraction took 30707.40 ms. Allocated memory was 323.5 MB in the beginning and 953.2 MB in the end (delta: 629.7 MB). Free memory was 239.8 MB in the beginning and 205.1 MB in the end (delta: 34.7 MB). Peak memory consumption was 664.4 MB. Max. memory is 3.6 GB. [2018-06-22 00:39:12,646 INFO ]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * SmtParser took 0.07 ms. Allocated memory is still 308.8 MB. Free memory is still 273.3 MB. There was no memory consumed. Max. memory is 3.6 GB. * ChcToBoogie took 144.80 ms. Allocated memory is still 308.8 MB. Free memory was 237.3 MB in the beginning and 231.3 MB in the end (delta: 6.0 MB). Peak memory consumption was 6.0 MB. Max. memory is 3.6 GB. * Boogie Preprocessor took 120.60 ms. Allocated memory is still 308.8 MB. Free memory was 231.3 MB in the beginning and 227.3 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 3.6 GB. * RCFGBuilder took 2091.52 ms. Allocated memory was 308.8 MB in the beginning and 323.5 MB in the end (delta: 14.7 MB). Free memory was 227.3 MB in the beginning and 241.9 MB in the end (delta: -14.6 MB). Peak memory consumption was 45.5 MB. Max. memory is 3.6 GB. * TraceAbstraction took 30707.40 ms. Allocated memory was 323.5 MB in the beginning and 953.2 MB in the end (delta: 629.7 MB). Free memory was 239.8 MB in the beginning and 205.1 MB in the end (delta: 34.7 MB). Peak memory consumption was 664.4 MB. Max. memory is 3.6 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [UNKNOWN] : assertion can be violated assertion can be violated We found a FailurePath: [L0] CALL call gotoProc(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); [L0] gotoSwitch := gotoSwitch_in; [L0] COND FALSE !(gotoSwitch == 5) [L0] COND FALSE !(gotoSwitch == 4) [L0] COND FALSE !(gotoSwitch == 2) [L0] COND FALSE !(gotoSwitch == 1) [L0] assume true; [L0] CALL call gotoProc(5, hbv_False_1_Int, hbv_False_2_Int, hbv_False_3_Int, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Int, hbv_False_7_Int, hbv_False_8_Int, hbv_False_9_Int, hbv_False_10_Int, hbv_False_11_Int, hbv_False_12_Int, hbv_False_13_Int, hbv_False_14_Int); [L0] gotoSwitch := gotoSwitch_in; [L0] COND TRUE gotoSwitch == 5 [L0] hhv_combined_lturn_0_Int, hhv_combined_lturn_1_Int, hhv_combined_lturn_2_Int, hhv_combined_lturn_3_Int, hhv_combined_lturn_4_Int, hhv_combined_lturn_5_Int, hhv_combined_lturn_6_Int, hhv_combined_lturn_7_Int, hhv_combined_lturn_8_Int, hhv_combined_lturn_9_Int, hhv_combined_lturn_10_Int, hhv_combined_lturn_11_Int, hhv_combined_lturn_12_Int, hhv_combined_lturn_13_Int := gpav_0_Int, gpav_1_Int, gpav_2_Int, gpav_3_Int, gpav_4_Int, gpav_5_Int, gpav_6_Int, gpav_7_Int, gpav_8_Int, gpav_9_Int, gpav_10_Int, gpav_11_Int, gpav_12_Int, gpav_13_Int; [L0] assume true; [L0] hhv_step_lturn_0_Int, hhv_step_lturn_1_Int, hhv_step_lturn_2_Int, hhv_step_lturn_3_Int, hhv_step_lturn_4_Int, hhv_step_lturn_5_Int, hhv_step_lturn_6_Int, hhv_step_lturn_7_Int, hhv_step_lturn_8_Int, hhv_step_lturn_9_Int, hhv_step_lturn_10_Int, hhv_step_lturn_11_Int, hhv_step_lturn_12_Int, hhv_step_lturn_13_Int := hhv_combined_lturn_0_Int, hhv_combined_lturn_1_Int, hhv_combined_lturn_2_Int, hhv_combined_lturn_3_Int, hhv_combined_lturn_4_Int, hhv_combined_lturn_5_Int, hhv_combined_lturn_6_Int, hhv_combined_lturn_7_Int, hhv_combined_lturn_8_Int, hhv_combined_lturn_9_Int, hhv_combined_lturn_10_Int, hhv_combined_lturn_11_Int, hhv_combined_lturn_12_Int, hhv_combined_lturn_13_Int; [L0] assume ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0 && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_10_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_1_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_6_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + -1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_12_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_8_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_2_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_11_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_9_Int + -9 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_7_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_11_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_10_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + -1 * hhv_step_lturn_8_Int + 2 >= 0) && 0 + -1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_10_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 * hhv_step_lturn_12_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_12_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_1_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_9_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_1_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_6_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_11_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_6_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_9_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_0_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_7_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_7_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_1_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_5_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_12_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_12_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_8_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_7_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_2_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_7_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_10_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_6_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_6_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_10_Int + -7 >= 0) && 0 + -1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_10_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_11_Int + -7 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_6_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_1_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_11_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_6_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_3_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_7_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_11_Int + 1 * hhv_step_lturn_10_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_6_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_9_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_1_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_7_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_6_Int + -9 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_11_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_6_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_2_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_9_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_7_Int + -6 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_0_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_7_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_11_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_7_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_10_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_9_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_1_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_11_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_1_Int + -6 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_1_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_9_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_12_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_9_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_7_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_0_Int + -8 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_12_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_11_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_2_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_10_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_11_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_9_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_10_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_12_Int + -7 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_6_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_2_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_12_Int + 2 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_7_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_6_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_9_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_6_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_6_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_2_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_0_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_9_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_0_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_8_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_7_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_1_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_7_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_0_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_6_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_11_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_0_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_11_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_9_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + -1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_11_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_7_Int + -7 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_2_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_3_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_5_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_6_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_6_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_6_Int + -6 >= 0; [L0] RET call gotoProc(5, hbv_False_1_Int, hbv_False_2_Int, hbv_False_3_Int, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Int, hbv_False_7_Int, hbv_False_8_Int, hbv_False_9_Int, hbv_False_10_Int, hbv_False_11_Int, hbv_False_12_Int, hbv_False_13_Int, hbv_False_14_Int); [L0] hhv_step_lturn_0_Int, hhv_step_lturn_1_Int, hhv_step_lturn_2_Int, hhv_step_lturn_3_Int, hhv_step_lturn_4_Int, hhv_step_lturn_5_Int, hhv_step_lturn_6_Int, hhv_step_lturn_7_Int, hhv_step_lturn_8_Int, hhv_step_lturn_9_Int, hhv_step_lturn_10_Int, hhv_step_lturn_11_Int, hhv_step_lturn_12_Int, hhv_step_lturn_13_Int := hbv_False_1_Int, hbv_False_2_Int, hbv_False_3_Int, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Int, hbv_False_7_Int, hbv_False_8_Int, hbv_False_9_Int, hbv_False_10_Int, hbv_False_11_Int, hbv_False_13_Int, hbv_False_12_Int, hbv_False_14_Int; [L0] havoc hbv_False_1_Int, hbv_False_13_Int, hbv_False_14_Int, hbv_False_5_Int, hbv_False_2_Int, hbv_False_6_Int, hbv_False_3_Int, hbv_False_4_Int, hbv_False_7_Int, hbv_False_9_Int, hbv_False_8_Int, hbv_False_10_Int, hbv_False_12_Int, hbv_False_11_Int; [L0] assume ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0 && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_10_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_1_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_6_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + -1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_12_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_8_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_2_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_11_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_9_Int + -9 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_7_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_11_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_10_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + -1 * hhv_step_lturn_8_Int + 2 >= 0) && 0 + -1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_10_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 * hhv_step_lturn_12_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_12_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_1_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_9_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_1_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_6_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_11_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_6_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_9_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_0_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_7_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_7_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_1_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_5_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_12_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_12_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_8_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_7_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_2_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_7_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_10_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_6_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_6_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_10_Int + -7 >= 0) && 0 + -1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_10_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_11_Int + -7 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_6_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_1_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_11_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_6_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_3_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_7_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_11_Int + 1 * hhv_step_lturn_10_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_6_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_9_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_1_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_7_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_6_Int + -9 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_11_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_6_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_2_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_9_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_7_Int + -6 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_0_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_7_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_11_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_7_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_10_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_9_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_1_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_11_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_1_Int + -6 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_1_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_9_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_12_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_9_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_7_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_0_Int + -8 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_12_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_11_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_2_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_10_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_11_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_9_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_10_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_12_Int + -7 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_6_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_2_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_12_Int + 2 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_7_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_6_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_9_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_6_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_6_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_2_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_0_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_9_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_0_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_8_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_7_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_1_Int + -8 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_7_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_0_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_6_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_11_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_0_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_11_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_9_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + -1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_11_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_7_Int + -7 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_2_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_3_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_5_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_6_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_6_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_6_Int + -6 >= 0; [L0] RET call gotoProc(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); [L0] assert false; - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 147 locations, 1 error locations. UNSAFE Result, 30.6s OverallTime, 5 OverallIterations, 2 TraceHistogramMax, 26.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3487 SDtfs, 864 SDslu, 6684 SDs, 0 SdLazy, 14712 SolverSat, 3107 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 20.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 48 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 1.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1693occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 2.6s AutomataMinimizationTime, 4 MinimizatonAttempts, 1728 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 73 NumberOfCodeBlocks, 73 NumberOfCodeBlocksAsserted, 5 NumberOfCheckSat, 50 ConstructedInterpolants, 0 QuantifiedInterpolants, 1894 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 4 InterpolantComputations, 4 PerfectInterpolantSequences, 8/8 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/fortune-full-nonrobust.19.smt2_AutomizerCHC_Goto.epf_AutomizerCHC.xml/Csv-Benchmark-0-2018-06-22_00-39-12-666.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/fortune-full-nonrobust.19.smt2_AutomizerCHC_Goto.epf_AutomizerCHC.xml/Csv-TraceAbstractionBenchmarks-0-2018-06-22_00-39-12-666.csv Received shutdown request...