java -Xss1g -Xmx4000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCHC.xml --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -s ../../../trunk/examples/settings/chc/AutomizerCHC/AutomizerCHC_No_Goto.epf -i /storage/chc-comp/eldarica-misc/LIA/Consistency/incremental-2lists.39.smt2 -------------------------------------------------------------------------------- This is Ultimate 0.1.23-8d74a04 [2018-06-22 10:42:06,151 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-06-22 10:42:06,153 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-06-22 10:42:06,172 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-06-22 10:42:06,172 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-06-22 10:42:06,173 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-06-22 10:42:06,174 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-06-22 10:42:06,178 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-06-22 10:42:06,180 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-06-22 10:42:06,182 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-06-22 10:42:06,183 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-06-22 10:42:06,183 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-06-22 10:42:06,184 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-06-22 10:42:06,185 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-06-22 10:42:06,189 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-06-22 10:42:06,190 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-06-22 10:42:06,192 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-06-22 10:42:06,205 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-06-22 10:42:06,207 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-06-22 10:42:06,207 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-06-22 10:42:06,208 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-06-22 10:42:06,210 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-06-22 10:42:06,211 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-06-22 10:42:06,211 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-06-22 10:42:06,212 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-06-22 10:42:06,212 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-06-22 10:42:06,217 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-06-22 10:42:06,217 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-06-22 10:42:06,218 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-06-22 10:42:06,218 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-06-22 10:42:06,219 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-06-22 10:42:06,224 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-06-22 10:42:06,224 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-06-22 10:42:06,225 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-06-22 10:42:06,225 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-06-22 10:42:06,226 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/chc/AutomizerCHC/AutomizerCHC_No_Goto.epf [2018-06-22 10:42:06,245 INFO L110 SettingsManager]: Loading preferences was successful [2018-06-22 10:42:06,245 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-06-22 10:42:06,246 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-06-22 10:42:06,246 INFO L133 SettingsManager]: * Logger pattern=[%d{ISO8601} %-5p]: %m%n [2018-06-22 10:42:06,247 INFO L131 SettingsManager]: Preferences of ChcToBoogie differ from their defaults: [2018-06-22 10:42:06,247 INFO L133 SettingsManager]: * Use one large procedure with gotos to replace tail recursive calls=false [2018-06-22 10:42:06,247 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-06-22 10:42:06,247 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-06-22 10:42:06,247 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-06-22 10:42:06,248 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-06-22 10:42:06,248 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-06-22 10:42:06,248 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-06-22 10:42:06,248 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-06-22 10:42:06,248 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-06-22 10:42:06,249 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-06-22 10:42:06,249 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-06-22 10:42:06,249 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-06-22 10:42:06,249 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-06-22 10:42:06,249 INFO L133 SettingsManager]: * Compute trace for counterexample result=false [2018-06-22 10:42:06,251 INFO L131 SettingsManager]: Preferences of SmtParser differ from their defaults: [2018-06-22 10:42:06,251 INFO L133 SettingsManager]: * Use TreeAutomizer as solver for the given file (assumes the file contains Horn clauses only).=true [2018-06-22 10:42:06,301 INFO ]: Repository-Root is: /tmp [2018-06-22 10:42:06,316 INFO ]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-06-22 10:42:06,321 INFO ]: [Toolchain 1]: Toolchain data selected. [2018-06-22 10:42:06,322 INFO ]: Initializing SmtParser... [2018-06-22 10:42:06,323 INFO ]: SmtParser initialized [2018-06-22 10:42:06,324 INFO ]: [Toolchain 1]: Parsing single file: /storage/chc-comp/eldarica-misc/LIA/Consistency/incremental-2lists.39.smt2 [2018-06-22 10:42:06,325 INFO ]: Parsing .smt2 file as a set of Horn Clauses No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-06-22 10:42:06,411 INFO ]: Executing SMT file /storage/chc-comp/eldarica-misc/LIA/Consistency/incremental-2lists.39.smt2 unknown [2018-06-22 10:42:07,319 INFO ]: Succesfully executed SMT file /storage/chc-comp/eldarica-misc/LIA/Consistency/incremental-2lists.39.smt2 [2018-06-22 10:42:07,325 INFO ]: ####################### [Toolchain 1] ####################### [2018-06-22 10:42:07,333 INFO ]: Walking toolchain with 4 elements. [2018-06-22 10:42:07,334 INFO ]: ------------------------ChcToBoogie---------------------------- [2018-06-22 10:42:07,334 INFO ]: Initializing ChcToBoogie... [2018-06-22 10:42:07,335 INFO ]: ChcToBoogie initialized [2018-06-22 10:42:07,338 INFO ]: Executing the observer ChcToBoogieObserver from plugin ChcToBoogie for "de.uni_freiburg.informatik.ultimate.source.smtparser OTHER 22.06 10:42:07" (1/1) ... [2018-06-22 10:42:07,434 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07 Unit [2018-06-22 10:42:07,434 INFO ]: ------------------------ END ChcToBoogie---------------------------- [2018-06-22 10:42:07,435 INFO ]: ------------------------Boogie Preprocessor---------------------------- [2018-06-22 10:42:07,435 INFO ]: Initializing Boogie Preprocessor... [2018-06-22 10:42:07,435 INFO ]: Boogie Preprocessor initialized [2018-06-22 10:42:07,456 INFO ]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (1/1) ... [2018-06-22 10:42:07,456 INFO ]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (1/1) ... [2018-06-22 10:42:07,480 INFO ]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (1/1) ... [2018-06-22 10:42:07,481 INFO ]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (1/1) ... [2018-06-22 10:42:07,505 INFO ]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (1/1) ... [2018-06-22 10:42:07,510 INFO ]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (1/1) ... [2018-06-22 10:42:07,518 INFO ]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (1/1) ... [2018-06-22 10:42:07,527 INFO ]: ------------------------ END Boogie Preprocessor---------------------------- [2018-06-22 10:42:07,527 INFO ]: ------------------------RCFGBuilder---------------------------- [2018-06-22 10:42:07,527 INFO ]: Initializing RCFGBuilder... [2018-06-22 10:42:07,528 INFO ]: RCFGBuilder initialized [2018-06-22 10:42:07,528 INFO ]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2018-06-22 10:42:07,590 INFO ]: Specification and implementation of procedure False given in one single declaration [2018-06-22 10:42:07,590 INFO ]: Found specification of procedure False [2018-06-22 10:42:07,590 INFO ]: Found implementation of procedure False [2018-06-22 10:42:07,590 INFO ]: Specification and implementation of procedure combined_lturn__bar given in one single declaration [2018-06-22 10:42:07,590 INFO ]: Found specification of procedure combined_lturn__bar [2018-06-22 10:42:07,590 INFO ]: Found implementation of procedure combined_lturn__bar [2018-06-22 10:42:07,590 INFO ]: Specification and implementation of procedure lturn__bar given in one single declaration [2018-06-22 10:42:07,590 INFO ]: Found specification of procedure lturn__bar [2018-06-22 10:42:07,590 INFO ]: Found implementation of procedure lturn__bar [2018-06-22 10:42:07,590 INFO ]: Specification and implementation of procedure step_lturn__bar given in one single declaration [2018-06-22 10:42:07,590 INFO ]: Found specification of procedure step_lturn__bar [2018-06-22 10:42:07,590 INFO ]: Found implementation of procedure step_lturn__bar [2018-06-22 10:42:07,590 INFO ]: Specification and implementation of procedure step_lturn given in one single declaration [2018-06-22 10:42:07,590 INFO ]: Found specification of procedure step_lturn [2018-06-22 10:42:07,590 INFO ]: Found implementation of procedure step_lturn [2018-06-22 10:42:07,590 INFO ]: Specification and implementation of procedure combined_lturn given in one single declaration [2018-06-22 10:42:07,590 INFO ]: Found specification of procedure combined_lturn [2018-06-22 10:42:07,590 INFO ]: Found implementation of procedure combined_lturn [2018-06-22 10:42:07,590 INFO ]: Specification and implementation of procedure lturn given in one single declaration [2018-06-22 10:42:07,591 INFO ]: Found specification of procedure lturn [2018-06-22 10:42:07,591 INFO ]: Found implementation of procedure lturn [2018-06-22 10:42:07,591 INFO ]: Specification and implementation of procedure Ultimate.START given in one single declaration [2018-06-22 10:42:07,591 INFO ]: Found specification of procedure Ultimate.START [2018-06-22 10:42:07,591 INFO ]: Found implementation of procedure Ultimate.START Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-06-22 10:42:09,619 INFO ]: Using library mode [2018-06-22 10:42:09,620 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.06 10:42:09 BoogieIcfgContainer [2018-06-22 10:42:09,620 INFO ]: ------------------------ END RCFGBuilder---------------------------- [2018-06-22 10:42:09,621 INFO ]: ------------------------TraceAbstraction---------------------------- [2018-06-22 10:42:09,621 INFO ]: Initializing TraceAbstraction... [2018-06-22 10:42:09,624 INFO ]: TraceAbstraction initialized [2018-06-22 10:42:09,625 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.source.smtparser OTHER 22.06 10:42:07" (1/3) ... [2018-06-22 10:42:09,625 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1013272 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction OTHER 22.06 10:42:09, skipping insertion in model container [2018-06-22 10:42:09,625 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 22.06 10:42:07" (2/3) ... [2018-06-22 10:42:09,626 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1013272 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.06 10:42:09, skipping insertion in model container [2018-06-22 10:42:09,626 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.06 10:42:09" (3/3) ... [2018-06-22 10:42:09,627 INFO ]: Analyzing ICFG de.uni_freiburg.informatik.ultimate.plugins.chctoboogie.ChcToBoogieObserver [2018-06-22 10:42:09,643 INFO ]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-06-22 10:42:09,655 INFO ]: Appying trace abstraction to program that has 1 error locations. [2018-06-22 10:42:09,712 INFO ]: Using default assertion order modulation [2018-06-22 10:42:09,712 INFO ]: Interprodecural is true [2018-06-22 10:42:09,713 INFO ]: Hoare is false [2018-06-22 10:42:09,713 INFO ]: Compute interpolants for FPandBP [2018-06-22 10:42:09,713 INFO ]: Backedges is TWOTRACK [2018-06-22 10:42:09,713 INFO ]: Determinization is PREDICATE_ABSTRACTION [2018-06-22 10:42:09,713 INFO ]: Difference is false [2018-06-22 10:42:09,713 INFO ]: Minimize is MINIMIZE_SEVPA [2018-06-22 10:42:09,713 INFO ]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-06-22 10:42:09,745 INFO ]: Start isEmpty. Operand 162 states. [2018-06-22 10:42:09,802 INFO ]: Finished isEmpty. Found accepting run of length 18 [2018-06-22 10:42:09,802 INFO ]: Found error trace [2018-06-22 10:42:09,803 INFO ]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 10:42:09,804 INFO ]: === Iteration 1 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 10:42:09,811 INFO ]: Analyzing trace with hash 2019415917, now seen corresponding path program 1 times [2018-06-22 10:42:09,813 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 10:42:09,813 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 10:42:09,844 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:09,844 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 10:42:09,844 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:10,024 INFO ]: Conjunction of SSA is unsat [2018-06-22 10:42:10,344 INFO ]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-22 10:42:10,346 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-22 10:42:10,346 INFO ]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-06-22 10:42:10,348 INFO ]: Interpolant automaton has 6 states [2018-06-22 10:42:10,358 INFO ]: Constructing interpolant automaton starting with 6 interpolants. [2018-06-22 10:42:10,358 INFO ]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-06-22 10:42:10,360 INFO ]: Start difference. First operand 162 states. Second operand 6 states. [2018-06-22 10:42:13,149 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 10:42:13,149 INFO ]: Finished difference Result 240 states and 672 transitions. [2018-06-22 10:42:13,149 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-06-22 10:42:13,150 INFO ]: Start accepts. Automaton has 6 states. Word has length 17 [2018-06-22 10:42:13,151 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 10:42:13,178 INFO ]: With dead ends: 240 [2018-06-22 10:42:13,179 INFO ]: Without dead ends: 228 [2018-06-22 10:42:13,180 INFO ]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-06-22 10:42:13,193 INFO ]: Start minimizeSevpa. Operand 228 states. [2018-06-22 10:42:13,414 INFO ]: Finished minimizeSevpa. Reduced states from 228 to 220. [2018-06-22 10:42:13,415 INFO ]: Start removeUnreachable. Operand 220 states. [2018-06-22 10:42:13,422 INFO ]: Finished removeUnreachable. Reduced from 220 states to 220 states and 634 transitions. [2018-06-22 10:42:13,424 INFO ]: Start accepts. Automaton has 220 states and 634 transitions. Word has length 17 [2018-06-22 10:42:13,424 INFO ]: Finished accepts. word is rejected. [2018-06-22 10:42:13,425 INFO ]: Abstraction has 220 states and 634 transitions. [2018-06-22 10:42:13,425 INFO ]: Interpolant automaton has 6 states. [2018-06-22 10:42:13,425 INFO ]: Start isEmpty. Operand 220 states and 634 transitions. [2018-06-22 10:42:13,434 INFO ]: Finished isEmpty. Found accepting run of length 18 [2018-06-22 10:42:13,434 INFO ]: Found error trace [2018-06-22 10:42:13,434 INFO ]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 10:42:13,434 INFO ]: === Iteration 2 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 10:42:13,435 INFO ]: Analyzing trace with hash 271434409, now seen corresponding path program 1 times [2018-06-22 10:42:13,435 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 10:42:13,435 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 10:42:13,436 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:13,436 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 10:42:13,436 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:13,468 INFO ]: Conjunction of SSA is unsat [2018-06-22 10:42:13,602 INFO ]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-22 10:42:13,602 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-22 10:42:13,603 INFO ]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-06-22 10:42:13,604 INFO ]: Interpolant automaton has 6 states [2018-06-22 10:42:13,604 INFO ]: Constructing interpolant automaton starting with 6 interpolants. [2018-06-22 10:42:13,604 INFO ]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-06-22 10:42:13,604 INFO ]: Start difference. First operand 220 states and 634 transitions. Second operand 6 states. [2018-06-22 10:42:15,616 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 10:42:15,617 INFO ]: Finished difference Result 314 states and 1227 transitions. [2018-06-22 10:42:15,617 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-06-22 10:42:15,617 INFO ]: Start accepts. Automaton has 6 states. Word has length 17 [2018-06-22 10:42:15,617 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 10:42:15,632 INFO ]: With dead ends: 314 [2018-06-22 10:42:15,632 INFO ]: Without dead ends: 314 [2018-06-22 10:42:15,634 INFO ]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-06-22 10:42:15,634 INFO ]: Start minimizeSevpa. Operand 314 states. [2018-06-22 10:42:15,790 INFO ]: Finished minimizeSevpa. Reduced states from 314 to 306. [2018-06-22 10:42:15,790 INFO ]: Start removeUnreachable. Operand 306 states. [2018-06-22 10:42:15,796 INFO ]: Finished removeUnreachable. Reduced from 306 states to 306 states and 1195 transitions. [2018-06-22 10:42:15,796 INFO ]: Start accepts. Automaton has 306 states and 1195 transitions. Word has length 17 [2018-06-22 10:42:15,797 INFO ]: Finished accepts. word is rejected. [2018-06-22 10:42:15,797 INFO ]: Abstraction has 306 states and 1195 transitions. [2018-06-22 10:42:15,797 INFO ]: Interpolant automaton has 6 states. [2018-06-22 10:42:15,797 INFO ]: Start isEmpty. Operand 306 states and 1195 transitions. [2018-06-22 10:42:15,805 INFO ]: Finished isEmpty. Found accepting run of length 18 [2018-06-22 10:42:15,806 INFO ]: Found error trace [2018-06-22 10:42:15,806 INFO ]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 10:42:15,806 INFO ]: === Iteration 3 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 10:42:15,806 INFO ]: Analyzing trace with hash 1949600616, now seen corresponding path program 1 times [2018-06-22 10:42:15,806 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 10:42:15,806 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 10:42:15,807 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:15,807 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 10:42:15,807 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:15,833 INFO ]: Conjunction of SSA is unsat [2018-06-22 10:42:16,239 INFO ]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-22 10:42:16,240 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-22 10:42:16,240 INFO ]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-06-22 10:42:16,240 INFO ]: Interpolant automaton has 6 states [2018-06-22 10:42:16,240 INFO ]: Constructing interpolant automaton starting with 6 interpolants. [2018-06-22 10:42:16,240 INFO ]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-06-22 10:42:16,240 INFO ]: Start difference. First operand 306 states and 1195 transitions. Second operand 6 states. [2018-06-22 10:42:18,594 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 10:42:18,594 INFO ]: Finished difference Result 562 states and 3372 transitions. [2018-06-22 10:42:18,597 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-06-22 10:42:18,597 INFO ]: Start accepts. Automaton has 6 states. Word has length 17 [2018-06-22 10:42:18,597 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 10:42:18,629 INFO ]: With dead ends: 562 [2018-06-22 10:42:18,629 INFO ]: Without dead ends: 562 [2018-06-22 10:42:18,629 INFO ]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-06-22 10:42:18,630 INFO ]: Start minimizeSevpa. Operand 562 states. [2018-06-22 10:42:18,938 INFO ]: Finished minimizeSevpa. Reduced states from 562 to 546. [2018-06-22 10:42:18,938 INFO ]: Start removeUnreachable. Operand 546 states. [2018-06-22 10:42:18,952 INFO ]: Finished removeUnreachable. Reduced from 546 states to 546 states and 3244 transitions. [2018-06-22 10:42:18,952 INFO ]: Start accepts. Automaton has 546 states and 3244 transitions. Word has length 17 [2018-06-22 10:42:18,952 INFO ]: Finished accepts. word is rejected. [2018-06-22 10:42:18,952 INFO ]: Abstraction has 546 states and 3244 transitions. [2018-06-22 10:42:18,952 INFO ]: Interpolant automaton has 6 states. [2018-06-22 10:42:18,952 INFO ]: Start isEmpty. Operand 546 states and 3244 transitions. [2018-06-22 10:42:18,965 INFO ]: Finished isEmpty. Found accepting run of length 22 [2018-06-22 10:42:18,965 INFO ]: Found error trace [2018-06-22 10:42:18,965 INFO ]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 10:42:18,965 INFO ]: === Iteration 4 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 10:42:18,966 INFO ]: Analyzing trace with hash -187734721, now seen corresponding path program 1 times [2018-06-22 10:42:18,966 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 10:42:18,966 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 10:42:18,967 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:18,967 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 10:42:18,967 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:18,997 INFO ]: Conjunction of SSA is unsat [2018-06-22 10:42:19,391 INFO ]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-06-22 10:42:19,391 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-22 10:42:19,391 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-22 10:42:19,406 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 10:42:19,487 INFO ]: Conjunction of SSA is unsat [2018-06-22 10:42:19,499 INFO ]: Computing forward predicates... [2018-06-22 10:42:19,880 INFO ]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-06-22 10:42:19,906 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-22 10:42:19,906 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 11 [2018-06-22 10:42:19,906 INFO ]: Interpolant automaton has 11 states [2018-06-22 10:42:19,906 INFO ]: Constructing interpolant automaton starting with 11 interpolants. [2018-06-22 10:42:19,906 INFO ]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-06-22 10:42:19,906 INFO ]: Start difference. First operand 546 states and 3244 transitions. Second operand 11 states. [2018-06-22 10:42:27,942 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 10:42:27,943 INFO ]: Finished difference Result 880 states and 8650 transitions. [2018-06-22 10:42:27,945 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-06-22 10:42:27,945 INFO ]: Start accepts. Automaton has 11 states. Word has length 21 [2018-06-22 10:42:27,945 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 10:42:28,027 INFO ]: With dead ends: 880 [2018-06-22 10:42:28,028 INFO ]: Without dead ends: 880 [2018-06-22 10:42:28,028 INFO ]: 0 DeclaredPredicates, 37 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=74, Invalid=306, Unknown=0, NotChecked=0, Total=380 [2018-06-22 10:42:28,029 INFO ]: Start minimizeSevpa. Operand 880 states. [2018-06-22 10:42:29,089 INFO ]: Finished minimizeSevpa. Reduced states from 880 to 842. [2018-06-22 10:42:29,089 INFO ]: Start removeUnreachable. Operand 842 states. [2018-06-22 10:42:29,133 INFO ]: Finished removeUnreachable. Reduced from 842 states to 842 states and 8369 transitions. [2018-06-22 10:42:29,134 INFO ]: Start accepts. Automaton has 842 states and 8369 transitions. Word has length 21 [2018-06-22 10:42:29,134 INFO ]: Finished accepts. word is rejected. [2018-06-22 10:42:29,134 INFO ]: Abstraction has 842 states and 8369 transitions. [2018-06-22 10:42:29,134 INFO ]: Interpolant automaton has 11 states. [2018-06-22 10:42:29,134 INFO ]: Start isEmpty. Operand 842 states and 8369 transitions. [2018-06-22 10:42:29,161 INFO ]: Finished isEmpty. Found accepting run of length 22 [2018-06-22 10:42:29,161 INFO ]: Found error trace [2018-06-22 10:42:29,161 INFO ]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 10:42:29,161 INFO ]: === Iteration 5 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 10:42:29,161 INFO ]: Analyzing trace with hash 445468383, now seen corresponding path program 1 times [2018-06-22 10:42:29,161 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 10:42:29,161 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 10:42:29,162 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:29,162 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 10:42:29,162 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:29,206 INFO ]: Conjunction of SSA is unsat [2018-06-22 10:42:29,606 INFO ]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-06-22 10:42:29,606 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-22 10:42:29,606 INFO ]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-06-22 10:42:29,606 INFO ]: Interpolant automaton has 6 states [2018-06-22 10:42:29,606 INFO ]: Constructing interpolant automaton starting with 6 interpolants. [2018-06-22 10:42:29,606 INFO ]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-06-22 10:42:29,606 INFO ]: Start difference. First operand 842 states and 8369 transitions. Second operand 6 states. [2018-06-22 10:42:32,115 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-22 10:42:32,115 INFO ]: Finished difference Result 946 states and 12701 transitions. [2018-06-22 10:42:32,115 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-06-22 10:42:32,115 INFO ]: Start accepts. Automaton has 6 states. Word has length 21 [2018-06-22 10:42:32,115 INFO ]: Finished accepts. some prefix is accepted. [2018-06-22 10:42:32,196 INFO ]: With dead ends: 946 [2018-06-22 10:42:32,196 INFO ]: Without dead ends: 946 [2018-06-22 10:42:32,196 INFO ]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-06-22 10:42:32,197 INFO ]: Start minimizeSevpa. Operand 946 states. [2018-06-22 10:42:33,575 INFO ]: Finished minimizeSevpa. Reduced states from 946 to 914. [2018-06-22 10:42:33,576 INFO ]: Start removeUnreachable. Operand 914 states. [2018-06-22 10:42:33,631 INFO ]: Finished removeUnreachable. Reduced from 914 states to 914 states and 11994 transitions. [2018-06-22 10:42:33,631 INFO ]: Start accepts. Automaton has 914 states and 11994 transitions. Word has length 21 [2018-06-22 10:42:33,631 INFO ]: Finished accepts. word is rejected. [2018-06-22 10:42:33,631 INFO ]: Abstraction has 914 states and 11994 transitions. [2018-06-22 10:42:33,631 INFO ]: Interpolant automaton has 6 states. [2018-06-22 10:42:33,631 INFO ]: Start isEmpty. Operand 914 states and 11994 transitions. [2018-06-22 10:42:33,662 INFO ]: Finished isEmpty. Found accepting run of length 26 [2018-06-22 10:42:33,662 INFO ]: Found error trace [2018-06-22 10:42:33,662 INFO ]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-06-22 10:42:33,662 INFO ]: === Iteration 6 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-22 10:42:33,663 INFO ]: Analyzing trace with hash -529874907, now seen corresponding path program 1 times [2018-06-22 10:42:33,663 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-22 10:42:33,663 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-22 10:42:33,665 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:33,665 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-22 10:42:33,665 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-22 10:42:33,709 INFO ]: Conjunction of SSA is sat [2018-06-22 10:42:33,721 INFO ]: Counterexample might be feasible [2018-06-22 10:42:33,746 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.06 10:42:33 BoogieIcfgContainer [2018-06-22 10:42:33,746 INFO ]: ------------------------ END TraceAbstraction---------------------------- [2018-06-22 10:42:33,747 INFO ]: Toolchain (without parser) took 26422.10 ms. Allocated memory was 321.9 MB in the beginning and 809.0 MB in the end (delta: 487.1 MB). Free memory was 285.4 MB in the beginning and 556.3 MB in the end (delta: -270.9 MB). Peak memory consumption was 216.2 MB. Max. memory is 3.6 GB. [2018-06-22 10:42:33,749 INFO ]: SmtParser took 0.07 ms. Allocated memory is still 308.8 MB. Free memory is still 274.3 MB. There was no memory consumed. Max. memory is 3.6 GB. [2018-06-22 10:42:33,749 INFO ]: ChcToBoogie took 100.07 ms. Allocated memory is still 321.9 MB. Free memory was 285.4 MB in the beginning and 280.8 MB in the end (delta: 4.5 MB). Peak memory consumption was 4.5 MB. Max. memory is 3.6 GB. [2018-06-22 10:42:33,749 INFO ]: Boogie Preprocessor took 92.21 ms. Allocated memory is still 321.9 MB. Free memory was 280.8 MB in the beginning and 277.8 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 3.6 GB. [2018-06-22 10:42:33,750 INFO ]: RCFGBuilder took 2092.48 ms. Allocated memory was 321.9 MB in the beginning and 357.6 MB in the end (delta: 35.7 MB). Free memory was 276.3 MB in the beginning and 272.5 MB in the end (delta: 3.8 MB). Peak memory consumption was 104.7 MB. Max. memory is 3.6 GB. [2018-06-22 10:42:33,750 INFO ]: TraceAbstraction took 24125.05 ms. Allocated memory was 357.6 MB in the beginning and 809.0 MB in the end (delta: 451.4 MB). Free memory was 272.5 MB in the beginning and 556.3 MB in the end (delta: -283.8 MB). Peak memory consumption was 167.7 MB. Max. memory is 3.6 GB. [2018-06-22 10:42:33,756 INFO ]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * SmtParser took 0.07 ms. Allocated memory is still 308.8 MB. Free memory is still 274.3 MB. There was no memory consumed. Max. memory is 3.6 GB. * ChcToBoogie took 100.07 ms. Allocated memory is still 321.9 MB. Free memory was 285.4 MB in the beginning and 280.8 MB in the end (delta: 4.5 MB). Peak memory consumption was 4.5 MB. Max. memory is 3.6 GB. * Boogie Preprocessor took 92.21 ms. Allocated memory is still 321.9 MB. Free memory was 280.8 MB in the beginning and 277.8 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 3.6 GB. * RCFGBuilder took 2092.48 ms. Allocated memory was 321.9 MB in the beginning and 357.6 MB in the end (delta: 35.7 MB). Free memory was 276.3 MB in the beginning and 272.5 MB in the end (delta: 3.8 MB). Peak memory consumption was 104.7 MB. Max. memory is 3.6 GB. * TraceAbstraction took 24125.05 ms. Allocated memory was 357.6 MB in the beginning and 809.0 MB in the end (delta: 451.4 MB). Free memory was 272.5 MB in the beginning and 556.3 MB in the end (delta: -283.8 MB). Peak memory consumption was 167.7 MB. Max. memory is 3.6 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [UNKNOWN] : assertion can be violated assertion can be violated We found a FailurePath: [L0] CALL call False(); [L0] assume true; [L0] CALL call step_lturn(hbv_False_1_Int, hbv_False_2_Int, hbv_False_3_Int, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Int, hbv_False_7_Int, hbv_False_8_Int, hbv_False_9_Int, hbv_False_10_Int, hbv_False_11_Int, hbv_False_12_Int, hbv_False_13_Int, hbv_False_14_Int); [L0] assume true; [L0] CALL call step_lturn(hhv_step_lturn_0_Int, hhv_step_lturn_1_Int, hhv_step_lturn_2_Int, hhv_step_lturn_3_Int, hhv_step_lturn_4_Int, hhv_step_lturn_5_Int, hhv_step_lturn_6_Int, hhv_step_lturn_7_Int, hhv_step_lturn_8_Int, hhv_step_lturn_9_Int, hhv_step_lturn_11_Int, hhv_step_lturn_12_Int, hhv_step_lturn_10_Int, hhv_step_lturn_13_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_12_Int + 1 >= 0 && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_10_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_12_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_0_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_11_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_2_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_9_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_1_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_6_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_6_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_9_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_2_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_2_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_9_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_6_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_0_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_9_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_1_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_12_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_3_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_1_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_7_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_8_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_5_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_0_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_8_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_8_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + -1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_3_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_6_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_7_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_6_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_7_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_6_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_1_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_9_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_7_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_3_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_0_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_8_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_11_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_7_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_0_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_10_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_1_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_6_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_9_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_7_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_10_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_5_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_8_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_12_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_3_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_1_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_6_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_9_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_3_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_11_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_11_Int + -5 >= 0; [L0] RET call step_lturn(hhv_step_lturn_0_Int, hhv_step_lturn_1_Int, hhv_step_lturn_2_Int, hhv_step_lturn_3_Int, hhv_step_lturn_4_Int, hhv_step_lturn_5_Int, hhv_step_lturn_6_Int, hhv_step_lturn_7_Int, hhv_step_lturn_8_Int, hhv_step_lturn_9_Int, hhv_step_lturn_11_Int, hhv_step_lturn_12_Int, hhv_step_lturn_10_Int, hhv_step_lturn_13_Int); [L0] RET call step_lturn(hbv_False_1_Int, hbv_False_2_Int, hbv_False_3_Int, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Int, hbv_False_7_Int, hbv_False_8_Int, hbv_False_9_Int, hbv_False_10_Int, hbv_False_11_Int, hbv_False_12_Int, hbv_False_13_Int, hbv_False_14_Int); [L0] CALL call combined_lturn(hbv_False_1_Int, hbv_False_2_Int, hbv_False_3_Int, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Int, hbv_False_7_Int, hbv_False_8_Int, hbv_False_9_Int, hbv_False_10_Int, hbv_False_11_Int, hbv_False_13_Int, hbv_False_12_Int, hbv_False_14_Int); [L0] assume true; [L0] CALL call lturn(hhv_combined_lturn_0_Int, hhv_combined_lturn_1_Int, hhv_combined_lturn_2_Int, hhv_combined_lturn_3_Int, hhv_combined_lturn_4_Int, hhv_combined_lturn_5_Int, hhv_combined_lturn_6_Int, hhv_combined_lturn_7_Int, hhv_combined_lturn_8_Int, hhv_combined_lturn_9_Int, hhv_combined_lturn_10_Int, hhv_combined_lturn_11_Int, hhv_combined_lturn_12_Int, hhv_combined_lturn_13_Int); [L0] assume true; [L0] CALL call step_lturn(hhv_lturn_0_Int, hhv_lturn_1_Int, hhv_lturn_2_Int, hhv_lturn_3_Int, hhv_lturn_4_Int, hhv_lturn_5_Int, hhv_lturn_6_Int, hhv_lturn_7_Int, hhv_lturn_8_Int, hhv_lturn_9_Int, hhv_lturn_11_Int, hhv_lturn_12_Int, hhv_lturn_10_Int, hhv_lturn_13_Int); [L0] assume ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_12_Int + 1 >= 0 && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_10_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_12_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_0_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_11_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_2_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_9_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_12_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_1_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_6_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_6_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_9_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_2_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_2_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_9_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_6_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_0_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_9_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_1_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_12_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_3_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_1_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_7_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + -1 * hhv_step_lturn_8_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_10_Int + -5 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_2_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_5_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_0_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_8_Int + 2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_8_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_11_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + -1 * hhv_step_lturn_10_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_3_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_6_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_7_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_6_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_7_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_11_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_6_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + -1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_1_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_9_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 * hhv_step_lturn_8_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_7_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_7_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_3_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_0_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_3_Int + -3 >= 0) && 0 + -1 * hhv_step_lturn_6_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_8_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + 1 * hhv_step_lturn_8_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_11_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_7_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_0_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_7_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_11_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_10_Int + -4 >= 0) && 0 + -1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_1_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_2_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_6_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_11_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_9_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_6_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_7_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_12_Int + 0 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_1_Int + 1 * hhv_step_lturn_10_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_8_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_9_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_5_Int + 1 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_2_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_9_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_2_Int + 1 * hhv_step_lturn_10_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_10_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_8_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_12_Int + -7 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_3_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_10_Int + -2 >= 0) && 0 + -1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_12_Int + -1 >= 0) && 0 + 1 * hhv_step_lturn_12_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_1_Int + -6 >= 0) && 0 + 1 * hhv_step_lturn_0_Int + -1 * hhv_step_lturn_6_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + -1 * hhv_step_lturn_9_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + 1 * hhv_step_lturn_3_Int + -5 >= 0) && 0 + 1 * hhv_step_lturn_3_Int + 1 * hhv_step_lturn_11_Int + -3 >= 0) && 0 + 1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_12_Int + -4 >= 0) && 0 + 1 * hhv_step_lturn_5_Int + -1 * hhv_step_lturn_3_Int + -1 >= 0) && 0 + -1 * hhv_step_lturn_8_Int + 1 * hhv_step_lturn_12_Int + -2 >= 0) && 0 + 1 * hhv_step_lturn_4_Int + 1 * hhv_step_lturn_11_Int + -5 >= 0; [L0] RET call step_lturn(hhv_lturn_0_Int, hhv_lturn_1_Int, hhv_lturn_2_Int, hhv_lturn_3_Int, hhv_lturn_4_Int, hhv_lturn_5_Int, hhv_lturn_6_Int, hhv_lturn_7_Int, hhv_lturn_8_Int, hhv_lturn_9_Int, hhv_lturn_11_Int, hhv_lturn_12_Int, hhv_lturn_10_Int, hhv_lturn_13_Int); [L0] RET call lturn(hhv_combined_lturn_0_Int, hhv_combined_lturn_1_Int, hhv_combined_lturn_2_Int, hhv_combined_lturn_3_Int, hhv_combined_lturn_4_Int, hhv_combined_lturn_5_Int, hhv_combined_lturn_6_Int, hhv_combined_lturn_7_Int, hhv_combined_lturn_8_Int, hhv_combined_lturn_9_Int, hhv_combined_lturn_10_Int, hhv_combined_lturn_11_Int, hhv_combined_lturn_12_Int, hhv_combined_lturn_13_Int); [L0] RET call combined_lturn(hbv_False_1_Int, hbv_False_2_Int, hbv_False_3_Int, hbv_False_4_Int, hbv_False_5_Int, hbv_False_6_Int, hbv_False_7_Int, hbv_False_8_Int, hbv_False_9_Int, hbv_False_10_Int, hbv_False_11_Int, hbv_False_13_Int, hbv_False_12_Int, hbv_False_14_Int); [L0] RET call False(); [L0] assert false; - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 162 locations, 1 error locations. UNSAFE Result, 24.0s OverallTime, 6 OverallIterations, 3 TraceHistogramMax, 17.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1499 SDtfs, 77 SDslu, 6233 SDs, 0 SdLazy, 11015 SolverSat, 812 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 15.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 62 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=914occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 3.2s AutomataMinimizationTime, 5 MinimizatonAttempts, 102 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 139 NumberOfCodeBlocks, 139 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 108 ConstructedInterpolants, 0 QuantifiedInterpolants, 5248 SizeOfPredicates, 3 NumberOfNonLiveVariables, 467 ConjunctsInSsa, 11 ConjunctsInUnsatCore, 6 InterpolantComputations, 4 PerfectInterpolantSequences, 11/21 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/incremental-2lists.39.smt2_AutomizerCHC_No_Goto.epf_AutomizerCHC.xml/Csv-Benchmark-0-2018-06-22_10-42-33-770.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/incremental-2lists.39.smt2_AutomizerCHC_No_Goto.epf_AutomizerCHC.xml/Csv-TraceAbstractionBenchmarks-0-2018-06-22_10-42-33-770.csv Received shutdown request...