java -Xss4m -Xmx4000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCHC_wBE.xml --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -s ../../../trunk/examples/settings/chc/AutomizerCHC/AutomizerCHC_Goto.epf -i /storage/chc-comp/eldarica-misc/LIA/reve/003d-horn.smt2 -------------------------------------------------------------------------------- This is Ultimate 0.1.23-14921ce [2018-06-24 20:56:10,385 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-06-24 20:56:10,387 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-06-24 20:56:10,400 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-06-24 20:56:10,401 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-06-24 20:56:10,406 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-06-24 20:56:10,407 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-06-24 20:56:10,409 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-06-24 20:56:10,411 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-06-24 20:56:10,413 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-06-24 20:56:10,414 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-06-24 20:56:10,414 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-06-24 20:56:10,415 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-06-24 20:56:10,416 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-06-24 20:56:10,421 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-06-24 20:56:10,422 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-06-24 20:56:10,424 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-06-24 20:56:10,437 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-06-24 20:56:10,438 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-06-24 20:56:10,439 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-06-24 20:56:10,440 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-06-24 20:56:10,443 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-06-24 20:56:10,443 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-06-24 20:56:10,443 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-06-24 20:56:10,448 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-06-24 20:56:10,449 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-06-24 20:56:10,450 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-06-24 20:56:10,451 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-06-24 20:56:10,452 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-06-24 20:56:10,457 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-06-24 20:56:10,458 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-06-24 20:56:10,458 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-06-24 20:56:10,458 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-06-24 20:56:10,459 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-06-24 20:56:10,460 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-06-24 20:56:10,460 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/chc/AutomizerCHC/AutomizerCHC_Goto.epf [2018-06-24 20:56:10,484 INFO L110 SettingsManager]: Loading preferences was successful [2018-06-24 20:56:10,484 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-06-24 20:56:10,484 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-06-24 20:56:10,485 INFO L133 SettingsManager]: * Logger pattern=[%d{ISO8601} %-5p]: %m%n [2018-06-24 20:56:10,486 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-06-24 20:56:10,486 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-06-24 20:56:10,486 INFO L133 SettingsManager]: * Create interprocedural compositions=false [2018-06-24 20:56:10,486 INFO L133 SettingsManager]: * Use SBE=true [2018-06-24 20:56:10,486 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-06-24 20:56:10,487 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-06-24 20:56:10,487 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-06-24 20:56:10,487 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-06-24 20:56:10,487 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-06-24 20:56:10,487 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-06-24 20:56:10,488 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-06-24 20:56:10,488 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-06-24 20:56:10,488 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-06-24 20:56:10,488 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-06-24 20:56:10,488 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-06-24 20:56:10,488 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-06-24 20:56:10,489 INFO L133 SettingsManager]: * Compute trace for counterexample result=false [2018-06-24 20:56:10,490 INFO L131 SettingsManager]: Preferences of SmtParser differ from their defaults: [2018-06-24 20:56:10,490 INFO L133 SettingsManager]: * Use TreeAutomizer as solver for the given file (assumes the file contains Horn clauses only).=true [2018-06-24 20:56:10,525 INFO ]: Repository-Root is: /tmp [2018-06-24 20:56:10,540 INFO ]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-06-24 20:56:10,545 INFO ]: [Toolchain 1]: Toolchain data selected. [2018-06-24 20:56:10,547 INFO ]: Initializing SmtParser... [2018-06-24 20:56:10,547 INFO ]: SmtParser initialized [2018-06-24 20:56:10,547 INFO ]: [Toolchain 1]: Parsing single file: /storage/chc-comp/eldarica-misc/LIA/reve/003d-horn.smt2 [2018-06-24 20:56:10,549 INFO ]: Parsing .smt2 file as a set of Horn Clauses No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-06-24 20:56:10,638 INFO ]: Executing SMT file /storage/chc-comp/eldarica-misc/LIA/reve/003d-horn.smt2 unknown [2018-06-24 20:56:10,857 INFO ]: Succesfully executed SMT file /storage/chc-comp/eldarica-misc/LIA/reve/003d-horn.smt2 [2018-06-24 20:56:10,861 INFO ]: ####################### [Toolchain 1] ####################### [2018-06-24 20:56:10,874 INFO ]: Walking toolchain with 5 elements. [2018-06-24 20:56:10,875 INFO ]: ------------------------ChcToBoogie---------------------------- [2018-06-24 20:56:10,875 INFO ]: Initializing ChcToBoogie... [2018-06-24 20:56:10,875 INFO ]: ChcToBoogie initialized [2018-06-24 20:56:10,878 INFO ]: Executing the observer ChcToBoogieObserver from plugin ChcToBoogie for "de.uni_freiburg.informatik.ultimate.source.smtparser OTHER 24.06 08:56:10" (1/1) ... [2018-06-24 20:56:10,940 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10 Unit [2018-06-24 20:56:10,940 INFO ]: ------------------------ END ChcToBoogie---------------------------- [2018-06-24 20:56:10,941 INFO ]: ------------------------Boogie Preprocessor---------------------------- [2018-06-24 20:56:10,941 INFO ]: Initializing Boogie Preprocessor... [2018-06-24 20:56:10,941 INFO ]: Boogie Preprocessor initialized [2018-06-24 20:56:10,959 INFO ]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (1/1) ... [2018-06-24 20:56:10,959 INFO ]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (1/1) ... [2018-06-24 20:56:10,964 INFO ]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (1/1) ... [2018-06-24 20:56:10,964 INFO ]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (1/1) ... [2018-06-24 20:56:10,968 INFO ]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (1/1) ... [2018-06-24 20:56:10,970 INFO ]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (1/1) ... [2018-06-24 20:56:10,971 INFO ]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (1/1) ... [2018-06-24 20:56:10,972 INFO ]: ------------------------ END Boogie Preprocessor---------------------------- [2018-06-24 20:56:10,973 INFO ]: ------------------------RCFGBuilder---------------------------- [2018-06-24 20:56:10,973 INFO ]: Initializing RCFGBuilder... [2018-06-24 20:56:10,973 INFO ]: RCFGBuilder initialized [2018-06-24 20:56:10,974 INFO ]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2018-06-24 20:56:10,989 INFO ]: Specification and implementation of procedure gotoProc given in one single declaration [2018-06-24 20:56:10,989 INFO ]: Found specification of procedure gotoProc [2018-06-24 20:56:10,989 INFO ]: Found implementation of procedure gotoProc [2018-06-24 20:56:10,989 INFO ]: Specification and implementation of procedure Ultimate.START given in one single declaration [2018-06-24 20:56:10,989 INFO ]: Found specification of procedure Ultimate.START [2018-06-24 20:56:10,989 INFO ]: Found implementation of procedure Ultimate.START Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-06-24 20:56:11,285 INFO ]: Using library mode [2018-06-24 20:56:11,285 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.06 08:56:11 BoogieIcfgContainer [2018-06-24 20:56:11,285 INFO ]: ------------------------ END RCFGBuilder---------------------------- [2018-06-24 20:56:11,286 INFO ]: ------------------------BlockEncodingV2---------------------------- [2018-06-24 20:56:11,286 INFO ]: Initializing BlockEncodingV2... [2018-06-24 20:56:11,287 INFO ]: BlockEncodingV2 initialized [2018-06-24 20:56:11,287 INFO ]: Executing the observer BlockEncodingObserver from plugin BlockEncodingV2 for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.06 08:56:11" (1/1) ... [2018-06-24 20:56:11,306 INFO ]: Initial Icfg 10 locations, 14 edges [2018-06-24 20:56:11,307 INFO ]: Using Remove infeasible edges [2018-06-24 20:56:11,307 INFO ]: Using Maximize final states [2018-06-24 20:56:11,308 INFO ]: Using Minimize states even if more edges are added than removed.=false [2018-06-24 20:56:11,309 INFO ]: Using Minimize states using LBE with the strategy=MULTI [2018-06-24 20:56:11,310 INFO ]: Using Remove sink states [2018-06-24 20:56:11,311 INFO ]: Using Apply optimizations until nothing changes=true [2018-06-24 20:56:11,311 INFO ]: Using Use SBE [2018-06-24 20:56:11,320 INFO ]: SBE split 0 edges [2018-06-24 20:56:11,326 INFO ]: Removed 2 edges and 2 locations because of local infeasibility [2018-06-24 20:56:11,328 INFO ]: 0 new accepting states [2018-06-24 20:56:11,357 INFO ]: Removed 4 edges and 2 locations by large block encoding [2018-06-24 20:56:11,359 INFO ]: Removed 0 edges and 0 locations by removing sink states [2018-06-24 20:56:11,363 INFO ]: Removed 0 edges and 0 locations because of local infeasibility [2018-06-24 20:56:11,363 INFO ]: 0 new accepting states [2018-06-24 20:56:11,363 INFO ]: Removed 0 edges and 0 locations by large block encoding [2018-06-24 20:56:11,364 INFO ]: Removed 0 edges and 0 locations by removing sink states [2018-06-24 20:56:11,364 INFO ]: Encoded RCFG 6 locations, 10 edges [2018-06-24 20:56:11,364 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 24.06 08:56:11 BasicIcfg [2018-06-24 20:56:11,364 INFO ]: ------------------------ END BlockEncodingV2---------------------------- [2018-06-24 20:56:11,365 INFO ]: ------------------------TraceAbstraction---------------------------- [2018-06-24 20:56:11,365 INFO ]: Initializing TraceAbstraction... [2018-06-24 20:56:11,372 INFO ]: TraceAbstraction initialized [2018-06-24 20:56:11,372 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.source.smtparser OTHER 24.06 08:56:10" (1/4) ... [2018-06-24 20:56:11,373 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b566503 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction OTHER 24.06 08:56:11, skipping insertion in model container [2018-06-24 20:56:11,373 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.chctoboogie AST 24.06 08:56:10" (2/4) ... [2018-06-24 20:56:11,373 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b566503 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.06 08:56:11, skipping insertion in model container [2018-06-24 20:56:11,374 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.06 08:56:11" (3/4) ... [2018-06-24 20:56:11,374 INFO ]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b566503 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.06 08:56:11, skipping insertion in model container [2018-06-24 20:56:11,374 INFO ]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 24.06 08:56:11" (4/4) ... [2018-06-24 20:56:11,377 INFO ]: Analyzing ICFG de.uni_freiburg.informatik.ultimate.plugins.chctoboogie.ChcToBoogieObserver_BEv2 [2018-06-24 20:56:11,387 INFO ]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-06-24 20:56:11,395 INFO ]: Appying trace abstraction to program that has 1 error locations. [2018-06-24 20:56:11,435 INFO ]: Using default assertion order modulation [2018-06-24 20:56:11,436 INFO ]: Interprodecural is true [2018-06-24 20:56:11,436 INFO ]: Hoare is false [2018-06-24 20:56:11,436 INFO ]: Compute interpolants for FPandBP [2018-06-24 20:56:11,436 INFO ]: Backedges is TWOTRACK [2018-06-24 20:56:11,436 INFO ]: Determinization is PREDICATE_ABSTRACTION [2018-06-24 20:56:11,436 INFO ]: Difference is false [2018-06-24 20:56:11,436 INFO ]: Minimize is MINIMIZE_SEVPA [2018-06-24 20:56:11,436 INFO ]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-06-24 20:56:11,445 INFO ]: Start isEmpty. Operand 6 states. [2018-06-24 20:56:11,455 INFO ]: Finished isEmpty. Found accepting run of length 6 [2018-06-24 20:56:11,455 INFO ]: Found error trace [2018-06-24 20:56:11,456 INFO ]: trace histogram [1, 1, 1, 1, 1] [2018-06-24 20:56:11,456 INFO ]: === Iteration 1 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:11,461 INFO ]: Analyzing trace with hash 39219782, now seen corresponding path program 1 times [2018-06-24 20:56:11,463 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:11,464 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:11,498 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:11,498 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:11,498 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:11,559 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:11,701 INFO ]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:11,703 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-24 20:56:11,703 INFO ]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-06-24 20:56:11,704 INFO ]: Interpolant automaton has 3 states [2018-06-24 20:56:11,717 INFO ]: Constructing interpolant automaton starting with 3 interpolants. [2018-06-24 20:56:11,717 INFO ]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:11,720 INFO ]: Start difference. First operand 6 states. Second operand 3 states. [2018-06-24 20:56:11,853 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:11,853 INFO ]: Finished difference Result 7 states and 15 transitions. [2018-06-24 20:56:11,853 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-06-24 20:56:11,854 INFO ]: Start accepts. Automaton has 3 states. Word has length 5 [2018-06-24 20:56:11,854 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:11,861 INFO ]: With dead ends: 7 [2018-06-24 20:56:11,861 INFO ]: Without dead ends: 7 [2018-06-24 20:56:11,863 INFO ]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:11,876 INFO ]: Start minimizeSevpa. Operand 7 states. [2018-06-24 20:56:11,894 INFO ]: Finished minimizeSevpa. Reduced states from 7 to 7. [2018-06-24 20:56:11,895 INFO ]: Start removeUnreachable. Operand 7 states. [2018-06-24 20:56:11,896 INFO ]: Finished removeUnreachable. Reduced from 7 states to 7 states and 15 transitions. [2018-06-24 20:56:11,897 INFO ]: Start accepts. Automaton has 7 states and 15 transitions. Word has length 5 [2018-06-24 20:56:11,897 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:11,897 INFO ]: Abstraction has 7 states and 15 transitions. [2018-06-24 20:56:11,897 INFO ]: Interpolant automaton has 3 states. [2018-06-24 20:56:11,897 INFO ]: Start isEmpty. Operand 7 states and 15 transitions. [2018-06-24 20:56:11,898 INFO ]: Finished isEmpty. Found accepting run of length 7 [2018-06-24 20:56:11,898 INFO ]: Found error trace [2018-06-24 20:56:11,898 INFO ]: trace histogram [1, 1, 1, 1, 1, 1] [2018-06-24 20:56:11,898 INFO ]: === Iteration 2 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:11,898 INFO ]: Analyzing trace with hash 1215398253, now seen corresponding path program 1 times [2018-06-24 20:56:11,898 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:11,898 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:11,898 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:11,898 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:11,898 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:11,916 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:11,998 INFO ]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:11,998 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-24 20:56:11,998 INFO ]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-06-24 20:56:11,999 INFO ]: Interpolant automaton has 3 states [2018-06-24 20:56:11,999 INFO ]: Constructing interpolant automaton starting with 3 interpolants. [2018-06-24 20:56:11,999 INFO ]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:12,000 INFO ]: Start difference. First operand 7 states and 15 transitions. Second operand 3 states. [2018-06-24 20:56:12,084 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:12,084 INFO ]: Finished difference Result 8 states and 20 transitions. [2018-06-24 20:56:12,085 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-06-24 20:56:12,085 INFO ]: Start accepts. Automaton has 3 states. Word has length 6 [2018-06-24 20:56:12,085 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:12,085 INFO ]: With dead ends: 8 [2018-06-24 20:56:12,085 INFO ]: Without dead ends: 7 [2018-06-24 20:56:12,086 INFO ]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:12,086 INFO ]: Start minimizeSevpa. Operand 7 states. [2018-06-24 20:56:12,087 INFO ]: Finished minimizeSevpa. Reduced states from 7 to 7. [2018-06-24 20:56:12,087 INFO ]: Start removeUnreachable. Operand 7 states. [2018-06-24 20:56:12,087 INFO ]: Finished removeUnreachable. Reduced from 7 states to 7 states and 11 transitions. [2018-06-24 20:56:12,088 INFO ]: Start accepts. Automaton has 7 states and 11 transitions. Word has length 6 [2018-06-24 20:56:12,088 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:12,088 INFO ]: Abstraction has 7 states and 11 transitions. [2018-06-24 20:56:12,088 INFO ]: Interpolant automaton has 3 states. [2018-06-24 20:56:12,088 INFO ]: Start isEmpty. Operand 7 states and 11 transitions. [2018-06-24 20:56:12,088 INFO ]: Finished isEmpty. Found accepting run of length 7 [2018-06-24 20:56:12,088 INFO ]: Found error trace [2018-06-24 20:56:12,088 INFO ]: trace histogram [1, 1, 1, 1, 1, 1] [2018-06-24 20:56:12,088 INFO ]: === Iteration 3 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:12,088 INFO ]: Analyzing trace with hash 1215428044, now seen corresponding path program 1 times [2018-06-24 20:56:12,088 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:12,088 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:12,093 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:12,093 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:12,093 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:12,113 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:12,149 INFO ]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:12,149 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-24 20:56:12,149 INFO ]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-06-24 20:56:12,149 INFO ]: Interpolant automaton has 3 states [2018-06-24 20:56:12,149 INFO ]: Constructing interpolant automaton starting with 3 interpolants. [2018-06-24 20:56:12,149 INFO ]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:12,149 INFO ]: Start difference. First operand 7 states and 11 transitions. Second operand 3 states. [2018-06-24 20:56:12,245 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:12,245 INFO ]: Finished difference Result 8 states and 14 transitions. [2018-06-24 20:56:12,245 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-06-24 20:56:12,245 INFO ]: Start accepts. Automaton has 3 states. Word has length 6 [2018-06-24 20:56:12,245 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:12,246 INFO ]: With dead ends: 8 [2018-06-24 20:56:12,246 INFO ]: Without dead ends: 8 [2018-06-24 20:56:12,246 INFO ]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:12,246 INFO ]: Start minimizeSevpa. Operand 8 states. [2018-06-24 20:56:12,247 INFO ]: Finished minimizeSevpa. Reduced states from 8 to 8. [2018-06-24 20:56:12,247 INFO ]: Start removeUnreachable. Operand 8 states. [2018-06-24 20:56:12,248 INFO ]: Finished removeUnreachable. Reduced from 8 states to 8 states and 14 transitions. [2018-06-24 20:56:12,248 INFO ]: Start accepts. Automaton has 8 states and 14 transitions. Word has length 6 [2018-06-24 20:56:12,248 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:12,248 INFO ]: Abstraction has 8 states and 14 transitions. [2018-06-24 20:56:12,248 INFO ]: Interpolant automaton has 3 states. [2018-06-24 20:56:12,248 INFO ]: Start isEmpty. Operand 8 states and 14 transitions. [2018-06-24 20:56:12,249 INFO ]: Finished isEmpty. Found accepting run of length 7 [2018-06-24 20:56:12,249 INFO ]: Found error trace [2018-06-24 20:56:12,249 INFO ]: trace histogram [1, 1, 1, 1, 1, 1] [2018-06-24 20:56:12,249 INFO ]: === Iteration 4 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:12,249 INFO ]: Analyzing trace with hash 1215487626, now seen corresponding path program 1 times [2018-06-24 20:56:12,249 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:12,249 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:12,250 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:12,250 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:12,250 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:12,265 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:12,321 INFO ]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:12,321 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-24 20:56:12,321 INFO ]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-06-24 20:56:12,321 INFO ]: Interpolant automaton has 3 states [2018-06-24 20:56:12,321 INFO ]: Constructing interpolant automaton starting with 3 interpolants. [2018-06-24 20:56:12,321 INFO ]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:12,321 INFO ]: Start difference. First operand 8 states and 14 transitions. Second operand 3 states. [2018-06-24 20:56:12,429 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:12,429 INFO ]: Finished difference Result 10 states and 20 transitions. [2018-06-24 20:56:12,429 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-06-24 20:56:12,429 INFO ]: Start accepts. Automaton has 3 states. Word has length 6 [2018-06-24 20:56:12,429 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:12,429 INFO ]: With dead ends: 10 [2018-06-24 20:56:12,429 INFO ]: Without dead ends: 8 [2018-06-24 20:56:12,430 INFO ]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:12,430 INFO ]: Start minimizeSevpa. Operand 8 states. [2018-06-24 20:56:12,431 INFO ]: Finished minimizeSevpa. Reduced states from 8 to 7. [2018-06-24 20:56:12,431 INFO ]: Start removeUnreachable. Operand 7 states. [2018-06-24 20:56:12,431 INFO ]: Finished removeUnreachable. Reduced from 7 states to 7 states and 9 transitions. [2018-06-24 20:56:12,431 INFO ]: Start accepts. Automaton has 7 states and 9 transitions. Word has length 6 [2018-06-24 20:56:12,431 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:12,431 INFO ]: Abstraction has 7 states and 9 transitions. [2018-06-24 20:56:12,431 INFO ]: Interpolant automaton has 3 states. [2018-06-24 20:56:12,431 INFO ]: Start isEmpty. Operand 7 states and 9 transitions. [2018-06-24 20:56:12,432 INFO ]: Finished isEmpty. Found accepting run of length 7 [2018-06-24 20:56:12,432 INFO ]: Found error trace [2018-06-24 20:56:12,432 INFO ]: trace histogram [1, 1, 1, 1, 1, 1] [2018-06-24 20:56:12,432 INFO ]: === Iteration 5 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:12,432 INFO ]: Analyzing trace with hash 1215547208, now seen corresponding path program 1 times [2018-06-24 20:56:12,432 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:12,432 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:12,433 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:12,433 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:12,433 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:12,458 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:12,753 WARN ]: Spent 154.00 ms on a formula simplification that was a NOOP. DAG size: 22 [2018-06-24 20:56:12,754 INFO ]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:12,754 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:12,754 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:12,765 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:12,812 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:12,823 INFO ]: Computing forward predicates... [2018-06-24 20:56:12,869 INFO ]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:12,903 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:12,903 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 5 [2018-06-24 20:56:12,903 INFO ]: Interpolant automaton has 5 states [2018-06-24 20:56:12,903 INFO ]: Constructing interpolant automaton starting with 5 interpolants. [2018-06-24 20:56:12,904 INFO ]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-06-24 20:56:12,904 INFO ]: Start difference. First operand 7 states and 9 transitions. Second operand 5 states. [2018-06-24 20:56:13,056 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:13,057 INFO ]: Finished difference Result 11 states and 17 transitions. [2018-06-24 20:56:13,057 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-06-24 20:56:13,057 INFO ]: Start accepts. Automaton has 5 states. Word has length 6 [2018-06-24 20:56:13,057 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:13,057 INFO ]: With dead ends: 11 [2018-06-24 20:56:13,057 INFO ]: Without dead ends: 11 [2018-06-24 20:56:13,058 INFO ]: 0 DeclaredPredicates, 9 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-06-24 20:56:13,058 INFO ]: Start minimizeSevpa. Operand 11 states. [2018-06-24 20:56:13,059 INFO ]: Finished minimizeSevpa. Reduced states from 11 to 9. [2018-06-24 20:56:13,059 INFO ]: Start removeUnreachable. Operand 9 states. [2018-06-24 20:56:13,059 INFO ]: Finished removeUnreachable. Reduced from 9 states to 9 states and 13 transitions. [2018-06-24 20:56:13,059 INFO ]: Start accepts. Automaton has 9 states and 13 transitions. Word has length 6 [2018-06-24 20:56:13,059 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:13,059 INFO ]: Abstraction has 9 states and 13 transitions. [2018-06-24 20:56:13,059 INFO ]: Interpolant automaton has 5 states. [2018-06-24 20:56:13,059 INFO ]: Start isEmpty. Operand 9 states and 13 transitions. [2018-06-24 20:56:13,060 INFO ]: Finished isEmpty. Found accepting run of length 9 [2018-06-24 20:56:13,060 INFO ]: Found error trace [2018-06-24 20:56:13,060 INFO ]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:13,060 INFO ]: === Iteration 6 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:13,060 INFO ]: Analyzing trace with hash -216961400, now seen corresponding path program 1 times [2018-06-24 20:56:13,060 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:13,060 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:13,061 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:13,061 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:13,061 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:13,110 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:13,169 INFO ]: Checked inductivity of 6 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-06-24 20:56:13,169 INFO ]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-06-24 20:56:13,169 INFO ]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-06-24 20:56:13,169 INFO ]: Interpolant automaton has 3 states [2018-06-24 20:56:13,169 INFO ]: Constructing interpolant automaton starting with 3 interpolants. [2018-06-24 20:56:13,169 INFO ]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:13,169 INFO ]: Start difference. First operand 9 states and 13 transitions. Second operand 3 states. [2018-06-24 20:56:13,179 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:13,179 INFO ]: Finished difference Result 12 states and 17 transitions. [2018-06-24 20:56:13,179 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-06-24 20:56:13,179 INFO ]: Start accepts. Automaton has 3 states. Word has length 8 [2018-06-24 20:56:13,179 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:13,180 INFO ]: With dead ends: 12 [2018-06-24 20:56:13,180 INFO ]: Without dead ends: 12 [2018-06-24 20:56:13,180 INFO ]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-06-24 20:56:13,180 INFO ]: Start minimizeSevpa. Operand 12 states. [2018-06-24 20:56:13,182 INFO ]: Finished minimizeSevpa. Reduced states from 12 to 12. [2018-06-24 20:56:13,182 INFO ]: Start removeUnreachable. Operand 12 states. [2018-06-24 20:56:13,182 INFO ]: Finished removeUnreachable. Reduced from 12 states to 12 states and 17 transitions. [2018-06-24 20:56:13,182 INFO ]: Start accepts. Automaton has 12 states and 17 transitions. Word has length 8 [2018-06-24 20:56:13,182 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:13,182 INFO ]: Abstraction has 12 states and 17 transitions. [2018-06-24 20:56:13,182 INFO ]: Interpolant automaton has 3 states. [2018-06-24 20:56:13,182 INFO ]: Start isEmpty. Operand 12 states and 17 transitions. [2018-06-24 20:56:13,183 INFO ]: Finished isEmpty. Found accepting run of length 9 [2018-06-24 20:56:13,183 INFO ]: Found error trace [2018-06-24 20:56:13,183 INFO ]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:13,183 INFO ]: === Iteration 7 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:13,183 INFO ]: Analyzing trace with hash -213267316, now seen corresponding path program 2 times [2018-06-24 20:56:13,183 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:13,183 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:13,185 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:13,185 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:13,185 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:13,203 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:13,270 INFO ]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:13,270 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:13,270 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:13,276 INFO ]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-06-24 20:56:13,335 INFO ]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-06-24 20:56:13,335 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:13,338 INFO ]: Computing forward predicates... [2018-06-24 20:56:13,347 INFO ]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:13,380 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:13,380 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-06-24 20:56:13,381 INFO ]: Interpolant automaton has 5 states [2018-06-24 20:56:13,381 INFO ]: Constructing interpolant automaton starting with 5 interpolants. [2018-06-24 20:56:13,381 INFO ]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-06-24 20:56:13,381 INFO ]: Start difference. First operand 12 states and 17 transitions. Second operand 5 states. [2018-06-24 20:56:13,562 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:13,562 INFO ]: Finished difference Result 15 states and 20 transitions. [2018-06-24 20:56:13,563 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-06-24 20:56:13,563 INFO ]: Start accepts. Automaton has 5 states. Word has length 8 [2018-06-24 20:56:13,563 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:13,564 INFO ]: With dead ends: 15 [2018-06-24 20:56:13,564 INFO ]: Without dead ends: 15 [2018-06-24 20:56:13,564 INFO ]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-06-24 20:56:13,564 INFO ]: Start minimizeSevpa. Operand 15 states. [2018-06-24 20:56:13,566 INFO ]: Finished minimizeSevpa. Reduced states from 15 to 13. [2018-06-24 20:56:13,566 INFO ]: Start removeUnreachable. Operand 13 states. [2018-06-24 20:56:13,566 INFO ]: Finished removeUnreachable. Reduced from 13 states to 13 states and 18 transitions. [2018-06-24 20:56:13,566 INFO ]: Start accepts. Automaton has 13 states and 18 transitions. Word has length 8 [2018-06-24 20:56:13,566 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:13,566 INFO ]: Abstraction has 13 states and 18 transitions. [2018-06-24 20:56:13,566 INFO ]: Interpolant automaton has 5 states. [2018-06-24 20:56:13,566 INFO ]: Start isEmpty. Operand 13 states and 18 transitions. [2018-06-24 20:56:13,566 INFO ]: Finished isEmpty. Found accepting run of length 9 [2018-06-24 20:56:13,566 INFO ]: Found error trace [2018-06-24 20:56:13,566 INFO ]: trace histogram [3, 1, 1, 1, 1, 1] [2018-06-24 20:56:13,567 INFO ]: === Iteration 8 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:13,567 INFO ]: Analyzing trace with hash -98750712, now seen corresponding path program 2 times [2018-06-24 20:56:13,567 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:13,567 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:13,567 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:13,567 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:13,567 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:13,609 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:14,076 WARN ]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 16 [2018-06-24 20:56:14,077 INFO ]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:14,078 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:14,078 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:14,094 INFO ]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-06-24 20:56:14,152 INFO ]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-06-24 20:56:14,152 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:14,155 INFO ]: Computing forward predicates... [2018-06-24 20:56:14,215 INFO ]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:14,237 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:14,237 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-06-24 20:56:14,237 INFO ]: Interpolant automaton has 7 states [2018-06-24 20:56:14,237 INFO ]: Constructing interpolant automaton starting with 7 interpolants. [2018-06-24 20:56:14,237 INFO ]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-06-24 20:56:14,237 INFO ]: Start difference. First operand 13 states and 18 transitions. Second operand 7 states. [2018-06-24 20:56:14,536 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:14,536 INFO ]: Finished difference Result 17 states and 23 transitions. [2018-06-24 20:56:14,537 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-06-24 20:56:14,537 INFO ]: Start accepts. Automaton has 7 states. Word has length 8 [2018-06-24 20:56:14,537 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:14,537 INFO ]: With dead ends: 17 [2018-06-24 20:56:14,537 INFO ]: Without dead ends: 17 [2018-06-24 20:56:14,538 INFO ]: 0 DeclaredPredicates, 13 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-06-24 20:56:14,538 INFO ]: Start minimizeSevpa. Operand 17 states. [2018-06-24 20:56:14,540 INFO ]: Finished minimizeSevpa. Reduced states from 17 to 14. [2018-06-24 20:56:14,540 INFO ]: Start removeUnreachable. Operand 14 states. [2018-06-24 20:56:14,540 INFO ]: Finished removeUnreachable. Reduced from 14 states to 14 states and 20 transitions. [2018-06-24 20:56:14,540 INFO ]: Start accepts. Automaton has 14 states and 20 transitions. Word has length 8 [2018-06-24 20:56:14,540 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:14,540 INFO ]: Abstraction has 14 states and 20 transitions. [2018-06-24 20:56:14,540 INFO ]: Interpolant automaton has 7 states. [2018-06-24 20:56:14,540 INFO ]: Start isEmpty. Operand 14 states and 20 transitions. [2018-06-24 20:56:14,541 INFO ]: Finished isEmpty. Found accepting run of length 10 [2018-06-24 20:56:14,541 INFO ]: Found error trace [2018-06-24 20:56:14,541 INFO ]: trace histogram [3, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:14,541 INFO ]: === Iteration 9 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:14,541 INFO ]: Analyzing trace with hash 1978381762, now seen corresponding path program 3 times [2018-06-24 20:56:14,541 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:14,541 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:14,542 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:14,542 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:14,542 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:14,571 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:14,632 INFO ]: Checked inductivity of 10 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:14,632 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:14,632 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:14,639 INFO ]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-06-24 20:56:14,714 INFO ]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-06-24 20:56:14,714 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:14,716 INFO ]: Computing forward predicates... [2018-06-24 20:56:14,727 INFO ]: Checked inductivity of 10 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:14,760 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:14,760 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-06-24 20:56:14,760 INFO ]: Interpolant automaton has 6 states [2018-06-24 20:56:14,760 INFO ]: Constructing interpolant automaton starting with 6 interpolants. [2018-06-24 20:56:14,761 INFO ]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-06-24 20:56:14,761 INFO ]: Start difference. First operand 14 states and 20 transitions. Second operand 6 states. [2018-06-24 20:56:14,990 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:14,990 INFO ]: Finished difference Result 15 states and 21 transitions. [2018-06-24 20:56:14,993 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-06-24 20:56:14,993 INFO ]: Start accepts. Automaton has 6 states. Word has length 9 [2018-06-24 20:56:14,993 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:14,994 INFO ]: With dead ends: 15 [2018-06-24 20:56:14,994 INFO ]: Without dead ends: 15 [2018-06-24 20:56:14,994 INFO ]: 0 DeclaredPredicates, 14 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-06-24 20:56:14,994 INFO ]: Start minimizeSevpa. Operand 15 states. [2018-06-24 20:56:14,996 INFO ]: Finished minimizeSevpa. Reduced states from 15 to 15. [2018-06-24 20:56:14,996 INFO ]: Start removeUnreachable. Operand 15 states. [2018-06-24 20:56:14,996 INFO ]: Finished removeUnreachable. Reduced from 15 states to 15 states and 21 transitions. [2018-06-24 20:56:14,996 INFO ]: Start accepts. Automaton has 15 states and 21 transitions. Word has length 9 [2018-06-24 20:56:14,996 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:14,996 INFO ]: Abstraction has 15 states and 21 transitions. [2018-06-24 20:56:14,996 INFO ]: Interpolant automaton has 6 states. [2018-06-24 20:56:14,996 INFO ]: Start isEmpty. Operand 15 states and 21 transitions. [2018-06-24 20:56:14,996 INFO ]: Finished isEmpty. Found accepting run of length 10 [2018-06-24 20:56:14,996 INFO ]: Found error trace [2018-06-24 20:56:14,996 INFO ]: trace histogram [4, 1, 1, 1, 1, 1] [2018-06-24 20:56:14,997 INFO ]: === Iteration 10 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:14,997 INFO ]: Analyzing trace with hash 1233429190, now seen corresponding path program 3 times [2018-06-24 20:56:14,997 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:14,997 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:14,997 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:14,997 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:14,997 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:15,030 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:15,186 INFO ]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:15,186 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:15,277 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:15,283 INFO ]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-06-24 20:56:15,362 INFO ]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-06-24 20:56:15,362 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:15,366 INFO ]: Computing forward predicates... [2018-06-24 20:56:15,545 INFO ]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:15,565 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:15,565 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-06-24 20:56:15,565 INFO ]: Interpolant automaton has 8 states [2018-06-24 20:56:15,566 INFO ]: Constructing interpolant automaton starting with 8 interpolants. [2018-06-24 20:56:15,566 INFO ]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-06-24 20:56:15,566 INFO ]: Start difference. First operand 15 states and 21 transitions. Second operand 8 states. [2018-06-24 20:56:15,647 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:15,647 INFO ]: Finished difference Result 20 states and 27 transitions. [2018-06-24 20:56:15,648 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-06-24 20:56:15,648 INFO ]: Start accepts. Automaton has 8 states. Word has length 9 [2018-06-24 20:56:15,648 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:15,648 INFO ]: With dead ends: 20 [2018-06-24 20:56:15,648 INFO ]: Without dead ends: 20 [2018-06-24 20:56:15,649 INFO ]: 0 DeclaredPredicates, 15 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-06-24 20:56:15,649 INFO ]: Start minimizeSevpa. Operand 20 states. [2018-06-24 20:56:15,651 INFO ]: Finished minimizeSevpa. Reduced states from 20 to 16. [2018-06-24 20:56:15,651 INFO ]: Start removeUnreachable. Operand 16 states. [2018-06-24 20:56:15,651 INFO ]: Finished removeUnreachable. Reduced from 16 states to 16 states and 23 transitions. [2018-06-24 20:56:15,651 INFO ]: Start accepts. Automaton has 16 states and 23 transitions. Word has length 9 [2018-06-24 20:56:15,651 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:15,651 INFO ]: Abstraction has 16 states and 23 transitions. [2018-06-24 20:56:15,651 INFO ]: Interpolant automaton has 8 states. [2018-06-24 20:56:15,651 INFO ]: Start isEmpty. Operand 16 states and 23 transitions. [2018-06-24 20:56:15,652 INFO ]: Finished isEmpty. Found accepting run of length 11 [2018-06-24 20:56:15,652 INFO ]: Found error trace [2018-06-24 20:56:15,652 INFO ]: trace histogram [4, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:15,652 INFO ]: === Iteration 11 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:15,652 INFO ]: Analyzing trace with hash 1200026444, now seen corresponding path program 4 times [2018-06-24 20:56:15,652 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:15,652 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:15,653 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:15,653 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:15,653 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:15,669 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:15,867 INFO ]: Checked inductivity of 15 backedges. 5 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:15,867 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:15,867 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:15,875 INFO ]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-06-24 20:56:15,924 INFO ]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-06-24 20:56:15,924 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:15,927 INFO ]: Computing forward predicates... [2018-06-24 20:56:15,933 INFO ]: Checked inductivity of 15 backedges. 5 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:15,960 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:15,961 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-06-24 20:56:15,961 INFO ]: Interpolant automaton has 7 states [2018-06-24 20:56:15,961 INFO ]: Constructing interpolant automaton starting with 7 interpolants. [2018-06-24 20:56:15,961 INFO ]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-06-24 20:56:15,961 INFO ]: Start difference. First operand 16 states and 23 transitions. Second operand 7 states. [2018-06-24 20:56:15,978 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:15,978 INFO ]: Finished difference Result 17 states and 24 transitions. [2018-06-24 20:56:15,978 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-06-24 20:56:15,978 INFO ]: Start accepts. Automaton has 7 states. Word has length 10 [2018-06-24 20:56:15,978 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:15,979 INFO ]: With dead ends: 17 [2018-06-24 20:56:15,979 INFO ]: Without dead ends: 17 [2018-06-24 20:56:15,979 INFO ]: 0 DeclaredPredicates, 16 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-06-24 20:56:15,979 INFO ]: Start minimizeSevpa. Operand 17 states. [2018-06-24 20:56:15,981 INFO ]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-06-24 20:56:15,981 INFO ]: Start removeUnreachable. Operand 17 states. [2018-06-24 20:56:15,981 INFO ]: Finished removeUnreachable. Reduced from 17 states to 17 states and 24 transitions. [2018-06-24 20:56:15,981 INFO ]: Start accepts. Automaton has 17 states and 24 transitions. Word has length 10 [2018-06-24 20:56:15,981 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:15,981 INFO ]: Abstraction has 17 states and 24 transitions. [2018-06-24 20:56:15,981 INFO ]: Interpolant automaton has 7 states. [2018-06-24 20:56:15,981 INFO ]: Start isEmpty. Operand 17 states and 24 transitions. [2018-06-24 20:56:15,982 INFO ]: Finished isEmpty. Found accepting run of length 11 [2018-06-24 20:56:15,982 INFO ]: Found error trace [2018-06-24 20:56:15,982 INFO ]: trace histogram [5, 1, 1, 1, 1, 1] [2018-06-24 20:56:15,982 INFO ]: === Iteration 12 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:15,982 INFO ]: Analyzing trace with hash -418666808, now seen corresponding path program 4 times [2018-06-24 20:56:15,982 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:15,982 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:15,983 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:15,983 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:15,983 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:16,003 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:16,445 INFO ]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:16,445 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:16,445 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:16,452 INFO ]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-06-24 20:56:16,505 INFO ]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-06-24 20:56:16,505 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:16,509 INFO ]: Computing forward predicates... [2018-06-24 20:56:16,565 INFO ]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:16,597 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:16,597 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-06-24 20:56:16,597 INFO ]: Interpolant automaton has 9 states [2018-06-24 20:56:16,597 INFO ]: Constructing interpolant automaton starting with 9 interpolants. [2018-06-24 20:56:16,597 INFO ]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-06-24 20:56:16,597 INFO ]: Start difference. First operand 17 states and 24 transitions. Second operand 9 states. [2018-06-24 20:56:16,769 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:16,769 INFO ]: Finished difference Result 23 states and 31 transitions. [2018-06-24 20:56:16,770 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-06-24 20:56:16,770 INFO ]: Start accepts. Automaton has 9 states. Word has length 10 [2018-06-24 20:56:16,770 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:16,771 INFO ]: With dead ends: 23 [2018-06-24 20:56:16,771 INFO ]: Without dead ends: 23 [2018-06-24 20:56:16,771 INFO ]: 0 DeclaredPredicates, 17 GetRequests, 7 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-06-24 20:56:16,771 INFO ]: Start minimizeSevpa. Operand 23 states. [2018-06-24 20:56:16,773 INFO ]: Finished minimizeSevpa. Reduced states from 23 to 18. [2018-06-24 20:56:16,773 INFO ]: Start removeUnreachable. Operand 18 states. [2018-06-24 20:56:16,774 INFO ]: Finished removeUnreachable. Reduced from 18 states to 18 states and 26 transitions. [2018-06-24 20:56:16,774 INFO ]: Start accepts. Automaton has 18 states and 26 transitions. Word has length 10 [2018-06-24 20:56:16,774 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:16,774 INFO ]: Abstraction has 18 states and 26 transitions. [2018-06-24 20:56:16,774 INFO ]: Interpolant automaton has 9 states. [2018-06-24 20:56:16,774 INFO ]: Start isEmpty. Operand 18 states and 26 transitions. [2018-06-24 20:56:16,774 INFO ]: Finished isEmpty. Found accepting run of length 12 [2018-06-24 20:56:16,774 INFO ]: Found error trace [2018-06-24 20:56:16,774 INFO ]: trace histogram [5, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:16,774 INFO ]: === Iteration 13 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:16,774 INFO ]: Analyzing trace with hash -1454151934, now seen corresponding path program 5 times [2018-06-24 20:56:16,774 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:16,774 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:16,775 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:16,775 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:16,775 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:16,807 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:17,489 INFO ]: Checked inductivity of 21 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:17,489 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:17,489 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:17,500 INFO ]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-06-24 20:56:17,604 INFO ]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-06-24 20:56:17,604 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:17,607 INFO ]: Computing forward predicates... [2018-06-24 20:56:17,616 INFO ]: Checked inductivity of 21 backedges. 6 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:17,650 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:17,650 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-06-24 20:56:17,650 INFO ]: Interpolant automaton has 8 states [2018-06-24 20:56:17,650 INFO ]: Constructing interpolant automaton starting with 8 interpolants. [2018-06-24 20:56:17,650 INFO ]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-06-24 20:56:17,651 INFO ]: Start difference. First operand 18 states and 26 transitions. Second operand 8 states. [2018-06-24 20:56:17,775 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:17,775 INFO ]: Finished difference Result 19 states and 27 transitions. [2018-06-24 20:56:17,775 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-06-24 20:56:17,775 INFO ]: Start accepts. Automaton has 8 states. Word has length 11 [2018-06-24 20:56:17,775 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:17,776 INFO ]: With dead ends: 19 [2018-06-24 20:56:17,776 INFO ]: Without dead ends: 19 [2018-06-24 20:56:17,776 INFO ]: 0 DeclaredPredicates, 18 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-06-24 20:56:17,776 INFO ]: Start minimizeSevpa. Operand 19 states. [2018-06-24 20:56:17,778 INFO ]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-06-24 20:56:17,778 INFO ]: Start removeUnreachable. Operand 19 states. [2018-06-24 20:56:17,779 INFO ]: Finished removeUnreachable. Reduced from 19 states to 19 states and 27 transitions. [2018-06-24 20:56:17,779 INFO ]: Start accepts. Automaton has 19 states and 27 transitions. Word has length 11 [2018-06-24 20:56:17,779 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:17,779 INFO ]: Abstraction has 19 states and 27 transitions. [2018-06-24 20:56:17,779 INFO ]: Interpolant automaton has 8 states. [2018-06-24 20:56:17,779 INFO ]: Start isEmpty. Operand 19 states and 27 transitions. [2018-06-24 20:56:17,779 INFO ]: Finished isEmpty. Found accepting run of length 12 [2018-06-24 20:56:17,779 INFO ]: Found error trace [2018-06-24 20:56:17,779 INFO ]: trace histogram [6, 1, 1, 1, 1, 1] [2018-06-24 20:56:17,780 INFO ]: === Iteration 14 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:17,780 INFO ]: Analyzing trace with hash -94035194, now seen corresponding path program 5 times [2018-06-24 20:56:17,780 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:17,780 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:17,781 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:17,781 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:17,781 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:17,804 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:18,311 INFO ]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:18,311 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:18,311 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:18,327 INFO ]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-06-24 20:56:18,377 INFO ]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2018-06-24 20:56:18,377 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:18,382 INFO ]: Computing forward predicates... [2018-06-24 20:56:18,509 INFO ]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:18,541 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:18,541 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-06-24 20:56:18,541 INFO ]: Interpolant automaton has 10 states [2018-06-24 20:56:18,541 INFO ]: Constructing interpolant automaton starting with 10 interpolants. [2018-06-24 20:56:18,541 INFO ]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-06-24 20:56:18,541 INFO ]: Start difference. First operand 19 states and 27 transitions. Second operand 10 states. [2018-06-24 20:56:18,821 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:18,821 INFO ]: Finished difference Result 26 states and 35 transitions. [2018-06-24 20:56:18,822 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-06-24 20:56:18,822 INFO ]: Start accepts. Automaton has 10 states. Word has length 11 [2018-06-24 20:56:18,822 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:18,822 INFO ]: With dead ends: 26 [2018-06-24 20:56:18,822 INFO ]: Without dead ends: 26 [2018-06-24 20:56:18,822 INFO ]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-06-24 20:56:18,823 INFO ]: Start minimizeSevpa. Operand 26 states. [2018-06-24 20:56:18,825 INFO ]: Finished minimizeSevpa. Reduced states from 26 to 20. [2018-06-24 20:56:18,825 INFO ]: Start removeUnreachable. Operand 20 states. [2018-06-24 20:56:18,825 INFO ]: Finished removeUnreachable. Reduced from 20 states to 20 states and 29 transitions. [2018-06-24 20:56:18,825 INFO ]: Start accepts. Automaton has 20 states and 29 transitions. Word has length 11 [2018-06-24 20:56:18,826 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:18,826 INFO ]: Abstraction has 20 states and 29 transitions. [2018-06-24 20:56:18,826 INFO ]: Interpolant automaton has 10 states. [2018-06-24 20:56:18,826 INFO ]: Start isEmpty. Operand 20 states and 29 transitions. [2018-06-24 20:56:18,826 INFO ]: Finished isEmpty. Found accepting run of length 13 [2018-06-24 20:56:18,826 INFO ]: Found error trace [2018-06-24 20:56:18,826 INFO ]: trace histogram [6, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:18,826 INFO ]: === Iteration 15 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:18,826 INFO ]: Analyzing trace with hash -2129303028, now seen corresponding path program 6 times [2018-06-24 20:56:18,826 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:18,826 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:18,827 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:18,827 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:18,827 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:18,841 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:18,965 INFO ]: Checked inductivity of 28 backedges. 7 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:18,965 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:18,965 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:18,971 INFO ]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-06-24 20:56:19,028 INFO ]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-06-24 20:56:19,028 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:19,031 INFO ]: Computing forward predicates... [2018-06-24 20:56:19,037 INFO ]: Checked inductivity of 28 backedges. 7 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:19,064 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:19,064 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-06-24 20:56:19,064 INFO ]: Interpolant automaton has 9 states [2018-06-24 20:56:19,064 INFO ]: Constructing interpolant automaton starting with 9 interpolants. [2018-06-24 20:56:19,064 INFO ]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-06-24 20:56:19,065 INFO ]: Start difference. First operand 20 states and 29 transitions. Second operand 9 states. [2018-06-24 20:56:19,089 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:19,089 INFO ]: Finished difference Result 21 states and 30 transitions. [2018-06-24 20:56:19,089 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-06-24 20:56:19,089 INFO ]: Start accepts. Automaton has 9 states. Word has length 12 [2018-06-24 20:56:19,089 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:19,089 INFO ]: With dead ends: 21 [2018-06-24 20:56:19,089 INFO ]: Without dead ends: 21 [2018-06-24 20:56:19,090 INFO ]: 0 DeclaredPredicates, 20 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-06-24 20:56:19,090 INFO ]: Start minimizeSevpa. Operand 21 states. [2018-06-24 20:56:19,092 INFO ]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-06-24 20:56:19,092 INFO ]: Start removeUnreachable. Operand 21 states. [2018-06-24 20:56:19,092 INFO ]: Finished removeUnreachable. Reduced from 21 states to 21 states and 30 transitions. [2018-06-24 20:56:19,092 INFO ]: Start accepts. Automaton has 21 states and 30 transitions. Word has length 12 [2018-06-24 20:56:19,092 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:19,092 INFO ]: Abstraction has 21 states and 30 transitions. [2018-06-24 20:56:19,092 INFO ]: Interpolant automaton has 9 states. [2018-06-24 20:56:19,092 INFO ]: Start isEmpty. Operand 21 states and 30 transitions. [2018-06-24 20:56:19,093 INFO ]: Finished isEmpty. Found accepting run of length 13 [2018-06-24 20:56:19,093 INFO ]: Found error trace [2018-06-24 20:56:19,093 INFO ]: trace histogram [7, 1, 1, 1, 1, 1] [2018-06-24 20:56:19,093 INFO ]: === Iteration 16 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:19,093 INFO ]: Analyzing trace with hash 1379610248, now seen corresponding path program 6 times [2018-06-24 20:56:19,093 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:19,093 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:19,094 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:19,094 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:19,094 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:19,115 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:19,599 INFO ]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:19,599 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:19,599 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:19,605 INFO ]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-06-24 20:56:19,682 INFO ]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-06-24 20:56:19,682 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:19,686 INFO ]: Computing forward predicates... [2018-06-24 20:56:19,817 INFO ]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:19,837 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:19,838 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 11 [2018-06-24 20:56:19,838 INFO ]: Interpolant automaton has 11 states [2018-06-24 20:56:19,838 INFO ]: Constructing interpolant automaton starting with 11 interpolants. [2018-06-24 20:56:19,838 INFO ]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-06-24 20:56:19,838 INFO ]: Start difference. First operand 21 states and 30 transitions. Second operand 11 states. [2018-06-24 20:56:20,020 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:20,020 INFO ]: Finished difference Result 29 states and 39 transitions. [2018-06-24 20:56:20,021 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-06-24 20:56:20,021 INFO ]: Start accepts. Automaton has 11 states. Word has length 12 [2018-06-24 20:56:20,021 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:20,021 INFO ]: With dead ends: 29 [2018-06-24 20:56:20,021 INFO ]: Without dead ends: 29 [2018-06-24 20:56:20,021 INFO ]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 4 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-06-24 20:56:20,021 INFO ]: Start minimizeSevpa. Operand 29 states. [2018-06-24 20:56:20,023 INFO ]: Finished minimizeSevpa. Reduced states from 29 to 22. [2018-06-24 20:56:20,023 INFO ]: Start removeUnreachable. Operand 22 states. [2018-06-24 20:56:20,024 INFO ]: Finished removeUnreachable. Reduced from 22 states to 22 states and 32 transitions. [2018-06-24 20:56:20,024 INFO ]: Start accepts. Automaton has 22 states and 32 transitions. Word has length 12 [2018-06-24 20:56:20,024 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:20,024 INFO ]: Abstraction has 22 states and 32 transitions. [2018-06-24 20:56:20,024 INFO ]: Interpolant automaton has 11 states. [2018-06-24 20:56:20,024 INFO ]: Start isEmpty. Operand 22 states and 32 transitions. [2018-06-24 20:56:20,026 INFO ]: Finished isEmpty. Found accepting run of length 14 [2018-06-24 20:56:20,026 INFO ]: Found error trace [2018-06-24 20:56:20,026 INFO ]: trace histogram [7, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:20,027 INFO ]: === Iteration 17 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:20,027 INFO ]: Analyzing trace with hash -1584150462, now seen corresponding path program 7 times [2018-06-24 20:56:20,027 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:20,027 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:20,027 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:20,027 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:20,027 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:20,042 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:20,179 INFO ]: Checked inductivity of 36 backedges. 8 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:20,179 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:20,179 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:20,185 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:20,234 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:20,237 INFO ]: Computing forward predicates... [2018-06-24 20:56:20,265 INFO ]: Checked inductivity of 36 backedges. 8 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:20,286 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:20,286 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-06-24 20:56:20,286 INFO ]: Interpolant automaton has 10 states [2018-06-24 20:56:20,286 INFO ]: Constructing interpolant automaton starting with 10 interpolants. [2018-06-24 20:56:20,286 INFO ]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-06-24 20:56:20,286 INFO ]: Start difference. First operand 22 states and 32 transitions. Second operand 10 states. [2018-06-24 20:56:20,423 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:20,423 INFO ]: Finished difference Result 23 states and 33 transitions. [2018-06-24 20:56:20,423 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-06-24 20:56:20,423 INFO ]: Start accepts. Automaton has 10 states. Word has length 13 [2018-06-24 20:56:20,423 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:20,424 INFO ]: With dead ends: 23 [2018-06-24 20:56:20,424 INFO ]: Without dead ends: 23 [2018-06-24 20:56:20,424 INFO ]: 0 DeclaredPredicates, 22 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-06-24 20:56:20,424 INFO ]: Start minimizeSevpa. Operand 23 states. [2018-06-24 20:56:20,426 INFO ]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-06-24 20:56:20,426 INFO ]: Start removeUnreachable. Operand 23 states. [2018-06-24 20:56:20,426 INFO ]: Finished removeUnreachable. Reduced from 23 states to 23 states and 33 transitions. [2018-06-24 20:56:20,426 INFO ]: Start accepts. Automaton has 23 states and 33 transitions. Word has length 13 [2018-06-24 20:56:20,426 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:20,427 INFO ]: Abstraction has 23 states and 33 transitions. [2018-06-24 20:56:20,427 INFO ]: Interpolant automaton has 10 states. [2018-06-24 20:56:20,427 INFO ]: Start isEmpty. Operand 23 states and 33 transitions. [2018-06-24 20:56:20,429 INFO ]: Finished isEmpty. Found accepting run of length 14 [2018-06-24 20:56:20,429 INFO ]: Found error trace [2018-06-24 20:56:20,429 INFO ]: trace histogram [8, 1, 1, 1, 1, 1] [2018-06-24 20:56:20,429 INFO ]: === Iteration 18 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:20,429 INFO ]: Analyzing trace with hash -182021306, now seen corresponding path program 7 times [2018-06-24 20:56:20,429 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:20,429 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:20,430 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:20,430 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:20,430 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:20,479 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:20,631 INFO ]: Checked inductivity of 36 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-06-24 20:56:20,632 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:20,632 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:20,637 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:20,696 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:20,702 INFO ]: Computing forward predicates... [2018-06-24 20:56:21,238 INFO ]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-06-24 20:56:21,269 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:21,270 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 11] total 13 [2018-06-24 20:56:21,270 INFO ]: Interpolant automaton has 13 states [2018-06-24 20:56:21,270 INFO ]: Constructing interpolant automaton starting with 13 interpolants. [2018-06-24 20:56:21,270 INFO ]: CoverageRelationStatistics Valid=42, Invalid=114, Unknown=0, NotChecked=0, Total=156 [2018-06-24 20:56:21,270 INFO ]: Start difference. First operand 23 states and 33 transitions. Second operand 13 states. [2018-06-24 20:56:21,505 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:21,505 INFO ]: Finished difference Result 33 states and 43 transitions. [2018-06-24 20:56:21,505 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-06-24 20:56:21,505 INFO ]: Start accepts. Automaton has 13 states. Word has length 13 [2018-06-24 20:56:21,505 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:21,505 INFO ]: With dead ends: 33 [2018-06-24 20:56:21,505 INFO ]: Without dead ends: 24 [2018-06-24 20:56:21,506 INFO ]: 0 DeclaredPredicates, 23 GetRequests, 6 SyntacticMatches, 6 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=42, Invalid=114, Unknown=0, NotChecked=0, Total=156 [2018-06-24 20:56:21,506 INFO ]: Start minimizeSevpa. Operand 24 states. [2018-06-24 20:56:21,508 INFO ]: Finished minimizeSevpa. Reduced states from 24 to 16. [2018-06-24 20:56:21,508 INFO ]: Start removeUnreachable. Operand 16 states. [2018-06-24 20:56:21,508 INFO ]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2018-06-24 20:56:21,508 INFO ]: Start accepts. Automaton has 16 states and 17 transitions. Word has length 13 [2018-06-24 20:56:21,509 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:21,509 INFO ]: Abstraction has 16 states and 17 transitions. [2018-06-24 20:56:21,509 INFO ]: Interpolant automaton has 13 states. [2018-06-24 20:56:21,509 INFO ]: Start isEmpty. Operand 16 states and 17 transitions. [2018-06-24 20:56:21,509 INFO ]: Finished isEmpty. Found accepting run of length 16 [2018-06-24 20:56:21,509 INFO ]: Found error trace [2018-06-24 20:56:21,509 INFO ]: trace histogram [9, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:21,509 INFO ]: === Iteration 19 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:21,509 INFO ]: Analyzing trace with hash 646340106, now seen corresponding path program 8 times [2018-06-24 20:56:21,509 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:21,509 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:21,510 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:21,510 INFO ]: Keeping assertion order NOT_INCREMENTALLY [2018-06-24 20:56:21,510 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:21,525 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:21,641 INFO ]: Checked inductivity of 55 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-06-24 20:56:21,641 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:21,641 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:21,647 INFO ]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-06-24 20:56:21,702 INFO ]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-06-24 20:56:21,702 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:21,705 INFO ]: Computing forward predicates... [2018-06-24 20:56:21,712 INFO ]: Checked inductivity of 55 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-06-24 20:56:21,742 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:21,742 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-06-24 20:56:21,742 INFO ]: Interpolant automaton has 11 states [2018-06-24 20:56:21,742 INFO ]: Constructing interpolant automaton starting with 11 interpolants. [2018-06-24 20:56:21,742 INFO ]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-06-24 20:56:21,742 INFO ]: Start difference. First operand 16 states and 17 transitions. Second operand 11 states. [2018-06-24 20:56:21,762 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:21,762 INFO ]: Finished difference Result 17 states and 18 transitions. [2018-06-24 20:56:21,762 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-06-24 20:56:21,762 INFO ]: Start accepts. Automaton has 11 states. Word has length 15 [2018-06-24 20:56:21,762 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:21,762 INFO ]: With dead ends: 17 [2018-06-24 20:56:21,762 INFO ]: Without dead ends: 17 [2018-06-24 20:56:21,762 INFO ]: 0 DeclaredPredicates, 25 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-06-24 20:56:21,762 INFO ]: Start minimizeSevpa. Operand 17 states. [2018-06-24 20:56:21,763 INFO ]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-06-24 20:56:21,764 INFO ]: Start removeUnreachable. Operand 17 states. [2018-06-24 20:56:21,764 INFO ]: Finished removeUnreachable. Reduced from 17 states to 17 states and 18 transitions. [2018-06-24 20:56:21,764 INFO ]: Start accepts. Automaton has 17 states and 18 transitions. Word has length 15 [2018-06-24 20:56:21,764 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:21,764 INFO ]: Abstraction has 17 states and 18 transitions. [2018-06-24 20:56:21,764 INFO ]: Interpolant automaton has 11 states. [2018-06-24 20:56:21,764 INFO ]: Start isEmpty. Operand 17 states and 18 transitions. [2018-06-24 20:56:21,764 INFO ]: Finished isEmpty. Found accepting run of length 17 [2018-06-24 20:56:21,764 INFO ]: Found error trace [2018-06-24 20:56:21,764 INFO ]: trace histogram [10, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:21,765 INFO ]: === Iteration 20 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:21,765 INFO ]: Analyzing trace with hash -1438559228, now seen corresponding path program 9 times [2018-06-24 20:56:21,765 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:21,765 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:21,765 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:21,765 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:21,765 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:21,781 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:21,898 INFO ]: Checked inductivity of 66 backedges. 20 proven. 45 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-06-24 20:56:21,898 INFO ]: The current sequences of interpolants are not accepted, trying to find more. [2018-06-24 20:56:21,898 INFO ]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-06-24 20:56:21,905 INFO ]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-06-24 20:56:21,994 INFO ]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-06-24 20:56:21,994 INFO ]: Conjunction of SSA is unsat [2018-06-24 20:56:21,997 INFO ]: Computing forward predicates... [2018-06-24 20:56:22,002 INFO ]: Checked inductivity of 66 backedges. 20 proven. 45 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-06-24 20:56:22,024 INFO ]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-06-24 20:56:22,024 INFO ]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-06-24 20:56:22,024 INFO ]: Interpolant automaton has 12 states [2018-06-24 20:56:22,024 INFO ]: Constructing interpolant automaton starting with 12 interpolants. [2018-06-24 20:56:22,024 INFO ]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-06-24 20:56:22,024 INFO ]: Start difference. First operand 17 states and 18 transitions. Second operand 12 states. [2018-06-24 20:56:22,084 INFO ]: Subtrahend was deterministic. Have not used determinization. [2018-06-24 20:56:22,084 INFO ]: Finished difference Result 18 states and 19 transitions. [2018-06-24 20:56:22,084 INFO ]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-06-24 20:56:22,084 INFO ]: Start accepts. Automaton has 12 states. Word has length 16 [2018-06-24 20:56:22,084 INFO ]: Finished accepts. some prefix is accepted. [2018-06-24 20:56:22,084 INFO ]: With dead ends: 18 [2018-06-24 20:56:22,084 INFO ]: Without dead ends: 18 [2018-06-24 20:56:22,085 INFO ]: 0 DeclaredPredicates, 27 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-06-24 20:56:22,085 INFO ]: Start minimizeSevpa. Operand 18 states. [2018-06-24 20:56:22,085 INFO ]: Finished minimizeSevpa. Reduced states from 18 to 18. [2018-06-24 20:56:22,085 INFO ]: Start removeUnreachable. Operand 18 states. [2018-06-24 20:56:22,086 INFO ]: Finished removeUnreachable. Reduced from 18 states to 18 states and 19 transitions. [2018-06-24 20:56:22,086 INFO ]: Start accepts. Automaton has 18 states and 19 transitions. Word has length 16 [2018-06-24 20:56:22,086 INFO ]: Finished accepts. word is rejected. [2018-06-24 20:56:22,086 INFO ]: Abstraction has 18 states and 19 transitions. [2018-06-24 20:56:22,086 INFO ]: Interpolant automaton has 12 states. [2018-06-24 20:56:22,086 INFO ]: Start isEmpty. Operand 18 states and 19 transitions. [2018-06-24 20:56:22,086 INFO ]: Finished isEmpty. Found accepting run of length 18 [2018-06-24 20:56:22,086 INFO ]: Found error trace [2018-06-24 20:56:22,086 INFO ]: trace histogram [11, 1, 1, 1, 1, 1, 1] [2018-06-24 20:56:22,086 INFO ]: === Iteration 21 === [Ultimate.STARTErr0AssertViolationASSERT]=== [2018-06-24 20:56:22,086 INFO ]: Analyzing trace with hash -1645929142, now seen corresponding path program 10 times [2018-06-24 20:56:22,086 INFO ]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-06-24 20:56:22,086 INFO ]: Using refinement strategy CamelRefinementStrategy [2018-06-24 20:56:22,087 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:22,087 INFO ]: Changing assertion order to NOT_INCREMENTALLY [2018-06-24 20:56:22,087 INFO ]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-06-24 20:56:22,123 INFO ]: Conjunction of SSA is sat [2018-06-24 20:56:22,135 INFO ]: Counterexample might be feasible [2018-06-24 20:56:22,150 INFO ]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-06-24 20:56:22,151 INFO ]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.06 08:56:22 BasicIcfg [2018-06-24 20:56:22,151 INFO ]: ------------------------ END TraceAbstraction---------------------------- [2018-06-24 20:56:22,152 INFO ]: Toolchain (without parser) took 11289.85 ms. Allocated memory was 309.3 MB in the beginning and 411.0 MB in the end (delta: 101.7 MB). Free memory was 263.7 MB in the beginning and 348.3 MB in the end (delta: -84.6 MB). Peak memory consumption was 17.1 MB. Max. memory is 3.6 GB. [2018-06-24 20:56:22,153 INFO ]: SmtParser took 0.07 ms. Allocated memory is still 309.3 MB. Free memory is still 274.8 MB. There was no memory consumed. Max. memory is 3.6 GB. [2018-06-24 20:56:22,153 INFO ]: ChcToBoogie took 65.69 ms. Allocated memory is still 309.3 MB. Free memory was 263.7 MB in the beginning and 261.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 3.6 GB. [2018-06-24 20:56:22,153 INFO ]: Boogie Preprocessor took 31.43 ms. Allocated memory is still 309.3 MB. Free memory was 261.7 MB in the beginning and 259.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 3.6 GB. [2018-06-24 20:56:22,154 INFO ]: RCFGBuilder took 312.42 ms. Allocated memory is still 309.3 MB. Free memory was 259.8 MB in the beginning and 247.7 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 3.6 GB. [2018-06-24 20:56:22,154 INFO ]: BlockEncodingV2 took 78.40 ms. Allocated memory is still 309.3 MB. Free memory was 247.7 MB in the beginning and 244.7 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 3.6 GB. [2018-06-24 20:56:22,155 INFO ]: TraceAbstraction took 10785.96 ms. Allocated memory was 309.3 MB in the beginning and 411.0 MB in the end (delta: 101.7 MB). Free memory was 243.7 MB in the beginning and 348.6 MB in the end (delta: -104.8 MB). There was no memory consumed. Max. memory is 3.6 GB. [2018-06-24 20:56:22,158 INFO ]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.blockencoding: - StatisticsResult: Initial Icfg 10 locations, 14 edges - StatisticsResult: Encoded RCFG 6 locations, 10 edges * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * SmtParser took 0.07 ms. Allocated memory is still 309.3 MB. Free memory is still 274.8 MB. There was no memory consumed. Max. memory is 3.6 GB. * ChcToBoogie took 65.69 ms. Allocated memory is still 309.3 MB. Free memory was 263.7 MB in the beginning and 261.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 3.6 GB. * Boogie Preprocessor took 31.43 ms. Allocated memory is still 309.3 MB. Free memory was 261.7 MB in the beginning and 259.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 3.6 GB. * RCFGBuilder took 312.42 ms. Allocated memory is still 309.3 MB. Free memory was 259.8 MB in the beginning and 247.7 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 3.6 GB. * BlockEncodingV2 took 78.40 ms. Allocated memory is still 309.3 MB. Free memory was 247.7 MB in the beginning and 244.7 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 3.6 GB. * TraceAbstraction took 10785.96 ms. Allocated memory was 309.3 MB in the beginning and 411.0 MB in the end (delta: 101.7 MB). Free memory was 243.7 MB in the beginning and 348.6 MB in the end (delta: -104.8 MB). There was no memory consumed. Max. memory is 3.6 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [UNKNOWN] : assertion can be violated assertion can be violated We found a FailurePath: [L0] CALL call gotoProc(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); [L0] assume (((!(hbv_False_7_Int - hbv_False_8_Int + -1 >= 0) && !(hbv_False_9_Int == hbv_False_10_Int)) && !(hbv_False_5_Int - hbv_False_6_Int + -1 >= 0)) && hbv_False_3_Int == hbv_False_4_Int) && hbv_False_1_Int == hbv_False_2_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hbv_False_7_Int, hbv_False_11_Int, hbv_False_8_Int, hbv_False_12_Int, hbv_False_9_Int, hbv_False_5_Int, hbv_False_13_Int, hbv_False_6_Int, hbv_False_14_Int, hbv_False_10_Int, hbv_False_3_Int, hbv_False_1_Int, hbv_False_4_Int, hbv_False_2_Int; [L0] havoc hbv_False_13_Int, hbv_False_7_Int, hbv_False_8_Int, hbv_False_4_Int, hbv_False_6_Int, hbv_False_2_Int, hbv_False_9_Int, hbv_False_12_Int, hbv_False_3_Int, hbv_False_5_Int, hbv_False_11_Int, hbv_False_10_Int, hbv_False_14_Int, hbv_False_1_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && -1 * hhv_INV1_8_Int == -10) && hhv_INV1_10_Int == hhv_INV1_12_Int) && hbv_INV1_3_Int + hbv_INV1_4_Int == hhv_INV1_9_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && hbv_INV1_5_Int + -10 == 0) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_4_Int, hbv_INV1_3_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] assume (((((((((hbv_INV1_5_Int + 1 == hhv_INV1_7_Int && hhv_INV1_10_Int == hhv_INV1_12_Int) && hhv_INV1_5_Int - hbv_INV1_5_Int + -1 >= 0) && hbv_INV1_1_Int + 1 == hhv_INV1_2_Int) && hhv_INV1_0_Int - hbv_INV1_1_Int + -1 >= 0) && 5 * hbv_INV1_1_Int + hhv_INV1_1_Int == hhv_INV1_3_Int) && !(hbv_INV1_5_Int + -10 == 0)) && hhv_INV1_11_Int == hhv_INV1_13_Int) && hbv_INV1_2_Int + (5 * hbv_INV1_1_Int + hhv_INV1_1_Int) == hhv_INV1_4_Int) && hbv_INV1_3_Int + 5 == hhv_INV1_8_Int) && hbv_INV1_4_Int + hbv_INV1_3_Int == hhv_INV1_9_Int; [L0] hhv_INV1_0_Int, hhv_INV1_1_Int, hhv_INV1_2_Int, hhv_INV1_3_Int, hhv_INV1_4_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hhv_INV1_7_Int, hhv_INV1_8_Int, hhv_INV1_9_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int := hhv_INV1_0_Int, hhv_INV1_1_Int, hbv_INV1_1_Int, hbv_INV1_6_Int, hbv_INV1_2_Int, hhv_INV1_5_Int, hhv_INV1_6_Int, hbv_INV1_5_Int, hbv_INV1_3_Int, hbv_INV1_4_Int, hhv_INV1_10_Int, hhv_INV1_11_Int, hhv_INV1_12_Int, hhv_INV1_13_Int; [L0] havoc hbv_INV1_1_Int, hbv_INV1_3_Int, hbv_INV1_5_Int, hbv_INV1_2_Int, hbv_INV1_4_Int, hbv_INV1_6_Int; [L0] RET call gotoProc(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); [L0] assert false; - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 6 locations, 1 error locations. UNSAFE Result, 10.7s OverallTime, 21 OverallIterations, 11 TraceHistogramMax, 2.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 128 SDtfs, 1 SDslu, 279 SDs, 0 SdLazy, 936 SolverSat, 29 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 286 GetRequests, 161 SyntacticMatches, 19 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 4.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=23occurred in iteration=17, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 20 MinimizatonAttempts, 38 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 1.2s SatisfiabilityAnalysisTime, 5.6s InterpolantComputationTime, 374 NumberOfCodeBlocks, 374 NumberOfCodeBlocksAsserted, 63 NumberOfCheckSat, 322 ConstructedInterpolants, 0 QuantifiedInterpolants, 26242 SizeOfPredicates, 50 NumberOfNonLiveVariables, 5599 ConjunctsInSsa, 801 ConjunctsInUnsatCore, 35 InterpolantComputations, 5 PerfectInterpolantSequences, 170/717 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/003d-horn.smt2_AutomizerCHC_Goto.epf_AutomizerCHC_wBE.xml/Csv-GraphSizeCsvProvider-0-2018-06-24_20-56-22-168.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/003d-horn.smt2_AutomizerCHC_Goto.epf_AutomizerCHC_wBE.xml/Csv-GraphSizeCsvProvider-1-2018-06-24_20-56-22-168.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/003d-horn.smt2_AutomizerCHC_Goto.epf_AutomizerCHC_wBE.xml/Csv-Benchmark-0-2018-06-24_20-56-22-168.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/003d-horn.smt2_AutomizerCHC_Goto.epf_AutomizerCHC_wBE.xml/Csv-TraceAbstractionBenchmarks-0-2018-06-24_20-56-22-168.csv Received shutdown request...