java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 22:18:22,990 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 22:18:22,992 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 22:18:23,006 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 22:18:23,006 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 22:18:23,007 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 22:18:23,007 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 22:18:23,009 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 22:18:23,010 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 22:18:23,011 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 22:18:23,012 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 22:18:23,012 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 22:18:23,012 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 22:18:23,013 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 22:18:23,014 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 22:18:23,016 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 22:18:23,018 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 22:18:23,020 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 22:18:23,022 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 22:18:23,023 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 22:18:23,026 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-28 22:18:23,026 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-28 22:18:23,026 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-28 22:18:23,027 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-28 22:18:23,028 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-28 22:18:23,029 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-28 22:18:23,030 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-28 22:18:23,030 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-28 22:18:23,031 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-28 22:18:23,031 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 22:18:23,031 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 22:18:23,032 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 22:18:23,042 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 22:18:23,042 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 22:18:23,043 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 22:18:23,043 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 22:18:23,043 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 22:18:23,043 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 22:18:23,043 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 22:18:23,044 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 22:18:23,044 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 22:18:23,045 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 22:18:23,045 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 22:18:23,045 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 22:18:23,045 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 22:18:23,045 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 22:18:23,045 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 22:18:23,046 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 22:18:23,046 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 22:18:23,046 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 22:18:23,046 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 22:18:23,046 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 22:18:23,047 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 22:18:23,047 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 22:18:23,047 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 22:18:23,047 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:18:23,047 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 22:18:23,048 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 22:18:23,048 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 22:18:23,048 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 22:18:23,048 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 22:18:23,048 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 22:18:23,048 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 22:18:23,049 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 22:18:23,049 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 22:18:23,050 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 22:18:23,084 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 22:18:23,097 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 22:18:23,102 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 22:18:23,104 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 22:18:23,104 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 22:18:23,105 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i [2018-01-28 22:18:23,299 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 22:18:23,305 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-28 22:18:23,306 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 22:18:23,306 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 22:18:23,310 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 22:18:23,311 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,314 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@58844631 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23, skipping insertion in model container [2018-01-28 22:18:23,314 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,331 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:18:23,382 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:18:23,499 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:18:23,527 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:18:23,538 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23 WrapperNode [2018-01-28 22:18:23,538 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 22:18:23,539 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 22:18:23,539 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 22:18:23,539 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 22:18:23,552 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,552 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,562 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,562 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,570 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,574 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,576 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (1/1) ... [2018-01-28 22:18:23,579 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 22:18:23,579 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 22:18:23,579 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 22:18:23,579 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 22:18:23,580 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:18:23,625 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-28 22:18:23,626 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-28 22:18:23,627 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-28 22:18:23,627 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-28 22:18:23,627 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-28 22:18:23,627 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-28 22:18:23,627 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-28 22:18:23,627 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-28 22:18:23,627 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 22:18:23,627 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 22:18:23,627 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 22:18:23,627 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-28 22:18:23,627 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-28 22:18:23,628 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 22:18:23,628 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 22:18:23,628 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 22:18:23,628 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-28 22:18:23,628 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-28 22:18:23,628 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-28 22:18:23,628 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-28 22:18:23,628 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-28 22:18:23,629 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-28 22:18:23,630 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-28 22:18:23,630 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-28 22:18:23,630 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-28 22:18:23,630 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 22:18:23,630 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 22:18:23,630 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 22:18:23,882 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-28 22:18:24,045 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 22:18:24,046 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:18:24 BoogieIcfgContainer [2018-01-28 22:18:24,046 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 22:18:24,046 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 22:18:24,047 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 22:18:24,049 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 22:18:24,049 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 10:18:23" (1/3) ... [2018-01-28 22:18:24,050 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@58b3afa6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:18:24, skipping insertion in model container [2018-01-28 22:18:24,050 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:18:23" (2/3) ... [2018-01-28 22:18:24,051 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@58b3afa6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:18:24, skipping insertion in model container [2018-01-28 22:18:24,051 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:18:24" (3/3) ... [2018-01-28 22:18:24,053 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_false-valid-deref.i [2018-01-28 22:18:24,062 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 22:18:24,070 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-01-28 22:18:24,124 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 22:18:24,124 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 22:18:24,124 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 22:18:24,124 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 22:18:24,124 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 22:18:24,125 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 22:18:24,125 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 22:18:24,125 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 22:18:24,126 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 22:18:24,144 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states. [2018-01-28 22:18:24,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-28 22:18:24,150 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:24,151 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:24,151 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:24,155 INFO L82 PathProgramCache]: Analyzing trace with hash -970088742, now seen corresponding path program 1 times [2018-01-28 22:18:24,157 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:24,157 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:24,204 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:24,205 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:24,205 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:24,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:24,271 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:24,489 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:24,492 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:24,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:18:24,494 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:18:24,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:18:24,510 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:18:24,513 INFO L87 Difference]: Start difference. First operand 147 states. Second operand 5 states. [2018-01-28 22:18:24,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:24,608 INFO L93 Difference]: Finished difference Result 276 states and 291 transitions. [2018-01-28 22:18:24,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:18:24,610 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-28 22:18:24,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:24,626 INFO L225 Difference]: With dead ends: 276 [2018-01-28 22:18:24,626 INFO L226 Difference]: Without dead ends: 151 [2018-01-28 22:18:24,663 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:18:24,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-28 22:18:24,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 149. [2018-01-28 22:18:24,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-28 22:18:24,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-01-28 22:18:24,706 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 22 [2018-01-28 22:18:24,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:24,707 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-01-28 22:18:24,707 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:18:24,707 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-01-28 22:18:24,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:18:24,708 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:24,708 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:24,708 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:24,708 INFO L82 PathProgramCache]: Analyzing trace with hash 1498971100, now seen corresponding path program 1 times [2018-01-28 22:18:24,708 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:24,708 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:24,710 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:24,710 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:24,710 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:24,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:24,728 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:24,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:24,783 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:24,783 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:18:24,784 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:18:24,784 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:18:24,784 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:18:24,784 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 6 states. [2018-01-28 22:18:25,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:25,023 INFO L93 Difference]: Finished difference Result 152 states and 160 transitions. [2018-01-28 22:18:25,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:18:25,024 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-28 22:18:25,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:25,026 INFO L225 Difference]: With dead ends: 152 [2018-01-28 22:18:25,026 INFO L226 Difference]: Without dead ends: 151 [2018-01-28 22:18:25,027 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:18:25,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-28 22:18:25,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 148. [2018-01-28 22:18:25,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-01-28 22:18:25,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 156 transitions. [2018-01-28 22:18:25,043 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 156 transitions. Word has length 23 [2018-01-28 22:18:25,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:25,043 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 156 transitions. [2018-01-28 22:18:25,043 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:18:25,044 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 156 transitions. [2018-01-28 22:18:25,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 22:18:25,044 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:25,045 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:25,045 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:25,045 INFO L82 PathProgramCache]: Analyzing trace with hash 1498971101, now seen corresponding path program 1 times [2018-01-28 22:18:25,045 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:25,045 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:25,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:25,047 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:25,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:25,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:25,068 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:25,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:25,344 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:25,345 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:18:25,346 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:18:25,346 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:18:25,346 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:18:25,347 INFO L87 Difference]: Start difference. First operand 148 states and 156 transitions. Second operand 7 states. [2018-01-28 22:18:25,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:25,598 INFO L93 Difference]: Finished difference Result 151 states and 159 transitions. [2018-01-28 22:18:25,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 22:18:25,599 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-28 22:18:25,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:25,601 INFO L225 Difference]: With dead ends: 151 [2018-01-28 22:18:25,601 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:18:25,602 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:18:25,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:18:25,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 147. [2018-01-28 22:18:25,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-28 22:18:25,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-01-28 22:18:25,615 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 23 [2018-01-28 22:18:25,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:25,616 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-01-28 22:18:25,616 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:18:25,616 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-01-28 22:18:25,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:18:25,618 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:25,618 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:25,619 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:25,620 INFO L82 PathProgramCache]: Analyzing trace with hash -1204324785, now seen corresponding path program 1 times [2018-01-28 22:18:25,620 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:25,620 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:25,621 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:25,622 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:25,622 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:25,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:25,644 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:25,751 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:25,751 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:25,752 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:18:25,752 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:18:25,752 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:18:25,753 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:18:25,753 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 10 states. [2018-01-28 22:18:26,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:26,030 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-01-28 22:18:26,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:18:26,031 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-01-28 22:18:26,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:26,033 INFO L225 Difference]: With dead ends: 149 [2018-01-28 22:18:26,033 INFO L226 Difference]: Without dead ends: 148 [2018-01-28 22:18:26,034 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:18:26,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-01-28 22:18:26,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 146. [2018-01-28 22:18:26,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-28 22:18:26,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 154 transitions. [2018-01-28 22:18:26,048 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 154 transitions. Word has length 39 [2018-01-28 22:18:26,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:26,048 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 154 transitions. [2018-01-28 22:18:26,048 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:18:26,048 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 154 transitions. [2018-01-28 22:18:26,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:18:26,050 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:26,050 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:26,050 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:26,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1204324784, now seen corresponding path program 1 times [2018-01-28 22:18:26,051 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:26,051 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:26,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,053 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:26,053 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:26,071 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:26,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:26,105 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:26,105 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:18:26,105 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:18:26,105 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:18:26,106 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:18:26,106 INFO L87 Difference]: Start difference. First operand 146 states and 154 transitions. Second operand 4 states. [2018-01-28 22:18:26,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:26,137 INFO L93 Difference]: Finished difference Result 258 states and 272 transitions. [2018-01-28 22:18:26,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:18:26,138 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-28 22:18:26,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:26,140 INFO L225 Difference]: With dead ends: 258 [2018-01-28 22:18:26,140 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:18:26,141 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:18:26,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:18:26,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 147. [2018-01-28 22:18:26,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-28 22:18:26,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-01-28 22:18:26,153 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 39 [2018-01-28 22:18:26,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:26,154 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-01-28 22:18:26,154 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:18:26,154 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-01-28 22:18:26,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-28 22:18:26,156 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:26,156 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:26,156 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:26,156 INFO L82 PathProgramCache]: Analyzing trace with hash 734700400, now seen corresponding path program 1 times [2018-01-28 22:18:26,156 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:26,156 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:26,158 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,158 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:26,158 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:26,175 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:26,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:26,309 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:26,309 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:18:26,310 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:18:26,310 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:18:26,310 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:18:26,311 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 7 states. [2018-01-28 22:18:26,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:26,392 INFO L93 Difference]: Finished difference Result 234 states and 249 transitions. [2018-01-28 22:18:26,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:18:26,393 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-28 22:18:26,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:26,394 INFO L225 Difference]: With dead ends: 234 [2018-01-28 22:18:26,394 INFO L226 Difference]: Without dead ends: 161 [2018-01-28 22:18:26,395 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:18:26,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-28 22:18:26,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-01-28 22:18:26,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-01-28 22:18:26,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 166 transitions. [2018-01-28 22:18:26,410 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 166 transitions. Word has length 41 [2018-01-28 22:18:26,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:26,410 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 166 transitions. [2018-01-28 22:18:26,410 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:18:26,410 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 166 transitions. [2018-01-28 22:18:26,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-28 22:18:26,412 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:26,412 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:26,413 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:26,413 INFO L82 PathProgramCache]: Analyzing trace with hash 547481290, now seen corresponding path program 1 times [2018-01-28 22:18:26,413 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:26,413 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:26,414 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,414 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:26,415 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:26,425 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:26,458 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-28 22:18:26,458 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:26,458 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 22:18:26,458 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 22:18:26,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 22:18:26,459 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:18:26,459 INFO L87 Difference]: Start difference. First operand 157 states and 166 transitions. Second operand 3 states. [2018-01-28 22:18:26,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:26,570 INFO L93 Difference]: Finished difference Result 179 states and 190 transitions. [2018-01-28 22:18:26,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 22:18:26,571 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2018-01-28 22:18:26,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:26,572 INFO L225 Difference]: With dead ends: 179 [2018-01-28 22:18:26,572 INFO L226 Difference]: Without dead ends: 161 [2018-01-28 22:18:26,572 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:18:26,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-28 22:18:26,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 150. [2018-01-28 22:18:26,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-28 22:18:26,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-01-28 22:18:26,583 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 39 [2018-01-28 22:18:26,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:26,583 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-01-28 22:18:26,583 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 22:18:26,583 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-01-28 22:18:26,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-28 22:18:26,584 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:26,584 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:26,584 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:26,585 INFO L82 PathProgramCache]: Analyzing trace with hash -2146406904, now seen corresponding path program 1 times [2018-01-28 22:18:26,585 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:26,585 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:26,586 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,586 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:26,586 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:26,598 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:26,646 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-28 22:18:26,646 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:26,647 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:18:26,647 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:18:26,647 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:18:26,647 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:18:26,647 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 6 states. [2018-01-28 22:18:26,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:26,686 INFO L93 Difference]: Finished difference Result 154 states and 161 transitions. [2018-01-28 22:18:26,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:18:26,687 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2018-01-28 22:18:26,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:26,688 INFO L225 Difference]: With dead ends: 154 [2018-01-28 22:18:26,688 INFO L226 Difference]: Without dead ends: 139 [2018-01-28 22:18:26,689 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:18:26,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-28 22:18:26,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-01-28 22:18:26,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-01-28 22:18:26,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 145 transitions. [2018-01-28 22:18:26,702 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 145 transitions. Word has length 40 [2018-01-28 22:18:26,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:26,702 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 145 transitions. [2018-01-28 22:18:26,702 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:18:26,703 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 145 transitions. [2018-01-28 22:18:26,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 22:18:26,704 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:26,704 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:26,704 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:26,704 INFO L82 PathProgramCache]: Analyzing trace with hash -1583567538, now seen corresponding path program 1 times [2018-01-28 22:18:26,704 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:26,705 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:26,706 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,706 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:26,706 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:26,725 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:26,773 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:26,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:26,773 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:26,784 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:26,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:26,836 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:26,884 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:26,908 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:26,909 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-28 22:18:26,909 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:18:26,909 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:18:26,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:18:26,910 INFO L87 Difference]: Start difference. First operand 139 states and 145 transitions. Second operand 6 states. [2018-01-28 22:18:26,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:26,965 INFO L93 Difference]: Finished difference Result 254 states and 266 transitions. [2018-01-28 22:18:26,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:18:26,969 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-28 22:18:26,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:26,971 INFO L225 Difference]: With dead ends: 254 [2018-01-28 22:18:26,971 INFO L226 Difference]: Without dead ends: 146 [2018-01-28 22:18:26,972 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:18:26,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-01-28 22:18:26,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 143. [2018-01-28 22:18:26,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-28 22:18:26,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 149 transitions. [2018-01-28 22:18:26,984 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 149 transitions. Word has length 43 [2018-01-28 22:18:26,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:26,984 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 149 transitions. [2018-01-28 22:18:26,984 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:18:26,984 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 149 transitions. [2018-01-28 22:18:26,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:18:26,986 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:26,986 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:26,986 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:26,986 INFO L82 PathProgramCache]: Analyzing trace with hash 1467102540, now seen corresponding path program 2 times [2018-01-28 22:18:26,986 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:26,986 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:26,988 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:26,988 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:26,988 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:27,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:27,008 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:27,079 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:27,080 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:27,080 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:27,088 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:18:27,114 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:27,131 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:18:27,136 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:27,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:18:27,170 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:18:27,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:18:27,215 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:18:27,238 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:18:27,238 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:18:28,035 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-28 22:18:28,069 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:18:28,069 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-28 22:18:28,070 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:18:28,070 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:18:28,071 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:18:28,071 INFO L87 Difference]: Start difference. First operand 143 states and 149 transitions. Second operand 19 states. [2018-01-28 22:18:30,259 WARN L143 SmtUtils]: Spent 2035ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-28 22:18:31,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:31,247 INFO L93 Difference]: Finished difference Result 257 states and 270 transitions. [2018-01-28 22:18:31,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 22:18:31,247 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-28 22:18:31,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:31,248 INFO L225 Difference]: With dead ends: 257 [2018-01-28 22:18:31,248 INFO L226 Difference]: Without dead ends: 149 [2018-01-28 22:18:31,249 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-28 22:18:31,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-28 22:18:31,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 146. [2018-01-28 22:18:31,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-28 22:18:31,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 152 transitions. [2018-01-28 22:18:31,266 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 152 transitions. Word has length 47 [2018-01-28 22:18:31,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:31,266 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 152 transitions. [2018-01-28 22:18:31,266 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:18:31,267 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 152 transitions. [2018-01-28 22:18:31,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:18:31,267 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:31,268 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:31,268 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:31,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1733956539, now seen corresponding path program 1 times [2018-01-28 22:18:31,268 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:31,268 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:31,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:31,270 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:18:31,270 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:31,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:31,286 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:31,400 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-28 22:18:31,400 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:31,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:18:31,401 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:18:31,401 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:18:31,401 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:18:31,402 INFO L87 Difference]: Start difference. First operand 146 states and 152 transitions. Second operand 12 states. [2018-01-28 22:18:31,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:31,702 INFO L93 Difference]: Finished difference Result 146 states and 152 transitions. [2018-01-28 22:18:31,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:18:31,702 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-28 22:18:31,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:31,703 INFO L225 Difference]: With dead ends: 146 [2018-01-28 22:18:31,703 INFO L226 Difference]: Without dead ends: 144 [2018-01-28 22:18:31,703 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:18:31,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-28 22:18:31,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-01-28 22:18:31,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-01-28 22:18:31,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 150 transitions. [2018-01-28 22:18:31,714 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 150 transitions. Word has length 56 [2018-01-28 22:18:31,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:31,715 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 150 transitions. [2018-01-28 22:18:31,715 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:18:31,715 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 150 transitions. [2018-01-28 22:18:31,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:18:31,715 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:31,715 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:31,716 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:31,716 INFO L82 PathProgramCache]: Analyzing trace with hash -1733956538, now seen corresponding path program 1 times [2018-01-28 22:18:31,716 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:31,716 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:31,717 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:31,717 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:31,717 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:31,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:31,735 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:31,801 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:31,801 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:31,801 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:31,807 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:31,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:31,837 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:31,850 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:31,871 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:31,871 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-28 22:18:31,871 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:18:31,872 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:18:31,872 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:18:31,872 INFO L87 Difference]: Start difference. First operand 144 states and 150 transitions. Second operand 8 states. [2018-01-28 22:18:31,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:31,969 INFO L93 Difference]: Finished difference Result 256 states and 268 transitions. [2018-01-28 22:18:31,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:18:31,969 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-28 22:18:31,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:31,970 INFO L225 Difference]: With dead ends: 256 [2018-01-28 22:18:31,970 INFO L226 Difference]: Without dead ends: 151 [2018-01-28 22:18:31,971 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:18:31,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-28 22:18:31,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 148. [2018-01-28 22:18:31,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-01-28 22:18:31,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 154 transitions. [2018-01-28 22:18:31,981 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 154 transitions. Word has length 56 [2018-01-28 22:18:31,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:31,981 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 154 transitions. [2018-01-28 22:18:31,981 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:18:31,981 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 154 transitions. [2018-01-28 22:18:31,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:18:31,982 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:31,982 INFO L330 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:31,982 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:31,982 INFO L82 PathProgramCache]: Analyzing trace with hash -732835576, now seen corresponding path program 2 times [2018-01-28 22:18:31,982 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:31,983 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:31,983 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:31,984 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:31,984 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:31,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:31,998 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:32,115 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:32,115 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:32,115 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:32,120 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:18:32,142 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:32,146 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:18:32,151 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:32,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:18:32,161 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:18:32,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:18:32,178 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:18:32,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:18:32,192 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:18:32,723 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-28 22:18:32,742 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:18:32,743 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-28 22:18:32,743 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 22:18:32,743 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 22:18:32,744 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-28 22:18:32,744 INFO L87 Difference]: Start difference. First operand 148 states and 154 transitions. Second operand 22 states. [2018-01-28 22:18:34,954 WARN L143 SmtUtils]: Spent 1758ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-28 22:18:35,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:35,545 INFO L93 Difference]: Finished difference Result 258 states and 272 transitions. [2018-01-28 22:18:35,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 22:18:35,545 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-28 22:18:35,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:35,547 INFO L225 Difference]: With dead ends: 258 [2018-01-28 22:18:35,547 INFO L226 Difference]: Without dead ends: 153 [2018-01-28 22:18:35,547 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 22:18:35,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-28 22:18:35,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 150. [2018-01-28 22:18:35,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-28 22:18:35,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 156 transitions. [2018-01-28 22:18:35,566 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 156 transitions. Word has length 60 [2018-01-28 22:18:35,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:35,567 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 156 transitions. [2018-01-28 22:18:35,567 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 22:18:35,567 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 156 transitions. [2018-01-28 22:18:35,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-28 22:18:35,568 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:35,568 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:35,568 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:35,568 INFO L82 PathProgramCache]: Analyzing trace with hash -1348894730, now seen corresponding path program 1 times [2018-01-28 22:18:35,569 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:35,569 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:35,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:35,570 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:18:35,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:35,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:35,587 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:35,647 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:18:35,647 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:35,648 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:18:35,648 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:18:35,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:18:35,648 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:18:35,648 INFO L87 Difference]: Start difference. First operand 150 states and 156 transitions. Second operand 8 states. [2018-01-28 22:18:35,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:35,696 INFO L93 Difference]: Finished difference Result 231 states and 240 transitions. [2018-01-28 22:18:35,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:18:35,697 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 75 [2018-01-28 22:18:35,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:35,697 INFO L225 Difference]: With dead ends: 231 [2018-01-28 22:18:35,698 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:18:35,698 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:18:35,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:18:35,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-01-28 22:18:35,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-28 22:18:35,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 155 transitions. [2018-01-28 22:18:35,711 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 155 transitions. Word has length 75 [2018-01-28 22:18:35,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:35,711 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 155 transitions. [2018-01-28 22:18:35,711 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:18:35,711 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 155 transitions. [2018-01-28 22:18:35,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-01-28 22:18:35,712 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:35,712 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:35,712 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:35,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1029372655, now seen corresponding path program 1 times [2018-01-28 22:18:35,712 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:35,712 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:35,713 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:35,713 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:35,713 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:35,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:35,725 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:35,816 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:18:35,816 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:35,816 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-28 22:18:35,816 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:18:35,816 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:18:35,817 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:18:35,817 INFO L87 Difference]: Start difference. First operand 150 states and 155 transitions. Second operand 10 states. [2018-01-28 22:18:35,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:35,891 INFO L93 Difference]: Finished difference Result 233 states and 241 transitions. [2018-01-28 22:18:35,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:18:35,892 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 80 [2018-01-28 22:18:35,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:35,893 INFO L225 Difference]: With dead ends: 233 [2018-01-28 22:18:35,893 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:18:35,894 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:18:35,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:18:35,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-01-28 22:18:35,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-28 22:18:35,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 154 transitions. [2018-01-28 22:18:35,913 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 154 transitions. Word has length 80 [2018-01-28 22:18:35,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:35,913 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 154 transitions. [2018-01-28 22:18:35,913 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:18:35,913 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 154 transitions. [2018-01-28 22:18:35,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-28 22:18:35,914 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:35,915 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:35,915 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:35,915 INFO L82 PathProgramCache]: Analyzing trace with hash -1148809107, now seen corresponding path program 1 times [2018-01-28 22:18:35,915 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:35,915 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:35,916 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:35,916 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:35,916 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:35,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:35,937 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:36,259 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-28 22:18:36,259 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:36,260 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-01-28 22:18:36,260 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-28 22:18:36,260 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-28 22:18:36,260 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-01-28 22:18:36,260 INFO L87 Difference]: Start difference. First operand 150 states and 154 transitions. Second operand 21 states. [2018-01-28 22:18:36,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:36,764 INFO L93 Difference]: Finished difference Result 192 states and 204 transitions. [2018-01-28 22:18:36,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 22:18:36,765 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 91 [2018-01-28 22:18:36,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:36,766 INFO L225 Difference]: With dead ends: 192 [2018-01-28 22:18:36,766 INFO L226 Difference]: Without dead ends: 190 [2018-01-28 22:18:36,766 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=73, Invalid=739, Unknown=0, NotChecked=0, Total=812 [2018-01-28 22:18:36,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-28 22:18:36,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 184. [2018-01-28 22:18:36,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-28 22:18:36,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 196 transitions. [2018-01-28 22:18:36,786 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 196 transitions. Word has length 91 [2018-01-28 22:18:36,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:36,787 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 196 transitions. [2018-01-28 22:18:36,787 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-28 22:18:36,787 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 196 transitions. [2018-01-28 22:18:36,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-28 22:18:36,788 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:36,788 INFO L330 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:36,789 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:36,789 INFO L82 PathProgramCache]: Analyzing trace with hash -1148809106, now seen corresponding path program 1 times [2018-01-28 22:18:36,789 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:36,789 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:36,790 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:36,790 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:36,790 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:36,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:36,815 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:36,933 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:36,933 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:36,933 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:36,941 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:36,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:36,996 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:37,026 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:37,056 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:37,056 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-28 22:18:37,056 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:18:37,056 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:18:37,057 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:18:37,057 INFO L87 Difference]: Start difference. First operand 184 states and 196 transitions. Second operand 10 states. [2018-01-28 22:18:37,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:37,110 INFO L93 Difference]: Finished difference Result 328 states and 352 transitions. [2018-01-28 22:18:37,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 22:18:37,110 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 91 [2018-01-28 22:18:37,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:37,112 INFO L225 Difference]: With dead ends: 328 [2018-01-28 22:18:37,112 INFO L226 Difference]: Without dead ends: 191 [2018-01-28 22:18:37,113 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:18:37,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-28 22:18:37,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 188. [2018-01-28 22:18:37,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-01-28 22:18:37,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 200 transitions. [2018-01-28 22:18:37,137 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 200 transitions. Word has length 91 [2018-01-28 22:18:37,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:37,137 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 200 transitions. [2018-01-28 22:18:37,137 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:18:37,137 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 200 transitions. [2018-01-28 22:18:37,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-01-28 22:18:37,138 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:37,139 INFO L330 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:37,139 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:37,139 INFO L82 PathProgramCache]: Analyzing trace with hash -1374100372, now seen corresponding path program 2 times [2018-01-28 22:18:37,139 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:37,139 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:37,140 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:37,140 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:37,140 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:37,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:37,161 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:37,277 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:37,278 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:37,278 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:37,286 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:18:37,327 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:37,334 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:18:37,340 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:37,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:18:37,354 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:18:37,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:18:37,396 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:18:37,413 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:18:37,413 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:18:38,346 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-28 22:18:38,366 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:18:38,366 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-01-28 22:18:38,367 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-28 22:18:38,367 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-28 22:18:38,368 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-01-28 22:18:38,368 INFO L87 Difference]: Start difference. First operand 188 states and 200 transitions. Second operand 29 states. [2018-01-28 22:18:39,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:39,788 INFO L93 Difference]: Finished difference Result 330 states and 356 transitions. [2018-01-28 22:18:39,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-28 22:18:39,788 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 95 [2018-01-28 22:18:39,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:39,789 INFO L225 Difference]: With dead ends: 330 [2018-01-28 22:18:39,789 INFO L226 Difference]: Without dead ends: 193 [2018-01-28 22:18:39,791 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 76 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=238, Invalid=1742, Unknown=0, NotChecked=0, Total=1980 [2018-01-28 22:18:39,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-28 22:18:39,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 190. [2018-01-28 22:18:39,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-28 22:18:39,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 200 transitions. [2018-01-28 22:18:39,816 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 200 transitions. Word has length 95 [2018-01-28 22:18:39,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:39,816 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 200 transitions. [2018-01-28 22:18:39,816 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-28 22:18:39,816 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 200 transitions. [2018-01-28 22:18:39,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-28 22:18:39,817 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:39,817 INFO L330 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:39,818 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:39,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1296004867, now seen corresponding path program 1 times [2018-01-28 22:18:39,818 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:39,818 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:39,819 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:39,819 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:18:39,819 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:39,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:39,836 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:39,971 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-01-28 22:18:39,971 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:40,015 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:40,022 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:40,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:40,071 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:40,185 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-28 22:18:40,218 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:40,218 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-01-28 22:18:40,218 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 22:18:40,218 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 22:18:40,219 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:18:40,219 INFO L87 Difference]: Start difference. First operand 190 states and 200 transitions. Second operand 20 states. [2018-01-28 22:18:40,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:40,432 INFO L93 Difference]: Finished difference Result 333 states and 351 transitions. [2018-01-28 22:18:40,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-28 22:18:40,432 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 97 [2018-01-28 22:18:40,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:40,433 INFO L225 Difference]: With dead ends: 333 [2018-01-28 22:18:40,433 INFO L226 Difference]: Without dead ends: 194 [2018-01-28 22:18:40,434 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650 [2018-01-28 22:18:40,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-28 22:18:40,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 191. [2018-01-28 22:18:40,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-01-28 22:18:40,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 197 transitions. [2018-01-28 22:18:40,459 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 197 transitions. Word has length 97 [2018-01-28 22:18:40,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:40,459 INFO L432 AbstractCegarLoop]: Abstraction has 191 states and 197 transitions. [2018-01-28 22:18:40,459 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 22:18:40,460 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 197 transitions. [2018-01-28 22:18:40,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-28 22:18:40,461 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:40,461 INFO L330 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:40,461 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:40,461 INFO L82 PathProgramCache]: Analyzing trace with hash -1377544229, now seen corresponding path program 1 times [2018-01-28 22:18:40,461 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:40,461 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:40,462 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:40,462 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:40,463 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:40,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:40,487 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:40,968 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-01-28 22:18:40,968 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:18:40,968 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-01-28 22:18:40,969 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-28 22:18:40,969 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-28 22:18:40,969 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=649, Unknown=0, NotChecked=0, Total=702 [2018-01-28 22:18:40,969 INFO L87 Difference]: Start difference. First operand 191 states and 197 transitions. Second operand 27 states. [2018-01-28 22:18:41,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:41,611 INFO L93 Difference]: Finished difference Result 207 states and 217 transitions. [2018-01-28 22:18:41,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-28 22:18:41,611 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 122 [2018-01-28 22:18:41,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:41,613 INFO L225 Difference]: With dead ends: 207 [2018-01-28 22:18:41,613 INFO L226 Difference]: Without dead ends: 205 [2018-01-28 22:18:41,613 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=107, Invalid=1375, Unknown=0, NotChecked=0, Total=1482 [2018-01-28 22:18:41,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-01-28 22:18:41,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 200. [2018-01-28 22:18:41,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-01-28 22:18:41,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 210 transitions. [2018-01-28 22:18:41,631 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 210 transitions. Word has length 122 [2018-01-28 22:18:41,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:41,631 INFO L432 AbstractCegarLoop]: Abstraction has 200 states and 210 transitions. [2018-01-28 22:18:41,631 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-28 22:18:41,631 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 210 transitions. [2018-01-28 22:18:41,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-28 22:18:41,632 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:41,633 INFO L330 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:41,633 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:41,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1377544228, now seen corresponding path program 1 times [2018-01-28 22:18:41,633 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:41,633 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:41,634 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:41,634 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:41,634 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:41,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:41,663 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:41,885 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:41,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:41,886 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:41,894 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:41,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:41,965 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:41,993 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:42,027 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:42,028 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-01-28 22:18:42,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-28 22:18:42,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-28 22:18:42,028 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:18:42,029 INFO L87 Difference]: Start difference. First operand 200 states and 210 transitions. Second operand 13 states. [2018-01-28 22:18:42,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:42,160 INFO L93 Difference]: Finished difference Result 348 states and 368 transitions. [2018-01-28 22:18:42,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 22:18:42,160 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 122 [2018-01-28 22:18:42,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:42,162 INFO L225 Difference]: With dead ends: 348 [2018-01-28 22:18:42,162 INFO L226 Difference]: Without dead ends: 207 [2018-01-28 22:18:42,163 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-01-28 22:18:42,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-01-28 22:18:42,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 204. [2018-01-28 22:18:42,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-01-28 22:18:42,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 214 transitions. [2018-01-28 22:18:42,191 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 214 transitions. Word has length 122 [2018-01-28 22:18:42,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:42,191 INFO L432 AbstractCegarLoop]: Abstraction has 204 states and 214 transitions. [2018-01-28 22:18:42,191 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-28 22:18:42,191 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 214 transitions. [2018-01-28 22:18:42,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-01-28 22:18:42,192 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:42,192 INFO L330 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:42,193 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:42,193 INFO L82 PathProgramCache]: Analyzing trace with hash -1381563362, now seen corresponding path program 2 times [2018-01-28 22:18:42,193 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:42,193 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:42,194 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:42,194 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:42,194 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:42,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:42,220 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:42,447 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:42,448 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:42,448 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:42,455 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:18:42,491 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:42,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:18:42,502 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:42,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-28 22:18:42,506 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:18:42,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:18:42,519 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:18:42,530 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-28 22:18:42,530 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-28 22:18:43,740 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-28 22:18:43,760 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:18:43,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [13] total 38 [2018-01-28 22:18:43,760 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-28 22:18:43,760 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-28 22:18:43,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=1245, Unknown=0, NotChecked=0, Total=1406 [2018-01-28 22:18:43,761 INFO L87 Difference]: Start difference. First operand 204 states and 214 transitions. Second operand 38 states. [2018-01-28 22:18:46,477 WARN L143 SmtUtils]: Spent 2024ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-28 22:18:47,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:47,975 INFO L93 Difference]: Finished difference Result 350 states and 372 transitions. [2018-01-28 22:18:47,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-28 22:18:47,976 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 126 [2018-01-28 22:18:47,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:47,977 INFO L225 Difference]: With dead ends: 350 [2018-01-28 22:18:47,977 INFO L226 Difference]: Without dead ends: 209 [2018-01-28 22:18:47,978 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 99 SyntacticMatches, 3 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 825 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=385, Invalid=3275, Unknown=0, NotChecked=0, Total=3660 [2018-01-28 22:18:47,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-01-28 22:18:47,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 206. [2018-01-28 22:18:47,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-01-28 22:18:48,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 215 transitions. [2018-01-28 22:18:48,000 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 215 transitions. Word has length 126 [2018-01-28 22:18:48,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:48,000 INFO L432 AbstractCegarLoop]: Abstraction has 206 states and 215 transitions. [2018-01-28 22:18:48,000 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-28 22:18:48,000 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 215 transitions. [2018-01-28 22:18:48,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-01-28 22:18:48,001 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:48,001 INFO L330 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:48,001 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:48,001 INFO L82 PathProgramCache]: Analyzing trace with hash -1179612011, now seen corresponding path program 1 times [2018-01-28 22:18:48,001 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:48,001 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:48,002 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:48,002 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:18:48,002 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:48,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:48,030 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:48,239 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:48,239 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:48,239 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:48,245 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:48,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:48,302 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:48,348 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:48,370 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:48,370 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-01-28 22:18:48,370 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 22:18:48,371 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 22:18:48,371 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:18:48,371 INFO L87 Difference]: Start difference. First operand 206 states and 215 transitions. Second operand 15 states. [2018-01-28 22:18:48,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:48,477 INFO L93 Difference]: Finished difference Result 352 states and 370 transitions. [2018-01-28 22:18:48,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-28 22:18:48,477 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 135 [2018-01-28 22:18:48,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:48,478 INFO L225 Difference]: With dead ends: 352 [2018-01-28 22:18:48,478 INFO L226 Difference]: Without dead ends: 213 [2018-01-28 22:18:48,479 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 135 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:18:48,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-01-28 22:18:48,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 210. [2018-01-28 22:18:48,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-01-28 22:18:48,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 219 transitions. [2018-01-28 22:18:48,502 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 219 transitions. Word has length 135 [2018-01-28 22:18:48,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:48,503 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 219 transitions. [2018-01-28 22:18:48,503 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 22:18:48,503 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 219 transitions. [2018-01-28 22:18:48,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-01-28 22:18:48,503 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:48,503 INFO L330 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:48,504 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:48,504 INFO L82 PathProgramCache]: Analyzing trace with hash 601054099, now seen corresponding path program 2 times [2018-01-28 22:18:48,504 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:48,504 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:48,505 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:48,505 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:18:48,505 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:48,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:48,531 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:48,762 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:48,762 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:48,762 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:48,770 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:18:48,814 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:48,829 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:48,831 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:18:48,836 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:48,860 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:48,892 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:48,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-28 22:18:48,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-28 22:18:48,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-28 22:18:48,893 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:18:48,893 INFO L87 Difference]: Start difference. First operand 210 states and 219 transitions. Second operand 16 states. [2018-01-28 22:18:48,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:48,989 INFO L93 Difference]: Finished difference Result 356 states and 374 transitions. [2018-01-28 22:18:48,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 22:18:48,990 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 139 [2018-01-28 22:18:48,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:48,991 INFO L225 Difference]: With dead ends: 356 [2018-01-28 22:18:48,991 INFO L226 Difference]: Without dead ends: 217 [2018-01-28 22:18:48,991 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 139 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:18:48,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-01-28 22:18:49,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 214. [2018-01-28 22:18:49,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-01-28 22:18:49,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 223 transitions. [2018-01-28 22:18:49,015 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 223 transitions. Word has length 139 [2018-01-28 22:18:49,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:49,016 INFO L432 AbstractCegarLoop]: Abstraction has 214 states and 223 transitions. [2018-01-28 22:18:49,016 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-28 22:18:49,016 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 223 transitions. [2018-01-28 22:18:49,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-01-28 22:18:49,017 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:49,017 INFO L330 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:49,018 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:49,018 INFO L82 PathProgramCache]: Analyzing trace with hash 299531153, now seen corresponding path program 3 times [2018-01-28 22:18:49,018 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:49,018 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:49,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:49,019 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:18:49,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:49,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:49,038 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:49,208 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:49,208 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:49,208 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:49,213 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 22:18:49,249 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:49,259 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:49,275 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:49,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:49,355 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:49,541 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:49,624 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:49,854 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:49,945 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:50,384 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:50,582 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:50,892 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:51,377 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:18:51,379 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:18:51,386 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:51,424 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:51,447 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:51,447 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-01-28 22:18:51,448 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 22:18:51,448 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 22:18:51,448 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:18:51,448 INFO L87 Difference]: Start difference. First operand 214 states and 223 transitions. Second operand 17 states. [2018-01-28 22:18:51,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:51,526 INFO L93 Difference]: Finished difference Result 360 states and 378 transitions. [2018-01-28 22:18:51,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-28 22:18:51,528 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 143 [2018-01-28 22:18:51,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:51,529 INFO L225 Difference]: With dead ends: 360 [2018-01-28 22:18:51,529 INFO L226 Difference]: Without dead ends: 221 [2018-01-28 22:18:51,530 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:18:51,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-01-28 22:18:51,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 218. [2018-01-28 22:18:51,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-01-28 22:18:51,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 227 transitions. [2018-01-28 22:18:51,552 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 227 transitions. Word has length 143 [2018-01-28 22:18:51,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:51,552 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 227 transitions. [2018-01-28 22:18:51,552 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 22:18:51,552 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 227 transitions. [2018-01-28 22:18:51,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-01-28 22:18:51,553 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:51,553 INFO L330 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:51,553 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:51,553 INFO L82 PathProgramCache]: Analyzing trace with hash 1731554447, now seen corresponding path program 4 times [2018-01-28 22:18:51,553 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:51,553 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:51,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:51,554 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:18:51,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:51,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:51,573 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:51,774 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:51,775 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:51,775 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:51,780 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 22:18:51,901 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:18:51,905 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:51,925 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:51,948 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:51,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-28 22:18:51,949 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 22:18:51,949 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 22:18:51,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:18:51,949 INFO L87 Difference]: Start difference. First operand 218 states and 227 transitions. Second operand 18 states. [2018-01-28 22:18:52,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:52,044 INFO L93 Difference]: Finished difference Result 364 states and 382 transitions. [2018-01-28 22:18:52,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 22:18:52,045 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 147 [2018-01-28 22:18:52,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:52,046 INFO L225 Difference]: With dead ends: 364 [2018-01-28 22:18:52,046 INFO L226 Difference]: Without dead ends: 225 [2018-01-28 22:18:52,046 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:18:52,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-01-28 22:18:52,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 222. [2018-01-28 22:18:52,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-01-28 22:18:52,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 231 transitions. [2018-01-28 22:18:52,071 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 231 transitions. Word has length 147 [2018-01-28 22:18:52,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:52,071 INFO L432 AbstractCegarLoop]: Abstraction has 222 states and 231 transitions. [2018-01-28 22:18:52,072 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 22:18:52,072 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 231 transitions. [2018-01-28 22:18:52,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-28 22:18:52,072 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:52,072 INFO L330 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:52,073 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:52,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1013731699, now seen corresponding path program 5 times [2018-01-28 22:18:52,073 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:52,073 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:52,074 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:52,074 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:18:52,074 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:52,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:52,098 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:52,656 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:52,657 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:52,657 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:52,662 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 22:18:52,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,694 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,697 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,743 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,774 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,787 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,844 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:52,891 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:53,025 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:53,078 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:53,277 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:18:53,282 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:18:53,288 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:18:53,312 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:53,334 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:18:53,334 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-28 22:18:53,335 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:18:53,335 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:18:53,335 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:18:53,335 INFO L87 Difference]: Start difference. First operand 222 states and 231 transitions. Second operand 19 states. [2018-01-28 22:18:53,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:18:53,462 INFO L93 Difference]: Finished difference Result 368 states and 386 transitions. [2018-01-28 22:18:53,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 22:18:53,462 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 151 [2018-01-28 22:18:53,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:18:53,464 INFO L225 Difference]: With dead ends: 368 [2018-01-28 22:18:53,464 INFO L226 Difference]: Without dead ends: 229 [2018-01-28 22:18:53,464 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 151 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:18:53,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-01-28 22:18:53,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 226. [2018-01-28 22:18:53,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2018-01-28 22:18:53,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 235 transitions. [2018-01-28 22:18:53,489 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 235 transitions. Word has length 151 [2018-01-28 22:18:53,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:18:53,489 INFO L432 AbstractCegarLoop]: Abstraction has 226 states and 235 transitions. [2018-01-28 22:18:53,489 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:18:53,489 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 235 transitions. [2018-01-28 22:18:53,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-28 22:18:53,490 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:18:53,490 INFO L330 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:18:53,490 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:18:53,490 INFO L82 PathProgramCache]: Analyzing trace with hash 1659158923, now seen corresponding path program 6 times [2018-01-28 22:18:53,490 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:18:53,490 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:18:53,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:53,491 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:18:53,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:18:53,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:18:53,509 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:18:53,743 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:18:53,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:18:53,743 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:18:53,748 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 22:18:53,786 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:18:53,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:18:53,806 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:18:53,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:18:54,098 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:18:54,225 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:18:54,339 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:18:56,141 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:18:57,613 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:19:00,048 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:19:01,927 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:19:02,654 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:19:04,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:19:06,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:19:10,164 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:19:13,769 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 22:19:13,773 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:19:13,786 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:19:13,805 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:19:13,832 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:19:13,832 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-01-28 22:19:13,833 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 22:19:13,833 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 22:19:13,833 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:19:13,833 INFO L87 Difference]: Start difference. First operand 226 states and 235 transitions. Second operand 20 states. [2018-01-28 22:19:13,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:19:13,941 INFO L93 Difference]: Finished difference Result 372 states and 390 transitions. [2018-01-28 22:19:13,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-28 22:19:13,941 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 155 [2018-01-28 22:19:13,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:19:13,942 INFO L225 Difference]: With dead ends: 372 [2018-01-28 22:19:13,942 INFO L226 Difference]: Without dead ends: 233 [2018-01-28 22:19:13,943 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-01-28 22:19:13,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-01-28 22:19:13,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 230. [2018-01-28 22:19:13,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-01-28 22:19:13,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 239 transitions. [2018-01-28 22:19:13,973 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 239 transitions. Word has length 155 [2018-01-28 22:19:13,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:19:13,973 INFO L432 AbstractCegarLoop]: Abstraction has 230 states and 239 transitions. [2018-01-28 22:19:13,973 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 22:19:13,973 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 239 transitions. [2018-01-28 22:19:13,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-01-28 22:19:13,974 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:19:13,974 INFO L330 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:19:13,974 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-28 22:19:13,975 INFO L82 PathProgramCache]: Analyzing trace with hash -44554871, now seen corresponding path program 7 times [2018-01-28 22:19:13,975 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:19:13,975 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:19:13,976 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:19:13,976 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:19:13,976 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:19:14,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:19:14,060 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:19:18,679 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:19:18,680 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:19:18,680 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:19:18,685 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:19:18,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:19:18,748 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:19:18,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-01-28 22:19:18,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-01-28 22:19:18,857 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:18,858 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:18,863 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:18,863 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-01-28 22:19:18,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-01-28 22:19:18,989 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:18,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-01-28 22:19:18,992 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,001 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,010 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-01-28 22:19:19,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-01-28 22:19:19,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-01-28 22:19:19,195 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,205 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:19:19,232 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:47, output treesize:43 [2018-01-28 22:19:19,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-28 22:19:19,481 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,483 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,484 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,486 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,488 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,489 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-01-28 22:19:19,490 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,508 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 22:19:19,522 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:63, output treesize:59 [2018-01-28 22:19:19,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-01-28 22:19:19,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,787 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,788 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,788 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,789 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:19,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-01-28 22:19:19,790 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,810 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:19,825 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-28 22:19:19,825 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:79, output treesize:75 [2018-01-28 22:19:20,102 WARN L143 SmtUtils]: Spent 178ms on a formula simplification that was a NOOP. DAG size: 38 [2018-01-28 22:19:20,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-01-28 22:19:20,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,232 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,241 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,241 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,242 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,243 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,244 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,245 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-01-28 22:19:20,250 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:20,283 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:20,303 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-01-28 22:19:20,303 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:95, output treesize:91 [2018-01-28 22:19:20,610 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-01-28 22:19:20,614 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,615 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,616 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,617 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,618 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,619 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,619 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,620 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,621 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,622 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,623 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,624 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,625 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,626 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,627 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,628 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,629 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,630 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,630 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,631 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,632 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:20,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-01-28 22:19:20,634 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:20,678 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:20,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-01-28 22:19:20,701 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:111, output treesize:107 [2018-01-28 22:19:21,474 WARN L143 SmtUtils]: Spent 616ms on a formula simplification that was a NOOP. DAG size: 50 [2018-01-28 22:19:22,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-01-28 22:19:22,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,240 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,241 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,242 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,243 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,243 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,244 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,245 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,250 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,256 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,264 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:22,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-01-28 22:19:22,266 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:22,333 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:22,361 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-01-28 22:19:22,361 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:127, output treesize:123 [2018-01-28 22:19:31,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-01-28 22:19:31,790 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,791 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,793 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,794 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,796 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,802 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,806 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,809 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,810 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,811 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,815 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,816 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,817 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,818 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,819 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,820 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,822 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,823 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,825 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,826 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,828 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,829 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:19:31,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-01-28 22:19:31,831 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:19:31,917 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:19:31,954 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-01-28 22:19:31,954 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:143, output treesize:139 [2018-01-28 22:20:00,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-01-28 22:20:00,460 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,461 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,462 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,463 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,464 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,465 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,466 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,467 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,468 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,469 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,470 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,471 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,472 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,473 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,474 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,475 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,476 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,477 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,478 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,479 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,480 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,481 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,482 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,484 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,484 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,486 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,486 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,487 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,489 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,490 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,491 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,491 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,493 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,494 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,495 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,496 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,497 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,498 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,499 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,500 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,501 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,502 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,503 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,504 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,505 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:20:00,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-01-28 22:20:00,508 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:20:00,616 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:20:00,653 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 1 dim-2 vars, End of recursive call: 8 dim-0 vars, and 1 xjuncts. [2018-01-28 22:20:00,653 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 9 variables, input treesize:159, output treesize:155 Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown