java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 22:03:44,799 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 22:03:44,800 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 22:03:44,813 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 22:03:44,813 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 22:03:44,814 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 22:03:44,814 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 22:03:44,816 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 22:03:44,817 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 22:03:44,818 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 22:03:44,819 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 22:03:44,819 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 22:03:44,819 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 22:03:44,820 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 22:03:44,821 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 22:03:44,823 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 22:03:44,826 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 22:03:44,828 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 22:03:44,829 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 22:03:44,830 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 22:03:44,833 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-28 22:03:44,838 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 22:03:44,838 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 22:03:44,839 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 22:03:44,848 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 22:03:44,849 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 22:03:44,850 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 22:03:44,850 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 22:03:44,850 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 22:03:44,850 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 22:03:44,851 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 22:03:44,851 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 22:03:44,851 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 22:03:44,852 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 22:03:44,852 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 22:03:44,852 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 22:03:44,852 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 22:03:44,852 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 22:03:44,853 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 22:03:44,853 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 22:03:44,853 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 22:03:44,853 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 22:03:44,853 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 22:03:44,854 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 22:03:44,854 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 22:03:44,854 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 22:03:44,854 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 22:03:44,854 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:03:44,855 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 22:03:44,855 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 22:03:44,855 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 22:03:44,855 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 22:03:44,855 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 22:03:44,856 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 22:03:44,856 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 22:03:44,856 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 22:03:44,857 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 22:03:44,857 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 22:03:44,891 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 22:03:44,904 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 22:03:44,908 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 22:03:44,910 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 22:03:44,910 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 22:03:44,911 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i [2018-01-28 22:03:45,084 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 22:03:45,090 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-28 22:03:45,090 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 22:03:45,090 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 22:03:45,095 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 22:03:45,096 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,098 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@43e3f01f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45, skipping insertion in model container [2018-01-28 22:03:45,098 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,117 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:03:45,159 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 22:03:45,278 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:03:45,297 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 22:03:45,304 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45 WrapperNode [2018-01-28 22:03:45,304 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 22:03:45,304 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 22:03:45,304 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 22:03:45,304 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 22:03:45,321 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,321 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,335 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,335 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,342 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,347 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,349 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (1/1) ... [2018-01-28 22:03:45,352 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 22:03:45,352 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 22:03:45,353 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 22:03:45,353 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 22:03:45,354 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 22:03:45,417 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 22:03:45,418 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 22:03:45,418 INFO L136 BoogieDeclarations]: Found implementation of procedure create_data [2018-01-28 22:03:45,418 INFO L136 BoogieDeclarations]: Found implementation of procedure freeData [2018-01-28 22:03:45,418 INFO L136 BoogieDeclarations]: Found implementation of procedure append [2018-01-28 22:03:45,418 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 22:03:45,418 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-28 22:03:45,419 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-28 22:03:45,419 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-28 22:03:45,419 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-28 22:03:45,419 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-28 22:03:45,419 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-28 22:03:45,419 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-28 22:03:45,420 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-28 22:03:45,420 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-28 22:03:45,420 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-28 22:03:45,420 INFO L128 BoogieDeclarations]: Found specification of procedure create_data [2018-01-28 22:03:45,420 INFO L128 BoogieDeclarations]: Found specification of procedure freeData [2018-01-28 22:03:45,420 INFO L128 BoogieDeclarations]: Found specification of procedure append [2018-01-28 22:03:45,421 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 22:03:45,421 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 22:03:45,421 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 22:03:45,941 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 22:03:45,942 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:03:45 BoogieIcfgContainer [2018-01-28 22:03:45,942 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 22:03:45,943 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 22:03:45,944 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 22:03:45,947 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 22:03:45,947 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 10:03:45" (1/3) ... [2018-01-28 22:03:45,948 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@73f65537 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:03:45, skipping insertion in model container [2018-01-28 22:03:45,948 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 10:03:45" (2/3) ... [2018-01-28 22:03:45,949 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@73f65537 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 10:03:45, skipping insertion in model container [2018-01-28 22:03:45,949 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 10:03:45" (3/3) ... [2018-01-28 22:03:45,951 INFO L107 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_true-valid-memsafety.i [2018-01-28 22:03:45,960 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 22:03:45,968 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-01-28 22:03:46,020 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 22:03:46,020 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 22:03:46,020 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 22:03:46,020 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 22:03:46,021 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 22:03:46,021 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 22:03:46,021 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 22:03:46,021 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 22:03:46,022 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 22:03:46,043 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states. [2018-01-28 22:03:46,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-28 22:03:46,050 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:46,051 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:46,051 INFO L371 AbstractCegarLoop]: === Iteration 1 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:46,056 INFO L82 PathProgramCache]: Analyzing trace with hash -757262712, now seen corresponding path program 1 times [2018-01-28 22:03:46,058 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:46,059 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:46,113 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:46,113 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:46,113 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:46,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:46,164 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:46,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:46,229 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:46,229 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 22:03:46,231 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 22:03:46,329 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 22:03:46,329 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:03:46,331 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 3 states. [2018-01-28 22:03:46,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:46,498 INFO L93 Difference]: Finished difference Result 276 states and 303 transitions. [2018-01-28 22:03:46,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 22:03:46,500 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-01-28 22:03:46,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:46,515 INFO L225 Difference]: With dead ends: 276 [2018-01-28 22:03:46,515 INFO L226 Difference]: Without dead ends: 141 [2018-01-28 22:03:46,520 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:03:46,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-28 22:03:46,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 138. [2018-01-28 22:03:46,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-28 22:03:46,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 145 transitions. [2018-01-28 22:03:46,576 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 145 transitions. Word has length 8 [2018-01-28 22:03:46,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:46,576 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 145 transitions. [2018-01-28 22:03:46,577 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 22:03:46,577 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 145 transitions. [2018-01-28 22:03:46,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-28 22:03:46,577 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:46,578 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:46,578 INFO L371 AbstractCegarLoop]: === Iteration 2 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:46,578 INFO L82 PathProgramCache]: Analyzing trace with hash -757262711, now seen corresponding path program 1 times [2018-01-28 22:03:46,578 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:46,578 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:46,579 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:46,580 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:46,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:46,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:46,596 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:46,655 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:46,655 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:46,656 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 22:03:46,657 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 22:03:46,657 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 22:03:46,657 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:03:46,657 INFO L87 Difference]: Start difference. First operand 138 states and 145 transitions. Second operand 3 states. [2018-01-28 22:03:46,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:46,744 INFO L93 Difference]: Finished difference Result 140 states and 148 transitions. [2018-01-28 22:03:46,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 22:03:46,744 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-01-28 22:03:46,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:46,746 INFO L225 Difference]: With dead ends: 140 [2018-01-28 22:03:46,746 INFO L226 Difference]: Without dead ends: 139 [2018-01-28 22:03:46,747 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 22:03:46,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-28 22:03:46,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 137. [2018-01-28 22:03:46,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-28 22:03:46,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 144 transitions. [2018-01-28 22:03:46,756 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 144 transitions. Word has length 8 [2018-01-28 22:03:46,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:46,756 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 144 transitions. [2018-01-28 22:03:46,756 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 22:03:46,756 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 144 transitions. [2018-01-28 22:03:46,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-28 22:03:46,756 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:46,757 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:46,757 INFO L371 AbstractCegarLoop]: === Iteration 3 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:46,757 INFO L82 PathProgramCache]: Analyzing trace with hash -2078042096, now seen corresponding path program 1 times [2018-01-28 22:03:46,757 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:46,757 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:46,758 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:46,758 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:46,758 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:46,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:46,780 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:46,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:46,839 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:46,840 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:03:46,840 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:03:46,840 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:03:46,840 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:46,841 INFO L87 Difference]: Start difference. First operand 137 states and 144 transitions. Second operand 5 states. [2018-01-28 22:03:47,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:47,095 INFO L93 Difference]: Finished difference Result 151 states and 159 transitions. [2018-01-28 22:03:47,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:03:47,095 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-01-28 22:03:47,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:47,097 INFO L225 Difference]: With dead ends: 151 [2018-01-28 22:03:47,097 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:03:47,097 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:03:47,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:03:47,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 143. [2018-01-28 22:03:47,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-28 22:03:47,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 152 transitions. [2018-01-28 22:03:47,111 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 152 transitions. Word has length 15 [2018-01-28 22:03:47,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:47,111 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 152 transitions. [2018-01-28 22:03:47,111 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:03:47,111 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 152 transitions. [2018-01-28 22:03:47,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-28 22:03:47,112 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:47,112 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:47,112 INFO L371 AbstractCegarLoop]: === Iteration 4 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:47,112 INFO L82 PathProgramCache]: Analyzing trace with hash -2078042095, now seen corresponding path program 1 times [2018-01-28 22:03:47,113 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:47,113 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:47,114 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:47,114 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:47,114 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:47,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:47,132 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:47,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:47,244 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:47,244 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:03:47,245 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:03:47,245 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:03:47,245 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:03:47,245 INFO L87 Difference]: Start difference. First operand 143 states and 152 transitions. Second operand 7 states. [2018-01-28 22:03:47,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:47,536 INFO L93 Difference]: Finished difference Result 149 states and 158 transitions. [2018-01-28 22:03:47,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:03:47,537 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-01-28 22:03:47,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:47,538 INFO L225 Difference]: With dead ends: 149 [2018-01-28 22:03:47,538 INFO L226 Difference]: Without dead ends: 148 [2018-01-28 22:03:47,539 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:03:47,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-01-28 22:03:47,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 143. [2018-01-28 22:03:47,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-28 22:03:47,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-28 22:03:47,547 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 15 [2018-01-28 22:03:47,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:47,548 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-28 22:03:47,548 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:03:47,548 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-28 22:03:47,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 22:03:47,548 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:47,548 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:47,549 INFO L371 AbstractCegarLoop]: === Iteration 5 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:47,549 INFO L82 PathProgramCache]: Analyzing trace with hash 5204605, now seen corresponding path program 1 times [2018-01-28 22:03:47,549 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:47,549 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:47,550 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:47,550 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:47,550 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:47,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:47,563 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:47,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:47,592 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:47,593 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 22:03:47,593 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:03:47,593 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:03:47,593 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:03:47,593 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 4 states. [2018-01-28 22:03:47,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:47,719 INFO L93 Difference]: Finished difference Result 143 states and 151 transitions. [2018-01-28 22:03:47,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:03:47,719 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-01-28 22:03:47,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:47,721 INFO L225 Difference]: With dead ends: 143 [2018-01-28 22:03:47,721 INFO L226 Difference]: Without dead ends: 142 [2018-01-28 22:03:47,721 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:47,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-28 22:03:47,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-01-28 22:03:47,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-28 22:03:47,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 150 transitions. [2018-01-28 22:03:47,732 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 150 transitions. Word has length 16 [2018-01-28 22:03:47,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:47,732 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 150 transitions. [2018-01-28 22:03:47,732 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:03:47,733 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 150 transitions. [2018-01-28 22:03:47,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 22:03:47,733 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:47,733 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:47,733 INFO L371 AbstractCegarLoop]: === Iteration 6 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:47,734 INFO L82 PathProgramCache]: Analyzing trace with hash 5204606, now seen corresponding path program 1 times [2018-01-28 22:03:47,734 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:47,734 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:47,735 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:47,735 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:47,735 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:47,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:47,749 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:47,789 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:47,789 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:47,789 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 22:03:47,789 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:03:47,789 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:03:47,789 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:03:47,790 INFO L87 Difference]: Start difference. First operand 142 states and 150 transitions. Second operand 4 states. [2018-01-28 22:03:47,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:47,865 INFO L93 Difference]: Finished difference Result 142 states and 150 transitions. [2018-01-28 22:03:47,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:03:47,865 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-01-28 22:03:47,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:47,866 INFO L225 Difference]: With dead ends: 142 [2018-01-28 22:03:47,866 INFO L226 Difference]: Without dead ends: 141 [2018-01-28 22:03:47,867 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:47,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-28 22:03:47,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-01-28 22:03:47,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-28 22:03:47,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-01-28 22:03:47,873 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 16 [2018-01-28 22:03:47,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:47,874 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-01-28 22:03:47,874 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:03:47,874 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-01-28 22:03:47,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-28 22:03:47,875 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:47,875 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:47,875 INFO L371 AbstractCegarLoop]: === Iteration 7 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:47,875 INFO L82 PathProgramCache]: Analyzing trace with hash 1505353273, now seen corresponding path program 1 times [2018-01-28 22:03:47,875 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:47,876 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:47,876 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:47,877 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:47,877 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:47,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:47,889 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:47,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:47,934 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:47,934 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 22:03:47,934 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:03:47,935 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:03:47,935 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:03:47,935 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 4 states. [2018-01-28 22:03:48,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:48,079 INFO L93 Difference]: Finished difference Result 151 states and 159 transitions. [2018-01-28 22:03:48,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:03:48,079 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-01-28 22:03:48,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:48,081 INFO L225 Difference]: With dead ends: 151 [2018-01-28 22:03:48,081 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:03:48,081 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:03:48,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:03:48,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 144. [2018-01-28 22:03:48,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-01-28 22:03:48,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2018-01-28 22:03:48,090 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 25 [2018-01-28 22:03:48,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:48,091 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2018-01-28 22:03:48,091 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:03:48,091 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2018-01-28 22:03:48,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-28 22:03:48,092 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:48,092 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:48,092 INFO L371 AbstractCegarLoop]: === Iteration 8 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:48,092 INFO L82 PathProgramCache]: Analyzing trace with hash 1505353274, now seen corresponding path program 1 times [2018-01-28 22:03:48,093 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:48,093 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:48,094 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:48,094 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:48,094 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:48,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:48,107 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:48,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:48,173 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:48,173 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:03:48,173 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:03:48,173 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:03:48,173 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:48,174 INFO L87 Difference]: Start difference. First operand 144 states and 153 transitions. Second operand 5 states. [2018-01-28 22:03:48,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:48,319 INFO L93 Difference]: Finished difference Result 151 states and 160 transitions. [2018-01-28 22:03:48,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 22:03:48,319 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-01-28 22:03:48,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:48,320 INFO L225 Difference]: With dead ends: 151 [2018-01-28 22:03:48,320 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:03:48,321 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:03:48,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:03:48,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 144. [2018-01-28 22:03:48,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-01-28 22:03:48,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 152 transitions. [2018-01-28 22:03:48,327 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 152 transitions. Word has length 25 [2018-01-28 22:03:48,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:48,327 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 152 transitions. [2018-01-28 22:03:48,328 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:03:48,328 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 152 transitions. [2018-01-28 22:03:48,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-28 22:03:48,328 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:48,328 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:48,328 INFO L371 AbstractCegarLoop]: === Iteration 9 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:48,329 INFO L82 PathProgramCache]: Analyzing trace with hash -759478630, now seen corresponding path program 1 times [2018-01-28 22:03:48,329 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:48,329 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:48,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:48,329 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:48,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:48,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:48,343 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:48,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:48,382 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:48,382 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 22:03:48,383 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:03:48,383 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:03:48,383 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:03:48,383 INFO L87 Difference]: Start difference. First operand 144 states and 152 transitions. Second operand 4 states. [2018-01-28 22:03:48,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:48,501 INFO L93 Difference]: Finished difference Result 153 states and 161 transitions. [2018-01-28 22:03:48,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:03:48,507 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-01-28 22:03:48,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:48,508 INFO L225 Difference]: With dead ends: 153 [2018-01-28 22:03:48,509 INFO L226 Difference]: Without dead ends: 152 [2018-01-28 22:03:48,509 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:03:48,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-28 22:03:48,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 146. [2018-01-28 22:03:48,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-28 22:03:48,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 155 transitions. [2018-01-28 22:03:48,558 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 155 transitions. Word has length 27 [2018-01-28 22:03:48,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:48,558 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 155 transitions. [2018-01-28 22:03:48,558 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:03:48,558 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 155 transitions. [2018-01-28 22:03:48,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-28 22:03:48,559 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:48,559 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:48,559 INFO L371 AbstractCegarLoop]: === Iteration 10 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:48,559 INFO L82 PathProgramCache]: Analyzing trace with hash -759478629, now seen corresponding path program 1 times [2018-01-28 22:03:48,560 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:48,560 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:48,560 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:48,560 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:48,561 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:48,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:48,574 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:48,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:48,691 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:48,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:03:48,692 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:03:48,692 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:03:48,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:03:48,692 INFO L87 Difference]: Start difference. First operand 146 states and 155 transitions. Second operand 7 states. [2018-01-28 22:03:48,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:48,934 INFO L93 Difference]: Finished difference Result 147 states and 155 transitions. [2018-01-28 22:03:48,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 22:03:48,934 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-01-28 22:03:48,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:48,935 INFO L225 Difference]: With dead ends: 147 [2018-01-28 22:03:48,935 INFO L226 Difference]: Without dead ends: 146 [2018-01-28 22:03:48,936 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-01-28 22:03:48,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-01-28 22:03:48,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-01-28 22:03:48,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-28 22:03:48,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 154 transitions. [2018-01-28 22:03:48,941 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 154 transitions. Word has length 27 [2018-01-28 22:03:48,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:48,942 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 154 transitions. [2018-01-28 22:03:48,942 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:03:48,942 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 154 transitions. [2018-01-28 22:03:48,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-28 22:03:48,943 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:48,943 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:48,943 INFO L371 AbstractCegarLoop]: === Iteration 11 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:48,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1424339685, now seen corresponding path program 1 times [2018-01-28 22:03:48,943 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:48,944 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:48,945 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:48,945 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:48,945 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:48,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:48,957 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:49,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:49,009 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:49,009 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 22:03:49,009 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:03:49,009 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:03:49,009 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:03:49,010 INFO L87 Difference]: Start difference. First operand 146 states and 154 transitions. Second operand 4 states. [2018-01-28 22:03:49,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:49,081 INFO L93 Difference]: Finished difference Result 146 states and 154 transitions. [2018-01-28 22:03:49,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:03:49,081 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-01-28 22:03:49,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:49,082 INFO L225 Difference]: With dead ends: 146 [2018-01-28 22:03:49,082 INFO L226 Difference]: Without dead ends: 142 [2018-01-28 22:03:49,083 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:49,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-28 22:03:49,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-01-28 22:03:49,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-28 22:03:49,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 150 transitions. [2018-01-28 22:03:49,089 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 150 transitions. Word has length 27 [2018-01-28 22:03:49,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:49,089 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 150 transitions. [2018-01-28 22:03:49,089 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:03:49,090 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 150 transitions. [2018-01-28 22:03:49,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-28 22:03:49,090 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:49,090 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:49,091 INFO L371 AbstractCegarLoop]: === Iteration 12 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:49,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1424339684, now seen corresponding path program 1 times [2018-01-28 22:03:49,091 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:49,091 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:49,092 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:49,092 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:49,092 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:49,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:49,103 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:49,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:49,196 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:49,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-28 22:03:49,196 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 22:03:49,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 22:03:49,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 22:03:49,196 INFO L87 Difference]: Start difference. First operand 142 states and 150 transitions. Second operand 4 states. [2018-01-28 22:03:49,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:49,353 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-01-28 22:03:49,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:03:49,353 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-01-28 22:03:49,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:49,354 INFO L225 Difference]: With dead ends: 149 [2018-01-28 22:03:49,355 INFO L226 Difference]: Without dead ends: 147 [2018-01-28 22:03:49,355 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:49,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-01-28 22:03:49,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 143. [2018-01-28 22:03:49,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-28 22:03:49,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-28 22:03:49,364 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 27 [2018-01-28 22:03:49,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:49,364 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-28 22:03:49,364 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 22:03:49,365 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-28 22:03:49,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-28 22:03:49,366 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:49,366 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:49,366 INFO L371 AbstractCegarLoop]: === Iteration 13 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:49,366 INFO L82 PathProgramCache]: Analyzing trace with hash -1205903910, now seen corresponding path program 1 times [2018-01-28 22:03:49,366 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:49,366 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:49,367 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:49,367 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:49,367 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:49,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:49,380 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:49,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:49,464 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:49,464 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:03:49,465 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:03:49,465 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:03:49,465 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:49,465 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 5 states. [2018-01-28 22:03:49,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:49,648 INFO L93 Difference]: Finished difference Result 143 states and 151 transitions. [2018-01-28 22:03:49,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 22:03:49,649 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-01-28 22:03:49,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:49,650 INFO L225 Difference]: With dead ends: 143 [2018-01-28 22:03:49,650 INFO L226 Difference]: Without dead ends: 140 [2018-01-28 22:03:49,651 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:03:49,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-28 22:03:49,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 138. [2018-01-28 22:03:49,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-28 22:03:49,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 146 transitions. [2018-01-28 22:03:49,659 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 146 transitions. Word has length 28 [2018-01-28 22:03:49,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:49,659 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 146 transitions. [2018-01-28 22:03:49,659 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:03:49,659 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 146 transitions. [2018-01-28 22:03:49,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-28 22:03:49,660 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:49,661 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:49,661 INFO L371 AbstractCegarLoop]: === Iteration 14 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:49,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1829633520, now seen corresponding path program 1 times [2018-01-28 22:03:49,661 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:49,662 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:49,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:49,663 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:49,663 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:49,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:49,677 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:49,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:49,738 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:49,739 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:03:49,739 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:03:49,739 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:03:49,740 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:49,740 INFO L87 Difference]: Start difference. First operand 138 states and 146 transitions. Second operand 5 states. [2018-01-28 22:03:49,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:49,930 INFO L93 Difference]: Finished difference Result 138 states and 146 transitions. [2018-01-28 22:03:49,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:03:49,930 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2018-01-28 22:03:49,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:49,932 INFO L225 Difference]: With dead ends: 138 [2018-01-28 22:03:49,932 INFO L226 Difference]: Without dead ends: 136 [2018-01-28 22:03:49,932 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:03:49,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-28 22:03:49,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 134. [2018-01-28 22:03:49,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-28 22:03:49,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 141 transitions. [2018-01-28 22:03:49,942 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 141 transitions. Word has length 34 [2018-01-28 22:03:49,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:49,942 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 141 transitions. [2018-01-28 22:03:49,942 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:03:49,943 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 141 transitions. [2018-01-28 22:03:49,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-28 22:03:49,943 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:49,944 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:49,944 INFO L371 AbstractCegarLoop]: === Iteration 15 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:49,944 INFO L82 PathProgramCache]: Analyzing trace with hash 1829633521, now seen corresponding path program 1 times [2018-01-28 22:03:49,944 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:49,944 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:49,945 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:49,945 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:49,945 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:49,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:49,958 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:50,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:50,043 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:50,043 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:03:50,043 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:03:50,043 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:03:50,043 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:03:50,043 INFO L87 Difference]: Start difference. First operand 134 states and 141 transitions. Second operand 6 states. [2018-01-28 22:03:50,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:50,182 INFO L93 Difference]: Finished difference Result 148 states and 157 transitions. [2018-01-28 22:03:50,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:03:50,182 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-01-28 22:03:50,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:50,184 INFO L225 Difference]: With dead ends: 148 [2018-01-28 22:03:50,184 INFO L226 Difference]: Without dead ends: 143 [2018-01-28 22:03:50,184 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:03:50,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-28 22:03:50,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 135. [2018-01-28 22:03:50,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-28 22:03:50,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 143 transitions. [2018-01-28 22:03:50,192 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 143 transitions. Word has length 34 [2018-01-28 22:03:50,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:50,193 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 143 transitions. [2018-01-28 22:03:50,193 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:03:50,193 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 143 transitions. [2018-01-28 22:03:50,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-28 22:03:50,193 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:50,193 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:50,194 INFO L371 AbstractCegarLoop]: === Iteration 16 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:50,194 INFO L82 PathProgramCache]: Analyzing trace with hash 504505967, now seen corresponding path program 1 times [2018-01-28 22:03:50,194 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:50,194 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:50,195 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:50,195 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:50,195 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:50,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:50,204 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:50,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:50,306 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:50,306 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:03:50,306 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:03:50,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:03:50,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:03:50,306 INFO L87 Difference]: Start difference. First operand 135 states and 143 transitions. Second operand 8 states. [2018-01-28 22:03:50,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:50,597 INFO L93 Difference]: Finished difference Result 157 states and 167 transitions. [2018-01-28 22:03:50,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:03:50,598 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2018-01-28 22:03:50,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:50,599 INFO L225 Difference]: With dead ends: 157 [2018-01-28 22:03:50,599 INFO L226 Difference]: Without dead ends: 156 [2018-01-28 22:03:50,599 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:03:50,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-01-28 22:03:50,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 142. [2018-01-28 22:03:50,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-28 22:03:50,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 151 transitions. [2018-01-28 22:03:50,608 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 151 transitions. Word has length 34 [2018-01-28 22:03:50,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:50,608 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 151 transitions. [2018-01-28 22:03:50,608 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:03:50,608 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 151 transitions. [2018-01-28 22:03:50,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-28 22:03:50,609 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:50,609 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:50,609 INFO L371 AbstractCegarLoop]: === Iteration 17 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:50,609 INFO L82 PathProgramCache]: Analyzing trace with hash 504505968, now seen corresponding path program 1 times [2018-01-28 22:03:50,609 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:50,609 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:50,610 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:50,610 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:50,610 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:50,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:50,623 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:50,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:50,743 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:50,743 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:03:50,744 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:03:50,744 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:03:50,744 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:03:50,744 INFO L87 Difference]: Start difference. First operand 142 states and 151 transitions. Second operand 7 states. [2018-01-28 22:03:51,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:51,138 INFO L93 Difference]: Finished difference Result 151 states and 161 transitions. [2018-01-28 22:03:51,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:03:51,138 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2018-01-28 22:03:51,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:51,140 INFO L225 Difference]: With dead ends: 151 [2018-01-28 22:03:51,140 INFO L226 Difference]: Without dead ends: 150 [2018-01-28 22:03:51,140 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:03:51,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-28 22:03:51,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 142. [2018-01-28 22:03:51,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-28 22:03:51,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 150 transitions. [2018-01-28 22:03:51,149 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 150 transitions. Word has length 34 [2018-01-28 22:03:51,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:51,149 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 150 transitions. [2018-01-28 22:03:51,150 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:03:51,150 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 150 transitions. [2018-01-28 22:03:51,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-28 22:03:51,150 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:51,150 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:51,151 INFO L371 AbstractCegarLoop]: === Iteration 18 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:51,151 INFO L82 PathProgramCache]: Analyzing trace with hash 987957506, now seen corresponding path program 1 times [2018-01-28 22:03:51,151 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:51,151 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:51,152 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:51,152 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:51,152 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:51,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:51,164 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:51,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:51,200 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:51,200 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:03:51,200 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:03:51,200 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:03:51,200 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:51,201 INFO L87 Difference]: Start difference. First operand 142 states and 150 transitions. Second operand 5 states. [2018-01-28 22:03:51,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:51,366 INFO L93 Difference]: Finished difference Result 155 states and 164 transitions. [2018-01-28 22:03:51,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:03:51,366 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-01-28 22:03:51,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:51,367 INFO L225 Difference]: With dead ends: 155 [2018-01-28 22:03:51,367 INFO L226 Difference]: Without dead ends: 154 [2018-01-28 22:03:51,367 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:03:51,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-28 22:03:51,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 147. [2018-01-28 22:03:51,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-28 22:03:51,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 157 transitions. [2018-01-28 22:03:51,373 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 157 transitions. Word has length 35 [2018-01-28 22:03:51,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:51,374 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 157 transitions. [2018-01-28 22:03:51,374 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:03:51,374 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 157 transitions. [2018-01-28 22:03:51,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-28 22:03:51,374 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:51,374 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:51,374 INFO L371 AbstractCegarLoop]: === Iteration 19 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:51,374 INFO L82 PathProgramCache]: Analyzing trace with hash 987957507, now seen corresponding path program 1 times [2018-01-28 22:03:51,375 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:51,375 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:51,375 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:51,375 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:51,375 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:51,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:51,384 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:51,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:51,618 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:51,618 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:03:51,618 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:03:51,618 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:03:51,618 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:03:51,618 INFO L87 Difference]: Start difference. First operand 147 states and 157 transitions. Second operand 6 states. [2018-01-28 22:03:51,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:51,745 INFO L93 Difference]: Finished difference Result 280 states and 302 transitions. [2018-01-28 22:03:51,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:03:51,746 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-28 22:03:51,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:51,747 INFO L225 Difference]: With dead ends: 280 [2018-01-28 22:03:51,747 INFO L226 Difference]: Without dead ends: 148 [2018-01-28 22:03:51,748 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:03:51,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-01-28 22:03:51,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 147. [2018-01-28 22:03:51,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-28 22:03:51,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-01-28 22:03:51,758 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 35 [2018-01-28 22:03:51,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:51,758 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-01-28 22:03:51,758 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:03:51,758 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-01-28 22:03:51,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-28 22:03:51,759 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:51,759 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:51,759 INFO L371 AbstractCegarLoop]: === Iteration 20 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:51,759 INFO L82 PathProgramCache]: Analyzing trace with hash -501065392, now seen corresponding path program 1 times [2018-01-28 22:03:51,759 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:51,760 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:51,760 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:51,760 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:51,761 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:51,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:51,772 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:51,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:51,858 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:51,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:03:51,858 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:03:51,858 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:03:51,859 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:03:51,859 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 7 states. [2018-01-28 22:03:52,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:52,098 INFO L93 Difference]: Finished difference Result 158 states and 167 transitions. [2018-01-28 22:03:52,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 22:03:52,098 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-01-28 22:03:52,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:52,100 INFO L225 Difference]: With dead ends: 158 [2018-01-28 22:03:52,100 INFO L226 Difference]: Without dead ends: 157 [2018-01-28 22:03:52,100 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:03:52,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-28 22:03:52,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 149. [2018-01-28 22:03:52,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-28 22:03:52,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 158 transitions. [2018-01-28 22:03:52,111 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 158 transitions. Word has length 36 [2018-01-28 22:03:52,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:52,111 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 158 transitions. [2018-01-28 22:03:52,111 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:03:52,111 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 158 transitions. [2018-01-28 22:03:52,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-28 22:03:52,112 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:52,112 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:52,112 INFO L371 AbstractCegarLoop]: === Iteration 21 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:52,113 INFO L82 PathProgramCache]: Analyzing trace with hash -501065391, now seen corresponding path program 1 times [2018-01-28 22:03:52,113 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:52,113 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:52,114 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:52,114 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:52,114 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:52,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:52,128 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:52,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:52,383 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:52,383 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:03:52,383 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:03:52,383 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:03:52,384 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:03:52,384 INFO L87 Difference]: Start difference. First operand 149 states and 158 transitions. Second operand 10 states. [2018-01-28 22:03:52,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:52,905 INFO L93 Difference]: Finished difference Result 177 states and 188 transitions. [2018-01-28 22:03:52,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:03:52,905 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-28 22:03:52,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:52,906 INFO L225 Difference]: With dead ends: 177 [2018-01-28 22:03:52,906 INFO L226 Difference]: Without dead ends: 176 [2018-01-28 22:03:52,906 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=75, Invalid=231, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:03:52,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-28 22:03:52,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 160. [2018-01-28 22:03:52,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-28 22:03:52,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 175 transitions. [2018-01-28 22:03:52,915 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 175 transitions. Word has length 36 [2018-01-28 22:03:52,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:52,915 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 175 transitions. [2018-01-28 22:03:52,915 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:03:52,915 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 175 transitions. [2018-01-28 22:03:52,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-28 22:03:52,915 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:52,916 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:52,916 INFO L371 AbstractCegarLoop]: === Iteration 22 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:52,916 INFO L82 PathProgramCache]: Analyzing trace with hash -643128955, now seen corresponding path program 1 times [2018-01-28 22:03:52,916 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:52,916 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:52,917 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:52,917 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:52,917 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:52,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:52,928 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:53,161 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:53,162 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:03:53,162 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:03:53,171 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:53,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:53,218 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:03:53,400 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:03:53,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-01-28 22:03:53,411 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:53,424 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:03:53,425 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:03:53,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 22:03:53,426 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:53,434 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:03:53,435 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-01-28 22:03:53,480 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:53,502 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:03:53,502 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 14 [2018-01-28 22:03:53,502 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 22:03:53,502 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 22:03:53,502 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:03:53,502 INFO L87 Difference]: Start difference. First operand 160 states and 175 transitions. Second operand 15 states. [2018-01-28 22:03:54,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:54,376 INFO L93 Difference]: Finished difference Result 176 states and 191 transitions. [2018-01-28 22:03:54,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:03:54,378 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 38 [2018-01-28 22:03:54,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:54,380 INFO L225 Difference]: With dead ends: 176 [2018-01-28 22:03:54,380 INFO L226 Difference]: Without dead ends: 173 [2018-01-28 22:03:54,381 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 30 SyntacticMatches, 5 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:03:54,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-28 22:03:54,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 158. [2018-01-28 22:03:54,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-28 22:03:54,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 172 transitions. [2018-01-28 22:03:54,395 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 172 transitions. Word has length 38 [2018-01-28 22:03:54,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:54,395 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 172 transitions. [2018-01-28 22:03:54,396 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 22:03:54,396 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 172 transitions. [2018-01-28 22:03:54,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-28 22:03:54,396 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:54,396 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:54,397 INFO L371 AbstractCegarLoop]: === Iteration 23 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:54,397 INFO L82 PathProgramCache]: Analyzing trace with hash 421239284, now seen corresponding path program 1 times [2018-01-28 22:03:54,397 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:54,397 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:54,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:54,398 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:54,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:54,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:54,411 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:54,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:54,501 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:54,501 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-28 22:03:54,501 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 22:03:54,502 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 22:03:54,502 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:03:54,502 INFO L87 Difference]: Start difference. First operand 158 states and 172 transitions. Second operand 7 states. [2018-01-28 22:03:54,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:54,745 INFO L93 Difference]: Finished difference Result 177 states and 194 transitions. [2018-01-28 22:03:54,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:03:54,746 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-01-28 22:03:54,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:54,747 INFO L225 Difference]: With dead ends: 177 [2018-01-28 22:03:54,747 INFO L226 Difference]: Without dead ends: 176 [2018-01-28 22:03:54,748 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:03:54,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-28 22:03:54,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 164. [2018-01-28 22:03:54,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-28 22:03:54,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 180 transitions. [2018-01-28 22:03:54,759 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 180 transitions. Word has length 38 [2018-01-28 22:03:54,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:54,759 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 180 transitions. [2018-01-28 22:03:54,760 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 22:03:54,760 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 180 transitions. [2018-01-28 22:03:54,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-28 22:03:54,760 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:54,760 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:54,760 INFO L371 AbstractCegarLoop]: === Iteration 24 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:54,761 INFO L82 PathProgramCache]: Analyzing trace with hash 421239285, now seen corresponding path program 1 times [2018-01-28 22:03:54,761 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:54,761 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:54,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:54,762 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:54,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:54,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:54,773 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:54,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:54,931 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:54,931 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:03:54,931 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 22:03:54,931 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 22:03:54,931 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-28 22:03:54,932 INFO L87 Difference]: Start difference. First operand 164 states and 180 transitions. Second operand 9 states. [2018-01-28 22:03:55,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:55,253 INFO L93 Difference]: Finished difference Result 214 states and 236 transitions. [2018-01-28 22:03:55,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:03:55,253 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-01-28 22:03:55,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:55,254 INFO L225 Difference]: With dead ends: 214 [2018-01-28 22:03:55,254 INFO L226 Difference]: Without dead ends: 213 [2018-01-28 22:03:55,255 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-01-28 22:03:55,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-01-28 22:03:55,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 180. [2018-01-28 22:03:55,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-28 22:03:55,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 198 transitions. [2018-01-28 22:03:55,266 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 198 transitions. Word has length 38 [2018-01-28 22:03:55,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:55,266 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 198 transitions. [2018-01-28 22:03:55,266 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 22:03:55,266 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 198 transitions. [2018-01-28 22:03:55,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-28 22:03:55,267 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:55,267 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:55,267 INFO L371 AbstractCegarLoop]: === Iteration 25 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:55,267 INFO L82 PathProgramCache]: Analyzing trace with hash 996322643, now seen corresponding path program 1 times [2018-01-28 22:03:55,267 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:55,267 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:55,268 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:55,268 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:55,268 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:55,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:55,280 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:55,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:55,389 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:55,389 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-28 22:03:55,390 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:03:55,390 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:03:55,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:03:55,406 INFO L87 Difference]: Start difference. First operand 180 states and 198 transitions. Second operand 8 states. [2018-01-28 22:03:55,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:55,557 INFO L93 Difference]: Finished difference Result 208 states and 226 transitions. [2018-01-28 22:03:55,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 22:03:55,558 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-01-28 22:03:55,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:55,559 INFO L225 Difference]: With dead ends: 208 [2018-01-28 22:03:55,559 INFO L226 Difference]: Without dead ends: 202 [2018-01-28 22:03:55,559 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:03:55,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-01-28 22:03:55,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 180. [2018-01-28 22:03:55,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-28 22:03:55,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 196 transitions. [2018-01-28 22:03:55,568 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 196 transitions. Word has length 40 [2018-01-28 22:03:55,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:55,568 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 196 transitions. [2018-01-28 22:03:55,568 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:03:55,568 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 196 transitions. [2018-01-28 22:03:55,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 22:03:55,569 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:55,569 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:55,569 INFO L371 AbstractCegarLoop]: === Iteration 26 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:55,569 INFO L82 PathProgramCache]: Analyzing trace with hash 431188248, now seen corresponding path program 1 times [2018-01-28 22:03:55,569 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:55,570 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:55,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:55,570 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:55,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:55,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:55,578 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:55,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:55,640 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:55,640 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-28 22:03:55,640 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 22:03:55,641 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 22:03:55,641 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 22:03:55,641 INFO L87 Difference]: Start difference. First operand 180 states and 196 transitions. Second operand 5 states. [2018-01-28 22:03:55,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:55,793 INFO L93 Difference]: Finished difference Result 180 states and 196 transitions. [2018-01-28 22:03:55,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 22:03:55,793 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-01-28 22:03:55,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:55,794 INFO L225 Difference]: With dead ends: 180 [2018-01-28 22:03:55,794 INFO L226 Difference]: Without dead ends: 179 [2018-01-28 22:03:55,794 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-28 22:03:55,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-28 22:03:55,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2018-01-28 22:03:55,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-28 22:03:55,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 195 transitions. [2018-01-28 22:03:55,802 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 195 transitions. Word has length 43 [2018-01-28 22:03:55,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:55,803 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 195 transitions. [2018-01-28 22:03:55,803 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 22:03:55,803 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 195 transitions. [2018-01-28 22:03:55,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-28 22:03:55,803 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:55,803 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:55,803 INFO L371 AbstractCegarLoop]: === Iteration 27 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:55,803 INFO L82 PathProgramCache]: Analyzing trace with hash 431188249, now seen corresponding path program 1 times [2018-01-28 22:03:55,804 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:55,804 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:55,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:55,804 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:55,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:55,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:55,815 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:56,380 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:56,380 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:56,380 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:03:56,380 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:03:56,380 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:03:56,380 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:03:56,380 INFO L87 Difference]: Start difference. First operand 179 states and 195 transitions. Second operand 10 states. [2018-01-28 22:03:57,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:57,308 INFO L93 Difference]: Finished difference Result 207 states and 227 transitions. [2018-01-28 22:03:57,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-28 22:03:57,309 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-01-28 22:03:57,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:57,310 INFO L225 Difference]: With dead ends: 207 [2018-01-28 22:03:57,310 INFO L226 Difference]: Without dead ends: 206 [2018-01-28 22:03:57,310 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:03:57,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-01-28 22:03:57,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 184. [2018-01-28 22:03:57,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-28 22:03:57,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 200 transitions. [2018-01-28 22:03:57,319 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 200 transitions. Word has length 43 [2018-01-28 22:03:57,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:57,319 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 200 transitions. [2018-01-28 22:03:57,319 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:03:57,319 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 200 transitions. [2018-01-28 22:03:57,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-28 22:03:57,320 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:57,320 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:57,320 INFO L371 AbstractCegarLoop]: === Iteration 28 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:57,320 INFO L82 PathProgramCache]: Analyzing trace with hash 674246996, now seen corresponding path program 1 times [2018-01-28 22:03:57,320 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:57,320 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:57,321 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:57,321 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:57,321 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:57,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:57,330 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:57,625 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:57,625 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:03:57,625 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:03:57,639 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:57,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:57,673 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:03:57,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:03:57,691 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,717 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-28 22:03:57,771 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:03:57,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:03:57,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-28 22:03:57,773 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,790 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-28 22:03:57,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:03:57,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:03:57,814 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,816 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,821 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,822 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-28 22:03:57,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-28 22:03:57,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:03:57,860 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,865 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,870 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,870 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-28 22:03:57,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-28 22:03:57,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-28 22:03:57,893 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:57,899 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:03:57,899 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-28 22:03:57,931 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-28 22:03:57,950 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:03:57,951 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 12 [2018-01-28 22:03:57,951 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-28 22:03:57,951 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-28 22:03:57,951 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:03:57,951 INFO L87 Difference]: Start difference. First operand 184 states and 200 transitions. Second operand 13 states. [2018-01-28 22:03:58,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:58,135 INFO L93 Difference]: Finished difference Result 184 states and 200 transitions. [2018-01-28 22:03:58,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:03:58,136 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 45 [2018-01-28 22:03:58,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:58,137 INFO L225 Difference]: With dead ends: 184 [2018-01-28 22:03:58,137 INFO L226 Difference]: Without dead ends: 183 [2018-01-28 22:03:58,137 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 39 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=76, Invalid=196, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:03:58,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-28 22:03:58,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2018-01-28 22:03:58,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-01-28 22:03:58,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 199 transitions. [2018-01-28 22:03:58,148 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 199 transitions. Word has length 45 [2018-01-28 22:03:58,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:58,148 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 199 transitions. [2018-01-28 22:03:58,149 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-28 22:03:58,149 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 199 transitions. [2018-01-28 22:03:58,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-28 22:03:58,150 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:58,150 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:58,150 INFO L371 AbstractCegarLoop]: === Iteration 29 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:58,150 INFO L82 PathProgramCache]: Analyzing trace with hash 674246997, now seen corresponding path program 1 times [2018-01-28 22:03:58,150 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:58,150 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:58,151 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:58,151 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:58,151 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:58,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:58,165 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:58,447 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:58,447 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:03:58,447 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:03:58,455 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:58,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:58,484 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:03:58,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:03:58,497 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,510 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,510 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-28 22:03:58,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:03:58,538 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,544 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:03:58,545 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:03:58,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 22:03:58,545 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,549 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,550 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-28 22:03:58,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:03:58,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:03:58,563 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,566 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:03:58,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:03:58,584 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,586 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,591 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,592 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-28 22:03:58,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 98 [2018-01-28 22:03:58,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:03:58,627 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,632 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-28 22:03:58,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:03:58,645 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,648 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,652 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-28 22:03:58,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-28 22:03:58,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-28 22:03:58,694 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,697 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-28 22:03:58,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-28 22:03:58,707 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,708 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,712 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:03:58,712 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2018-01-28 22:03:58,725 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:58,745 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:03:58,746 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 14 [2018-01-28 22:03:58,746 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 22:03:58,746 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 22:03:58,746 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2018-01-28 22:03:58,746 INFO L87 Difference]: Start difference. First operand 183 states and 199 transitions. Second operand 15 states. [2018-01-28 22:03:59,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:03:59,191 INFO L93 Difference]: Finished difference Result 351 states and 385 transitions. [2018-01-28 22:03:59,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 22:03:59,192 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 45 [2018-01-28 22:03:59,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:03:59,192 INFO L225 Difference]: With dead ends: 351 [2018-01-28 22:03:59,193 INFO L226 Difference]: Without dead ends: 194 [2018-01-28 22:03:59,193 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 36 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=142, Invalid=458, Unknown=0, NotChecked=0, Total=600 [2018-01-28 22:03:59,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-28 22:03:59,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 193. [2018-01-28 22:03:59,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-01-28 22:03:59,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 209 transitions. [2018-01-28 22:03:59,206 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 209 transitions. Word has length 45 [2018-01-28 22:03:59,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:03:59,206 INFO L432 AbstractCegarLoop]: Abstraction has 193 states and 209 transitions. [2018-01-28 22:03:59,206 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 22:03:59,206 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 209 transitions. [2018-01-28 22:03:59,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:03:59,207 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:03:59,207 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:03:59,207 INFO L371 AbstractCegarLoop]: === Iteration 30 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:03:59,208 INFO L82 PathProgramCache]: Analyzing trace with hash -781085917, now seen corresponding path program 1 times [2018-01-28 22:03:59,208 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:03:59,208 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:03:59,209 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:59,209 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:03:59,209 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:03:59,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:03:59,221 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:03:59,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:03:59,566 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:03:59,567 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-28 22:03:59,567 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 22:03:59,567 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 22:03:59,567 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:03:59,567 INFO L87 Difference]: Start difference. First operand 193 states and 209 transitions. Second operand 17 states. [2018-01-28 22:04:00,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:00,346 INFO L93 Difference]: Finished difference Result 288 states and 311 transitions. [2018-01-28 22:04:00,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-28 22:04:00,346 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-01-28 22:04:00,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:00,348 INFO L225 Difference]: With dead ends: 288 [2018-01-28 22:04:00,348 INFO L226 Difference]: Without dead ends: 232 [2018-01-28 22:04:00,349 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 217 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=141, Invalid=1049, Unknown=0, NotChecked=0, Total=1190 [2018-01-28 22:04:00,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-01-28 22:04:00,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 212. [2018-01-28 22:04:00,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-01-28 22:04:00,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 229 transitions. [2018-01-28 22:04:00,362 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 229 transitions. Word has length 47 [2018-01-28 22:04:00,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:00,363 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 229 transitions. [2018-01-28 22:04:00,363 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 22:04:00,363 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 229 transitions. [2018-01-28 22:04:00,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-28 22:04:00,364 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:00,364 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:00,364 INFO L371 AbstractCegarLoop]: === Iteration 31 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:00,364 INFO L82 PathProgramCache]: Analyzing trace with hash 692115839, now seen corresponding path program 1 times [2018-01-28 22:04:00,364 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:00,365 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:00,365 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:00,365 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:00,366 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:00,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:00,379 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:00,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:00,631 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:00,631 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:04:00,632 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:04:00,632 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:04:00,632 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:04:00,632 INFO L87 Difference]: Start difference. First operand 212 states and 229 transitions. Second operand 12 states. [2018-01-28 22:04:01,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:01,515 INFO L93 Difference]: Finished difference Result 258 states and 280 transitions. [2018-01-28 22:04:01,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 22:04:01,516 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 47 [2018-01-28 22:04:01,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:01,517 INFO L225 Difference]: With dead ends: 258 [2018-01-28 22:04:01,517 INFO L226 Difference]: Without dead ends: 257 [2018-01-28 22:04:01,517 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=107, Invalid=399, Unknown=0, NotChecked=0, Total=506 [2018-01-28 22:04:01,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-01-28 22:04:01,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 225. [2018-01-28 22:04:01,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-01-28 22:04:01,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 243 transitions. [2018-01-28 22:04:01,526 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 243 transitions. Word has length 47 [2018-01-28 22:04:01,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:01,527 INFO L432 AbstractCegarLoop]: Abstraction has 225 states and 243 transitions. [2018-01-28 22:04:01,527 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:04:01,527 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 243 transitions. [2018-01-28 22:04:01,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-28 22:04:01,527 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:01,527 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:01,527 INFO L371 AbstractCegarLoop]: === Iteration 32 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:01,528 INFO L82 PathProgramCache]: Analyzing trace with hash 2030462760, now seen corresponding path program 1 times [2018-01-28 22:04:01,528 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:01,528 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:01,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:01,528 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:01,529 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:01,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:01,535 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:01,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:01,642 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:01,642 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-28 22:04:01,642 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 22:04:01,642 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 22:04:01,642 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:04:01,643 INFO L87 Difference]: Start difference. First operand 225 states and 243 transitions. Second operand 8 states. [2018-01-28 22:04:01,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:01,750 INFO L93 Difference]: Finished difference Result 246 states and 265 transitions. [2018-01-28 22:04:01,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 22:04:01,750 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-01-28 22:04:01,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:01,752 INFO L225 Difference]: With dead ends: 246 [2018-01-28 22:04:01,753 INFO L226 Difference]: Without dead ends: 245 [2018-01-28 22:04:01,753 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-28 22:04:01,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2018-01-28 22:04:01,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 238. [2018-01-28 22:04:01,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states. [2018-01-28 22:04:01,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 261 transitions. [2018-01-28 22:04:01,768 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 261 transitions. Word has length 52 [2018-01-28 22:04:01,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:01,769 INFO L432 AbstractCegarLoop]: Abstraction has 238 states and 261 transitions. [2018-01-28 22:04:01,769 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 22:04:01,769 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 261 transitions. [2018-01-28 22:04:01,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-28 22:04:01,770 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:01,770 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:01,770 INFO L371 AbstractCegarLoop]: === Iteration 33 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:01,770 INFO L82 PathProgramCache]: Analyzing trace with hash 2030462761, now seen corresponding path program 1 times [2018-01-28 22:04:01,770 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:01,770 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:01,771 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:01,771 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:01,771 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:01,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:01,781 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:01,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:01,815 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:01,815 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-28 22:04:01,816 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 22:04:01,816 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 22:04:01,816 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 22:04:01,816 INFO L87 Difference]: Start difference. First operand 238 states and 261 transitions. Second operand 6 states. [2018-01-28 22:04:01,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:01,937 INFO L93 Difference]: Finished difference Result 245 states and 269 transitions. [2018-01-28 22:04:01,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 22:04:01,937 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2018-01-28 22:04:01,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:01,938 INFO L225 Difference]: With dead ends: 245 [2018-01-28 22:04:01,938 INFO L226 Difference]: Without dead ends: 244 [2018-01-28 22:04:01,939 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-28 22:04:01,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2018-01-28 22:04:01,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 240. [2018-01-28 22:04:01,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states. [2018-01-28 22:04:01,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 264 transitions. [2018-01-28 22:04:01,951 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 264 transitions. Word has length 52 [2018-01-28 22:04:01,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:01,951 INFO L432 AbstractCegarLoop]: Abstraction has 240 states and 264 transitions. [2018-01-28 22:04:01,951 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 22:04:01,951 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 264 transitions. [2018-01-28 22:04:01,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-28 22:04:01,952 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:01,952 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:01,952 INFO L371 AbstractCegarLoop]: === Iteration 34 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:01,952 INFO L82 PathProgramCache]: Analyzing trace with hash -981839921, now seen corresponding path program 1 times [2018-01-28 22:04:01,952 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:01,952 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:01,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:01,953 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:01,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:01,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:01,961 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:02,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:02,285 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:02,285 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-28 22:04:02,285 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 22:04:02,286 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 22:04:02,286 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-28 22:04:02,286 INFO L87 Difference]: Start difference. First operand 240 states and 264 transitions. Second operand 10 states. [2018-01-28 22:04:02,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:02,493 INFO L93 Difference]: Finished difference Result 247 states and 267 transitions. [2018-01-28 22:04:02,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 22:04:02,493 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-28 22:04:02,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:02,494 INFO L225 Difference]: With dead ends: 247 [2018-01-28 22:04:02,494 INFO L226 Difference]: Without dead ends: 246 [2018-01-28 22:04:02,494 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-01-28 22:04:02,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-01-28 22:04:02,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 224. [2018-01-28 22:04:02,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-01-28 22:04:02,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 246 transitions. [2018-01-28 22:04:02,508 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 246 transitions. Word has length 52 [2018-01-28 22:04:02,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:02,509 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 246 transitions. [2018-01-28 22:04:02,509 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 22:04:02,509 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 246 transitions. [2018-01-28 22:04:02,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-28 22:04:02,510 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:02,510 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:02,510 INFO L371 AbstractCegarLoop]: === Iteration 35 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:02,510 INFO L82 PathProgramCache]: Analyzing trace with hash 1359562857, now seen corresponding path program 1 times [2018-01-28 22:04:02,511 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:02,511 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:02,511 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:02,512 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:02,512 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:02,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:02,521 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:02,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:02,706 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:02,706 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-28 22:04:02,706 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 22:04:02,707 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 22:04:02,707 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-01-28 22:04:02,707 INFO L87 Difference]: Start difference. First operand 224 states and 246 transitions. Second operand 12 states. [2018-01-28 22:04:03,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:03,126 INFO L93 Difference]: Finished difference Result 268 states and 296 transitions. [2018-01-28 22:04:03,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 22:04:03,127 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2018-01-28 22:04:03,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:03,128 INFO L225 Difference]: With dead ends: 268 [2018-01-28 22:04:03,128 INFO L226 Difference]: Without dead ends: 267 [2018-01-28 22:04:03,128 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:04:03,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-01-28 22:04:03,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 258. [2018-01-28 22:04:03,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-01-28 22:04:03,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 287 transitions. [2018-01-28 22:04:03,144 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 287 transitions. Word has length 54 [2018-01-28 22:04:03,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:03,145 INFO L432 AbstractCegarLoop]: Abstraction has 258 states and 287 transitions. [2018-01-28 22:04:03,145 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 22:04:03,145 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 287 transitions. [2018-01-28 22:04:03,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-28 22:04:03,146 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:03,146 INFO L330 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:03,146 INFO L371 AbstractCegarLoop]: === Iteration 36 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:03,147 INFO L82 PathProgramCache]: Analyzing trace with hash 107780903, now seen corresponding path program 2 times [2018-01-28 22:04:03,147 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:03,147 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:03,148 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:03,148 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:03,148 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:03,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:03,163 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:03,452 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:03,452 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:04:03,452 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:04:03,470 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 22:04:03,487 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:04:03,497 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 22:04:03,499 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:04:03,502 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:04:03,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:04:03,506 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,507 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,508 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-28 22:04:03,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:04:03,516 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,532 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:03,537 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:03,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 22:04:03,539 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,543 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,544 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-28 22:04:03,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:04:03,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:04:03,568 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,570 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:04:03,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:04:03,583 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,584 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,591 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,591 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-28 22:04:03,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-28 22:04:03,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:03,643 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,646 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-28 22:04:03,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:03,661 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,667 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,673 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-28 22:04:03,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-28 22:04:03,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:03,741 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,746 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-28 22:04:03,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:03,763 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,767 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,774 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:119, output treesize:37 [2018-01-28 22:04:03,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-28 22:04:03,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-28 22:04:03,827 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,830 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-28 22:04:03,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-28 22:04:03,840 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,841 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,846 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:03,846 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:55, output treesize:15 [2018-01-28 22:04:03,868 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:03,889 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:04:03,889 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13] total 19 [2018-01-28 22:04:03,890 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 22:04:03,890 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 22:04:03,890 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=322, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:04:03,890 INFO L87 Difference]: Start difference. First operand 258 states and 287 transitions. Second operand 20 states. [2018-01-28 22:04:04,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:04,413 INFO L93 Difference]: Finished difference Result 471 states and 529 transitions. [2018-01-28 22:04:04,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 22:04:04,447 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-01-28 22:04:04,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:04,448 INFO L225 Difference]: With dead ends: 471 [2018-01-28 22:04:04,448 INFO L226 Difference]: Without dead ends: 269 [2018-01-28 22:04:04,449 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 44 SyntacticMatches, 7 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 212 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=212, Invalid=910, Unknown=0, NotChecked=0, Total=1122 [2018-01-28 22:04:04,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-01-28 22:04:04,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 268. [2018-01-28 22:04:04,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268 states. [2018-01-28 22:04:04,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 297 transitions. [2018-01-28 22:04:04,460 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 297 transitions. Word has length 55 [2018-01-28 22:04:04,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:04,461 INFO L432 AbstractCegarLoop]: Abstraction has 268 states and 297 transitions. [2018-01-28 22:04:04,461 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 22:04:04,461 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 297 transitions. [2018-01-28 22:04:04,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:04:04,462 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:04,462 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:04,462 INFO L371 AbstractCegarLoop]: === Iteration 37 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:04,462 INFO L82 PathProgramCache]: Analyzing trace with hash -581292327, now seen corresponding path program 1 times [2018-01-28 22:04:04,463 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:04,463 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:04,463 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:04,464 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:04:04,464 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:04,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:04,476 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:04,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:04,735 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:04,735 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-28 22:04:04,736 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 22:04:04,736 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 22:04:04,736 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=270, Unknown=0, NotChecked=0, Total=306 [2018-01-28 22:04:04,736 INFO L87 Difference]: Start difference. First operand 268 states and 297 transitions. Second operand 18 states. [2018-01-28 22:04:05,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:05,523 INFO L93 Difference]: Finished difference Result 303 states and 337 transitions. [2018-01-28 22:04:05,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-28 22:04:05,523 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-01-28 22:04:05,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:05,525 INFO L225 Difference]: With dead ends: 303 [2018-01-28 22:04:05,525 INFO L226 Difference]: Without dead ends: 300 [2018-01-28 22:04:05,525 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=142, Invalid=1118, Unknown=0, NotChecked=0, Total=1260 [2018-01-28 22:04:05,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-01-28 22:04:05,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 273. [2018-01-28 22:04:05,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-01-28 22:04:05,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 304 transitions. [2018-01-28 22:04:05,541 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 304 transitions. Word has length 56 [2018-01-28 22:04:05,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:05,542 INFO L432 AbstractCegarLoop]: Abstraction has 273 states and 304 transitions. [2018-01-28 22:04:05,542 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 22:04:05,542 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 304 transitions. [2018-01-28 22:04:05,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-28 22:04:05,543 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:05,543 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:05,543 INFO L371 AbstractCegarLoop]: === Iteration 38 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:05,544 INFO L82 PathProgramCache]: Analyzing trace with hash -581292326, now seen corresponding path program 1 times [2018-01-28 22:04:05,544 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:05,544 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:05,545 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:05,545 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:05,545 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:05,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:05,560 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:06,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:06,130 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:06,130 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-01-28 22:04:06,131 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:04:06,131 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:04:06,131 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:04:06,131 INFO L87 Difference]: Start difference. First operand 273 states and 304 transitions. Second operand 19 states. [2018-01-28 22:04:07,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:07,136 INFO L93 Difference]: Finished difference Result 324 states and 359 transitions. [2018-01-28 22:04:07,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-28 22:04:07,137 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 56 [2018-01-28 22:04:07,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:07,138 INFO L225 Difference]: With dead ends: 324 [2018-01-28 22:04:07,138 INFO L226 Difference]: Without dead ends: 321 [2018-01-28 22:04:07,139 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 291 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=164, Invalid=1396, Unknown=0, NotChecked=0, Total=1560 [2018-01-28 22:04:07,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2018-01-28 22:04:07,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 294. [2018-01-28 22:04:07,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-01-28 22:04:07,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 330 transitions. [2018-01-28 22:04:07,151 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 330 transitions. Word has length 56 [2018-01-28 22:04:07,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:07,152 INFO L432 AbstractCegarLoop]: Abstraction has 294 states and 330 transitions. [2018-01-28 22:04:07,152 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:04:07,152 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 330 transitions. [2018-01-28 22:04:07,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-01-28 22:04:07,153 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:07,153 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:07,153 INFO L371 AbstractCegarLoop]: === Iteration 39 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:07,153 INFO L82 PathProgramCache]: Analyzing trace with hash -1088192419, now seen corresponding path program 1 times [2018-01-28 22:04:07,153 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:07,153 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:07,154 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:07,154 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:07,154 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:07,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:07,167 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:07,351 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-28 22:04:07,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:04:07,352 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:04:07,358 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:07,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:07,392 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:04:07,424 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|create_data_#t~malloc1.base| Int)) (and (= |c_#length| (store |c_old(#length)| |create_data_#t~malloc1.base| 8)) (= 0 (select |c_old(#valid)| |create_data_#t~malloc1.base|)))) is different from true [2018-01-28 22:04:07,452 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:07,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-01-28 22:04:07,455 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:07,468 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:07,469 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:07,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 22:04:07,471 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:07,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:07,479 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:22 [2018-01-28 22:04:07,513 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-28 22:04:07,539 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-28 22:04:07,539 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 13 [2018-01-28 22:04:07,540 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-28 22:04:07,540 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-28 22:04:07,540 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=128, Unknown=1, NotChecked=22, Total=182 [2018-01-28 22:04:07,540 INFO L87 Difference]: Start difference. First operand 294 states and 330 transitions. Second operand 14 states. [2018-01-28 22:04:08,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:08,060 INFO L93 Difference]: Finished difference Result 298 states and 332 transitions. [2018-01-28 22:04:08,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 22:04:08,060 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 59 [2018-01-28 22:04:08,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:08,061 INFO L225 Difference]: With dead ends: 298 [2018-01-28 22:04:08,061 INFO L226 Difference]: Without dead ends: 297 [2018-01-28 22:04:08,062 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 58 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=100, Invalid=365, Unknown=1, NotChecked=40, Total=506 [2018-01-28 22:04:08,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2018-01-28 22:04:08,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 291. [2018-01-28 22:04:08,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-01-28 22:04:08,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 326 transitions. [2018-01-28 22:04:08,073 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 326 transitions. Word has length 59 [2018-01-28 22:04:08,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:08,074 INFO L432 AbstractCegarLoop]: Abstraction has 291 states and 326 transitions. [2018-01-28 22:04:08,074 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-28 22:04:08,074 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 326 transitions. [2018-01-28 22:04:08,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:04:08,075 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:08,075 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:08,075 INFO L371 AbstractCegarLoop]: === Iteration 40 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:08,075 INFO L82 PathProgramCache]: Analyzing trace with hash 2025488239, now seen corresponding path program 1 times [2018-01-28 22:04:08,075 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:08,075 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:08,076 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:08,076 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:08,076 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:08,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:08,088 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:08,719 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:08,720 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:04:08,720 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:04:08,725 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:08,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:08,753 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:04:08,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:04:08,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:04:08,778 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:08,779 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:08,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:04:08,786 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:04:08,786 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:08,787 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:08,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:08,791 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-01-28 22:04:09,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-01-28 22:04:09,137 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:09,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-01-28 22:04:09,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-01-28 22:04:09,143 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,148 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-01-28 22:04:09,162 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:09,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-01-28 22:04:09,164 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,168 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,174 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-01-28 22:04:09,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-28 22:04:09,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-01-28 22:04:09,189 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,193 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:09,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 40 [2018-01-28 22:04:09,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2018-01-28 22:04:09,213 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,220 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,227 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-01-28 22:04:09,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-28 22:04:09,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-01-28 22:04:09,269 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,273 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,282 INFO L682 Elim1Store]: detected equality via solver [2018-01-28 22:04:09,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-01-28 22:04:09,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-28 22:04:09,286 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,291 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,297 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-01-28 22:04:09,303 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:09,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-01-28 22:04:09,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-01-28 22:04:09,308 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,314 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-01-28 22:04:09,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:09,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-01-28 22:04:09,327 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,331 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,334 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,356 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 4 xjuncts. [2018-01-28 22:04:09,356 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 5 variables, input treesize:104, output treesize:161 [2018-01-28 22:04:09,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 94 [2018-01-28 22:04:09,721 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,746 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:09,746 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:188, output treesize:83 [2018-01-28 22:04:09,837 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:09,838 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:09,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-01-28 22:04:09,839 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,857 INFO L682 Elim1Store]: detected equality via solver [2018-01-28 22:04:09,863 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:09,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 85 [2018-01-28 22:04:09,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 68 [2018-01-28 22:04:09,867 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,875 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,889 INFO L682 Elim1Store]: detected equality via solver [2018-01-28 22:04:09,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 65 [2018-01-28 22:04:09,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 43 [2018-01-28 22:04:09,906 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,915 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:09,930 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:09,930 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:104, output treesize:56 [2018-01-28 22:04:09,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-01-28 22:04:09,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 5 [2018-01-28 22:04:09,995 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:10,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-28 22:04:10,005 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:10,007 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:10,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 22 [2018-01-28 22:04:10,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-28 22:04:10,018 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:10,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-28 22:04:10,023 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:10,024 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:10,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:10,029 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:63, output treesize:7 [2018-01-28 22:04:10,077 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:10,099 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:04:10,099 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 21] total 36 [2018-01-28 22:04:10,099 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-28 22:04:10,099 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-28 22:04:10,100 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=1088, Unknown=29, NotChecked=0, Total=1260 [2018-01-28 22:04:10,100 INFO L87 Difference]: Start difference. First operand 291 states and 326 transitions. Second operand 36 states. [2018-01-28 22:04:11,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:11,710 INFO L93 Difference]: Finished difference Result 376 states and 418 transitions. [2018-01-28 22:04:11,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-28 22:04:11,710 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 60 [2018-01-28 22:04:11,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:11,711 INFO L225 Difference]: With dead ends: 376 [2018-01-28 22:04:11,711 INFO L226 Difference]: Without dead ends: 319 [2018-01-28 22:04:11,712 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 45 SyntacticMatches, 5 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 681 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=329, Invalid=2501, Unknown=32, NotChecked=0, Total=2862 [2018-01-28 22:04:11,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2018-01-28 22:04:11,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 300. [2018-01-28 22:04:11,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2018-01-28 22:04:11,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 335 transitions. [2018-01-28 22:04:11,729 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 335 transitions. Word has length 60 [2018-01-28 22:04:11,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:11,730 INFO L432 AbstractCegarLoop]: Abstraction has 300 states and 335 transitions. [2018-01-28 22:04:11,730 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-28 22:04:11,730 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 335 transitions. [2018-01-28 22:04:11,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:04:11,731 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:11,731 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:11,731 INFO L371 AbstractCegarLoop]: === Iteration 41 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:11,732 INFO L82 PathProgramCache]: Analyzing trace with hash 884587101, now seen corresponding path program 1 times [2018-01-28 22:04:11,732 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:11,732 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:11,733 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:11,733 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:11,733 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:11,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:11,751 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:12,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:12,262 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:12,262 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-01-28 22:04:12,262 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-28 22:04:12,262 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-28 22:04:12,262 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-01-28 22:04:12,262 INFO L87 Difference]: Start difference. First operand 300 states and 335 transitions. Second operand 23 states. [2018-01-28 22:04:13,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:13,510 INFO L93 Difference]: Finished difference Result 374 states and 417 transitions. [2018-01-28 22:04:13,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-28 22:04:13,510 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 60 [2018-01-28 22:04:13,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:13,512 INFO L225 Difference]: With dead ends: 374 [2018-01-28 22:04:13,512 INFO L226 Difference]: Without dead ends: 372 [2018-01-28 22:04:13,513 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 541 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=227, Invalid=2223, Unknown=0, NotChecked=0, Total=2450 [2018-01-28 22:04:13,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 372 states. [2018-01-28 22:04:13,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 372 to 335. [2018-01-28 22:04:13,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335 states. [2018-01-28 22:04:13,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335 states to 335 states and 377 transitions. [2018-01-28 22:04:13,534 INFO L78 Accepts]: Start accepts. Automaton has 335 states and 377 transitions. Word has length 60 [2018-01-28 22:04:13,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:13,535 INFO L432 AbstractCegarLoop]: Abstraction has 335 states and 377 transitions. [2018-01-28 22:04:13,535 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-28 22:04:13,535 INFO L276 IsEmpty]: Start isEmpty. Operand 335 states and 377 transitions. [2018-01-28 22:04:13,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-28 22:04:13,536 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:13,536 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:13,536 INFO L371 AbstractCegarLoop]: === Iteration 42 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:13,537 INFO L82 PathProgramCache]: Analyzing trace with hash 884587102, now seen corresponding path program 1 times [2018-01-28 22:04:13,537 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:13,537 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:13,538 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:13,538 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:13,538 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:13,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:13,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:14,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:14,141 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:14,141 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-01-28 22:04:14,142 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-28 22:04:14,142 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-28 22:04:14,142 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-01-28 22:04:14,142 INFO L87 Difference]: Start difference. First operand 335 states and 377 transitions. Second operand 23 states. [2018-01-28 22:04:15,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:15,350 INFO L93 Difference]: Finished difference Result 372 states and 413 transitions. [2018-01-28 22:04:15,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-28 22:04:15,350 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 60 [2018-01-28 22:04:15,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:15,351 INFO L225 Difference]: With dead ends: 372 [2018-01-28 22:04:15,352 INFO L226 Difference]: Without dead ends: 371 [2018-01-28 22:04:15,352 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 523 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=220, Invalid=2132, Unknown=0, NotChecked=0, Total=2352 [2018-01-28 22:04:15,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2018-01-28 22:04:15,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 335. [2018-01-28 22:04:15,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335 states. [2018-01-28 22:04:15,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335 states to 335 states and 375 transitions. [2018-01-28 22:04:15,373 INFO L78 Accepts]: Start accepts. Automaton has 335 states and 375 transitions. Word has length 60 [2018-01-28 22:04:15,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:15,373 INFO L432 AbstractCegarLoop]: Abstraction has 335 states and 375 transitions. [2018-01-28 22:04:15,373 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-28 22:04:15,374 INFO L276 IsEmpty]: Start isEmpty. Operand 335 states and 375 transitions. [2018-01-28 22:04:15,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-28 22:04:15,375 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:15,375 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:15,375 INFO L371 AbstractCegarLoop]: === Iteration 43 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:15,375 INFO L82 PathProgramCache]: Analyzing trace with hash 786309134, now seen corresponding path program 1 times [2018-01-28 22:04:15,375 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:15,375 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:15,376 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:15,376 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:15,376 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:15,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:15,389 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:15,717 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:15,717 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:04:15,717 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:04:15,722 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:15,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:15,748 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:04:15,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:04:15,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:04:15,814 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:15,815 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:15,820 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:15,820 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:28 [2018-01-28 22:04:15,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-01-28 22:04:15,867 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:15,870 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:15,870 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:29, output treesize:20 [2018-01-28 22:04:15,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-01-28 22:04:15,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 22 [2018-01-28 22:04:15,914 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:15,918 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:15,922 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:15,922 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:27 [2018-01-28 22:04:15,967 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~mem25.base| Int) (|main_~#list~13.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~13.base| 1))) (and (= (select .cse0 |main_#t~mem25.base|) 0) (not (= 0 |main_#t~mem25.base|)) (= |c_#valid| (store (store .cse0 |main_#t~mem25.base| 0) |main_~#list~13.base| 0)) (= (select |c_old(#valid)| |main_~#list~13.base|) 0)))) is different from true [2018-01-28 22:04:15,978 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:15,998 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:04:15,998 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 21 [2018-01-28 22:04:15,998 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 22:04:15,998 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 22:04:15,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=365, Unknown=3, NotChecked=38, Total=462 [2018-01-28 22:04:15,999 INFO L87 Difference]: Start difference. First operand 335 states and 375 transitions. Second operand 22 states. [2018-01-28 22:04:28,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:28,635 INFO L93 Difference]: Finished difference Result 347 states and 388 transitions. [2018-01-28 22:04:28,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 22:04:28,635 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 62 [2018-01-28 22:04:28,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:28,636 INFO L225 Difference]: With dead ends: 347 [2018-01-28 22:04:28,636 INFO L226 Difference]: Without dead ends: 315 [2018-01-28 22:04:28,637 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 58 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=124, Invalid=804, Unknown=6, NotChecked=58, Total=992 [2018-01-28 22:04:28,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2018-01-28 22:04:28,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 309. [2018-01-28 22:04:28,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 309 states. [2018-01-28 22:04:28,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 309 states to 309 states and 348 transitions. [2018-01-28 22:04:28,649 INFO L78 Accepts]: Start accepts. Automaton has 309 states and 348 transitions. Word has length 62 [2018-01-28 22:04:28,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:28,650 INFO L432 AbstractCegarLoop]: Abstraction has 309 states and 348 transitions. [2018-01-28 22:04:28,650 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 22:04:28,650 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 348 transitions. [2018-01-28 22:04:28,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-28 22:04:28,650 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:28,650 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:28,650 INFO L371 AbstractCegarLoop]: === Iteration 44 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:28,651 INFO L82 PathProgramCache]: Analyzing trace with hash -315316701, now seen corresponding path program 1 times [2018-01-28 22:04:28,651 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:28,651 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:28,651 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:28,652 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:28,652 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:28,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:28,665 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:29,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:29,258 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:29,258 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-01-28 22:04:29,258 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-28 22:04:29,258 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-28 22:04:29,258 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=637, Unknown=0, NotChecked=0, Total=702 [2018-01-28 22:04:29,259 INFO L87 Difference]: Start difference. First operand 309 states and 348 transitions. Second operand 27 states. [2018-01-28 22:04:30,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:30,829 INFO L93 Difference]: Finished difference Result 345 states and 384 transitions. [2018-01-28 22:04:30,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-28 22:04:30,830 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 62 [2018-01-28 22:04:30,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:30,832 INFO L225 Difference]: With dead ends: 345 [2018-01-28 22:04:30,832 INFO L226 Difference]: Without dead ends: 344 [2018-01-28 22:04:30,833 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 876 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=332, Invalid=3328, Unknown=0, NotChecked=0, Total=3660 [2018-01-28 22:04:30,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-01-28 22:04:30,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 307. [2018-01-28 22:04:30,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2018-01-28 22:04:30,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 344 transitions. [2018-01-28 22:04:30,846 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 344 transitions. Word has length 62 [2018-01-28 22:04:30,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:30,847 INFO L432 AbstractCegarLoop]: Abstraction has 307 states and 344 transitions. [2018-01-28 22:04:30,847 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-28 22:04:30,847 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 344 transitions. [2018-01-28 22:04:30,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-28 22:04:30,848 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:30,848 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:30,848 INFO L371 AbstractCegarLoop]: === Iteration 45 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:30,848 INFO L82 PathProgramCache]: Analyzing trace with hash -1512160525, now seen corresponding path program 1 times [2018-01-28 22:04:30,848 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:30,848 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:30,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:30,849 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:30,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:30,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:30,860 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:31,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:31,255 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:31,256 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-01-28 22:04:31,256 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 22:04:31,256 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 22:04:31,256 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2018-01-28 22:04:31,256 INFO L87 Difference]: Start difference. First operand 307 states and 344 transitions. Second operand 20 states. [2018-01-28 22:04:31,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:31,982 INFO L93 Difference]: Finished difference Result 345 states and 390 transitions. [2018-01-28 22:04:31,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-28 22:04:31,982 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 64 [2018-01-28 22:04:31,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:31,983 INFO L225 Difference]: With dead ends: 345 [2018-01-28 22:04:31,984 INFO L226 Difference]: Without dead ends: 344 [2018-01-28 22:04:31,984 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=146, Invalid=1044, Unknown=0, NotChecked=0, Total=1190 [2018-01-28 22:04:31,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-01-28 22:04:31,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 327. [2018-01-28 22:04:31,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2018-01-28 22:04:31,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 369 transitions. [2018-01-28 22:04:31,996 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 369 transitions. Word has length 64 [2018-01-28 22:04:31,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:31,997 INFO L432 AbstractCegarLoop]: Abstraction has 327 states and 369 transitions. [2018-01-28 22:04:31,997 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 22:04:31,997 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 369 transitions. [2018-01-28 22:04:31,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-28 22:04:31,997 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:31,997 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:31,997 INFO L371 AbstractCegarLoop]: === Iteration 46 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:31,998 INFO L82 PathProgramCache]: Analyzing trace with hash 367664069, now seen corresponding path program 1 times [2018-01-28 22:04:31,998 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:31,998 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:31,998 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:31,998 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:31,998 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:32,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:32,008 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:32,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:32,429 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:32,429 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-01-28 22:04:32,430 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:04:32,430 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:04:32,430 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:04:32,430 INFO L87 Difference]: Start difference. First operand 327 states and 369 transitions. Second operand 19 states. [2018-01-28 22:04:33,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:33,031 INFO L93 Difference]: Finished difference Result 344 states and 388 transitions. [2018-01-28 22:04:33,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-28 22:04:33,031 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 65 [2018-01-28 22:04:33,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:33,033 INFO L225 Difference]: With dead ends: 344 [2018-01-28 22:04:33,033 INFO L226 Difference]: Without dead ends: 343 [2018-01-28 22:04:33,034 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=122, Invalid=870, Unknown=0, NotChecked=0, Total=992 [2018-01-28 22:04:33,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2018-01-28 22:04:33,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 317. [2018-01-28 22:04:33,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2018-01-28 22:04:33,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 359 transitions. [2018-01-28 22:04:33,054 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 359 transitions. Word has length 65 [2018-01-28 22:04:33,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:33,054 INFO L432 AbstractCegarLoop]: Abstraction has 317 states and 359 transitions. [2018-01-28 22:04:33,054 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:04:33,055 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 359 transitions. [2018-01-28 22:04:33,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-28 22:04:33,056 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:33,056 INFO L330 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:33,056 INFO L371 AbstractCegarLoop]: === Iteration 47 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:33,056 INFO L82 PathProgramCache]: Analyzing trace with hash 982804089, now seen corresponding path program 3 times [2018-01-28 22:04:33,056 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:33,056 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:33,057 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:33,057 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:33,057 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:33,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:33,074 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:33,442 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:33,442 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:04:33,469 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:04:33,475 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 22:04:33,496 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:04:33,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:04:33,515 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:04:33,527 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 22:04:33,529 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 22:04:33,533 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:04:33,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:04:33,544 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,551 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,551 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-28 22:04:33,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-28 22:04:33,560 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,579 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:33,579 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:33,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 22:04:33,580 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,583 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,583 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-28 22:04:33,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:04:33,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:04:33,603 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,604 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-28 22:04:33,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-28 22:04:33,614 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,616 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,622 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,623 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:31 [2018-01-28 22:04:33,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 98 [2018-01-28 22:04:33,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:33,664 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,670 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-28 22:04:33,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:33,683 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,686 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,690 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:113, output treesize:31 [2018-01-28 22:04:33,698 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-28 22:04:33,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:33,700 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,702 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-28 22:04:33,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:33,714 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,718 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,721 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,722 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:113, output treesize:31 [2018-01-28 22:04:33,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 61 [2018-01-28 22:04:33,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:33,750 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,754 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-28 22:04:33,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-28 22:04:33,769 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,772 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,779 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:129, output treesize:44 [2018-01-28 22:04:33,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-28 22:04:33,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-28 22:04:33,888 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,891 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-01-28 22:04:33,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-01-28 22:04:33,903 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,906 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:33,912 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:33,912 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:70, output treesize:24 [2018-01-28 22:04:33,947 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-01-28 22:04:33,967 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:04:33,967 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 26 [2018-01-28 22:04:33,968 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-28 22:04:33,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-28 22:04:33,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=608, Unknown=0, NotChecked=0, Total=702 [2018-01-28 22:04:33,968 INFO L87 Difference]: Start difference. First operand 317 states and 359 transitions. Second operand 27 states. [2018-01-28 22:04:35,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:35,685 INFO L93 Difference]: Finished difference Result 587 states and 671 transitions. [2018-01-28 22:04:35,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-28 22:04:35,685 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 65 [2018-01-28 22:04:35,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:35,687 INFO L225 Difference]: With dead ends: 587 [2018-01-28 22:04:35,687 INFO L226 Difference]: Without dead ends: 330 [2018-01-28 22:04:35,689 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 496 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=562, Invalid=1888, Unknown=0, NotChecked=0, Total=2450 [2018-01-28 22:04:35,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-01-28 22:04:35,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 323. [2018-01-28 22:04:35,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 323 states. [2018-01-28 22:04:35,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 365 transitions. [2018-01-28 22:04:35,702 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 365 transitions. Word has length 65 [2018-01-28 22:04:35,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:35,703 INFO L432 AbstractCegarLoop]: Abstraction has 323 states and 365 transitions. [2018-01-28 22:04:35,703 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-28 22:04:35,703 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 365 transitions. [2018-01-28 22:04:35,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-28 22:04:35,704 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:35,704 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:35,704 INFO L371 AbstractCegarLoop]: === Iteration 48 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:35,705 INFO L82 PathProgramCache]: Analyzing trace with hash -1189331948, now seen corresponding path program 1 times [2018-01-28 22:04:35,705 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:35,705 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:35,706 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:35,706 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 22:04:35,706 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:35,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:35,724 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:37,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:37,088 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:37,088 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [28] imperfect sequences [] total 28 [2018-01-28 22:04:37,088 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-28 22:04:37,088 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-28 22:04:37,088 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=736, Unknown=0, NotChecked=0, Total=812 [2018-01-28 22:04:37,088 INFO L87 Difference]: Start difference. First operand 323 states and 365 transitions. Second operand 29 states. [2018-01-28 22:04:38,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:38,430 INFO L93 Difference]: Finished difference Result 355 states and 401 transitions. [2018-01-28 22:04:38,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-28 22:04:38,430 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 67 [2018-01-28 22:04:38,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:38,432 INFO L225 Difference]: With dead ends: 355 [2018-01-28 22:04:38,432 INFO L226 Difference]: Without dead ends: 354 [2018-01-28 22:04:38,433 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 528 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=249, Invalid=2301, Unknown=0, NotChecked=0, Total=2550 [2018-01-28 22:04:38,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 354 states. [2018-01-28 22:04:38,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 354 to 329. [2018-01-28 22:04:38,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-01-28 22:04:38,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 371 transitions. [2018-01-28 22:04:38,471 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 371 transitions. Word has length 67 [2018-01-28 22:04:38,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:38,471 INFO L432 AbstractCegarLoop]: Abstraction has 329 states and 371 transitions. [2018-01-28 22:04:38,471 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-28 22:04:38,471 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 371 transitions. [2018-01-28 22:04:38,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-28 22:04:38,472 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:38,472 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:38,473 INFO L371 AbstractCegarLoop]: === Iteration 49 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:38,473 INFO L82 PathProgramCache]: Analyzing trace with hash -430584681, now seen corresponding path program 1 times [2018-01-28 22:04:38,473 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:38,473 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:38,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:38,474 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:38,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:38,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:38,488 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:38,921 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-28 22:04:38,922 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:04:38,922 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:04:38,927 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:38,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:38,962 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:04:39,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:04:39,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:04:39,068 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,071 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:04:39,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:04:39,082 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,084 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,090 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,090 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-01-28 22:04:39,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-01-28 22:04:39,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-01-28 22:04:39,142 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-01-28 22:04:39,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-01-28 22:04:39,162 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,174 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-28 22:04:39,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-01-28 22:04:39,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-28 22:04:39,206 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-01-28 22:04:39,242 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-01-28 22:04:39,259 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-28 22:04:39,288 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-28 22:04:39,288 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:115 [2018-01-28 22:04:39,369 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:39,370 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:39,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 42 [2018-01-28 22:04:39,371 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,403 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,403 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:77, output treesize:42 [2018-01-28 22:04:39,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-01-28 22:04:39,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-01-28 22:04:39,495 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-01-28 22:04:39,502 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:39,508 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:39,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-28 22:04:39,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-01-28 22:04:39,517 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:39,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-28 22:04:39,522 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,523 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,527 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:39,527 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-01-28 22:04:39,559 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:39,580 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 22:04:39,580 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-01-28 22:04:39,580 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-28 22:04:39,581 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-28 22:04:39,581 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=627, Unknown=2, NotChecked=0, Total=702 [2018-01-28 22:04:39,581 INFO L87 Difference]: Start difference. First operand 329 states and 371 transitions. Second operand 27 states. [2018-01-28 22:04:40,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:40,433 INFO L93 Difference]: Finished difference Result 422 states and 472 transitions. [2018-01-28 22:04:40,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-28 22:04:40,434 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 70 [2018-01-28 22:04:40,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:40,435 INFO L225 Difference]: With dead ends: 422 [2018-01-28 22:04:40,435 INFO L226 Difference]: Without dead ends: 359 [2018-01-28 22:04:40,436 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 57 SyntacticMatches, 7 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 539 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=261, Invalid=2089, Unknown=2, NotChecked=0, Total=2352 [2018-01-28 22:04:40,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2018-01-28 22:04:40,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 333. [2018-01-28 22:04:40,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2018-01-28 22:04:40,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 372 transitions. [2018-01-28 22:04:40,449 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 372 transitions. Word has length 70 [2018-01-28 22:04:40,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:40,449 INFO L432 AbstractCegarLoop]: Abstraction has 333 states and 372 transitions. [2018-01-28 22:04:40,449 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-28 22:04:40,449 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 372 transitions. [2018-01-28 22:04:40,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-01-28 22:04:40,450 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:40,450 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:40,450 INFO L371 AbstractCegarLoop]: === Iteration 50 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:40,450 INFO L82 PathProgramCache]: Analyzing trace with hash 1785415364, now seen corresponding path program 1 times [2018-01-28 22:04:40,450 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:40,450 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:40,451 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:40,451 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:40,451 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:40,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:40,466 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:41,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:41,477 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:41,477 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2018-01-28 22:04:41,477 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-28 22:04:41,477 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-28 22:04:41,478 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=678, Unknown=0, NotChecked=0, Total=756 [2018-01-28 22:04:41,478 INFO L87 Difference]: Start difference. First operand 333 states and 372 transitions. Second operand 28 states. [2018-01-28 22:04:43,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:43,037 INFO L93 Difference]: Finished difference Result 357 states and 399 transitions. [2018-01-28 22:04:43,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-28 22:04:43,038 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 68 [2018-01-28 22:04:43,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:43,039 INFO L225 Difference]: With dead ends: 357 [2018-01-28 22:04:43,039 INFO L226 Difference]: Without dead ends: 356 [2018-01-28 22:04:43,040 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 753 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=303, Invalid=2777, Unknown=0, NotChecked=0, Total=3080 [2018-01-28 22:04:43,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 356 states. [2018-01-28 22:04:43,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 356 to 321. [2018-01-28 22:04:43,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-01-28 22:04:43,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 360 transitions. [2018-01-28 22:04:43,053 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 360 transitions. Word has length 68 [2018-01-28 22:04:43,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:43,054 INFO L432 AbstractCegarLoop]: Abstraction has 321 states and 360 transitions. [2018-01-28 22:04:43,054 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-28 22:04:43,054 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 360 transitions. [2018-01-28 22:04:43,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-01-28 22:04:43,055 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:43,055 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:43,055 INFO L371 AbstractCegarLoop]: === Iteration 51 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:43,055 INFO L82 PathProgramCache]: Analyzing trace with hash -493675655, now seen corresponding path program 1 times [2018-01-28 22:04:43,055 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:43,055 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:43,056 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:43,056 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:43,056 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:43,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:43,069 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:43,406 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:43,406 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 22:04:43,406 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-01-28 22:04:43,407 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 22:04:43,407 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 22:04:43,407 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2018-01-28 22:04:43,407 INFO L87 Difference]: Start difference. First operand 321 states and 360 transitions. Second operand 19 states. [2018-01-28 22:04:44,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 22:04:44,059 INFO L93 Difference]: Finished difference Result 415 states and 458 transitions. [2018-01-28 22:04:44,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-28 22:04:44,059 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 69 [2018-01-28 22:04:44,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 22:04:44,060 INFO L225 Difference]: With dead ends: 415 [2018-01-28 22:04:44,060 INFO L226 Difference]: Without dead ends: 346 [2018-01-28 22:04:44,061 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=165, Invalid=1025, Unknown=0, NotChecked=0, Total=1190 [2018-01-28 22:04:44,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-01-28 22:04:44,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 327. [2018-01-28 22:04:44,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2018-01-28 22:04:44,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 364 transitions. [2018-01-28 22:04:44,075 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 364 transitions. Word has length 69 [2018-01-28 22:04:44,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 22:04:44,075 INFO L432 AbstractCegarLoop]: Abstraction has 327 states and 364 transitions. [2018-01-28 22:04:44,075 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 22:04:44,075 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 364 transitions. [2018-01-28 22:04:44,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-28 22:04:44,076 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 22:04:44,076 INFO L330 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 22:04:44,076 INFO L371 AbstractCegarLoop]: === Iteration 52 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-28 22:04:44,076 INFO L82 PathProgramCache]: Analyzing trace with hash -94513141, now seen corresponding path program 1 times [2018-01-28 22:04:44,076 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 22:04:44,076 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 22:04:44,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:44,077 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:44,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 22:04:44,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:44,092 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 22:04:45,015 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 22:04:45,016 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 22:04:45,016 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 22:04:45,025 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 22:04:45,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 22:04:45,064 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 22:04:45,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:04:45,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:04:45,105 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:45,106 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:45,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-28 22:04:45,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-28 22:04:45,114 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:45,115 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:45,119 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:45,119 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-01-28 22:04:45,299 WARN L1033 $PredicateComparison]: unable to prove that (exists ((create_data_~data~4.base Int) (create_data_~data~4.offset Int)) (let ((.cse0 (+ create_data_~data~4.offset 4))) (and (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| create_data_~data~4.base (store (store (select |c_old(#memory_$Pointer$.base)| create_data_~data~4.base) .cse0 0) create_data_~data~4.offset (select (select |c_#memory_$Pointer$.base| create_data_~data~4.base) create_data_~data~4.offset)))) (= 0 (select |c_old(#valid)| create_data_~data~4.base)) (= (store |c_old(#memory_$Pointer$.offset)| create_data_~data~4.base (store (store (select |c_old(#memory_$Pointer$.offset)| create_data_~data~4.base) .cse0 0) create_data_~data~4.offset (select (select |c_#memory_$Pointer$.offset| create_data_~data~4.base) create_data_~data~4.offset))) |c_#memory_$Pointer$.offset|)))) is different from true [2018-01-28 22:04:45,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:45,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:45,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-28 22:04:45,309 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:45,332 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:45,333 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:120, output treesize:114 [2018-01-28 22:04:51,457 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:51,463 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:51,507 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:51,514 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:51,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-01-28 22:04:51,553 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:136, output treesize:204 [2018-01-28 22:04:53,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 183 treesize of output 112 [2018-01-28 22:04:55,050 WARN L143 SmtUtils]: Spent 1149ms on a formula simplification that was a NOOP. DAG size: 98 [2018-01-28 22:04:55,057 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:55,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 83 [2018-01-28 22:04:55,058 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:55,058 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-01-28 22:04:55,059 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:55,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 76 [2018-01-28 22:04:55,576 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:55,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 66 [2018-01-28 22:04:55,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 16 [2018-01-28 22:04:55,956 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:55,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-28 22:04:55,959 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:55,973 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:56,016 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 56 [2018-01-28 22:04:56,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-01-28 22:04:56,024 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:56,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 42 [2018-01-28 22:04:56,053 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:56,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-01-28 22:04:56,057 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:56,068 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:56,077 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:56,090 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:56,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 75 treesize of output 77 [2018-01-28 22:04:56,335 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:56,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 77 [2018-01-28 22:04:56,357 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:56,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 37 [2018-01-28 22:04:56,370 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 2 xjuncts. [2018-01-28 22:04:56,434 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-28 22:04:56,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 68 [2018-01-28 22:04:56,838 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:56,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-28 22:04:56,844 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:56,884 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 62 [2018-01-28 22:04:57,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-01-28 22:04:57,370 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,403 INFO L682 Elim1Store]: detected equality via solver [2018-01-28 22:04:57,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 52 [2018-01-28 22:04:57,420 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:57,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 31 treesize of output 64 [2018-01-28 22:04:57,437 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 2 xjuncts. [2018-01-28 22:04:57,494 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,528 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 58 [2018-01-28 22:04:57,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-01-28 22:04:57,560 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 42 [2018-01-28 22:04:57,605 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:57,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 36 [2018-01-28 22:04:57,609 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,636 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,650 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 65 treesize of output 70 [2018-01-28 22:04:57,911 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:57,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 64 [2018-01-28 22:04:57,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 22 [2018-01-28 22:04:57,918 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-01-28 22:04:57,940 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-28 22:04:58,112 INFO L682 Elim1Store]: detected equality via solver [2018-01-28 22:04:58,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 63 treesize of output 66 [2018-01-28 22:04:58,132 INFO L700 Elim1Store]: detected not equals via solver [2018-01-28 22:04:58,133 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_prenex_13 term size 36 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:198) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackTraceAbstractionRefinementStrategy.getTraceCheck(MultiTrackTraceAbstractionRefinementStrategy.java:218) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:68) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:376) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:292) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:147) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:115) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-01-28 22:04:58,136 INFO L168 Benchmark]: Toolchain (without parser) took 73051.88 ms. Allocated memory was 304.6 MB in the beginning and 880.8 MB in the end (delta: 576.2 MB). Free memory was 263.5 MB in the beginning and 795.3 MB in the end (delta: -531.8 MB). Peak memory consumption was 532.3 MB. Max. memory is 5.3 GB. [2018-01-28 22:04:58,137 INFO L168 Benchmark]: CDTParser took 0.26 ms. Allocated memory is still 304.6 MB. Free memory is still 269.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 22:04:58,137 INFO L168 Benchmark]: CACSL2BoogieTranslator took 213.70 ms. Allocated memory is still 304.6 MB. Free memory was 263.5 MB in the beginning and 251.5 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:04:58,137 INFO L168 Benchmark]: Boogie Preprocessor took 47.60 ms. Allocated memory is still 304.6 MB. Free memory was 251.5 MB in the beginning and 249.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 22:04:58,138 INFO L168 Benchmark]: RCFGBuilder took 590.04 ms. Allocated memory is still 304.6 MB. Free memory was 249.5 MB in the beginning and 216.6 MB in the end (delta: 32.9 MB). Peak memory consumption was 32.9 MB. Max. memory is 5.3 GB. [2018-01-28 22:04:58,138 INFO L168 Benchmark]: TraceAbstraction took 72192.10 ms. Allocated memory was 304.6 MB in the beginning and 880.8 MB in the end (delta: 576.2 MB). Free memory was 216.6 MB in the beginning and 795.3 MB in the end (delta: -578.7 MB). Peak memory consumption was 485.4 MB. Max. memory is 5.3 GB. [2018-01-28 22:04:58,139 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26 ms. Allocated memory is still 304.6 MB. Free memory is still 269.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 213.70 ms. Allocated memory is still 304.6 MB. Free memory was 263.5 MB in the beginning and 251.5 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 47.60 ms. Allocated memory is still 304.6 MB. Free memory was 251.5 MB in the beginning and 249.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 590.04 ms. Allocated memory is still 304.6 MB. Free memory was 249.5 MB in the beginning and 216.6 MB in the end (delta: 32.9 MB). Peak memory consumption was 32.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 72192.10 ms. Allocated memory was 304.6 MB in the beginning and 880.8 MB in the end (delta: 576.2 MB). Free memory was 216.6 MB in the beginning and 795.3 MB in the end (delta: -578.7 MB). Peak memory consumption was 485.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_13 term size 36 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_prenex_13 term size 36: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-28_22-04-58-145.csv Received shutdown request...