java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-20 23:49:15,786 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-20 23:49:15,788 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-20 23:49:15,801 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-20 23:49:15,802 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-20 23:49:15,803 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-20 23:49:15,803 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-20 23:49:15,805 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-20 23:49:15,806 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-20 23:49:15,807 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-20 23:49:15,808 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-20 23:49:15,808 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-20 23:49:15,809 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-20 23:49:15,809 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-20 23:49:15,810 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-20 23:49:15,812 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-20 23:49:15,815 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-20 23:49:15,817 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-20 23:49:15,818 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-20 23:49:15,819 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-20 23:49:15,821 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-20 23:49:15,827 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-20 23:49:15,827 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-20 23:49:15,827 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ.epf [2018-01-20 23:49:15,837 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-20 23:49:15,838 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-20 23:49:15,838 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-20 23:49:15,839 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-20 23:49:15,839 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-20 23:49:15,839 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-20 23:49:15,839 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-20 23:49:15,840 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-20 23:49:15,840 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-20 23:49:15,840 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-20 23:49:15,840 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-20 23:49:15,840 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-20 23:49:15,841 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-20 23:49:15,841 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-20 23:49:15,841 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-20 23:49:15,841 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-20 23:49:15,841 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-20 23:49:15,842 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-20 23:49:15,842 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-20 23:49:15,842 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-20 23:49:15,842 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-20 23:49:15,842 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-20 23:49:15,843 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-20 23:49:15,843 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-20 23:49:15,843 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-20 23:49:15,843 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-20 23:49:15,843 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-20 23:49:15,844 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-20 23:49:15,844 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-20 23:49:15,844 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-20 23:49:15,844 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-20 23:49:15,844 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-20 23:49:15,844 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-20 23:49:15,845 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-20 23:49:15,845 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-20 23:49:15,845 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-20 23:49:15,846 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-20 23:49:15,846 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-20 23:49:15,880 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-20 23:49:15,889 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-20 23:49:15,892 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-20 23:49:15,893 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-20 23:49:15,893 INFO L276 PluginConnector]: CDTParser initialized [2018-01-20 23:49:15,894 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_false-valid-deref-write.c [2018-01-20 23:49:16,016 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-20 23:49:16,022 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-20 23:49:16,023 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-20 23:49:16,023 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-20 23:49:16,030 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-20 23:49:16,031 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,033 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8d55d51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16, skipping insertion in model container [2018-01-20 23:49:16,034 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,051 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-20 23:49:16,071 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-20 23:49:16,180 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-20 23:49:16,194 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-20 23:49:16,199 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16 WrapperNode [2018-01-20 23:49:16,200 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-20 23:49:16,201 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-20 23:49:16,201 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-20 23:49:16,201 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-20 23:49:16,217 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,217 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,228 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,228 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,230 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,232 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,233 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (1/1) ... [2018-01-20 23:49:16,234 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-20 23:49:16,235 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-20 23:49:16,235 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-20 23:49:16,235 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-20 23:49:16,236 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-20 23:49:16,279 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-20 23:49:16,279 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-20 23:49:16,279 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-20 23:49:16,279 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-20 23:49:16,280 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-20 23:49:16,280 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-20 23:49:16,280 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-20 23:49:16,280 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-20 23:49:16,280 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-20 23:49:16,281 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-20 23:49:16,281 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-20 23:49:16,281 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-20 23:49:16,407 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-20 23:49:16,408 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.01 11:49:16 BoogieIcfgContainer [2018-01-20 23:49:16,408 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-20 23:49:16,408 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-20 23:49:16,409 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-20 23:49:16,410 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-20 23:49:16,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.01 11:49:16" (1/3) ... [2018-01-20 23:49:16,411 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.01 11:49:16, skipping insertion in model container [2018-01-20 23:49:16,412 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:16" (2/3) ... [2018-01-20 23:49:16,412 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.01 11:49:16, skipping insertion in model container [2018-01-20 23:49:16,412 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.01 11:49:16" (3/3) ... [2018-01-20 23:49:16,413 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero2_false-valid-deref-write.c [2018-01-20 23:49:16,422 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-20 23:49:16,427 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-20 23:49:16,463 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:49:16,464 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:49:16,464 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:49:16,464 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:49:16,464 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:49:16,464 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:49:16,465 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:49:16,465 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-20 23:49:16,466 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:49:16,487 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-20 23:49:16,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-20 23:49:16,494 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:16,495 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-20 23:49:16,495 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-20 23:49:16,500 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-20 23:49:16,503 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:16,558 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:16,558 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:16,559 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:16,559 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:16,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-20 23:49:16,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-20 23:49:16,624 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-20 23:49:16,630 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-20 23:49:16,637 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:49:16,637 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:49:16,637 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:49:16,637 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:49:16,637 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:49:16,637 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:49:16,637 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:49:16,637 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-20 23:49:16,637 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:49:16,638 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-20 23:49:16,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-20 23:49:16,639 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:16,639 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:16,639 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:16,640 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-20 23:49:16,640 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:16,641 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:16,641 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:16,641 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:16,641 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:16,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:16,667 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:16,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:16,755 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-20 23:49:16,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-20 23:49:16,755 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-20 23:49:16,757 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-20 23:49:16,767 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-20 23:49:16,768 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-20 23:49:16,770 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-20 23:49:16,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:16,807 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-20 23:49:16,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-20 23:49:16,809 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-20 23:49:16,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:16,820 INFO L225 Difference]: With dead ends: 33 [2018-01-20 23:49:16,820 INFO L226 Difference]: Without dead ends: 19 [2018-01-20 23:49:16,823 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-20 23:49:16,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-20 23:49:16,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-20 23:49:16,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-20 23:49:16,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-20 23:49:16,917 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-20 23:49:16,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:16,918 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-20 23:49:16,918 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-20 23:49:16,918 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-20 23:49:16,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-20 23:49:16,918 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:16,919 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:16,919 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:16,919 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-20 23:49:16,919 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:16,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:16,920 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:16,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:16,920 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:16,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:16,931 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:16,994 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:16,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:16,994 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:16,995 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-20 23:49:16,998 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-20 23:49:17,045 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-20 23:49:17,045 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-20 23:49:17,307 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-20 23:49:17,308 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-20 23:49:17,321 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-20 23:49:17,321 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:17,321 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:17,327 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:17,327 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:17,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:17,358 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:17,405 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:17,405 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:17,535 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:17,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:17,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:17,578 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:17,578 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:17,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:17,607 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:17,611 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:17,611 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:17,657 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:17,658 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:17,659 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-20 23:49:17,659 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:17,659 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-20 23:49:17,660 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-20 23:49:17,660 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-20 23:49:17,660 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-20 23:49:17,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:17,684 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-20 23:49:17,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-20 23:49:17,684 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-20 23:49:17,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:17,685 INFO L225 Difference]: With dead ends: 29 [2018-01-20 23:49:17,685 INFO L226 Difference]: Without dead ends: 20 [2018-01-20 23:49:17,686 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-20 23:49:17,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-20 23:49:17,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-20 23:49:17,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-20 23:49:17,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-20 23:49:17,690 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-20 23:49:17,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:17,691 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-20 23:49:17,691 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-20 23:49:17,691 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-20 23:49:17,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-20 23:49:17,692 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:17,692 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:17,692 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:17,692 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-20 23:49:17,692 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:17,693 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:17,694 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:17,694 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:17,694 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:17,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:17,708 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:17,760 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:17,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:17,760 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:17,761 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:17,761 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:17,761 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:17,761 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:17,793 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:17,793 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:17,806 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:17,808 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:17,808 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:17,810 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:17,821 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:17,821 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:17,951 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:17,971 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:17,971 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:17,974 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:17,974 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:17,987 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:17,995 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:18,001 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:18,004 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:18,009 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,009 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:18,102 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,103 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:18,103 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-20 23:49:18,103 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:18,104 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-20 23:49:18,104 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-20 23:49:18,104 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-20 23:49:18,105 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-20 23:49:18,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:18,165 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-20 23:49:18,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-20 23:49:18,166 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-20 23:49:18,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:18,167 INFO L225 Difference]: With dead ends: 30 [2018-01-20 23:49:18,167 INFO L226 Difference]: Without dead ends: 21 [2018-01-20 23:49:18,167 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-20 23:49:18,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-20 23:49:18,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-20 23:49:18,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-20 23:49:18,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-20 23:49:18,172 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-20 23:49:18,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:18,172 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-20 23:49:18,172 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-20 23:49:18,172 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-20 23:49:18,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-20 23:49:18,173 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:18,173 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:18,173 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:18,174 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-20 23:49:18,174 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:18,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:18,175 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:18,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:18,175 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:18,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:18,189 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:18,237 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,237 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:18,237 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:18,237 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:18,237 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:18,237 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:18,237 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:18,243 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:18,243 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:18,250 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:18,252 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:18,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:18,253 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:18,255 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:18,271 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,271 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:18,370 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:18,389 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:18,392 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:18,393 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:18,406 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:18,412 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:18,419 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:18,424 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:18,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:18,431 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,431 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:18,501 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,503 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:18,503 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-20 23:49:18,503 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:18,503 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-20 23:49:18,504 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-20 23:49:18,504 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-20 23:49:18,504 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-20 23:49:18,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:18,521 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-20 23:49:18,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-20 23:49:18,522 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-20 23:49:18,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:18,523 INFO L225 Difference]: With dead ends: 31 [2018-01-20 23:49:18,523 INFO L226 Difference]: Without dead ends: 22 [2018-01-20 23:49:18,523 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-20 23:49:18,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-20 23:49:18,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-20 23:49:18,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-20 23:49:18,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-20 23:49:18,526 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-20 23:49:18,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:18,526 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-20 23:49:18,527 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-20 23:49:18,527 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-20 23:49:18,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-20 23:49:18,527 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:18,527 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:18,527 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:18,528 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-20 23:49:18,528 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:18,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:18,528 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:18,529 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:18,529 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:18,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:18,538 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:18,570 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,571 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:18,571 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:18,571 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:18,571 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:18,571 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:18,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:18,577 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:18,577 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:18,588 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:18,590 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:18,603 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,603 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:18,689 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,708 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:18,708 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:18,711 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:18,711 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:18,731 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:18,734 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:18,738 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,738 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:18,781 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,782 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:18,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-20 23:49:18,783 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:18,783 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-20 23:49:18,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-20 23:49:18,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-20 23:49:18,783 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-20 23:49:18,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:18,805 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-20 23:49:18,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-20 23:49:18,805 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-20 23:49:18,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:18,806 INFO L225 Difference]: With dead ends: 32 [2018-01-20 23:49:18,806 INFO L226 Difference]: Without dead ends: 23 [2018-01-20 23:49:18,807 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-20 23:49:18,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-20 23:49:18,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-20 23:49:18,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-20 23:49:18,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-20 23:49:18,810 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-20 23:49:18,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:18,810 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-20 23:49:18,811 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-20 23:49:18,811 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-20 23:49:18,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-20 23:49:18,811 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:18,812 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:18,812 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:18,812 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-20 23:49:18,812 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:18,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:18,813 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:18,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:18,813 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:18,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:18,824 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:18,882 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,882 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:18,882 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:18,882 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:18,883 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:18,883 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:18,883 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:18,891 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:18,891 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:18,896 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:18,899 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:18,900 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:18,905 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:18,907 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:18,908 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:18,917 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:18,917 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:19,040 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,059 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:19,060 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:19,062 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:19,063 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:19,067 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:19,069 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:19,072 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:19,081 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:19,087 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:19,089 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:19,093 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,093 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:19,146 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,148 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:19,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-20 23:49:19,148 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:19,148 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-20 23:49:19,148 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-20 23:49:19,148 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-20 23:49:19,148 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-20 23:49:19,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:19,164 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-20 23:49:19,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-20 23:49:19,164 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-20 23:49:19,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:19,165 INFO L225 Difference]: With dead ends: 33 [2018-01-20 23:49:19,165 INFO L226 Difference]: Without dead ends: 24 [2018-01-20 23:49:19,165 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-20 23:49:19,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-20 23:49:19,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-20 23:49:19,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-20 23:49:19,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-20 23:49:19,167 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-20 23:49:19,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:19,168 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-20 23:49:19,168 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-20 23:49:19,168 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-20 23:49:19,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-20 23:49:19,169 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:19,169 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:19,169 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:19,169 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-20 23:49:19,169 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:19,170 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:19,170 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:19,170 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:19,170 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:19,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:19,180 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:19,239 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,239 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:19,239 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:19,240 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:19,240 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:19,240 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:19,240 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:19,245 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:19,245 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:19,251 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:19,253 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:19,254 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:19,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:19,255 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:19,257 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:19,266 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,266 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:19,510 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,537 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:19,537 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:19,540 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:19,540 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:19,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:19,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:19,563 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:19,572 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:19,578 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:19,581 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:19,586 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,587 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:19,670 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,672 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:19,672 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-20 23:49:19,672 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:19,673 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-20 23:49:19,673 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-20 23:49:19,673 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-20 23:49:19,673 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-20 23:49:19,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:19,712 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-20 23:49:19,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-20 23:49:19,715 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-20 23:49:19,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:19,715 INFO L225 Difference]: With dead ends: 34 [2018-01-20 23:49:19,715 INFO L226 Difference]: Without dead ends: 25 [2018-01-20 23:49:19,716 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-20 23:49:19,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-20 23:49:19,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-20 23:49:19,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-20 23:49:19,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-20 23:49:19,719 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-20 23:49:19,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:19,719 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-20 23:49:19,719 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-20 23:49:19,719 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-20 23:49:19,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-20 23:49:19,720 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:19,720 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:19,720 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:19,720 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-20 23:49:19,720 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:19,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:19,721 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:19,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:19,721 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:19,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:19,731 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:19,874 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:19,875 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:19,875 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:19,875 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:19,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:19,875 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:19,880 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:19,880 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:19,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:19,891 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:19,902 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:19,902 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:20,099 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:20,133 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:20,136 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:20,136 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:20,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:20,156 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:20,162 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,162 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:20,223 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,224 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:20,225 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-20 23:49:20,225 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:20,225 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-20 23:49:20,225 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-20 23:49:20,225 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-20 23:49:20,226 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-20 23:49:20,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:20,244 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-20 23:49:20,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-20 23:49:20,244 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-20 23:49:20,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:20,245 INFO L225 Difference]: With dead ends: 35 [2018-01-20 23:49:20,245 INFO L226 Difference]: Without dead ends: 26 [2018-01-20 23:49:20,246 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-20 23:49:20,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-20 23:49:20,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-20 23:49:20,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-20 23:49:20,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-20 23:49:20,250 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-20 23:49:20,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:20,251 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-20 23:49:20,251 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-20 23:49:20,251 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-20 23:49:20,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-20 23:49:20,252 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:20,252 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:20,252 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:20,252 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-20 23:49:20,252 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:20,253 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:20,253 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:20,253 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:20,253 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:20,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:20,262 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:20,357 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,357 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:20,357 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:20,357 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:20,357 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:20,358 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:20,358 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:20,363 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:20,363 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:20,370 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:20,374 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:20,374 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:20,376 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:20,396 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,396 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:20,585 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,606 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:20,606 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:20,609 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:20,609 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:20,618 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:20,626 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:20,632 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:20,635 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:20,639 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,639 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:20,718 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,720 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:20,720 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-20 23:49:20,720 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:20,721 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-20 23:49:20,721 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-20 23:49:20,721 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-20 23:49:20,721 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-20 23:49:20,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:20,775 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-20 23:49:20,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-20 23:49:20,775 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-20 23:49:20,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:20,776 INFO L225 Difference]: With dead ends: 36 [2018-01-20 23:49:20,776 INFO L226 Difference]: Without dead ends: 27 [2018-01-20 23:49:20,777 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-20 23:49:20,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-20 23:49:20,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-20 23:49:20,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-20 23:49:20,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-20 23:49:20,781 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-20 23:49:20,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:20,781 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-20 23:49:20,781 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-20 23:49:20,781 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-20 23:49:20,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-20 23:49:20,782 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:20,782 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:20,782 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:20,782 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-20 23:49:20,783 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:20,783 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:20,784 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:20,784 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:20,784 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:20,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:20,793 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:20,895 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,896 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:20,896 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:20,896 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:20,896 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:20,896 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:20,896 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:20,909 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:20,909 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:20,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:20,929 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:20,942 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:20,954 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:20,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:20,967 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:20,967 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:20,969 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:20,999 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:20,999 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:21,273 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,302 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:21,302 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:21,305 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:21,306 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:21,315 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:21,321 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:21,329 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:21,338 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:21,347 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:21,356 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:21,363 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:21,366 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:21,370 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,370 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:21,436 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,437 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:21,437 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-20 23:49:21,437 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:21,438 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-20 23:49:21,438 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-20 23:49:21,438 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-20 23:49:21,439 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-20 23:49:21,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:21,464 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-20 23:49:21,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-20 23:49:21,464 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-20 23:49:21,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:21,465 INFO L225 Difference]: With dead ends: 37 [2018-01-20 23:49:21,465 INFO L226 Difference]: Without dead ends: 28 [2018-01-20 23:49:21,465 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-20 23:49:21,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-20 23:49:21,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-20 23:49:21,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-20 23:49:21,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-20 23:49:21,469 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-20 23:49:21,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:21,470 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-20 23:49:21,470 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-20 23:49:21,470 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-20 23:49:21,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-20 23:49:21,470 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:21,471 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:21,471 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:21,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-20 23:49:21,471 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:21,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:21,472 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:21,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:21,472 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:21,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:21,480 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:21,570 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,570 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:21,570 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:21,570 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:21,570 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:21,571 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:21,571 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:21,580 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:21,580 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:21,591 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:21,592 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:21,601 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,601 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:21,859 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:21,880 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:21,882 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:21,883 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:21,910 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:21,914 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:21,920 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,920 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:22,012 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,013 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:22,013 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-20 23:49:22,013 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:22,014 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-20 23:49:22,014 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-20 23:49:22,014 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-20 23:49:22,014 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-20 23:49:22,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:22,038 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-20 23:49:22,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-20 23:49:22,039 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-20 23:49:22,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:22,039 INFO L225 Difference]: With dead ends: 38 [2018-01-20 23:49:22,039 INFO L226 Difference]: Without dead ends: 29 [2018-01-20 23:49:22,040 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-20 23:49:22,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-20 23:49:22,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-20 23:49:22,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-20 23:49:22,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-20 23:49:22,043 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-20 23:49:22,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:22,043 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-20 23:49:22,043 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-20 23:49:22,043 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-20 23:49:22,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-20 23:49:22,043 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:22,043 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:22,043 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:22,044 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-20 23:49:22,044 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:22,044 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:22,044 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:22,044 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:22,044 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:22,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:22,051 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:22,139 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,140 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,140 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:22,140 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:22,140 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:22,140 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,140 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:22,145 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:22,145 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:22,148 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,151 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,152 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,153 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,157 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,158 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:22,159 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:22,167 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,167 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:22,432 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,452 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,452 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:22,455 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:22,455 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:22,459 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,464 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,468 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,472 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,486 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,493 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:22,496 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:22,502 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,502 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:22,592 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,594 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:22,594 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-20 23:49:22,594 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:22,594 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-20 23:49:22,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-20 23:49:22,595 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-20 23:49:22,595 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-20 23:49:22,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:22,633 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-20 23:49:22,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-20 23:49:22,634 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-20 23:49:22,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:22,634 INFO L225 Difference]: With dead ends: 39 [2018-01-20 23:49:22,634 INFO L226 Difference]: Without dead ends: 30 [2018-01-20 23:49:22,635 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-20 23:49:22,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-20 23:49:22,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-20 23:49:22,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-20 23:49:22,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-20 23:49:22,637 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-20 23:49:22,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:22,637 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-20 23:49:22,637 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-20 23:49:22,637 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-20 23:49:22,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-20 23:49:22,638 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:22,638 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:22,638 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:22,638 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-20 23:49:22,638 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:22,639 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:22,639 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:22,639 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:22,639 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:22,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:22,647 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:22,738 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,739 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,739 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:22,739 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:22,739 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:22,739 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,739 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:22,745 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:22,745 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:22,752 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:22,754 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:22,755 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:22,756 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:22,757 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:22,759 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:22,760 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:22,760 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:22,762 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:22,771 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,771 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,089 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:23,112 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:23,112 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:23,121 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:23,128 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:23,136 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:23,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:23,154 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:23,164 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:23,174 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:23,181 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:23,184 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:23,191 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,191 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,284 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,286 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:23,286 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-20 23:49:23,286 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:23,287 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-20 23:49:23,287 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-20 23:49:23,287 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-20 23:49:23,287 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-20 23:49:23,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:23,313 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-20 23:49:23,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-20 23:49:23,313 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-20 23:49:23,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:23,314 INFO L225 Difference]: With dead ends: 40 [2018-01-20 23:49:23,314 INFO L226 Difference]: Without dead ends: 31 [2018-01-20 23:49:23,315 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-20 23:49:23,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-20 23:49:23,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-20 23:49:23,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-20 23:49:23,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-20 23:49:23,318 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-20 23:49:23,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:23,319 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-20 23:49:23,319 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-20 23:49:23,319 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-20 23:49:23,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-20 23:49:23,319 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:23,319 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:23,319 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:23,320 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-20 23:49:23,320 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:23,320 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:23,320 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:23,320 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:23,320 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:23,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:23,328 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:23,417 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,417 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,417 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:23,417 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:23,417 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:23,417 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,417 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:23,422 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:23,422 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:23,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:23,433 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:23,440 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,440 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,805 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,826 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,826 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:23,829 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:23,829 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:23,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:23,851 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:23,855 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,856 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,977 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,978 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:23,978 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-20 23:49:23,979 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:23,979 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-20 23:49:23,979 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-20 23:49:23,979 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-20 23:49:23,979 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-20 23:49:24,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:24,025 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-20 23:49:24,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-20 23:49:24,025 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-20 23:49:24,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:24,026 INFO L225 Difference]: With dead ends: 41 [2018-01-20 23:49:24,026 INFO L226 Difference]: Without dead ends: 32 [2018-01-20 23:49:24,026 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-20 23:49:24,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-20 23:49:24,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-20 23:49:24,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-20 23:49:24,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-20 23:49:24,030 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-20 23:49:24,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:24,030 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-20 23:49:24,030 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-20 23:49:24,031 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-20 23:49:24,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-20 23:49:24,031 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:24,031 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:24,031 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:24,032 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-20 23:49:24,032 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:24,033 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,033 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:24,033 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,033 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:24,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:24,039 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:24,158 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:24,159 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:24,159 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:24,159 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,159 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:24,172 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:24,172 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:24,181 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,196 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,197 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:24,199 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:24,216 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,216 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:24,593 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,614 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,614 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:24,618 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:24,618 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:24,628 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,642 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,656 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:24,659 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:24,665 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,666 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:24,793 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,794 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:24,794 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-20 23:49:24,795 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:24,795 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-20 23:49:24,795 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-20 23:49:24,796 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-20 23:49:24,796 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-20 23:49:24,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:24,896 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-20 23:49:24,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-20 23:49:24,900 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-20 23:49:24,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:24,901 INFO L225 Difference]: With dead ends: 42 [2018-01-20 23:49:24,901 INFO L226 Difference]: Without dead ends: 33 [2018-01-20 23:49:24,902 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-20 23:49:24,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-20 23:49:24,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-20 23:49:24,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-20 23:49:24,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-20 23:49:24,906 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-20 23:49:24,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:24,906 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-20 23:49:24,906 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-20 23:49:24,906 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-20 23:49:24,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-20 23:49:24,907 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:24,907 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:24,907 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:24,907 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-20 23:49:24,908 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:24,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,908 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:24,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,909 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:24,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:24,917 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:25,120 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,120 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:25,120 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:25,120 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:25,120 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:25,121 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:25,121 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:25,130 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:25,130 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:25,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,140 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,141 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,142 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,144 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,145 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,147 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,148 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,150 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:25,150 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:25,152 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:25,160 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,160 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:25,271 WARN L143 SmtUtils]: Spent 109ms on a formula simplification that was a NOOP. DAG size: 53 [2018-01-20 23:49:26,216 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,237 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:26,237 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:26,241 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:26,241 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:26,251 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,258 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,270 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,291 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,310 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,321 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,331 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,339 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:26,342 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:26,346 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,346 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:26,483 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,484 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:26,484 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-20 23:49:26,484 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:26,484 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-20 23:49:26,485 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-20 23:49:26,485 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-20 23:49:26,485 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-20 23:49:26,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:26,512 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-20 23:49:26,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-20 23:49:26,513 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-20 23:49:26,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:26,513 INFO L225 Difference]: With dead ends: 43 [2018-01-20 23:49:26,513 INFO L226 Difference]: Without dead ends: 34 [2018-01-20 23:49:26,514 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-20 23:49:26,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-20 23:49:26,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-20 23:49:26,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-20 23:49:26,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-20 23:49:26,516 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-20 23:49:26,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:26,517 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-20 23:49:26,517 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-20 23:49:26,517 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-20 23:49:26,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-20 23:49:26,517 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:26,517 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:26,517 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:26,517 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-20 23:49:26,517 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:26,518 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:26,518 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:26,518 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:26,518 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:26,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:26,525 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:26,736 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,737 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:26,737 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:26,737 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:26,737 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:26,737 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:26,737 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:26,746 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:26,746 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:26,761 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:26,763 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:26,781 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,781 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:27,306 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,327 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,327 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:27,330 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:27,330 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:27,361 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:27,365 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:27,370 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,370 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:27,483 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,485 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:27,485 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-20 23:49:27,486 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:27,486 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-20 23:49:27,486 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-20 23:49:27,487 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-20 23:49:27,487 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-20 23:49:27,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:27,525 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-20 23:49:27,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-20 23:49:27,527 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-20 23:49:27,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:27,528 INFO L225 Difference]: With dead ends: 44 [2018-01-20 23:49:27,528 INFO L226 Difference]: Without dead ends: 35 [2018-01-20 23:49:27,529 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-20 23:49:27,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-20 23:49:27,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-20 23:49:27,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-20 23:49:27,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-20 23:49:27,533 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-20 23:49:27,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:27,533 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-20 23:49:27,533 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-20 23:49:27,533 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-20 23:49:27,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-20 23:49:27,534 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:27,534 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:27,534 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:27,535 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-20 23:49:27,535 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:27,535 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:27,535 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:27,536 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:27,536 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:27,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:27,544 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:27,733 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,734 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,734 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:27,734 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:27,734 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:27,734 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,734 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:27,742 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:27,743 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:27,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,747 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,748 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,749 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,750 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,752 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,753 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,754 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,763 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,764 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:27,766 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:27,789 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,789 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:28,347 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,367 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:28,367 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:28,370 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:28,370 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:28,373 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,375 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,378 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,381 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,385 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,389 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,394 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,404 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,415 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:28,423 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:28,426 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:28,431 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,431 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:28,560 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,561 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:28,561 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-20 23:49:28,561 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:28,561 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-20 23:49:28,562 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-20 23:49:28,562 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-20 23:49:28,562 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-20 23:49:28,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:28,594 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-20 23:49:28,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-20 23:49:28,594 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-20 23:49:28,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:28,595 INFO L225 Difference]: With dead ends: 45 [2018-01-20 23:49:28,595 INFO L226 Difference]: Without dead ends: 36 [2018-01-20 23:49:28,595 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-20 23:49:28,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-20 23:49:28,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-20 23:49:28,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-20 23:49:28,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-20 23:49:28,598 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-20 23:49:28,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:28,598 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-20 23:49:28,598 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-20 23:49:28,598 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-20 23:49:28,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-20 23:49:28,599 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:28,599 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:28,599 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:28,599 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-20 23:49:28,599 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:28,600 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:28,600 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:28,600 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:28,600 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:28,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:28,608 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:28,808 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,808 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:28,808 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:28,808 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:28,808 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:28,808 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:28,809 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:28,813 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:28,814 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:28,822 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,825 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,827 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,828 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,829 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,830 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,831 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,832 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,833 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:28,834 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:28,842 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,842 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:28,997 WARN L143 SmtUtils]: Spent 122ms on a formula simplification that was a NOOP. DAG size: 62 [2018-01-20 23:49:29,527 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,547 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:29,547 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:29,550 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:29,551 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:29,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,574 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,582 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,590 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,599 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,618 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,628 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,639 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:29,647 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:29,650 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:29,654 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,655 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:29,787 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,788 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:29,788 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-20 23:49:29,788 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:29,788 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-20 23:49:29,788 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-20 23:49:29,789 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-20 23:49:29,789 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-20 23:49:29,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:29,818 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-20 23:49:29,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-20 23:49:29,818 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-20 23:49:29,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:29,818 INFO L225 Difference]: With dead ends: 46 [2018-01-20 23:49:29,819 INFO L226 Difference]: Without dead ends: 37 [2018-01-20 23:49:29,819 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-20 23:49:29,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-20 23:49:29,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-20 23:49:29,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-20 23:49:29,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-20 23:49:29,823 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-20 23:49:29,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:29,823 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-20 23:49:29,823 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-20 23:49:29,823 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-20 23:49:29,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-20 23:49:29,823 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:29,823 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:29,824 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:29,824 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-20 23:49:29,824 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:29,824 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:29,824 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:29,824 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:29,825 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:29,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:29,830 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:29,990 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,991 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:29,991 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:29,991 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:29,991 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:29,991 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:29,991 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:29,996 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:29,996 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:30,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:30,008 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:30,015 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:30,016 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:30,597 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:30,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:30,618 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:30,621 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:30,621 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:30,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:30,646 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:30,652 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:30,652 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:30,792 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:30,793 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:30,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-20 23:49:30,793 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:30,794 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-20 23:49:30,794 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-20 23:49:30,794 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-20 23:49:30,794 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-20 23:49:30,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:30,850 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-20 23:49:30,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-20 23:49:30,850 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-20 23:49:30,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:30,850 INFO L225 Difference]: With dead ends: 47 [2018-01-20 23:49:30,850 INFO L226 Difference]: Without dead ends: 38 [2018-01-20 23:49:30,851 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-20 23:49:30,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-20 23:49:30,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-20 23:49:30,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-20 23:49:30,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-20 23:49:30,853 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-20 23:49:30,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:30,854 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-20 23:49:30,854 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-20 23:49:30,854 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-20 23:49:30,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-20 23:49:30,854 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:30,854 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:30,854 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:30,854 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-20 23:49:30,854 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:30,855 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:30,855 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:30,855 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:30,855 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:30,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:30,861 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:31,043 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:31,043 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:31,043 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:31,043 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:31,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:31,043 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:31,048 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:31,048 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:31,054 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:31,060 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:31,061 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:31,063 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:31,074 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,074 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:31,723 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:31,743 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:31,746 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:31,746 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:31,756 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:31,767 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:31,778 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:31,781 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:31,787 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,788 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:31,951 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,952 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:31,952 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-20 23:49:31,952 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:31,952 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-20 23:49:31,952 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-20 23:49:31,953 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-20 23:49:31,953 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-20 23:49:31,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:31,984 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-20 23:49:31,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-20 23:49:31,984 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-20 23:49:31,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:31,985 INFO L225 Difference]: With dead ends: 48 [2018-01-20 23:49:31,985 INFO L226 Difference]: Without dead ends: 39 [2018-01-20 23:49:31,985 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-20 23:49:31,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-20 23:49:31,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-20 23:49:31,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-20 23:49:31,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-20 23:49:31,987 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-20 23:49:31,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:31,988 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-20 23:49:31,988 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-20 23:49:31,988 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-20 23:49:31,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-20 23:49:31,988 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:31,988 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:31,988 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:31,989 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-20 23:49:31,989 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:31,989 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:31,989 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:31,990 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:31,990 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:31,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:31,996 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:32,183 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:32,184 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:32,184 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:32,184 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:32,184 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:32,184 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:32,184 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:32,189 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:32,189 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:32,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,198 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,199 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,201 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,202 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,203 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,204 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,206 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,207 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,208 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,210 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,211 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,211 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:32,213 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:32,222 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:32,222 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:32,900 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:32,920 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:32,920 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:32,923 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:32,923 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:32,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,954 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,971 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,980 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:32,990 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:33,001 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:33,011 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:33,023 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:33,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:33,042 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:33,045 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:33,050 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,050 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:33,207 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,209 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:33,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-20 23:49:33,209 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:33,209 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-20 23:49:33,209 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-20 23:49:33,210 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1127, Invalid=1225, Unknown=0, NotChecked=0, Total=2352 [2018-01-20 23:49:33,210 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-20 23:49:33,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:33,246 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-20 23:49:33,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-20 23:49:33,247 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-20 23:49:33,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:33,247 INFO L225 Difference]: With dead ends: 49 [2018-01-20 23:49:33,247 INFO L226 Difference]: Without dead ends: 40 [2018-01-20 23:49:33,248 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1154, Invalid=1296, Unknown=0, NotChecked=0, Total=2450 [2018-01-20 23:49:33,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-20 23:49:33,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-20 23:49:33,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-20 23:49:33,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-20 23:49:33,250 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-20 23:49:33,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:33,251 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-20 23:49:33,251 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-20 23:49:33,251 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-20 23:49:33,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-20 23:49:33,251 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:33,251 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:33,251 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:33,251 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-20 23:49:33,251 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:33,252 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:33,252 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:33,252 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:33,252 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:33,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:33,260 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:33,449 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,449 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:33,450 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:33,450 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:33,450 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:33,450 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:33,450 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:33,454 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:33,455 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:33,467 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:33,468 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:33,476 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,476 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:34,210 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,229 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:34,230 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:34,232 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:34,233 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:34,266 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:34,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:34,274 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,274 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:34,439 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,440 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:34,440 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-20 23:49:34,440 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:34,441 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-20 23:49:34,441 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-20 23:49:34,441 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1217, Invalid=1333, Unknown=0, NotChecked=0, Total=2550 [2018-01-20 23:49:34,442 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-20 23:49:34,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:34,483 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-20 23:49:34,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-20 23:49:34,483 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-20 23:49:34,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:34,484 INFO L225 Difference]: With dead ends: 50 [2018-01-20 23:49:34,484 INFO L226 Difference]: Without dead ends: 41 [2018-01-20 23:49:34,485 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1245, Invalid=1407, Unknown=0, NotChecked=0, Total=2652 [2018-01-20 23:49:34,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-20 23:49:34,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-20 23:49:34,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-20 23:49:34,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-20 23:49:34,489 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-20 23:49:34,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:34,489 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-20 23:49:34,489 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-20 23:49:34,490 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-20 23:49:34,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-20 23:49:34,490 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:34,490 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:34,490 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:34,491 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-20 23:49:34,491 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:34,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:34,491 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:34,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:34,492 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:34,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:34,497 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:34,690 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:34,690 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:34,690 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:34,690 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:34,691 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:34,691 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:34,696 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:34,696 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:34,700 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,702 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,702 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,703 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,705 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,707 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:34,714 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:34,716 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:34,725 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,725 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:35,470 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:35,490 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:35,490 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:35,493 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:35,493 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:35,497 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,499 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,502 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,506 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,510 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,518 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,535 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,541 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,560 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,569 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:35,573 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:35,580 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:35,580 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:35,759 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:35,760 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:35,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-20 23:49:35,760 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:35,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-20 23:49:35,761 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-20 23:49:35,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1307, Invalid=1449, Unknown=0, NotChecked=0, Total=2756 [2018-01-20 23:49:35,762 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-20 23:49:35,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:35,829 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-20 23:49:35,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-20 23:49:35,830 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-20 23:49:35,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:35,831 INFO L225 Difference]: With dead ends: 51 [2018-01-20 23:49:35,831 INFO L226 Difference]: Without dead ends: 42 [2018-01-20 23:49:35,832 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1336, Invalid=1526, Unknown=0, NotChecked=0, Total=2862 [2018-01-20 23:49:35,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-20 23:49:35,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-20 23:49:35,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-20 23:49:35,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-20 23:49:35,836 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-20 23:49:35,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:35,836 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-20 23:49:35,836 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-20 23:49:35,836 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-20 23:49:35,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-20 23:49:35,837 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:35,837 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:35,837 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:35,837 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-20 23:49:35,837 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:35,838 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:35,838 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:35,838 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:35,838 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:35,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:35,847 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:36,087 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:36,087 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:36,087 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:36,087 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:36,087 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:36,088 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:36,088 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:36,092 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:36,092 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:36,098 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,100 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,101 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,102 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,103 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,104 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,105 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,106 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,107 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,108 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,109 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,110 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,111 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,112 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:36,113 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:36,123 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:36,123 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:36,908 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:36,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:36,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:36,931 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:36,931 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:36,940 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,946 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,954 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,961 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,970 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,978 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,988 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:36,997 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:37,007 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:37,018 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:37,030 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:37,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:37,053 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:37,063 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:37,066 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:37,071 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:37,072 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:37,268 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:37,269 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:37,270 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-20 23:49:37,270 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:37,270 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-20 23:49:37,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-20 23:49:37,271 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1397, Invalid=1573, Unknown=0, NotChecked=0, Total=2970 [2018-01-20 23:49:37,271 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-20 23:49:37,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:37,319 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-20 23:49:37,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-20 23:49:37,320 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-20 23:49:37,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:37,320 INFO L225 Difference]: With dead ends: 52 [2018-01-20 23:49:37,320 INFO L226 Difference]: Without dead ends: 43 [2018-01-20 23:49:37,321 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1427, Invalid=1653, Unknown=0, NotChecked=0, Total=3080 [2018-01-20 23:49:37,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-20 23:49:37,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-20 23:49:37,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-20 23:49:37,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-20 23:49:37,324 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-20 23:49:37,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:37,324 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-20 23:49:37,324 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-20 23:49:37,324 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-20 23:49:37,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-20 23:49:37,325 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:37,325 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:37,325 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:37,325 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-20 23:49:37,325 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:37,326 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:37,326 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:37,326 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:37,326 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:37,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:37,332 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:37,555 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:37,555 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:37,555 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:37,555 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:37,555 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:37,555 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:37,555 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:37,560 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:37,560 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:37,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:37,573 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:37,582 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:37,582 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:38,404 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:38,424 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:38,424 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:38,427 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:38,427 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:38,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:38,455 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:38,461 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:38,461 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:38,656 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:38,657 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:38,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-20 23:49:38,657 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:38,658 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-20 23:49:38,658 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-20 23:49:38,659 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1487, Invalid=1705, Unknown=0, NotChecked=0, Total=3192 [2018-01-20 23:49:38,659 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-20 23:49:38,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:38,695 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-20 23:49:38,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-20 23:49:38,696 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-20 23:49:38,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:38,696 INFO L225 Difference]: With dead ends: 53 [2018-01-20 23:49:38,696 INFO L226 Difference]: Without dead ends: 44 [2018-01-20 23:49:38,697 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1518, Invalid=1788, Unknown=0, NotChecked=0, Total=3306 [2018-01-20 23:49:38,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-20 23:49:38,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-20 23:49:38,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-20 23:49:38,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-20 23:49:38,700 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-20 23:49:38,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:38,700 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-20 23:49:38,700 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-20 23:49:38,700 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-20 23:49:38,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-20 23:49:38,700 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:38,700 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:38,700 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:38,701 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-20 23:49:38,701 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:38,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:38,701 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:38,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:38,701 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:38,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:38,708 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:38,970 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:38,970 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:38,970 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:38,970 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:38,970 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:38,970 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:38,971 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:38,976 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:38,976 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:38,982 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:38,988 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:38,989 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:38,991 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:38,999 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:39,000 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:39,870 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:39,890 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:39,890 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:39,893 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:39,893 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:39,901 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,914 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,926 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:39,929 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:39,936 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:39,936 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:40,138 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:40,139 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:40,139 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-20 23:49:40,139 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:40,139 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-20 23:49:40,139 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-20 23:49:40,140 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1577, Invalid=1845, Unknown=0, NotChecked=0, Total=3422 [2018-01-20 23:49:40,140 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-20 23:49:40,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:40,195 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-20 23:49:40,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-20 23:49:40,195 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-20 23:49:40,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:40,195 INFO L225 Difference]: With dead ends: 54 [2018-01-20 23:49:40,196 INFO L226 Difference]: Without dead ends: 45 [2018-01-20 23:49:40,196 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1609, Invalid=1931, Unknown=0, NotChecked=0, Total=3540 [2018-01-20 23:49:40,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-20 23:49:40,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-20 23:49:40,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-20 23:49:40,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-20 23:49:40,198 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-20 23:49:40,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:40,198 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-20 23:49:40,198 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-20 23:49:40,198 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-20 23:49:40,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-20 23:49:40,198 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:40,199 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:40,199 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:40,199 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-20 23:49:40,199 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:40,199 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:40,199 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:40,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:40,200 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:40,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:40,208 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:40,459 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:40,459 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:40,460 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:40,460 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:40,460 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:40,460 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:40,460 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:40,465 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:40,465 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:40,472 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,476 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,477 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,478 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,479 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,480 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,481 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,482 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,483 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,484 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,486 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,487 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:40,488 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:40,489 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:40,498 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:40,498 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:41,408 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:41,427 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:41,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:41,431 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:41,431 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:41,440 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,447 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,455 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,462 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,471 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,479 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,498 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,519 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,530 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,542 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,553 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,566 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,578 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:41,588 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:41,591 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:41,597 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:41,597 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:41,816 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:41,817 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:41,817 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-20 23:49:41,817 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:41,817 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-20 23:49:41,818 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-20 23:49:41,818 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1667, Invalid=1993, Unknown=0, NotChecked=0, Total=3660 [2018-01-20 23:49:41,818 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-20 23:49:41,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:41,856 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-20 23:49:41,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-20 23:49:41,857 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-20 23:49:41,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:41,857 INFO L225 Difference]: With dead ends: 55 [2018-01-20 23:49:41,858 INFO L226 Difference]: Without dead ends: 46 [2018-01-20 23:49:41,858 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1700, Invalid=2082, Unknown=0, NotChecked=0, Total=3782 [2018-01-20 23:49:41,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-20 23:49:41,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-20 23:49:41,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-20 23:49:41,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-20 23:49:41,861 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-20 23:49:41,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:41,862 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-20 23:49:41,862 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-20 23:49:41,862 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-20 23:49:41,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-20 23:49:41,863 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:41,863 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:41,863 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:41,863 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-20 23:49:41,863 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:41,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:41,864 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:41,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:41,864 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:41,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:41,873 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:42,184 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:42,184 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:42,184 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:42,184 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:42,184 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:42,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:42,185 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:42,190 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:42,190 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:42,203 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:42,205 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:42,214 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:42,214 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:43,173 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,192 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:43,204 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:43,207 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:43,207 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:43,246 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:43,249 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:43,255 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,255 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:43,486 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,487 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:43,488 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-20 23:49:43,488 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:43,488 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-20 23:49:43,488 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-20 23:49:43,489 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1757, Invalid=2149, Unknown=0, NotChecked=0, Total=3906 [2018-01-20 23:49:43,489 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-20 23:49:43,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:43,550 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-20 23:49:43,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-20 23:49:43,551 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-20 23:49:43,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:43,551 INFO L225 Difference]: With dead ends: 56 [2018-01-20 23:49:43,551 INFO L226 Difference]: Without dead ends: 47 [2018-01-20 23:49:43,552 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1791, Invalid=2241, Unknown=0, NotChecked=0, Total=4032 [2018-01-20 23:49:43,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-20 23:49:43,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-20 23:49:43,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-20 23:49:43,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-20 23:49:43,554 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-20 23:49:43,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:43,555 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-20 23:49:43,555 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-20 23:49:43,555 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-20 23:49:43,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-20 23:49:43,555 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:43,555 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:43,555 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:43,555 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-20 23:49:43,555 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:43,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:43,556 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:43,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:43,556 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:43,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:43,562 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:43,896 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,897 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:43,897 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:43,897 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:43,897 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:43,897 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:43,897 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:43,903 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:43,903 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:43,906 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,907 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,908 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,908 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,909 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,910 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,911 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,911 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,912 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,913 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,914 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,915 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,916 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,917 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,918 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:43,923 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:43,924 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:43,934 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,934 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:44,938 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:44,958 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:44,958 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:44,965 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:44,965 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:44,971 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,972 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,976 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,980 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,984 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,988 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,999 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,004 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,010 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,024 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,032 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,040 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,049 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,063 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,074 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:45,079 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:45,089 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:45,089 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:45,197 WARN L143 SmtUtils]: Spent 106ms on a formula simplification that was a NOOP. DAG size: 95 [2018-01-20 23:49:45,383 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:45,385 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:45,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-20 23:49:45,385 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:45,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-20 23:49:45,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-20 23:49:45,386 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1847, Invalid=2313, Unknown=0, NotChecked=0, Total=4160 [2018-01-20 23:49:45,386 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-20 23:49:45,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:45,426 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-20 23:49:45,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-20 23:49:45,426 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-20 23:49:45,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:45,427 INFO L225 Difference]: With dead ends: 57 [2018-01-20 23:49:45,427 INFO L226 Difference]: Without dead ends: 48 [2018-01-20 23:49:45,428 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 699 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1882, Invalid=2408, Unknown=0, NotChecked=0, Total=4290 [2018-01-20 23:49:45,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-20 23:49:45,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-20 23:49:45,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-20 23:49:45,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-20 23:49:45,431 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-20 23:49:45,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:45,431 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-20 23:49:45,431 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-20 23:49:45,431 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-20 23:49:45,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-20 23:49:45,432 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:45,432 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:45,432 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:45,432 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-20 23:49:45,432 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:45,433 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:45,433 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:45,433 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:45,433 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:45,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:45,440 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:45,860 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:45,860 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:45,861 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:45,861 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:45,861 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:45,861 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:45,861 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:45,865 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:45,866 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:45,872 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,873 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,874 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,875 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,876 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,878 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,879 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,880 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,881 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,883 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,884 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,885 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,886 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,887 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,889 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:45,889 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:45,891 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:45,900 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:45,900 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:46,942 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:46,962 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:46,962 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:46,965 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:46,965 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:46,974 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:46,981 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:46,989 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:46,996 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,005 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,013 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,023 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,033 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,054 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,065 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,077 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,089 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,102 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,129 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:47,140 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:47,143 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:47,150 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:47,150 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:47,416 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:47,417 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:47,417 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-20 23:49:47,417 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:47,418 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-20 23:49:47,418 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-20 23:49:47,418 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1937, Invalid=2485, Unknown=0, NotChecked=0, Total=4422 [2018-01-20 23:49:47,418 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-20 23:49:47,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:47,457 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-20 23:49:47,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-20 23:49:47,457 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-20 23:49:47,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:47,458 INFO L225 Difference]: With dead ends: 58 [2018-01-20 23:49:47,458 INFO L226 Difference]: Without dead ends: 49 [2018-01-20 23:49:47,458 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 783 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1973, Invalid=2583, Unknown=0, NotChecked=0, Total=4556 [2018-01-20 23:49:47,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-20 23:49:47,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-20 23:49:47,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-20 23:49:47,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-20 23:49:47,460 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-20 23:49:47,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:47,460 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-20 23:49:47,460 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-20 23:49:47,460 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-20 23:49:47,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-20 23:49:47,461 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:47,461 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:47,461 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:47,461 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-20 23:49:47,461 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:47,462 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:47,462 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:47,462 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:47,463 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:47,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:47,472 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:47,796 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:47,796 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:47,796 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:47,796 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:47,797 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:47,797 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:47,797 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:47,802 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:47,802 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:47,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:47,816 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:47,834 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:47,834 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:47,966 WARN L143 SmtUtils]: Spent 131ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-20 23:49:49,170 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:49,190 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:49,190 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:49,193 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:49,193 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:49,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:49,225 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:49,232 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:49,232 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:49,491 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:49,492 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:49,493 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-20 23:49:49,493 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:49,493 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-20 23:49:49,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-20 23:49:49,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2027, Invalid=2665, Unknown=0, NotChecked=0, Total=4692 [2018-01-20 23:49:49,494 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-20 23:49:49,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:49,546 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-20 23:49:49,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-20 23:49:49,546 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-20 23:49:49,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:49,547 INFO L225 Difference]: With dead ends: 59 [2018-01-20 23:49:49,547 INFO L226 Difference]: Without dead ends: 50 [2018-01-20 23:49:49,547 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 871 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2064, Invalid=2766, Unknown=0, NotChecked=0, Total=4830 [2018-01-20 23:49:49,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-20 23:49:49,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-20 23:49:49,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-20 23:49:49,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-20 23:49:49,551 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-20 23:49:49,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:49,551 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-20 23:49:49,551 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-20 23:49:49,551 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-20 23:49:49,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-20 23:49:49,552 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:49,552 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:49,552 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:49,552 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-20 23:49:49,552 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:49,553 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:49,553 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:49,553 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:49,553 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:49,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:49,563 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:49,952 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:49,952 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:49,953 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:49,953 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:49,953 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:49,953 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:49,953 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:49,958 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:49,958 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:49,965 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,972 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,973 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:49,975 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:49,984 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:49,984 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:51,141 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:51,161 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:51,161 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:51,164 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:51,164 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:51,174 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:51,189 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:51,203 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:51,206 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:51,213 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:51,213 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:51,492 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:51,493 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:51,493 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-20 23:49:51,493 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:51,493 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-20 23:49:51,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-20 23:49:51,494 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2117, Invalid=2853, Unknown=0, NotChecked=0, Total=4970 [2018-01-20 23:49:51,494 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-20 23:49:51,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:51,583 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-20 23:49:51,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-20 23:49:51,584 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-20 23:49:51,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:51,584 INFO L225 Difference]: With dead ends: 60 [2018-01-20 23:49:51,584 INFO L226 Difference]: Without dead ends: 51 [2018-01-20 23:49:51,585 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 963 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2155, Invalid=2957, Unknown=0, NotChecked=0, Total=5112 [2018-01-20 23:49:51,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-20 23:49:51,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-20 23:49:51,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-20 23:49:51,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-20 23:49:51,588 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-20 23:49:51,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:51,589 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-20 23:49:51,589 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-20 23:49:51,589 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-20 23:49:51,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-20 23:49:51,589 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:51,589 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:51,590 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:51,590 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-20 23:49:51,590 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:51,590 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:51,590 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:51,590 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:51,590 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:51,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:51,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:52,015 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:52,016 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:52,016 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:52,016 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:52,016 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:52,016 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:52,016 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:52,021 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:52,021 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:52,028 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,031 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,032 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,043 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:52,047 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:52,048 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:52,059 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:52,059 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:53,252 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:53,272 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:53,272 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:53,307 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:53,307 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:53,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,324 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,332 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,341 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,350 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,359 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,369 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,379 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,401 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,412 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,424 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,436 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,449 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,462 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,476 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,490 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,504 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:53,516 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:53,520 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:53,527 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:53,527 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:53,819 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:53,820 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:53,821 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-20 23:49:53,821 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:53,821 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-20 23:49:53,821 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-20 23:49:53,821 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2207, Invalid=3049, Unknown=0, NotChecked=0, Total=5256 [2018-01-20 23:49:53,821 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-20 23:49:53,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:53,866 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-20 23:49:53,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-20 23:49:53,866 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-20 23:49:53,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:53,867 INFO L225 Difference]: With dead ends: 61 [2018-01-20 23:49:53,867 INFO L226 Difference]: Without dead ends: 52 [2018-01-20 23:49:53,867 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2246, Invalid=3156, Unknown=0, NotChecked=0, Total=5402 [2018-01-20 23:49:53,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-20 23:49:53,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-20 23:49:53,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-20 23:49:53,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-20 23:49:53,869 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-20 23:49:53,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:53,869 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-20 23:49:53,869 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-20 23:49:53,870 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-20 23:49:53,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-20 23:49:53,870 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:53,870 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:53,870 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:53,870 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-20 23:49:53,870 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:53,871 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:53,871 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:53,871 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:53,871 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:53,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:53,877 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:54,478 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:54,479 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:54,479 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:54,479 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:54,479 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:54,479 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:54,479 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:54,489 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:54,489 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:54,508 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:54,510 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:54,519 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:54,519 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:55,764 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:55,784 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:55,784 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:55,787 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:55,787 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:55,830 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:55,834 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:55,840 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:55,840 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:56,132 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:56,134 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:56,134 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-20 23:49:56,134 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:56,134 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-20 23:49:56,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-20 23:49:56,134 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2297, Invalid=3253, Unknown=0, NotChecked=0, Total=5550 [2018-01-20 23:49:56,135 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-20 23:49:56,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:56,191 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-20 23:49:56,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-20 23:49:56,192 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-20 23:49:56,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:56,192 INFO L225 Difference]: With dead ends: 62 [2018-01-20 23:49:56,192 INFO L226 Difference]: Without dead ends: 53 [2018-01-20 23:49:56,192 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1159 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2337, Invalid=3363, Unknown=0, NotChecked=0, Total=5700 [2018-01-20 23:49:56,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-20 23:49:56,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-20 23:49:56,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-20 23:49:56,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-20 23:49:56,195 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-20 23:49:56,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:56,195 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-20 23:49:56,195 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-20 23:49:56,195 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-20 23:49:56,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-20 23:49:56,196 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:56,196 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:56,196 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:56,196 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-20 23:49:56,196 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:56,197 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:56,197 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:56,197 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:56,198 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:56,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:56,206 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:56,719 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:56,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:56,719 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:56,719 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:56,719 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:56,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:56,719 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:56,724 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:56,724 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:56,728 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,729 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,729 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,730 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,731 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,732 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,732 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,733 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,734 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,735 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,736 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,738 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,739 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,740 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,741 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,742 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,743 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,747 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:56,748 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:56,750 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:56,764 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:56,764 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:58,094 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:58,113 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:58,113 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:58,116 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:58,116 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:58,121 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,122 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,137 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,146 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,152 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,158 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,164 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,170 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,178 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,185 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,194 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,202 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,211 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:58,247 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:58,251 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:58,257 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:58,258 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:58,570 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:58,571 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:58,605 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-20 23:49:58,605 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:58,605 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-20 23:49:58,606 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-20 23:49:58,606 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2387, Invalid=3465, Unknown=0, NotChecked=0, Total=5852 [2018-01-20 23:49:58,606 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-20 23:49:58,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:58,648 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-20 23:49:58,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-20 23:49:58,649 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-20 23:49:58,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:58,649 INFO L225 Difference]: With dead ends: 63 [2018-01-20 23:49:58,649 INFO L226 Difference]: Without dead ends: 54 [2018-01-20 23:49:58,650 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1263 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2428, Invalid=3578, Unknown=0, NotChecked=0, Total=6006 [2018-01-20 23:49:58,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-20 23:49:58,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-20 23:49:58,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-20 23:49:58,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-20 23:49:58,652 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-20 23:49:58,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:58,652 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-20 23:49:58,652 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-20 23:49:58,652 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-20 23:49:58,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-20 23:49:58,653 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:58,653 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:58,653 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:58,653 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-20 23:49:58,653 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:58,654 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:58,654 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:58,654 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:58,654 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:58,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:58,662 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:59,112 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:59,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:59,112 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:59,112 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:59,112 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:59,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:59,113 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:59,117 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:59,118 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:59,125 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,126 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,127 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,128 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,129 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,130 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,131 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,132 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,133 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,134 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,135 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,136 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,138 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,139 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,140 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,141 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,142 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,143 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:59,145 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:59,147 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:59,156 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:59,157 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:00,500 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:00,520 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:00,520 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:00,523 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:50:00,523 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:50:00,533 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,539 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,563 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,571 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,580 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,590 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,600 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,611 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,622 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,633 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,645 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,664 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,677 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,690 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,717 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,732 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:00,743 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:00,747 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:00,754 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:00,754 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:01,084 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:01,086 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:01,086 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-20 23:50:01,086 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:01,086 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-20 23:50:01,086 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-20 23:50:01,087 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2477, Invalid=3685, Unknown=0, NotChecked=0, Total=6162 [2018-01-20 23:50:01,087 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-20 23:50:01,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:01,134 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-20 23:50:01,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-20 23:50:01,135 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-20 23:50:01,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:01,135 INFO L225 Difference]: With dead ends: 64 [2018-01-20 23:50:01,135 INFO L226 Difference]: Without dead ends: 55 [2018-01-20 23:50:01,136 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1371 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2519, Invalid=3801, Unknown=0, NotChecked=0, Total=6320 [2018-01-20 23:50:01,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-20 23:50:01,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-20 23:50:01,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-20 23:50:01,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-20 23:50:01,138 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-20 23:50:01,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:01,138 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-20 23:50:01,138 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-20 23:50:01,138 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-20 23:50:01,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-20 23:50:01,139 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:01,139 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:01,139 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:01,139 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-20 23:50:01,139 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:01,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:01,139 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:01,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:01,140 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:01,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:01,148 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:01,576 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:01,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:01,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:01,576 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:01,576 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:01,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:01,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:01,583 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:01,584 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:50:01,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:01,603 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:01,622 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:01,622 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:03,044 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:03,064 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:03,064 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:03,067 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:03,067 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:50:03,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:03,102 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:03,109 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:03,109 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:03,449 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:03,450 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:03,450 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-20 23:50:03,450 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:03,450 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-20 23:50:03,450 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-20 23:50:03,451 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2567, Invalid=3913, Unknown=0, NotChecked=0, Total=6480 [2018-01-20 23:50:03,451 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-20 23:50:03,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:03,503 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-20 23:50:03,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-20 23:50:03,504 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-20 23:50:03,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:03,504 INFO L225 Difference]: With dead ends: 65 [2018-01-20 23:50:03,504 INFO L226 Difference]: Without dead ends: 56 [2018-01-20 23:50:03,505 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1483 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2610, Invalid=4032, Unknown=0, NotChecked=0, Total=6642 [2018-01-20 23:50:03,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-20 23:50:03,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-20 23:50:03,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-20 23:50:03,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-20 23:50:03,507 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-20 23:50:03,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:03,507 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-20 23:50:03,507 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-20 23:50:03,507 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-20 23:50:03,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-20 23:50:03,507 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:03,507 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:03,507 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:03,508 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-20 23:50:03,508 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:03,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:03,508 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:03,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:03,508 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:03,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:03,518 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:04,058 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:04,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:04,058 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:04,058 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:04,058 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:04,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:04,058 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:04,063 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:50:04,063 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:50:04,071 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,079 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,081 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:04,082 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:04,101 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:04,101 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:04,513 WARN L143 SmtUtils]: Spent 118ms on a formula simplification that was a NOOP. DAG size: 122 [2018-01-20 23:50:05,758 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:05,779 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:05,779 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:05,782 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:50:05,782 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:50:05,793 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,809 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,827 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:05,831 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:05,839 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:05,839 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:06,200 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:06,201 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:06,201 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-20 23:50:06,201 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:06,201 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-20 23:50:06,202 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-20 23:50:06,202 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2657, Invalid=4149, Unknown=0, NotChecked=0, Total=6806 [2018-01-20 23:50:06,202 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 43 states. [2018-01-20 23:50:06,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:06,249 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-20 23:50:06,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-20 23:50:06,249 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 55 [2018-01-20 23:50:06,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:06,250 INFO L225 Difference]: With dead ends: 66 [2018-01-20 23:50:06,250 INFO L226 Difference]: Without dead ends: 57 [2018-01-20 23:50:06,250 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 177 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1599 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2701, Invalid=4271, Unknown=0, NotChecked=0, Total=6972 [2018-01-20 23:50:06,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-20 23:50:06,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-20 23:50:06,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-20 23:50:06,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-20 23:50:06,252 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-20 23:50:06,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:06,253 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-20 23:50:06,253 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-20 23:50:06,253 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-20 23:50:06,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-20 23:50:06,253 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:06,253 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:06,253 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:06,253 INFO L82 PathProgramCache]: Analyzing trace with hash -1090430805, now seen corresponding path program 39 times [2018-01-20 23:50:06,253 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:06,254 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:06,254 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:06,254 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:06,254 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:06,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:06,264 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:06,766 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:06,766 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:06,766 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:06,766 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:06,766 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:06,766 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:06,766 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:06,772 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:50:06,772 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:50:06,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,783 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,784 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,785 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,787 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,788 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,789 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,790 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,793 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,801 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,803 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,805 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,807 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,810 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:06,816 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:06,818 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:06,837 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:06,837 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:07,239 WARN L143 SmtUtils]: Spent 311ms on a formula simplification that was a NOOP. DAG size: 125 [2018-01-20 23:50:07,355 WARN L143 SmtUtils]: Spent 106ms on a formula simplification that was a NOOP. DAG size: 125 [2018-01-20 23:50:08,590 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:08,610 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:08,610 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:08,618 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:50:08,618 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:50:08,627 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,634 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,641 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,649 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,658 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,667 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,676 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,686 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,696 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,707 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,729 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,741 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,753 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,793 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,822 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,837 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,853 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:08,864 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:08,868 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:08,876 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:08,876 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:09,252 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:09,253 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:09,294 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 85 [2018-01-20 23:50:09,294 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:09,295 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-20 23:50:09,295 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-20 23:50:09,295 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2747, Invalid=4393, Unknown=0, NotChecked=0, Total=7140 [2018-01-20 23:50:09,295 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 44 states. [2018-01-20 23:50:09,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:09,349 INFO L93 Difference]: Finished difference Result 67 states and 67 transitions. [2018-01-20 23:50:09,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-01-20 23:50:09,349 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 56 [2018-01-20 23:50:09,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:09,349 INFO L225 Difference]: With dead ends: 67 [2018-01-20 23:50:09,349 INFO L226 Difference]: Without dead ends: 58 [2018-01-20 23:50:09,350 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 180 SyntacticMatches, 2 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1719 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2792, Invalid=4518, Unknown=0, NotChecked=0, Total=7310 [2018-01-20 23:50:09,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-20 23:50:09,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-20 23:50:09,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-20 23:50:09,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-01-20 23:50:09,353 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 56 [2018-01-20 23:50:09,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:09,353 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-01-20 23:50:09,353 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-20 23:50:09,353 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-01-20 23:50:09,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-20 23:50:09,354 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:09,354 INFO L322 BasicCegarLoop]: trace histogram [40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:09,354 INFO L371 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:09,354 INFO L82 PathProgramCache]: Analyzing trace with hash -845591728, now seen corresponding path program 40 times [2018-01-20 23:50:09,354 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:09,354 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:09,355 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:09,355 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:09,355 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:09,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:09,363 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:09,866 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:09,867 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:09,867 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:09,867 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:09,867 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:09,867 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:09,867 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:09,872 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:50:09,872 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:50:09,888 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:09,890 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:09,900 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:09,900 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:11,567 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:11,587 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:11,587 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 81 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:11,590 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:50:11,590 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:50:11,641 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:11,645 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:11,653 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:11,653 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:11,765 WARN L143 SmtUtils]: Spent 110ms on a formula simplification that was a NOOP. DAG size: 128 [2018-01-20 23:50:12,069 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:12,070 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:12,070 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44, 44, 44] total 86 [2018-01-20 23:50:12,070 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:12,070 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-01-20 23:50:12,071 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-01-20 23:50:12,071 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2793, Invalid=4517, Unknown=0, NotChecked=0, Total=7310 [2018-01-20 23:50:12,071 INFO L87 Difference]: Start difference. First operand 58 states and 58 transitions. Second operand 45 states. [2018-01-20 23:50:12,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:12,126 INFO L93 Difference]: Finished difference Result 68 states and 68 transitions. [2018-01-20 23:50:12,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-01-20 23:50:12,126 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 57 [2018-01-20 23:50:12,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:12,127 INFO L225 Difference]: With dead ends: 68 [2018-01-20 23:50:12,127 INFO L226 Difference]: Without dead ends: 59 [2018-01-20 23:50:12,127 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 182 SyntacticMatches, 4 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1966 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2838, Invalid=4644, Unknown=0, NotChecked=0, Total=7482 [2018-01-20 23:50:12,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-20 23:50:12,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-20 23:50:12,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-20 23:50:12,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 59 transitions. [2018-01-20 23:50:12,130 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 59 transitions. Word has length 57 [2018-01-20 23:50:12,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:12,130 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 59 transitions. [2018-01-20 23:50:12,130 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-01-20 23:50:12,130 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 59 transitions. [2018-01-20 23:50:12,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-01-20 23:50:12,130 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:12,130 INFO L322 BasicCegarLoop]: trace histogram [41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:12,130 INFO L371 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:12,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1845514933, now seen corresponding path program 41 times [2018-01-20 23:50:12,131 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:12,131 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:12,131 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:12,131 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:12,131 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:12,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-20 23:50:12,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-20 23:50:12,168 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-20 23:50:12,175 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-20 23:50:12,181 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-01-20 23:50:12,182 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-20 23:50:12,182 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-20 23:50:12,189 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:50:12,189 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:50:12,189 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:50:12,189 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:50:12,189 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:50:12,189 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:50:12,189 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:50:12,190 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-20 23:50:12,190 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:50:12,190 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-20 23:50:12,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-20 23:50:12,191 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:12,191 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:12,191 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0EnsuresViolation]=== [2018-01-20 23:50:12,191 INFO L82 PathProgramCache]: Analyzing trace with hash -1259858052, now seen corresponding path program 1 times [2018-01-20 23:50:12,191 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:12,192 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:12,192 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:12,192 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:12,192 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:12,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:12,196 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:12,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:12,223 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-20 23:50:12,223 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-20 23:50:12,223 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-20 23:50:12,223 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-20 23:50:12,224 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-20 23:50:12,224 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-20 23:50:12,224 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-20 23:50:12,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:12,239 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-20 23:50:12,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-20 23:50:12,239 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-20 23:50:12,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:12,239 INFO L225 Difference]: With dead ends: 33 [2018-01-20 23:50:12,239 INFO L226 Difference]: Without dead ends: 17 [2018-01-20 23:50:12,240 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-20 23:50:12,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2018-01-20 23:50:12,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2018-01-20 23:50:12,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2018-01-20 23:50:12,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2018-01-20 23:50:12,241 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 15 [2018-01-20 23:50:12,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:12,241 INFO L432 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2018-01-20 23:50:12,241 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-20 23:50:12,241 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2018-01-20 23:50:12,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-20 23:50:12,241 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:12,241 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:12,241 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0EnsuresViolation]=== [2018-01-20 23:50:12,242 INFO L82 PathProgramCache]: Analyzing trace with hash -956542153, now seen corresponding path program 1 times [2018-01-20 23:50:12,242 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:12,242 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:12,242 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:12,242 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:12,242 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:12,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:12,245 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:12,261 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:12,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:12,261 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:12,262 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 17 with the following transitions: [2018-01-20 23:50:12,262 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [15], [17], [18], [19], [21], [22], [23], [24], [26], [27] [2018-01-20 23:50:12,263 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-20 23:50:12,263 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-20 23:50:12,391 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-20 23:50:12,391 INFO L268 AbstractInterpreter]: Visited 16 different actions 20 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-20 23:50:12,408 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-20 23:50:12,408 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:12,408 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:12,422 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:12,422 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:50:12,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:12,434 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:12,449 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:12,449 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:12,502 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. Received shutdown request... [2018-01-20 23:50:12,523 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:12,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 83 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:12,527 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:12,527 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:50:12,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:12,545 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:12,546 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-20 23:50:12,546 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-20 23:50:12,548 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.01 11:50:12 BoogieIcfgContainer [2018-01-20 23:50:12,548 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-20 23:50:12,549 INFO L168 Benchmark]: Toolchain (without parser) took 56532.44 ms. Allocated memory was 304.1 MB in the beginning and 869.3 MB in the end (delta: 565.2 MB). Free memory was 263.4 MB in the beginning and 735.3 MB in the end (delta: -471.9 MB). Peak memory consumption was 93.3 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:12,549 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 304.1 MB. Free memory is still 268.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-20 23:50:12,549 INFO L168 Benchmark]: CACSL2BoogieTranslator took 177.65 ms. Allocated memory is still 304.1 MB. Free memory was 263.4 MB in the beginning and 255.3 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:12,549 INFO L168 Benchmark]: Boogie Preprocessor took 33.80 ms. Allocated memory is still 304.1 MB. Free memory was 255.3 MB in the beginning and 253.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:12,550 INFO L168 Benchmark]: RCFGBuilder took 173.35 ms. Allocated memory is still 304.1 MB. Free memory was 253.3 MB in the beginning and 241.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:12,550 INFO L168 Benchmark]: TraceAbstraction took 56139.58 ms. Allocated memory was 304.1 MB in the beginning and 869.3 MB in the end (delta: 565.2 MB). Free memory was 241.7 MB in the beginning and 735.3 MB in the end (delta: -493.6 MB). Peak memory consumption was 71.6 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:12,551 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 304.1 MB. Free memory is still 268.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 177.65 ms. Allocated memory is still 304.1 MB. Free memory was 263.4 MB in the beginning and 255.3 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 33.80 ms. Allocated memory is still 304.1 MB. Free memory was 255.3 MB in the beginning and 253.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 173.35 ms. Allocated memory is still 304.1 MB. Free memory was 253.3 MB in the beginning and 241.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 56139.58 ms. Allocated memory was 304.1 MB in the beginning and 869.3 MB in the end (delta: 565.2 MB). Free memory was 241.7 MB in the beginning and 735.3 MB in the end (delta: -493.6 MB). Peak memory consumption was 71.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.305069 RENAME_VARIABLES(MILLISECONDS) : 0.162934 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.251411 PROJECTAWAY(MILLISECONDS) : 0.104910 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.181093 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.200623 ADD_EQUALITY(MILLISECONDS) : 0.044165 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.016447 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 15 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 94 LocStat_NO_SUPPORTING_DISEQUALITIES : 21 LocStat_NO_DISJUNCTIONS : -30 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 22 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 31 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 22 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.274139 RENAME_VARIABLES(MILLISECONDS) : 0.115234 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.222831 PROJECTAWAY(MILLISECONDS) : 0.064743 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.120218 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.147247 ADD_EQUALITY(MILLISECONDS) : 0.065466 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.017763 #CONJOIN_DISJUNCTIVE : 30 #RENAME_VARIABLES : 55 #UNFREEZE : 0 #CONJOIN : 56 #PROJECTAWAY : 54 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 55 #ADD_EQUALITY : 31 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: [L21] FCALL struct compstat cstats ; VAL [cstats={42:0}] [L22] FCALL memset((void *)(& cstats), 10, 41UL) VAL [cstats={42:0}, memset((void *)(& cstats), 10, 41UL)={42:0}] [L23] return 0; VAL [\result=0, cstats={42:0}] [L23] return 0; - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 55.5s OverallTime, 42 OverallIterations, 41 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 659 SDtfs, 82 SDslu, 11391 SDs, 0 SdLazy, 1798 SolverSat, 53 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6945 GetRequests, 4981 SyntacticMatches, 82 SemanticMatches, 1882 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19302 ImplicationChecksByTransitivity, 31.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=59occurred in iteration=41, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 41 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.4s SatisfiabilityAnalysisTime, 47.6s InterpolantComputationTime, 4575 NumberOfCodeBlocks, 4575 NumberOfCodeBlocksAsserted, 556 NumberOfCheckSat, 7316 ConstructedInterpolants, 0 QuantifiedInterpolants, 1124652 SizeOfPredicates, 80 NumberOfNonLiveVariables, 9800 ConjunctsInSsa, 1880 ConjunctsInUnsatCore, 201 InterpolantComputations, 1 PerfectInterpolantSequences, 0/57400 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while BasicCegarLoop was analyzing trace of length 17 with TraceHistMax 1, while TraceCheckSpWp was constructing forward predicates, while XnfDer was eliminating 1 quantified variables from 2 xjuncts. - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.3s OverallTime, 2 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 19 SDtfs, 2 SDslu, 36 SDs, 0 SdLazy, 7 SolverSat, 0 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.1s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 15 NumberOfCodeBlocks, 15 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 14 ConstructedInterpolants, 0 QuantifiedInterpolants, 280 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-20_23-50-12-562.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-20_23-50-12-562.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-20_23-50-12-562.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-20_23-50-12-562.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-20_23-50-12-562.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-20_23-50-12-562.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-20_23-50-12-562.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-20_23-50-12-562.csv Completed graceful shutdown