java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero3_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-20 23:49:20,669 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-20 23:49:20,670 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-20 23:49:20,682 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-20 23:49:20,682 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-20 23:49:20,683 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-20 23:49:20,684 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-20 23:49:20,685 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-20 23:49:20,686 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-20 23:49:20,687 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-20 23:49:20,688 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-20 23:49:20,688 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-20 23:49:20,688 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-20 23:49:20,689 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-20 23:49:20,690 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-20 23:49:20,692 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-20 23:49:20,694 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-20 23:49:20,697 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-20 23:49:20,698 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-20 23:49:20,699 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-20 23:49:20,702 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-20 23:49:20,707 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-20 23:49:20,708 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-20 23:49:20,708 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ.epf [2018-01-20 23:49:20,718 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-20 23:49:20,718 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-20 23:49:20,719 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-20 23:49:20,719 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-20 23:49:20,720 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-20 23:49:20,720 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-20 23:49:20,720 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-20 23:49:20,721 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-20 23:49:20,721 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-20 23:49:20,721 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-20 23:49:20,721 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-20 23:49:20,722 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-20 23:49:20,722 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-20 23:49:20,722 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-20 23:49:20,722 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-20 23:49:20,722 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-20 23:49:20,723 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-20 23:49:20,723 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-20 23:49:20,723 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-20 23:49:20,723 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-20 23:49:20,723 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-20 23:49:20,724 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-20 23:49:20,724 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-20 23:49:20,724 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-20 23:49:20,724 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-20 23:49:20,724 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-20 23:49:20,725 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-20 23:49:20,725 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-20 23:49:20,725 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-20 23:49:20,725 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-20 23:49:20,725 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-20 23:49:20,726 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-20 23:49:20,726 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-20 23:49:20,726 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-20 23:49:20,726 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-20 23:49:20,726 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-20 23:49:20,727 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-20 23:49:20,727 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-20 23:49:20,762 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-20 23:49:20,775 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-20 23:49:20,779 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-20 23:49:20,781 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-20 23:49:20,781 INFO L276 PluginConnector]: CDTParser initialized [2018-01-20 23:49:20,782 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero3_false-valid-deref-write.c [2018-01-20 23:49:20,886 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-20 23:49:20,891 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-20 23:49:20,892 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-20 23:49:20,892 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-20 23:49:20,897 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-20 23:49:20,898 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.01 11:49:20" (1/1) ... [2018-01-20 23:49:20,900 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5eb77e4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:20, skipping insertion in model container [2018-01-20 23:49:20,900 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.01 11:49:20" (1/1) ... [2018-01-20 23:49:20,916 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-20 23:49:20,935 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-20 23:49:21,052 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-20 23:49:21,066 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-20 23:49:21,070 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21 WrapperNode [2018-01-20 23:49:21,070 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-20 23:49:21,071 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-20 23:49:21,071 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-20 23:49:21,072 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-20 23:49:21,084 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (1/1) ... [2018-01-20 23:49:21,085 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (1/1) ... [2018-01-20 23:49:21,092 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (1/1) ... [2018-01-20 23:49:21,092 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (1/1) ... [2018-01-20 23:49:21,094 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (1/1) ... [2018-01-20 23:49:21,096 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (1/1) ... [2018-01-20 23:49:21,097 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (1/1) ... [2018-01-20 23:49:21,098 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-20 23:49:21,098 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-20 23:49:21,099 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-20 23:49:21,099 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-20 23:49:21,099 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-20 23:49:21,147 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-20 23:49:21,148 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-20 23:49:21,148 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-20 23:49:21,148 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-20 23:49:21,148 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-20 23:49:21,148 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-20 23:49:21,149 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-20 23:49:21,149 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-20 23:49:21,149 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-20 23:49:21,149 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-20 23:49:21,149 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-20 23:49:21,149 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-20 23:49:21,265 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-20 23:49:21,265 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.01 11:49:21 BoogieIcfgContainer [2018-01-20 23:49:21,265 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-20 23:49:21,266 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-20 23:49:21,266 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-20 23:49:21,268 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-20 23:49:21,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.01 11:49:20" (1/3) ... [2018-01-20 23:49:21,269 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@261c4342 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.01 11:49:21, skipping insertion in model container [2018-01-20 23:49:21,270 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:49:21" (2/3) ... [2018-01-20 23:49:21,270 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@261c4342 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.01 11:49:21, skipping insertion in model container [2018-01-20 23:49:21,270 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.01 11:49:21" (3/3) ... [2018-01-20 23:49:21,272 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero3_false-valid-deref-write.c [2018-01-20 23:49:21,279 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-20 23:49:21,285 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-20 23:49:21,325 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:49:21,326 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:49:21,326 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:49:21,326 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:49:21,326 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:49:21,326 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:49:21,326 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:49:21,327 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-20 23:49:21,327 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:49:21,341 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-20 23:49:21,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-20 23:49:21,346 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:21,346 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-20 23:49:21,347 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-20 23:49:21,350 INFO L82 PathProgramCache]: Analyzing trace with hash 51896, now seen corresponding path program 1 times [2018-01-20 23:49:21,352 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:21,393 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:21,393 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:21,393 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:21,394 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:21,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-20 23:49:21,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-20 23:49:21,458 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-20 23:49:21,464 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-20 23:49:21,470 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:49:21,471 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:49:21,471 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:49:21,471 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:49:21,471 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:49:21,471 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:49:21,471 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:49:21,471 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-20 23:49:21,471 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:49:21,472 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-20 23:49:21,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-20 23:49:21,473 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:21,473 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:21,473 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:21,473 INFO L82 PathProgramCache]: Analyzing trace with hash 126067280, now seen corresponding path program 1 times [2018-01-20 23:49:21,474 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:21,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:21,475 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:21,475 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:21,475 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:21,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:21,504 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:21,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,581 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-20 23:49:21,581 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-20 23:49:21,581 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-20 23:49:21,583 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-20 23:49:21,594 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-20 23:49:21,594 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-20 23:49:21,597 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 4 states. [2018-01-20 23:49:21,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:21,660 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-20 23:49:21,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-20 23:49:21,662 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-01-20 23:49:21,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:21,674 INFO L225 Difference]: With dead ends: 34 [2018-01-20 23:49:21,674 INFO L226 Difference]: Without dead ends: 20 [2018-01-20 23:49:21,759 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-20 23:49:21,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-20 23:49:21,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-20 23:49:21,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-20 23:49:21,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-20 23:49:21,794 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-20 23:49:21,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:21,795 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-20 23:49:21,795 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-20 23:49:21,795 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-20 23:49:21,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-20 23:49:21,795 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:21,795 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:21,796 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:21,796 INFO L82 PathProgramCache]: Analyzing trace with hash 763300235, now seen corresponding path program 1 times [2018-01-20 23:49:21,796 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:21,797 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:21,797 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:21,797 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:21,797 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:21,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:21,814 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:21,883 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:21,883 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:21,884 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:21,885 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 20 with the following transitions: [2018-01-20 23:49:21,887 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [16], [18], [19], [20], [21], [23], [24], [25], [26], [27], [28] [2018-01-20 23:49:21,932 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-20 23:49:21,932 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-20 23:49:22,221 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-20 23:49:22,222 INFO L268 AbstractInterpreter]: Visited 19 different actions 23 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-20 23:49:22,231 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-20 23:49:22,231 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,231 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:22,250 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:22,250 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:22,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:22,279 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:22,306 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,306 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:22,506 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:22,532 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:22,532 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:22,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:22,559 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:22,564 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,565 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:22,669 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,671 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:22,672 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-20 23:49:22,672 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:22,673 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-20 23:49:22,673 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-20 23:49:22,674 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-20 23:49:22,674 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 6 states. [2018-01-20 23:49:22,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:22,700 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-20 23:49:22,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-20 23:49:22,701 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-20 23:49:22,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:22,702 INFO L225 Difference]: With dead ends: 30 [2018-01-20 23:49:22,702 INFO L226 Difference]: Without dead ends: 21 [2018-01-20 23:49:22,703 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-20 23:49:22,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-20 23:49:22,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-20 23:49:22,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-20 23:49:22,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-20 23:49:22,708 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-20 23:49:22,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:22,708 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-20 23:49:22,709 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-20 23:49:22,709 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-20 23:49:22,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-20 23:49:22,710 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:22,710 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:22,710 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:22,710 INFO L82 PathProgramCache]: Analyzing trace with hash -957314640, now seen corresponding path program 2 times [2018-01-20 23:49:22,710 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:22,712 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:22,712 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:22,712 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:22,712 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:22,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:22,726 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:22,794 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,794 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,794 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:22,794 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:22,795 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:22,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:22,795 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:22,803 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:22,804 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:22,820 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,824 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:22,825 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:22,827 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:22,854 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:22,854 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,090 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,122 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:23,126 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:23,126 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:23,152 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:23,160 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:23,166 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:23,169 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:23,174 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,175 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,256 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,258 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:23,258 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-20 23:49:23,258 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:23,259 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-20 23:49:23,259 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-20 23:49:23,259 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-20 23:49:23,260 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 7 states. [2018-01-20 23:49:23,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:23,290 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-20 23:49:23,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-20 23:49:23,293 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-01-20 23:49:23,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:23,294 INFO L225 Difference]: With dead ends: 31 [2018-01-20 23:49:23,294 INFO L226 Difference]: Without dead ends: 22 [2018-01-20 23:49:23,295 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 73 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-20 23:49:23,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-20 23:49:23,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-20 23:49:23,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-20 23:49:23,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-20 23:49:23,308 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-20 23:49:23,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:23,309 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-20 23:49:23,309 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-20 23:49:23,309 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-20 23:49:23,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-20 23:49:23,310 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:23,310 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:23,311 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:23,311 INFO L82 PathProgramCache]: Analyzing trace with hash 1538199083, now seen corresponding path program 3 times [2018-01-20 23:49:23,311 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:23,312 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:23,312 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:23,312 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:23,313 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:23,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:23,324 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:23,378 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,378 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,378 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:23,379 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:23,379 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:23,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,379 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:23,384 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:23,384 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:23,394 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:23,397 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:23,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:23,399 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:23,401 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:23,427 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,428 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,522 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,543 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,543 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:23,546 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:23,546 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:23,557 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:23,566 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:23,573 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:23,579 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:23,582 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:23,585 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,586 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,674 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,681 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:23,681 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-20 23:49:23,681 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:23,682 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-20 23:49:23,682 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-20 23:49:23,682 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-20 23:49:23,682 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 8 states. [2018-01-20 23:49:23,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:23,708 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-20 23:49:23,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-20 23:49:23,708 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-01-20 23:49:23,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:23,709 INFO L225 Difference]: With dead ends: 32 [2018-01-20 23:49:23,709 INFO L226 Difference]: Without dead ends: 23 [2018-01-20 23:49:23,709 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-20 23:49:23,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-20 23:49:23,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-20 23:49:23,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-20 23:49:23,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-20 23:49:23,713 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-20 23:49:23,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:23,714 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-20 23:49:23,714 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-20 23:49:23,714 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-20 23:49:23,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-20 23:49:23,715 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:23,715 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:23,715 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:23,715 INFO L82 PathProgramCache]: Analyzing trace with hash 1589713168, now seen corresponding path program 4 times [2018-01-20 23:49:23,715 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:23,716 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:23,716 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:23,717 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:23,717 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:23,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:23,728 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:23,773 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:23,773 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:23,773 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:23,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:23,779 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:23,779 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:23,789 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:23,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:23,798 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,798 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:23,896 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,916 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:23,916 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:23,920 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:23,921 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:23,943 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:23,947 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:23,953 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:23,953 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:24,008 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,010 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:24,010 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-20 23:49:24,010 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:24,011 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-20 23:49:24,011 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-20 23:49:24,011 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-20 23:49:24,011 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 9 states. [2018-01-20 23:49:24,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:24,067 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-20 23:49:24,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-20 23:49:24,067 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-01-20 23:49:24,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:24,068 INFO L225 Difference]: With dead ends: 33 [2018-01-20 23:49:24,068 INFO L226 Difference]: Without dead ends: 24 [2018-01-20 23:49:24,069 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-20 23:49:24,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-20 23:49:24,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-20 23:49:24,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-20 23:49:24,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-20 23:49:24,073 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-20 23:49:24,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:24,073 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-20 23:49:24,073 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-20 23:49:24,073 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-20 23:49:24,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-20 23:49:24,074 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:24,074 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:24,075 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:24,075 INFO L82 PathProgramCache]: Analyzing trace with hash -1108317493, now seen corresponding path program 5 times [2018-01-20 23:49:24,075 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:24,076 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,076 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:24,076 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,076 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:24,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:24,088 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:24,150 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,150 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,150 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:24,150 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:24,150 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:24,150 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,150 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:24,156 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:24,156 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:24,160 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,162 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,162 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,167 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,168 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:24,170 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:24,182 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,182 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:24,312 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,333 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,333 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:24,336 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:24,336 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:24,341 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,343 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,348 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,359 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:24,366 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:24,369 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:24,373 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,373 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:24,424 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,427 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:24,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-20 23:49:24,427 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:24,427 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-20 23:49:24,428 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-20 23:49:24,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-20 23:49:24,428 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 10 states. [2018-01-20 23:49:24,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:24,452 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-20 23:49:24,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-20 23:49:24,453 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 23 [2018-01-20 23:49:24,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:24,454 INFO L225 Difference]: With dead ends: 34 [2018-01-20 23:49:24,454 INFO L226 Difference]: Without dead ends: 25 [2018-01-20 23:49:24,454 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-20 23:49:24,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-20 23:49:24,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-20 23:49:24,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-20 23:49:24,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-20 23:49:24,457 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-20 23:49:24,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:24,458 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-20 23:49:24,458 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-20 23:49:24,458 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-20 23:49:24,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-20 23:49:24,458 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:24,458 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:24,458 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:24,459 INFO L82 PathProgramCache]: Analyzing trace with hash 1152077936, now seen corresponding path program 6 times [2018-01-20 23:49:24,459 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:24,459 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,459 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:24,460 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,460 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:24,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:24,469 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:24,561 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,561 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,561 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:24,561 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:24,562 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:24,562 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,562 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:24,569 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:24,569 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:24,577 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:24,587 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:24,592 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:24,606 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:24,615 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:24,617 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:24,627 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,627 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:24,785 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:24,806 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:24,810 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:24,810 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:24,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:24,828 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:24,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:24,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:24,851 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:24,855 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:24,861 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,862 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:24,966 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:24,967 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:24,968 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-20 23:49:24,968 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:24,968 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-20 23:49:24,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-20 23:49:24,969 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-20 23:49:24,969 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 11 states. [2018-01-20 23:49:24,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:24,990 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-20 23:49:24,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-20 23:49:24,991 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 24 [2018-01-20 23:49:24,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:24,991 INFO L225 Difference]: With dead ends: 35 [2018-01-20 23:49:24,991 INFO L226 Difference]: Without dead ends: 26 [2018-01-20 23:49:24,992 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 85 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-20 23:49:24,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-20 23:49:24,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-20 23:49:24,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-20 23:49:24,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-20 23:49:24,996 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-20 23:49:24,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:24,996 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-20 23:49:24,996 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-20 23:49:24,996 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-20 23:49:24,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-20 23:49:24,997 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:24,997 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:24,998 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:24,998 INFO L82 PathProgramCache]: Analyzing trace with hash -1790107797, now seen corresponding path program 7 times [2018-01-20 23:49:24,998 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:24,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,999 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:24,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:24,999 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:25,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:25,010 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:25,081 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:25,081 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:25,081 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:25,081 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:25,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:25,081 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:25,089 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:25,090 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:25,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:25,103 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:25,116 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,116 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:25,291 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,311 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:25,312 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:25,316 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:25,316 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:25,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:25,336 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:25,342 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,342 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:25,400 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,402 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:25,402 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-20 23:49:25,402 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:25,403 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-20 23:49:25,403 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-20 23:49:25,403 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-20 23:49:25,403 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 12 states. [2018-01-20 23:49:25,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:25,446 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-20 23:49:25,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-20 23:49:25,446 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 25 [2018-01-20 23:49:25,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:25,447 INFO L225 Difference]: With dead ends: 36 [2018-01-20 23:49:25,447 INFO L226 Difference]: Without dead ends: 27 [2018-01-20 23:49:25,448 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-20 23:49:25,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-20 23:49:25,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-20 23:49:25,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-20 23:49:25,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-20 23:49:25,450 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-20 23:49:25,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:25,451 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-20 23:49:25,451 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-20 23:49:25,451 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-20 23:49:25,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-20 23:49:25,451 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:25,452 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:25,452 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:25,452 INFO L82 PathProgramCache]: Analyzing trace with hash 1491414992, now seen corresponding path program 8 times [2018-01-20 23:49:25,452 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:25,453 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:25,453 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:25,453 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:25,453 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:25,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:25,462 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:25,604 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:25,604 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:25,604 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:25,605 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:25,605 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:25,605 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:25,613 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:25,614 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:25,622 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:25,625 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:25,626 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:25,628 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:25,638 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,638 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:25,871 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,891 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:25,891 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:25,894 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:25,894 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:25,904 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:25,912 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:25,919 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:25,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:25,926 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:25,926 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:26,011 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,014 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:26,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-20 23:49:26,014 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:26,014 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-20 23:49:26,014 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-20 23:49:26,015 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-20 23:49:26,015 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 13 states. [2018-01-20 23:49:26,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:26,063 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-20 23:49:26,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-20 23:49:26,063 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-01-20 23:49:26,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:26,064 INFO L225 Difference]: With dead ends: 37 [2018-01-20 23:49:26,064 INFO L226 Difference]: Without dead ends: 28 [2018-01-20 23:49:26,064 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-20 23:49:26,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-20 23:49:26,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-20 23:49:26,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-20 23:49:26,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-20 23:49:26,067 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-20 23:49:26,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:26,068 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-20 23:49:26,068 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-20 23:49:26,068 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-20 23:49:26,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-20 23:49:26,068 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:26,068 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:26,068 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:26,068 INFO L82 PathProgramCache]: Analyzing trace with hash 139406347, now seen corresponding path program 9 times [2018-01-20 23:49:26,069 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:26,069 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:26,069 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:26,069 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:26,069 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:26,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:26,079 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:26,154 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,155 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:26,155 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:26,155 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:26,155 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:26,155 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:26,155 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:26,160 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:26,160 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:26,166 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,168 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,170 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,171 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,173 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,174 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,175 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:26,176 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:26,190 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,191 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:26,474 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:26,495 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:26,498 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:26,498 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:26,507 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,514 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,522 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,530 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,539 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,549 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:26,556 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:26,559 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:26,563 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,563 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:26,639 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,641 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:26,641 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-20 23:49:26,641 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:26,641 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-20 23:49:26,641 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-20 23:49:26,642 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-20 23:49:26,642 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 14 states. [2018-01-20 23:49:26,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:26,667 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-20 23:49:26,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-20 23:49:26,667 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 27 [2018-01-20 23:49:26,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:26,668 INFO L225 Difference]: With dead ends: 38 [2018-01-20 23:49:26,668 INFO L226 Difference]: Without dead ends: 29 [2018-01-20 23:49:26,669 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-20 23:49:26,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-20 23:49:26,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-20 23:49:26,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-20 23:49:26,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-20 23:49:26,673 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-20 23:49:26,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:26,673 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-20 23:49:26,673 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-20 23:49:26,673 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-20 23:49:26,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-20 23:49:26,674 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:26,674 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:26,674 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:26,675 INFO L82 PathProgramCache]: Analyzing trace with hash 1176811312, now seen corresponding path program 10 times [2018-01-20 23:49:26,675 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:26,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:26,676 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:26,676 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:26,676 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:26,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:26,683 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:26,805 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:26,806 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:26,806 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:26,806 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:26,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:26,806 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:26,811 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:26,811 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:26,821 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:26,823 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:26,836 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:26,836 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:27,078 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,098 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,098 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:27,101 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:27,101 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:27,128 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:27,131 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:27,138 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,138 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:27,229 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,231 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:27,231 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-20 23:49:27,231 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:27,231 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-20 23:49:27,231 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-20 23:49:27,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-20 23:49:27,232 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 15 states. [2018-01-20 23:49:27,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:27,257 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-20 23:49:27,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-20 23:49:27,257 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 28 [2018-01-20 23:49:27,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:27,258 INFO L225 Difference]: With dead ends: 39 [2018-01-20 23:49:27,258 INFO L226 Difference]: Without dead ends: 30 [2018-01-20 23:49:27,258 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 97 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-20 23:49:27,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-20 23:49:27,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-20 23:49:27,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-20 23:49:27,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-20 23:49:27,261 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-20 23:49:27,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:27,261 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-20 23:49:27,261 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-20 23:49:27,261 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-20 23:49:27,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-20 23:49:27,262 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:27,262 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:27,262 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:27,262 INFO L82 PathProgramCache]: Analyzing trace with hash -1023373141, now seen corresponding path program 11 times [2018-01-20 23:49:27,262 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:27,262 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:27,263 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:27,263 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:27,263 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:27,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:27,270 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:27,351 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,352 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:27,352 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:27,352 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:27,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,352 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:27,357 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:27,357 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:27,361 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,362 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,363 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,364 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,364 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,365 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,369 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,371 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:27,372 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:27,379 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,379 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:27,634 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,654 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,654 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:27,657 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:27,657 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:27,661 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,663 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,666 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,670 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,675 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,679 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:27,697 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:27,700 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:27,705 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,705 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:27,798 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,800 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:27,800 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-20 23:49:27,800 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:27,801 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-20 23:49:27,801 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-20 23:49:27,802 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-20 23:49:27,802 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 16 states. [2018-01-20 23:49:27,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:27,832 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-20 23:49:27,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-20 23:49:27,833 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 29 [2018-01-20 23:49:27,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:27,836 INFO L225 Difference]: With dead ends: 40 [2018-01-20 23:49:27,836 INFO L226 Difference]: Without dead ends: 31 [2018-01-20 23:49:27,837 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-20 23:49:27,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-20 23:49:27,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-20 23:49:27,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-20 23:49:27,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-20 23:49:27,841 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-20 23:49:27,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:27,841 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-20 23:49:27,841 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-20 23:49:27,842 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-20 23:49:27,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-20 23:49:27,842 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:27,842 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:27,842 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:27,842 INFO L82 PathProgramCache]: Analyzing trace with hash -509614448, now seen corresponding path program 12 times [2018-01-20 23:49:27,843 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:27,843 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:27,843 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:27,843 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:27,843 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:27,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:27,852 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:27,938 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,938 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,938 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:27,938 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:27,938 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:27,938 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:27,938 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:27,943 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:27,943 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:27,950 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:27,952 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:27,953 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:27,954 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:27,955 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:27,956 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:27,958 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:27,958 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:27,959 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:27,967 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:27,967 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:28,264 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,284 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:28,284 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:28,287 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:28,287 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:28,296 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,303 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,311 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,319 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,327 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,336 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:28,353 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:28,355 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:28,359 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,360 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:28,451 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,453 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:28,453 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-20 23:49:28,453 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:28,453 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-20 23:49:28,454 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-20 23:49:28,454 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-20 23:49:28,454 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 17 states. [2018-01-20 23:49:28,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:28,489 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-20 23:49:28,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-20 23:49:28,489 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 30 [2018-01-20 23:49:28,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:28,490 INFO L225 Difference]: With dead ends: 41 [2018-01-20 23:49:28,490 INFO L226 Difference]: Without dead ends: 32 [2018-01-20 23:49:28,491 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 103 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-20 23:49:28,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-20 23:49:28,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-20 23:49:28,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-20 23:49:28,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-20 23:49:28,494 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-20 23:49:28,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:28,495 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-20 23:49:28,495 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-20 23:49:28,495 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-20 23:49:28,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-20 23:49:28,496 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:28,496 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:28,496 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:28,496 INFO L82 PathProgramCache]: Analyzing trace with hash -1762964149, now seen corresponding path program 13 times [2018-01-20 23:49:28,496 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:28,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:28,497 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:28,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:28,497 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:28,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:28,506 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:28,645 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:28,645 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:28,645 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:28,645 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:28,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:28,645 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:28,653 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:28,654 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:28,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:28,666 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:28,676 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:28,676 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:29,131 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:29,152 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:29,154 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:29,154 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:29,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:29,177 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:29,182 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,182 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:29,300 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,301 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:29,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-20 23:49:29,301 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:29,302 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-20 23:49:29,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-20 23:49:29,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-20 23:49:29,302 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 18 states. [2018-01-20 23:49:29,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:29,341 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-20 23:49:29,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-20 23:49:29,341 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 31 [2018-01-20 23:49:29,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:29,342 INFO L225 Difference]: With dead ends: 42 [2018-01-20 23:49:29,342 INFO L226 Difference]: Without dead ends: 33 [2018-01-20 23:49:29,342 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-20 23:49:29,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-20 23:49:29,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-20 23:49:29,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-20 23:49:29,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-20 23:49:29,345 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-20 23:49:29,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:29,345 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-20 23:49:29,345 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-20 23:49:29,345 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-20 23:49:29,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-20 23:49:29,345 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:29,345 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:29,346 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:29,346 INFO L82 PathProgramCache]: Analyzing trace with hash -1962099216, now seen corresponding path program 14 times [2018-01-20 23:49:29,346 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:29,346 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:29,346 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:29,346 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:29,347 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:29,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:29,355 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:29,495 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:29,495 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:29,495 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:29,495 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:29,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:29,496 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:29,515 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:29,515 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:29,523 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:29,527 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:29,528 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:29,530 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:29,557 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,558 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:29,920 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,940 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:29,941 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:29,944 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:29,944 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:29,956 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:29,970 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:29,984 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:29,988 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:29,993 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:29,993 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:30,125 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:30,127 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:30,127 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-20 23:49:30,127 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:30,127 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-20 23:49:30,128 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-20 23:49:30,128 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-20 23:49:30,128 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 19 states. [2018-01-20 23:49:30,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:30,196 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-20 23:49:30,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-20 23:49:30,197 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 32 [2018-01-20 23:49:30,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:30,197 INFO L225 Difference]: With dead ends: 43 [2018-01-20 23:49:30,197 INFO L226 Difference]: Without dead ends: 34 [2018-01-20 23:49:30,198 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 109 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-20 23:49:30,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-20 23:49:30,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-20 23:49:30,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-20 23:49:30,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-20 23:49:30,202 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-20 23:49:30,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:30,202 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-20 23:49:30,202 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-20 23:49:30,202 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-20 23:49:30,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-20 23:49:30,203 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:30,203 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:30,203 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:30,204 INFO L82 PathProgramCache]: Analyzing trace with hash 454648299, now seen corresponding path program 15 times [2018-01-20 23:49:30,204 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:30,204 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:30,205 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:30,205 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:30,205 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:30,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:30,213 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:30,492 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:30,493 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:30,493 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:30,493 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:30,493 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:30,493 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:30,493 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:30,502 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:30,502 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:30,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,513 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,515 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,517 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,518 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,519 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,521 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,522 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:30,522 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:30,524 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:30,535 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:30,535 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:31,337 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,358 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:31,358 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:31,362 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:31,362 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:31,373 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,380 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,389 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,421 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,436 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:31,472 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:31,476 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:31,483 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,483 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:31,620 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,621 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:31,621 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-20 23:49:31,621 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:31,621 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-20 23:49:31,622 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-20 23:49:31,622 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-20 23:49:31,622 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 20 states. [2018-01-20 23:49:31,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:31,648 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-20 23:49:31,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-20 23:49:31,648 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 33 [2018-01-20 23:49:31,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:31,648 INFO L225 Difference]: With dead ends: 44 [2018-01-20 23:49:31,648 INFO L226 Difference]: Without dead ends: 35 [2018-01-20 23:49:31,649 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-20 23:49:31,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-20 23:49:31,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-20 23:49:31,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-20 23:49:31,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-20 23:49:31,651 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-20 23:49:31,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:31,652 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-20 23:49:31,652 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-20 23:49:31,652 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-20 23:49:31,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-20 23:49:31,652 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:31,652 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:31,652 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:31,652 INFO L82 PathProgramCache]: Analyzing trace with hash -1935590064, now seen corresponding path program 16 times [2018-01-20 23:49:31,653 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:31,653 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:31,653 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:31,653 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:31,653 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:31,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:31,660 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:31,813 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:31,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:31,814 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:31,814 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:31,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:31,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:31,822 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:31,822 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:31,843 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:31,845 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:31,856 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:31,856 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:32,381 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:32,401 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:32,402 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:32,405 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:32,405 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:32,438 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:32,441 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:32,448 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:32,448 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:32,577 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:32,578 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:32,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-20 23:49:32,578 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:32,579 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-20 23:49:32,579 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-20 23:49:32,579 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-20 23:49:32,579 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 21 states. [2018-01-20 23:49:32,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:32,612 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-20 23:49:32,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-20 23:49:32,612 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 34 [2018-01-20 23:49:32,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:32,613 INFO L225 Difference]: With dead ends: 45 [2018-01-20 23:49:32,613 INFO L226 Difference]: Without dead ends: 36 [2018-01-20 23:49:32,614 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 115 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-20 23:49:32,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-20 23:49:32,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-20 23:49:32,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-20 23:49:32,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-20 23:49:32,618 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-20 23:49:32,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:32,618 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-20 23:49:32,618 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-20 23:49:32,618 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-20 23:49:32,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-20 23:49:32,619 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:32,619 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:32,619 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:32,620 INFO L82 PathProgramCache]: Analyzing trace with hash 1276432011, now seen corresponding path program 17 times [2018-01-20 23:49:32,620 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:32,620 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:32,621 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:32,621 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:32,621 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:32,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:32,630 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:32,809 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:32,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:32,809 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:32,809 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:32,809 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:32,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:32,809 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:32,816 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:32,816 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:32,820 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,821 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,822 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,823 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,823 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,824 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,826 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,827 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,832 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:32,833 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:32,834 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:32,844 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:32,845 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:33,318 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,338 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:33,338 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:33,341 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:33,341 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:33,345 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,346 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,350 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,353 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,357 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,361 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,366 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,371 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,376 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,387 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:33,396 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:33,399 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:33,403 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,404 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:33,599 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,600 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:33,600 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-20 23:49:33,600 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:33,600 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-20 23:49:33,600 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-20 23:49:33,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-20 23:49:33,601 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 22 states. [2018-01-20 23:49:33,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:33,626 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-20 23:49:33,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-20 23:49:33,626 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 35 [2018-01-20 23:49:33,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:33,627 INFO L225 Difference]: With dead ends: 46 [2018-01-20 23:49:33,627 INFO L226 Difference]: Without dead ends: 37 [2018-01-20 23:49:33,628 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-20 23:49:33,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-20 23:49:33,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-20 23:49:33,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-20 23:49:33,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-20 23:49:33,632 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-20 23:49:33,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:33,632 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-20 23:49:33,632 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-20 23:49:33,632 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-20 23:49:33,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-20 23:49:33,633 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:33,633 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:33,633 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:33,633 INFO L82 PathProgramCache]: Analyzing trace with hash 2064868528, now seen corresponding path program 18 times [2018-01-20 23:49:33,634 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:33,634 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:33,634 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:33,635 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:33,635 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:33,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:33,642 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:33,801 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,801 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:33,801 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:33,801 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:33,801 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:33,801 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:33,801 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:33,806 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:33,806 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:33,816 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,818 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,819 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,822 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,825 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,828 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,829 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:33,830 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:33,831 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:33,840 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:33,840 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:34,373 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,393 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:34,393 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:34,396 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:34,396 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:34,406 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,413 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,420 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,429 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,437 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,446 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,455 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,465 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:34,495 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:34,498 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:34,503 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,503 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:34,635 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,636 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:34,636 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-20 23:49:34,636 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:34,637 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-20 23:49:34,637 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-20 23:49:34,637 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-20 23:49:34,637 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 23 states. [2018-01-20 23:49:34,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:34,672 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-20 23:49:34,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-20 23:49:34,672 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 36 [2018-01-20 23:49:34,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:34,673 INFO L225 Difference]: With dead ends: 47 [2018-01-20 23:49:34,673 INFO L226 Difference]: Without dead ends: 38 [2018-01-20 23:49:34,674 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 121 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-20 23:49:34,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-20 23:49:34,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-20 23:49:34,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-20 23:49:34,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-20 23:49:34,678 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-20 23:49:34,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:34,679 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-20 23:49:34,679 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-20 23:49:34,679 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-20 23:49:34,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-20 23:49:34,680 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:34,680 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:34,680 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:34,680 INFO L82 PathProgramCache]: Analyzing trace with hash 736596779, now seen corresponding path program 19 times [2018-01-20 23:49:34,680 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:34,681 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:34,681 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:34,681 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:34,681 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:34,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:34,689 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:34,873 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,874 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:34,874 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:34,874 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:34,874 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:34,874 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:34,874 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:34,879 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:34,879 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:34,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:34,892 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:34,899 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:34,899 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:35,471 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:35,490 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:35,490 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:35,493 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:35,493 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:35,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:35,519 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:35,526 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:35,526 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:35,669 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:35,670 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:35,670 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-20 23:49:35,670 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:35,670 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-20 23:49:35,670 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-20 23:49:35,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-20 23:49:35,671 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 24 states. [2018-01-20 23:49:35,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:35,704 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-20 23:49:35,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-20 23:49:35,705 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 37 [2018-01-20 23:49:35,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:35,705 INFO L225 Difference]: With dead ends: 48 [2018-01-20 23:49:35,705 INFO L226 Difference]: Without dead ends: 39 [2018-01-20 23:49:35,706 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-20 23:49:35,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-20 23:49:35,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-20 23:49:35,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-20 23:49:35,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-20 23:49:35,708 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-20 23:49:35,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:35,708 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-20 23:49:35,708 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-20 23:49:35,708 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-20 23:49:35,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-20 23:49:35,709 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:35,709 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:35,709 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:35,709 INFO L82 PathProgramCache]: Analyzing trace with hash -1785121776, now seen corresponding path program 20 times [2018-01-20 23:49:35,709 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:35,709 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:35,709 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:35,710 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:35,710 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:35,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:35,715 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:35,890 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:35,890 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:35,890 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:35,890 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:35,890 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:35,890 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:35,891 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:35,896 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:35,896 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:35,902 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,906 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:35,908 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:35,909 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:35,920 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:35,920 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:36,550 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:36,569 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:36,570 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:36,572 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:36,573 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:36,582 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:36,593 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:36,604 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:36,608 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:36,615 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:36,615 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:36,764 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:36,765 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:36,765 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-20 23:49:36,765 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:36,765 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-20 23:49:36,766 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-20 23:49:36,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-20 23:49:36,767 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 25 states. [2018-01-20 23:49:36,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:36,821 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-20 23:49:36,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-20 23:49:36,821 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 38 [2018-01-20 23:49:36,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:36,822 INFO L225 Difference]: With dead ends: 49 [2018-01-20 23:49:36,822 INFO L226 Difference]: Without dead ends: 40 [2018-01-20 23:49:36,822 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 127 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-20 23:49:36,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-20 23:49:36,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-20 23:49:36,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-20 23:49:36,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-20 23:49:36,824 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-20 23:49:36,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:36,825 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-20 23:49:36,825 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-20 23:49:36,825 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-20 23:49:36,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-20 23:49:36,826 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:36,826 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:36,826 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:36,826 INFO L82 PathProgramCache]: Analyzing trace with hash 1645981643, now seen corresponding path program 21 times [2018-01-20 23:49:36,826 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:36,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:36,827 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:36,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:36,827 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:36,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:36,834 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:37,025 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:37,025 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:37,025 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:37,025 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:37,025 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:37,025 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:37,025 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:37,030 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:37,031 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:37,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,043 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,049 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:37,050 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:37,058 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:37,059 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:37,727 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:37,747 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:37,747 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:37,750 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:37,750 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:37,759 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,774 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,790 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,818 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,848 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,859 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,870 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,881 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:37,890 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:37,893 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:37,898 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:37,898 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:38,063 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:38,064 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:38,064 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-20 23:49:38,064 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:38,064 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-20 23:49:38,064 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-20 23:49:38,065 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1130, Invalid=1222, Unknown=0, NotChecked=0, Total=2352 [2018-01-20 23:49:38,065 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 26 states. [2018-01-20 23:49:38,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:38,093 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-20 23:49:38,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-20 23:49:38,093 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 39 [2018-01-20 23:49:38,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:38,093 INFO L225 Difference]: With dead ends: 50 [2018-01-20 23:49:38,093 INFO L226 Difference]: Without dead ends: 41 [2018-01-20 23:49:38,094 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1157, Invalid=1293, Unknown=0, NotChecked=0, Total=2450 [2018-01-20 23:49:38,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-20 23:49:38,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-20 23:49:38,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-20 23:49:38,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-20 23:49:38,098 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-20 23:49:38,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:38,098 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-20 23:49:38,098 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-20 23:49:38,098 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-20 23:49:38,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-20 23:49:38,099 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:38,099 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:38,099 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:38,099 INFO L82 PathProgramCache]: Analyzing trace with hash 636005232, now seen corresponding path program 22 times [2018-01-20 23:49:38,099 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:38,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:38,100 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:38,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:38,100 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:38,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:38,108 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:38,286 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:38,286 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:38,286 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:38,287 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:38,287 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:38,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:38,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:38,291 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:38,292 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:38,304 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:38,305 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:38,314 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:38,314 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:39,083 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:39,103 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:39,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:39,106 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:39,106 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:39,139 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:39,142 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:39,147 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:39,147 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:39,309 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:39,310 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:39,310 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-20 23:49:39,310 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:39,310 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-20 23:49:39,310 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-20 23:49:39,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1227, Invalid=1323, Unknown=0, NotChecked=0, Total=2550 [2018-01-20 23:49:39,311 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 27 states. [2018-01-20 23:49:39,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:39,344 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-20 23:49:39,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-20 23:49:39,344 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 40 [2018-01-20 23:49:39,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:39,344 INFO L225 Difference]: With dead ends: 51 [2018-01-20 23:49:39,344 INFO L226 Difference]: Without dead ends: 42 [2018-01-20 23:49:39,345 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 133 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1255, Invalid=1397, Unknown=0, NotChecked=0, Total=2652 [2018-01-20 23:49:39,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-20 23:49:39,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-20 23:49:39,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-20 23:49:39,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-20 23:49:39,348 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-20 23:49:39,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:39,348 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-20 23:49:39,348 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-20 23:49:39,348 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-20 23:49:39,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-20 23:49:39,348 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:39,348 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:39,349 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:39,349 INFO L82 PathProgramCache]: Analyzing trace with hash -608492437, now seen corresponding path program 23 times [2018-01-20 23:49:39,349 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:39,349 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:39,349 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:39,349 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:39,349 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:39,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:39,356 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:39,587 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:39,587 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:39,588 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:39,588 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:39,588 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:39,588 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:39,588 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:39,593 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:39,593 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:39,597 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,598 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,599 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,600 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,600 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,601 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,602 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,603 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,603 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,605 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,606 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:39,612 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:39,614 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:39,622 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:39,622 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:40,395 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:40,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:40,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:40,417 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:40,417 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:40,422 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,423 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,426 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,449 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,454 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,467 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,474 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,486 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:40,496 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:40,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:40,504 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:40,505 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:40,704 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:40,705 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:40,706 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-20 23:49:40,706 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:40,706 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-20 23:49:40,706 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-20 23:49:40,707 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1328, Invalid=1428, Unknown=0, NotChecked=0, Total=2756 [2018-01-20 23:49:40,707 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 28 states. [2018-01-20 23:49:40,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:40,738 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-20 23:49:40,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-20 23:49:40,738 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 41 [2018-01-20 23:49:40,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:40,739 INFO L225 Difference]: With dead ends: 52 [2018-01-20 23:49:40,739 INFO L226 Difference]: Without dead ends: 43 [2018-01-20 23:49:40,740 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1357, Invalid=1505, Unknown=0, NotChecked=0, Total=2862 [2018-01-20 23:49:40,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-20 23:49:40,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-20 23:49:40,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-20 23:49:40,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-20 23:49:40,743 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-20 23:49:40,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:40,743 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-20 23:49:40,743 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-20 23:49:40,743 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-20 23:49:40,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-20 23:49:40,744 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:40,744 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:40,744 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:40,744 INFO L82 PathProgramCache]: Analyzing trace with hash -533214512, now seen corresponding path program 24 times [2018-01-20 23:49:40,744 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:40,745 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:40,745 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:40,745 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:40,745 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:40,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:40,754 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:40,960 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:40,960 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:40,960 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:40,960 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:40,960 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:40,960 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:40,960 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:40,966 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:40,966 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:40,972 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,974 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,975 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,976 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,977 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,978 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,979 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,980 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,981 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,982 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,983 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,984 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,985 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:40,986 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:40,987 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:40,996 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:40,996 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:41,822 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:41,842 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:41,842 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:41,845 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:41,845 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:41,854 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,861 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,869 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,878 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,887 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,897 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,907 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,918 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,929 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,940 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,952 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,965 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,978 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:41,987 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:41,991 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:41,996 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:41,996 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:42,186 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:42,187 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:42,187 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-20 23:49:42,187 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:42,188 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-20 23:49:42,188 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-20 23:49:42,188 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1433, Invalid=1537, Unknown=0, NotChecked=0, Total=2970 [2018-01-20 23:49:42,189 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 29 states. [2018-01-20 23:49:42,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:42,233 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-20 23:49:42,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-20 23:49:42,233 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 42 [2018-01-20 23:49:42,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:42,234 INFO L225 Difference]: With dead ends: 53 [2018-01-20 23:49:42,234 INFO L226 Difference]: Without dead ends: 44 [2018-01-20 23:49:42,234 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 139 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1463, Invalid=1617, Unknown=0, NotChecked=0, Total=3080 [2018-01-20 23:49:42,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-20 23:49:42,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-20 23:49:42,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-20 23:49:42,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-20 23:49:42,237 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-20 23:49:42,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:42,237 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-20 23:49:42,237 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-20 23:49:42,237 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-20 23:49:42,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-20 23:49:42,237 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:42,237 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:42,238 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:42,238 INFO L82 PathProgramCache]: Analyzing trace with hash 1800401163, now seen corresponding path program 25 times [2018-01-20 23:49:42,238 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:42,238 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:42,238 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:42,238 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:42,238 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:42,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:42,246 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:42,483 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:42,484 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:42,484 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:42,484 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:42,484 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:42,484 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:42,484 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:42,489 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:42,489 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:42,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:42,502 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:42,511 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:42,511 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:43,420 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:43,440 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:43,443 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:43,443 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:43,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:43,473 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:43,478 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,478 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:43,677 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,678 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:43,678 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-20 23:49:43,678 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:43,678 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-20 23:49:43,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-20 23:49:43,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1542, Invalid=1650, Unknown=0, NotChecked=0, Total=3192 [2018-01-20 23:49:43,679 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 30 states. [2018-01-20 23:49:43,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:43,713 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-20 23:49:43,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-20 23:49:43,714 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 43 [2018-01-20 23:49:43,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:43,714 INFO L225 Difference]: With dead ends: 54 [2018-01-20 23:49:43,714 INFO L226 Difference]: Without dead ends: 45 [2018-01-20 23:49:43,715 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 142 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1573, Invalid=1733, Unknown=0, NotChecked=0, Total=3306 [2018-01-20 23:49:43,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-20 23:49:43,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-20 23:49:43,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-20 23:49:43,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-20 23:49:43,717 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-20 23:49:43,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:43,717 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-20 23:49:43,717 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-20 23:49:43,717 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-20 23:49:43,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-20 23:49:43,718 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:43,718 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:43,718 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:43,718 INFO L82 PathProgramCache]: Analyzing trace with hash 1128043056, now seen corresponding path program 26 times [2018-01-20 23:49:43,718 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:43,719 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:43,719 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:43,719 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:43,719 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:43,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:43,726 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:43,994 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:43,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:43,994 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:43,995 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:43,995 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:43,995 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:43,995 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:44,000 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:44,001 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:44,007 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,012 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:44,013 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:44,015 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:44,023 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:44,024 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:44,973 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:44,993 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:44,993 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:44,996 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:44,996 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:45,006 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,020 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:45,033 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:45,036 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:45,042 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:45,042 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:45,255 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:45,256 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:45,257 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-20 23:49:45,257 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:45,257 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-20 23:49:45,257 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-20 23:49:45,257 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1655, Invalid=1767, Unknown=0, NotChecked=0, Total=3422 [2018-01-20 23:49:45,257 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 31 states. [2018-01-20 23:49:45,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:45,297 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-20 23:49:45,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-20 23:49:45,298 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 44 [2018-01-20 23:49:45,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:45,298 INFO L225 Difference]: With dead ends: 55 [2018-01-20 23:49:45,299 INFO L226 Difference]: Without dead ends: 46 [2018-01-20 23:49:45,299 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 145 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1687, Invalid=1853, Unknown=0, NotChecked=0, Total=3540 [2018-01-20 23:49:45,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-20 23:49:45,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-20 23:49:45,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-20 23:49:45,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-20 23:49:45,302 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-20 23:49:45,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:45,303 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-20 23:49:45,303 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-20 23:49:45,303 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-20 23:49:45,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-20 23:49:45,303 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:45,304 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:45,304 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:45,304 INFO L82 PathProgramCache]: Analyzing trace with hash 1759778219, now seen corresponding path program 27 times [2018-01-20 23:49:45,304 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:45,305 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:45,305 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:45,305 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:45,305 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:45,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:45,314 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:45,572 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:45,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:45,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:45,572 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:45,573 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:45,573 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:45,573 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:45,578 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:45,578 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:45,585 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,587 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,588 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,589 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,590 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,591 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,592 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,593 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,594 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,596 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,597 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,598 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,599 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,600 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,601 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:45,602 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:45,603 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:45,612 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:45,613 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:46,623 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:46,642 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:46,642 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:46,645 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:46,646 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:46,655 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,662 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,669 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,678 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,686 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,695 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,724 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,735 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,746 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,758 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,783 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:46,805 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:46,808 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:46,814 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:46,814 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:47,027 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:47,028 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:47,028 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-20 23:49:47,028 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:47,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-20 23:49:47,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-20 23:49:47,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1772, Invalid=1888, Unknown=0, NotChecked=0, Total=3660 [2018-01-20 23:49:47,029 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 32 states. [2018-01-20 23:49:47,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:47,071 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-20 23:49:47,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-20 23:49:47,071 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 45 [2018-01-20 23:49:47,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:47,071 INFO L225 Difference]: With dead ends: 56 [2018-01-20 23:49:47,071 INFO L226 Difference]: Without dead ends: 47 [2018-01-20 23:49:47,072 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 148 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1805, Invalid=1977, Unknown=0, NotChecked=0, Total=3782 [2018-01-20 23:49:47,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-20 23:49:47,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-20 23:49:47,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-20 23:49:47,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-20 23:49:47,075 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-20 23:49:47,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:47,075 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-20 23:49:47,075 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-20 23:49:47,075 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-20 23:49:47,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-20 23:49:47,076 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:47,076 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:47,076 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:47,076 INFO L82 PathProgramCache]: Analyzing trace with hash -131268208, now seen corresponding path program 28 times [2018-01-20 23:49:47,076 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:47,076 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:47,076 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:47,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:47,077 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:47,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:47,082 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:47,359 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:47,359 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:47,359 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:47,359 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:47,359 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:47,359 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:47,359 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:47,364 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:47,364 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:47,379 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:47,380 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:47,389 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:47,389 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:48,486 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:48,507 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:48,507 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:48,510 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:49:48,510 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:49:48,554 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:48,557 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:48,563 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:48,564 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:48,792 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:48,793 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:48,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-20 23:49:48,793 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:48,794 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-20 23:49:48,794 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-20 23:49:48,794 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1893, Invalid=2013, Unknown=0, NotChecked=0, Total=3906 [2018-01-20 23:49:48,794 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 33 states. [2018-01-20 23:49:48,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:48,859 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-20 23:49:48,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-20 23:49:48,859 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 46 [2018-01-20 23:49:48,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:48,860 INFO L225 Difference]: With dead ends: 57 [2018-01-20 23:49:48,860 INFO L226 Difference]: Without dead ends: 48 [2018-01-20 23:49:48,860 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 151 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1927, Invalid=2105, Unknown=0, NotChecked=0, Total=4032 [2018-01-20 23:49:48,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-20 23:49:48,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-20 23:49:48,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-20 23:49:48,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-20 23:49:48,862 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-20 23:49:48,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:48,862 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-20 23:49:48,862 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-20 23:49:48,863 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-20 23:49:48,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-20 23:49:48,863 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:48,863 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:48,863 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:48,863 INFO L82 PathProgramCache]: Analyzing trace with hash 1375834699, now seen corresponding path program 29 times [2018-01-20 23:49:48,863 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:48,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:48,864 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:48,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:48,864 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:48,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:48,872 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:49,221 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:49,221 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:49,221 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:49,221 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:49,222 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:49,222 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:49,222 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:49,229 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:49,229 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:49,233 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,237 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,237 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,238 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,241 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,241 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,242 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,243 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,244 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,248 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:49,249 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:49,251 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:49,260 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:49,261 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:50,414 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:50,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:50,436 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:50,439 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:49:50,439 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:50,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,449 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,452 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,456 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,464 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,469 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,475 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,481 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,487 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,494 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,501 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,508 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:50,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:50,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:50,550 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:50,550 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:50,790 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:50,791 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:50,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-20 23:49:50,791 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:50,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-20 23:49:50,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-20 23:49:50,791 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2018, Invalid=2142, Unknown=0, NotChecked=0, Total=4160 [2018-01-20 23:49:50,792 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 34 states. [2018-01-20 23:49:50,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:50,832 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-20 23:49:50,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-20 23:49:50,832 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 47 [2018-01-20 23:49:50,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:50,832 INFO L225 Difference]: With dead ends: 58 [2018-01-20 23:49:50,832 INFO L226 Difference]: Without dead ends: 49 [2018-01-20 23:49:50,833 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 154 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2053, Invalid=2237, Unknown=0, NotChecked=0, Total=4290 [2018-01-20 23:49:50,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-20 23:49:50,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-20 23:49:50,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-20 23:49:50,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-20 23:49:50,836 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-20 23:49:50,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:50,836 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-20 23:49:50,836 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-20 23:49:50,837 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-20 23:49:50,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-20 23:49:50,837 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:50,837 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:50,837 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:50,838 INFO L82 PathProgramCache]: Analyzing trace with hash 851384560, now seen corresponding path program 30 times [2018-01-20 23:49:50,838 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:50,838 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:50,838 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:50,838 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:50,839 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:50,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:50,847 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:51,368 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:51,368 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:51,368 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:51,375 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:51,375 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:51,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:51,375 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:51,382 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:51,382 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:51,390 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,392 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,393 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,395 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,396 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,397 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,399 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,400 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,401 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,403 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,404 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,406 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,407 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,409 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,411 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,413 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:51,413 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:51,415 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:51,425 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:51,425 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:52,714 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:52,733 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:52,733 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:52,736 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:49:52,737 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:49:52,746 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,753 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,760 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,777 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,786 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,816 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,837 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,861 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,873 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,886 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,900 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:49:52,910 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:52,914 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:52,920 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:52,920 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:53,239 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:53,241 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:53,241 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-20 23:49:53,241 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:53,241 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-20 23:49:53,242 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-20 23:49:53,242 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=2275, Unknown=0, NotChecked=0, Total=4422 [2018-01-20 23:49:53,242 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 35 states. [2018-01-20 23:49:53,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:53,320 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-20 23:49:53,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-20 23:49:53,320 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 48 [2018-01-20 23:49:53,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:53,321 INFO L225 Difference]: With dead ends: 59 [2018-01-20 23:49:53,321 INFO L226 Difference]: Without dead ends: 50 [2018-01-20 23:49:53,321 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2183, Invalid=2373, Unknown=0, NotChecked=0, Total=4556 [2018-01-20 23:49:53,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-20 23:49:53,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-20 23:49:53,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-20 23:49:53,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-20 23:49:53,323 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-20 23:49:53,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:53,324 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-20 23:49:53,324 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-20 23:49:53,324 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-20 23:49:53,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-20 23:49:53,324 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:53,324 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:53,324 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:53,324 INFO L82 PathProgramCache]: Analyzing trace with hash 1773299435, now seen corresponding path program 31 times [2018-01-20 23:49:53,324 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:53,325 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:53,325 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:53,325 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:53,325 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:53,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:53,332 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:53,836 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:53,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:53,836 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:53,836 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:53,836 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:53,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:53,836 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:53,841 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:53,841 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:53,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:53,856 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:53,865 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:53,865 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:55,154 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:55,174 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:55,174 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:55,177 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:55,177 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:49:55,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:55,210 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:55,217 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:55,217 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:55,480 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:55,481 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:55,481 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-20 23:49:55,481 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:55,481 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-20 23:49:55,481 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-20 23:49:55,482 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2280, Invalid=2412, Unknown=0, NotChecked=0, Total=4692 [2018-01-20 23:49:55,482 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 36 states. [2018-01-20 23:49:55,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:55,527 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-20 23:49:55,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-20 23:49:55,528 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 49 [2018-01-20 23:49:55,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:55,528 INFO L225 Difference]: With dead ends: 60 [2018-01-20 23:49:55,528 INFO L226 Difference]: Without dead ends: 51 [2018-01-20 23:49:55,529 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 160 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2317, Invalid=2513, Unknown=0, NotChecked=0, Total=4830 [2018-01-20 23:49:55,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-20 23:49:55,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-20 23:49:55,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-20 23:49:55,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-20 23:49:55,531 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-20 23:49:55,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:55,531 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-20 23:49:55,531 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-20 23:49:55,531 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-20 23:49:55,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-20 23:49:55,532 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:55,532 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:55,532 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:55,532 INFO L82 PathProgramCache]: Analyzing trace with hash 287889488, now seen corresponding path program 32 times [2018-01-20 23:49:55,532 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:55,533 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:55,533 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:49:55,533 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:55,533 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:55,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:55,542 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:55,903 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:55,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:55,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:55,903 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:55,904 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:55,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:55,904 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:55,908 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:55,908 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:55,915 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:55,921 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:55,923 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:55,924 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:55,933 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:55,934 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:57,324 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:57,344 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:57,344 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:57,348 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:49:57,348 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:49:57,358 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:57,373 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:49:57,386 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:57,390 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:57,400 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:57,401 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:57,679 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:57,680 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:49:57,680 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-20 23:49:57,680 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:49:57,680 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-20 23:49:57,681 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-20 23:49:57,681 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2417, Invalid=2553, Unknown=0, NotChecked=0, Total=4970 [2018-01-20 23:49:57,681 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 37 states. [2018-01-20 23:49:57,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:49:57,738 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-20 23:49:57,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-20 23:49:57,739 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 50 [2018-01-20 23:49:57,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:49:57,739 INFO L225 Difference]: With dead ends: 61 [2018-01-20 23:49:57,739 INFO L226 Difference]: Without dead ends: 52 [2018-01-20 23:49:57,740 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 163 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2455, Invalid=2657, Unknown=0, NotChecked=0, Total=5112 [2018-01-20 23:49:57,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-20 23:49:57,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-20 23:49:57,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-20 23:49:57,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-20 23:49:57,742 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-20 23:49:57,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:49:57,742 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-20 23:49:57,743 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-20 23:49:57,743 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-20 23:49:57,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-20 23:49:57,743 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:49:57,743 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:49:57,743 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:49:57,743 INFO L82 PathProgramCache]: Analyzing trace with hash 1484821387, now seen corresponding path program 33 times [2018-01-20 23:49:57,744 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:49:57,744 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:57,744 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:49:57,744 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:49:57,744 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:49:57,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:49:57,750 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:49:58,178 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:58,178 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:58,178 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:49:58,178 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:49:58,178 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:49:58,178 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:58,179 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:49:58,183 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:58,183 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:58,190 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,193 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,194 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,195 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,197 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,198 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,199 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,200 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,201 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,202 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,203 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,204 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,206 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,207 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,208 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,209 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:58,209 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:58,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:58,221 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:58,221 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:49:59,642 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:59,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:49:59,662 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:49:59,665 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:49:59,665 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:49:59,675 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,681 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,689 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,697 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,705 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,723 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,733 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,743 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,754 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,765 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,789 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,801 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,814 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,827 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,841 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,855 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:49:59,866 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:49:59,869 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:49:59,876 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:49:59,876 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:00,162 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:00,163 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:00,163 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-20 23:50:00,163 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:00,163 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-20 23:50:00,164 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-20 23:50:00,164 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2558, Invalid=2698, Unknown=0, NotChecked=0, Total=5256 [2018-01-20 23:50:00,164 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 38 states. [2018-01-20 23:50:00,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:00,202 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-20 23:50:00,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-20 23:50:00,202 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 51 [2018-01-20 23:50:00,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:00,203 INFO L225 Difference]: With dead ends: 62 [2018-01-20 23:50:00,203 INFO L226 Difference]: Without dead ends: 53 [2018-01-20 23:50:00,203 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 166 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2597, Invalid=2805, Unknown=0, NotChecked=0, Total=5402 [2018-01-20 23:50:00,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-20 23:50:00,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-20 23:50:00,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-20 23:50:00,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-20 23:50:00,206 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-20 23:50:00,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:00,206 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-20 23:50:00,207 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-20 23:50:00,207 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-20 23:50:00,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-20 23:50:00,207 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:00,207 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:00,208 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:00,208 INFO L82 PathProgramCache]: Analyzing trace with hash -64995408, now seen corresponding path program 34 times [2018-01-20 23:50:00,208 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:00,208 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:00,208 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:00,209 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:00,209 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:00,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:00,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:00,615 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:00,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:00,615 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:00,615 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:00,615 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:00,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:00,615 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:00,620 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:50:00,620 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:50:00,636 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:00,638 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:00,647 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:00,647 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:02,246 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:02,266 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:02,266 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:02,269 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:50:02,269 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:50:02,314 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:02,317 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:02,324 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:02,324 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:02,624 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:02,625 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:02,625 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-20 23:50:02,625 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:02,626 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-20 23:50:02,626 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-20 23:50:02,626 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2703, Invalid=2847, Unknown=0, NotChecked=0, Total=5550 [2018-01-20 23:50:02,626 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 39 states. [2018-01-20 23:50:02,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:02,673 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-20 23:50:02,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-20 23:50:02,673 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 52 [2018-01-20 23:50:02,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:02,674 INFO L225 Difference]: With dead ends: 63 [2018-01-20 23:50:02,674 INFO L226 Difference]: Without dead ends: 54 [2018-01-20 23:50:02,674 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 169 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2743, Invalid=2957, Unknown=0, NotChecked=0, Total=5700 [2018-01-20 23:50:02,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-20 23:50:02,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-20 23:50:02,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-20 23:50:02,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-20 23:50:02,677 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-20 23:50:02,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:02,677 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-20 23:50:02,677 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-20 23:50:02,677 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-20 23:50:02,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-20 23:50:02,678 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:02,678 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:02,678 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:02,678 INFO L82 PathProgramCache]: Analyzing trace with hash -864675797, now seen corresponding path program 35 times [2018-01-20 23:50:02,678 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:02,679 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:02,679 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:02,679 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:02,679 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:02,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:02,686 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:03,154 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:03,155 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:03,155 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:03,155 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:03,155 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:03,155 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:03,155 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:03,160 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:50:03,160 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:50:03,165 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,166 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,167 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,169 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,170 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,171 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,173 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,174 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,175 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,176 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,177 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,179 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,180 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,181 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,183 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,187 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:03,189 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:03,191 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:03,202 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:03,202 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:04,863 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:04,883 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:04,883 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:04,886 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:50:04,886 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:50:04,893 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,895 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,902 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,908 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,914 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,922 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,938 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,948 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,958 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,968 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,980 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:04,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,020 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,034 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,048 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,064 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,089 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:05,111 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:05,115 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:05,126 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:05,126 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:05,463 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:05,464 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:05,464 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-20 23:50:05,464 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:05,465 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-20 23:50:05,465 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-20 23:50:05,465 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2852, Invalid=3000, Unknown=0, NotChecked=0, Total=5852 [2018-01-20 23:50:05,465 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 40 states. [2018-01-20 23:50:05,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:05,516 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-20 23:50:05,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-20 23:50:05,518 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 53 [2018-01-20 23:50:05,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:05,519 INFO L225 Difference]: With dead ends: 64 [2018-01-20 23:50:05,519 INFO L226 Difference]: Without dead ends: 55 [2018-01-20 23:50:05,520 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 172 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2893, Invalid=3113, Unknown=0, NotChecked=0, Total=6006 [2018-01-20 23:50:05,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-20 23:50:05,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-20 23:50:05,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-20 23:50:05,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-20 23:50:05,523 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-20 23:50:05,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:05,523 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-20 23:50:05,524 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-20 23:50:05,524 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-20 23:50:05,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-20 23:50:05,524 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:05,524 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:05,524 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:05,524 INFO L82 PathProgramCache]: Analyzing trace with hash 115035920, now seen corresponding path program 36 times [2018-01-20 23:50:05,524 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:05,525 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:05,525 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:05,525 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:05,525 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:05,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:05,533 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:05,988 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:05,988 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:05,988 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:05,988 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:05,988 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:05,988 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:05,988 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:05,993 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:50:05,993 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:50:05,999 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,001 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,002 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,003 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,004 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,005 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,006 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,007 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,008 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,009 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,010 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,011 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,012 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,014 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,015 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,016 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,017 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,018 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,020 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:06,020 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:06,022 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:06,031 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:06,031 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:07,845 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:07,864 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:07,864 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:07,867 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:50:07,867 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:50:07,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,883 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,891 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,899 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,907 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,916 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,925 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,935 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,945 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,956 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,967 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,978 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:07,990 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:08,002 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:08,015 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:08,029 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:08,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:08,057 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:08,072 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:50:08,083 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:08,087 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:08,094 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:08,094 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:08,412 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:08,413 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:08,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-20 23:50:08,414 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:08,414 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-20 23:50:08,414 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-20 23:50:08,414 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=3157, Unknown=0, NotChecked=0, Total=6162 [2018-01-20 23:50:08,415 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 41 states. [2018-01-20 23:50:08,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:08,453 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-20 23:50:08,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-20 23:50:08,454 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 54 [2018-01-20 23:50:08,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:08,454 INFO L225 Difference]: With dead ends: 65 [2018-01-20 23:50:08,454 INFO L226 Difference]: Without dead ends: 56 [2018-01-20 23:50:08,455 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 175 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3047, Invalid=3273, Unknown=0, NotChecked=0, Total=6320 [2018-01-20 23:50:08,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-20 23:50:08,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-20 23:50:08,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-20 23:50:08,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-20 23:50:08,457 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-20 23:50:08,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:08,457 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-20 23:50:08,457 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-20 23:50:08,457 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-20 23:50:08,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-20 23:50:08,457 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:08,457 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:08,458 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:08,458 INFO L82 PathProgramCache]: Analyzing trace with hash 421328075, now seen corresponding path program 37 times [2018-01-20 23:50:08,458 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:08,458 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:08,458 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:08,458 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:08,458 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:08,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:08,467 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:08,935 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:08,935 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:08,936 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:08,936 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:08,936 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:08,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:08,936 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:08,941 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:08,941 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:50:08,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:08,957 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:08,966 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:08,967 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:10,716 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:10,735 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:10,736 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:10,739 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:10,739 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:50:10,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:10,776 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:10,783 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:10,783 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:11,118 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:11,120 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:11,120 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-20 23:50:11,120 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:11,120 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-20 23:50:11,120 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-20 23:50:11,121 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3162, Invalid=3318, Unknown=0, NotChecked=0, Total=6480 [2018-01-20 23:50:11,121 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 42 states. [2018-01-20 23:50:11,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:11,182 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-20 23:50:11,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-20 23:50:11,182 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 55 [2018-01-20 23:50:11,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:11,183 INFO L225 Difference]: With dead ends: 66 [2018-01-20 23:50:11,183 INFO L226 Difference]: Without dead ends: 57 [2018-01-20 23:50:11,183 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 178 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3205, Invalid=3437, Unknown=0, NotChecked=0, Total=6642 [2018-01-20 23:50:11,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-20 23:50:11,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-20 23:50:11,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-20 23:50:11,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-20 23:50:11,185 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-20 23:50:11,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:11,185 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-20 23:50:11,186 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-20 23:50:11,186 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-20 23:50:11,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-20 23:50:11,186 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:11,186 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:11,186 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:11,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1326450288, now seen corresponding path program 38 times [2018-01-20 23:50:11,186 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:11,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:11,187 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:50:11,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:11,187 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:11,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:11,194 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:11,788 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:11,788 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:11,788 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:11,788 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:11,788 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:11,789 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:11,789 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:11,793 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:50:11,794 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:50:11,801 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:11,808 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:11,810 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:11,812 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:11,822 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:11,822 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:13,703 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:13,723 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:13,723 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:13,726 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:50:13,726 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:50:13,736 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:13,752 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:50:13,768 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:13,772 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:13,780 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:13,780 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:14,133 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:14,135 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:50:14,135 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-20 23:50:14,135 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:50:14,135 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-20 23:50:14,135 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-20 23:50:14,136 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3323, Invalid=3483, Unknown=0, NotChecked=0, Total=6806 [2018-01-20 23:50:14,136 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 43 states. [2018-01-20 23:50:14,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:50:14,186 INFO L93 Difference]: Finished difference Result 67 states and 67 transitions. [2018-01-20 23:50:14,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-20 23:50:14,187 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 56 [2018-01-20 23:50:14,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:50:14,187 INFO L225 Difference]: With dead ends: 67 [2018-01-20 23:50:14,187 INFO L226 Difference]: Without dead ends: 58 [2018-01-20 23:50:14,187 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 181 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3367, Invalid=3605, Unknown=0, NotChecked=0, Total=6972 [2018-01-20 23:50:14,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-20 23:50:14,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-20 23:50:14,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-20 23:50:14,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-01-20 23:50:14,190 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 56 [2018-01-20 23:50:14,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:50:14,190 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-01-20 23:50:14,190 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-20 23:50:14,190 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-01-20 23:50:14,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-20 23:50:14,190 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:50:14,190 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:50:14,190 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:50:14,190 INFO L82 PathProgramCache]: Analyzing trace with hash -679532181, now seen corresponding path program 39 times [2018-01-20 23:50:14,191 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:50:14,191 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:14,191 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:50:14,191 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:50:14,191 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:50:14,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:50:14,200 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:50:14,670 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:14,671 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:14,693 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:50:14,693 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:50:14,693 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:50:14,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:14,693 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:50:14,698 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:50:14,698 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:50:14,705 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,707 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,709 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,711 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,712 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,713 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,721 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,722 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,723 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,725 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,726 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,727 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,729 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,730 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:14,730 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:14,732 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:14,743 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:14,743 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:50:14,845 WARN L143 SmtUtils]: Spent 100ms on a formula simplification that was a NOOP. DAG size: 125 [2018-01-20 23:50:16,702 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:16,723 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:50:16,723 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:50:16,726 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:50:16,726 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:50:16,738 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,748 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,761 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,771 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,789 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,800 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,810 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,821 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,833 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,845 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,856 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,882 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,896 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,910 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,941 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,957 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,974 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:16,991 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:50:17,004 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:50:17,009 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:50:17,016 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:50:17,016 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-20 23:50:17,035 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-20 23:50:17,035 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-20 23:50:17,037 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:50:17,037 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:50:17,037 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:50:17,037 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:50:17,037 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:50:17,038 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:50:17,038 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:50:17,038 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-20 23:50:17,038 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:50:17,038 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-20 23:50:17,039 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-20 23:50:17,039 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.01 11:50:17 BoogieIcfgContainer [2018-01-20 23:50:17,039 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-20 23:50:17,040 INFO L168 Benchmark]: Toolchain (without parser) took 56153.45 ms. Allocated memory was 306.7 MB in the beginning and 826.8 MB in the end (delta: 520.1 MB). Free memory was 266.0 MB in the beginning and 540.1 MB in the end (delta: -274.1 MB). Peak memory consumption was 246.0 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:17,041 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 306.7 MB. Free memory is still 271.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-20 23:50:17,041 INFO L168 Benchmark]: CACSL2BoogieTranslator took 179.07 ms. Allocated memory is still 306.7 MB. Free memory was 265.0 MB in the beginning and 258.0 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:17,041 INFO L168 Benchmark]: Boogie Preprocessor took 26.93 ms. Allocated memory is still 306.7 MB. Free memory was 258.0 MB in the beginning and 256.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:17,041 INFO L168 Benchmark]: RCFGBuilder took 166.97 ms. Allocated memory is still 306.7 MB. Free memory was 256.0 MB in the beginning and 244.3 MB in the end (delta: 11.7 MB). Peak memory consumption was 11.7 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:17,042 INFO L168 Benchmark]: TraceAbstraction took 55773.38 ms. Allocated memory was 306.7 MB in the beginning and 826.8 MB in the end (delta: 520.1 MB). Free memory was 243.3 MB in the beginning and 540.1 MB in the end (delta: -296.8 MB). Peak memory consumption was 223.3 MB. Max. memory is 5.3 GB. [2018-01-20 23:50:17,044 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 306.7 MB. Free memory is still 271.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 179.07 ms. Allocated memory is still 306.7 MB. Free memory was 265.0 MB in the beginning and 258.0 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 26.93 ms. Allocated memory is still 306.7 MB. Free memory was 258.0 MB in the beginning and 256.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 166.97 ms. Allocated memory is still 306.7 MB. Free memory was 256.0 MB in the beginning and 244.3 MB in the end (delta: 11.7 MB). Peak memory consumption was 11.7 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55773.38 ms. Allocated memory was 306.7 MB in the beginning and 826.8 MB in the end (delta: 520.1 MB). Free memory was 243.3 MB in the beginning and 540.1 MB in the end (delta: -296.8 MB). Peak memory consumption was 223.3 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 18 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 126 LocStat_NO_SUPPORTING_DISEQUALITIES : 29 LocStat_NO_DISJUNCTIONS : -36 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 25 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 35 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 25 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.356628 RENAME_VARIABLES(MILLISECONDS) : 0.152466 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.297481 PROJECTAWAY(MILLISECONDS) : 0.112233 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.126419 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.251183 ADD_EQUALITY(MILLISECONDS) : 0.047961 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.011946 #CONJOIN_DISJUNCTIVE : 34 #RENAME_VARIABLES : 64 #UNFREEZE : 0 #CONJOIN : 64 #PROJECTAWAY : 66 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 64 #ADD_EQUALITY : 35 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 58 with TraceHistMax 39, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 42 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 125. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 55.5s OverallTime, 40 OverallIterations, 39 TraceHistogramMax, 1.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 666 SDtfs, 78 SDslu, 9751 SDs, 0 SdLazy, 1566 SolverSat, 55 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6560 GetRequests, 4771 SyntacticMatches, 76 SemanticMatches, 1713 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4559 ImplicationChecksByTransitivity, 30.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=58occurred in iteration=39, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.2s SatisfiabilityAnalysisTime, 45.4s InterpolantComputationTime, 4293 NumberOfCodeBlocks, 4293 NumberOfCodeBlocksAsserted, 507 NumberOfCheckSat, 6952 ConstructedInterpolants, 0 QuantifiedInterpolants, 1024624 SizeOfPredicates, 76 NumberOfNonLiveVariables, 9386 ConjunctsInSsa, 1710 ConjunctsInUnsatCore, 191 InterpolantComputations, 1 PerfectInterpolantSequences, 0/49400 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 22 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-20_23-50-17-054.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-20_23-50-17-054.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-20_23-50-17-054.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-20_23-50-17-054.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-20_23-50-17-054.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-20_23-50-17-054.csv Completed graceful shutdown