java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero3_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-20 23:55:08,431 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-20 23:55:08,433 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-20 23:55:08,449 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-20 23:55:08,449 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-20 23:55:08,450 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-20 23:55:08,451 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-20 23:55:08,453 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-20 23:55:08,455 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-20 23:55:08,456 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-20 23:55:08,457 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-20 23:55:08,458 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-20 23:55:08,459 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-20 23:55:08,460 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-20 23:55:08,461 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-20 23:55:08,464 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-20 23:55:08,466 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-20 23:55:08,468 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-20 23:55:08,469 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-20 23:55:08,471 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-20 23:55:08,473 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-20 23:55:08,479 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-20 23:55:08,479 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-20 23:55:08,479 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ.epf [2018-01-20 23:55:08,488 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-20 23:55:08,489 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-20 23:55:08,489 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-20 23:55:08,490 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-20 23:55:08,490 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-20 23:55:08,490 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-20 23:55:08,490 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-20 23:55:08,490 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-20 23:55:08,491 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-20 23:55:08,491 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-20 23:55:08,491 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-20 23:55:08,491 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-20 23:55:08,491 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-20 23:55:08,491 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-20 23:55:08,491 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-20 23:55:08,492 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-20 23:55:08,492 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-20 23:55:08,492 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-20 23:55:08,492 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-20 23:55:08,492 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-20 23:55:08,492 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-20 23:55:08,492 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-20 23:55:08,493 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-20 23:55:08,493 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-20 23:55:08,493 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-20 23:55:08,493 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-20 23:55:08,493 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-20 23:55:08,493 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-20 23:55:08,494 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-20 23:55:08,494 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-20 23:55:08,494 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-20 23:55:08,494 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-20 23:55:08,494 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-20 23:55:08,494 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-20 23:55:08,494 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-20 23:55:08,494 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-20 23:55:08,495 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-20 23:55:08,495 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-20 23:55:08,529 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-20 23:55:08,541 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-20 23:55:08,545 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-20 23:55:08,546 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-20 23:55:08,547 INFO L276 PluginConnector]: CDTParser initialized [2018-01-20 23:55:08,547 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero3_true-valid-memsafety_true-termination.c [2018-01-20 23:55:08,666 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-20 23:55:08,670 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-20 23:55:08,671 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-20 23:55:08,671 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-20 23:55:08,679 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-20 23:55:08,680 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,682 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@59def0bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08, skipping insertion in model container [2018-01-20 23:55:08,682 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,697 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-20 23:55:08,713 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-20 23:55:08,818 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-20 23:55:08,832 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-20 23:55:08,838 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08 WrapperNode [2018-01-20 23:55:08,838 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-20 23:55:08,839 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-20 23:55:08,839 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-20 23:55:08,839 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-20 23:55:08,856 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,856 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,867 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,867 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,871 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,874 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,876 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (1/1) ... [2018-01-20 23:55:08,877 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-20 23:55:08,878 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-20 23:55:08,878 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-20 23:55:08,878 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-20 23:55:08,879 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-20 23:55:08,935 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-20 23:55:08,935 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-20 23:55:08,935 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-20 23:55:08,935 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-20 23:55:08,935 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-20 23:55:08,936 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-20 23:55:08,936 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-20 23:55:08,936 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-20 23:55:08,936 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-20 23:55:08,936 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-20 23:55:08,936 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-20 23:55:08,937 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-20 23:55:09,078 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-20 23:55:09,078 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.01 11:55:09 BoogieIcfgContainer [2018-01-20 23:55:09,079 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-20 23:55:09,079 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-20 23:55:09,080 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-20 23:55:09,082 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-20 23:55:09,083 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.01 11:55:08" (1/3) ... [2018-01-20 23:55:09,084 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6996a73b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.01 11:55:09, skipping insertion in model container [2018-01-20 23:55:09,084 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.01 11:55:08" (2/3) ... [2018-01-20 23:55:09,085 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6996a73b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.01 11:55:09, skipping insertion in model container [2018-01-20 23:55:09,085 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.01 11:55:09" (3/3) ... [2018-01-20 23:55:09,087 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero3_true-valid-memsafety_true-termination.c [2018-01-20 23:55:09,094 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-20 23:55:09,100 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-20 23:55:09,136 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:55:09,136 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:55:09,136 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:55:09,136 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:55:09,137 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:55:09,137 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:55:09,137 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:55:09,137 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-20 23:55:09,138 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:55:09,152 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-20 23:55:09,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-20 23:55:09,160 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:09,161 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-20 23:55:09,161 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-20 23:55:09,167 INFO L82 PathProgramCache]: Analyzing trace with hash 51896, now seen corresponding path program 1 times [2018-01-20 23:55:09,170 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:09,217 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:09,217 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:09,217 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:09,217 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:09,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-20 23:55:09,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-20 23:55:09,281 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-20 23:55:09,289 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-20 23:55:09,295 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:55:09,296 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:55:09,296 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:55:09,296 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:55:09,296 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:55:09,296 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:55:09,296 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:55:09,296 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-20 23:55:09,296 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:55:09,297 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-20 23:55:09,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-20 23:55:09,298 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:09,298 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:09,298 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:09,298 INFO L82 PathProgramCache]: Analyzing trace with hash 126067280, now seen corresponding path program 1 times [2018-01-20 23:55:09,299 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:09,300 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:09,300 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:09,300 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:09,300 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:09,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:09,331 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:09,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:09,425 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-20 23:55:09,425 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-20 23:55:09,425 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-20 23:55:09,427 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-20 23:55:09,438 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-20 23:55:09,439 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-20 23:55:09,442 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 4 states. [2018-01-20 23:55:09,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:09,508 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-20 23:55:09,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-20 23:55:09,510 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-01-20 23:55:09,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:09,523 INFO L225 Difference]: With dead ends: 34 [2018-01-20 23:55:09,523 INFO L226 Difference]: Without dead ends: 20 [2018-01-20 23:55:09,587 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-20 23:55:09,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-20 23:55:09,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-20 23:55:09,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-20 23:55:09,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-20 23:55:09,620 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-20 23:55:09,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:09,621 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-20 23:55:09,621 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-20 23:55:09,621 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-20 23:55:09,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-20 23:55:09,622 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:09,622 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:09,622 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:09,622 INFO L82 PathProgramCache]: Analyzing trace with hash 763300235, now seen corresponding path program 1 times [2018-01-20 23:55:09,622 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:09,623 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:09,624 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:09,624 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:09,624 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:09,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:09,641 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:09,712 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:09,713 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:09,713 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:09,714 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 20 with the following transitions: [2018-01-20 23:55:09,716 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [16], [18], [19], [20], [21], [23], [24], [25], [26], [27], [28] [2018-01-20 23:55:09,759 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-20 23:55:09,760 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-20 23:55:10,046 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-20 23:55:10,048 INFO L268 AbstractInterpreter]: Visited 19 different actions 23 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-20 23:55:10,062 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-20 23:55:10,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:10,063 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:10,075 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:10,075 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:10,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:10,105 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:10,165 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:10,165 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:10,332 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:10,353 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:10,354 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:10,358 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:10,358 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:10,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:10,387 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:10,392 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:10,393 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:10,503 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:10,505 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:10,505 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 11 [2018-01-20 23:55:10,505 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:10,506 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-20 23:55:10,506 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-20 23:55:10,507 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-20 23:55:10,507 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 8 states. [2018-01-20 23:55:10,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:10,545 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-20 23:55:10,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-20 23:55:10,545 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 19 [2018-01-20 23:55:10,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:10,546 INFO L225 Difference]: With dead ends: 30 [2018-01-20 23:55:10,546 INFO L226 Difference]: Without dead ends: 21 [2018-01-20 23:55:10,547 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 68 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-20 23:55:10,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-20 23:55:10,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-20 23:55:10,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-20 23:55:10,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-20 23:55:10,552 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-20 23:55:10,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:10,552 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-20 23:55:10,552 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-20 23:55:10,553 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-20 23:55:10,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-20 23:55:10,553 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:10,554 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:10,554 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:10,554 INFO L82 PathProgramCache]: Analyzing trace with hash -957314640, now seen corresponding path program 2 times [2018-01-20 23:55:10,554 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:10,555 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:10,556 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:10,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:10,556 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:10,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:10,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:10,648 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:10,648 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:10,648 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:10,648 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:10,649 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:10,649 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:10,649 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:10,661 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:10,661 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:10,676 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:10,679 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:10,680 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:10,682 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:10,716 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:10,716 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:10,839 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:10,859 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:10,859 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:10,863 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:10,863 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:10,885 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:10,892 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:10,898 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:10,901 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:10,906 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:10,906 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:11,013 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,015 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:11,015 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 14 [2018-01-20 23:55:11,015 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:11,016 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-20 23:55:11,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-20 23:55:11,016 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-01-20 23:55:11,016 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 10 states. [2018-01-20 23:55:11,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:11,040 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-20 23:55:11,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-20 23:55:11,040 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 20 [2018-01-20 23:55:11,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:11,041 INFO L225 Difference]: With dead ends: 31 [2018-01-20 23:55:11,041 INFO L226 Difference]: Without dead ends: 22 [2018-01-20 23:55:11,042 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2018-01-20 23:55:11,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-20 23:55:11,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-20 23:55:11,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-20 23:55:11,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-20 23:55:11,046 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-20 23:55:11,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:11,047 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-20 23:55:11,047 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-20 23:55:11,047 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-20 23:55:11,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-20 23:55:11,048 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:11,048 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:11,048 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:11,048 INFO L82 PathProgramCache]: Analyzing trace with hash 1538199083, now seen corresponding path program 3 times [2018-01-20 23:55:11,049 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:11,050 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:11,050 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:11,050 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:11,050 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:11,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:11,064 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:11,142 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,142 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:11,142 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:11,142 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:11,142 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:11,142 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:11,142 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:11,149 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:11,149 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:11,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:11,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:11,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:11,163 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:11,165 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:11,206 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,206 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:11,326 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,346 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:11,346 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:11,350 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:11,350 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:11,364 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:11,375 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:11,387 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:11,393 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:11,396 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:11,400 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,400 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:11,438 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,440 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:11,440 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-20 23:55:11,440 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:11,441 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-20 23:55:11,441 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-20 23:55:11,441 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-20 23:55:11,442 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 12 states. [2018-01-20 23:55:11,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:11,476 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-20 23:55:11,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-20 23:55:11,477 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 21 [2018-01-20 23:55:11,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:11,477 INFO L225 Difference]: With dead ends: 32 [2018-01-20 23:55:11,477 INFO L226 Difference]: Without dead ends: 23 [2018-01-20 23:55:11,478 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-20 23:55:11,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-20 23:55:11,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-20 23:55:11,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-20 23:55:11,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-20 23:55:11,480 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-20 23:55:11,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:11,481 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-20 23:55:11,481 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-20 23:55:11,481 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-20 23:55:11,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-20 23:55:11,481 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:11,481 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:11,481 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:11,482 INFO L82 PathProgramCache]: Analyzing trace with hash 1589713168, now seen corresponding path program 4 times [2018-01-20 23:55:11,482 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:11,482 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:11,482 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:11,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:11,483 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:11,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:11,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:11,546 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:11,546 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:11,546 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:11,546 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:11,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:11,546 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:11,551 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:11,551 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:11,567 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:11,569 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:11,604 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,604 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:11,717 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,737 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:11,737 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:11,740 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:11,740 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:11,764 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:11,768 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:11,774 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,774 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:11,860 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,861 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:11,862 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 20 [2018-01-20 23:55:11,862 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:11,862 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-20 23:55:11,862 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-20 23:55:11,862 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=239, Unknown=0, NotChecked=0, Total=380 [2018-01-20 23:55:11,863 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 14 states. [2018-01-20 23:55:11,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:11,889 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-20 23:55:11,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-20 23:55:11,889 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 22 [2018-01-20 23:55:11,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:11,890 INFO L225 Difference]: With dead ends: 33 [2018-01-20 23:55:11,890 INFO L226 Difference]: Without dead ends: 24 [2018-01-20 23:55:11,891 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-20 23:55:11,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-20 23:55:11,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-20 23:55:11,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-20 23:55:11,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-20 23:55:11,893 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-20 23:55:11,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:11,894 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-20 23:55:11,894 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-20 23:55:11,894 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-20 23:55:11,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-20 23:55:11,894 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:11,894 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:11,894 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:11,895 INFO L82 PathProgramCache]: Analyzing trace with hash -1108317493, now seen corresponding path program 5 times [2018-01-20 23:55:11,895 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:11,895 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:11,895 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:11,896 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:11,896 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:11,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:11,907 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:11,970 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:11,971 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:11,971 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:11,971 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:11,971 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:11,971 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:11,971 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:11,976 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:11,976 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:11,980 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:11,981 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:11,982 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:11,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:11,988 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:11,989 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:12,102 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,102 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:12,244 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,264 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:12,264 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:12,267 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:12,267 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:12,271 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:12,274 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:12,279 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:12,290 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:12,297 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:12,300 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:12,306 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,306 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:12,376 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,377 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:12,378 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-20 23:55:12,378 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:12,378 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-20 23:55:12,378 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-20 23:55:12,378 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-20 23:55:12,379 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 16 states. [2018-01-20 23:55:12,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:12,406 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-20 23:55:12,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-20 23:55:12,406 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 23 [2018-01-20 23:55:12,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:12,407 INFO L225 Difference]: With dead ends: 34 [2018-01-20 23:55:12,407 INFO L226 Difference]: Without dead ends: 25 [2018-01-20 23:55:12,408 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-20 23:55:12,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-20 23:55:12,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-20 23:55:12,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-20 23:55:12,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-20 23:55:12,411 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-20 23:55:12,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:12,412 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-20 23:55:12,412 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-20 23:55:12,412 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-20 23:55:12,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-20 23:55:12,413 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:12,413 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:12,413 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:12,413 INFO L82 PathProgramCache]: Analyzing trace with hash 1152077936, now seen corresponding path program 6 times [2018-01-20 23:55:12,413 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:12,414 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:12,414 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:12,414 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:12,414 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:12,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:12,425 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:12,508 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,509 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:12,509 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:12,509 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:12,509 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:12,509 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:12,509 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:12,514 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:12,514 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:12,521 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:12,523 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:12,524 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:12,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:12,525 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:12,527 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:12,572 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,572 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:12,724 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,745 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:12,745 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:12,752 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:12,752 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:12,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:12,771 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:12,780 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:12,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:12,795 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:12,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:12,806 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,807 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:12,937 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:12,943 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:12,943 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-20 23:55:12,943 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:12,943 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-20 23:55:12,944 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-20 23:55:12,944 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-20 23:55:12,944 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 18 states. [2018-01-20 23:55:13,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:13,017 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-20 23:55:13,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-20 23:55:13,017 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 24 [2018-01-20 23:55:13,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:13,018 INFO L225 Difference]: With dead ends: 35 [2018-01-20 23:55:13,018 INFO L226 Difference]: Without dead ends: 26 [2018-01-20 23:55:13,019 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-20 23:55:13,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-20 23:55:13,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-20 23:55:13,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-20 23:55:13,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-20 23:55:13,022 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-20 23:55:13,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:13,022 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-20 23:55:13,023 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-20 23:55:13,023 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-20 23:55:13,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-20 23:55:13,023 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:13,024 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:13,024 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:13,024 INFO L82 PathProgramCache]: Analyzing trace with hash -1790107797, now seen corresponding path program 7 times [2018-01-20 23:55:13,024 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:13,025 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:13,025 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:13,025 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:13,025 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:13,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:13,037 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:13,109 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:13,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:13,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:13,110 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:13,110 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:13,110 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:13,110 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:13,115 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:13,115 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:13,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:13,126 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:13,176 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:13,176 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:13,349 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:13,369 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:13,369 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:13,372 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:13,372 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:13,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:13,392 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:13,397 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:13,397 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:13,451 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:13,452 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:13,453 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-20 23:55:13,453 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:13,453 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-20 23:55:13,453 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-20 23:55:13,454 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-20 23:55:13,454 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 20 states. [2018-01-20 23:55:13,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:13,485 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-20 23:55:13,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-20 23:55:13,486 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 25 [2018-01-20 23:55:13,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:13,486 INFO L225 Difference]: With dead ends: 36 [2018-01-20 23:55:13,486 INFO L226 Difference]: Without dead ends: 27 [2018-01-20 23:55:13,487 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-20 23:55:13,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-20 23:55:13,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-20 23:55:13,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-20 23:55:13,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-20 23:55:13,490 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-20 23:55:13,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:13,490 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-20 23:55:13,490 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-20 23:55:13,490 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-20 23:55:13,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-20 23:55:13,491 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:13,491 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:13,491 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:13,491 INFO L82 PathProgramCache]: Analyzing trace with hash 1491414992, now seen corresponding path program 8 times [2018-01-20 23:55:13,491 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:13,492 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:13,492 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:13,492 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:13,492 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:13,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:13,501 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:13,687 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:13,687 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:13,687 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:13,687 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:13,687 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:13,688 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:13,688 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:13,695 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:13,695 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:13,704 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:13,709 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:13,710 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:13,711 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:13,784 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:13,784 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:14,008 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:14,028 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:14,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:14,030 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:14,031 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:14,040 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:14,049 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:14,057 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:14,060 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:14,066 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:14,067 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:14,135 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:14,137 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:14,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-20 23:55:14,137 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:14,137 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-20 23:55:14,138 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-20 23:55:14,138 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-20 23:55:14,138 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 22 states. [2018-01-20 23:55:14,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:14,167 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-20 23:55:14,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-20 23:55:14,167 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 26 [2018-01-20 23:55:14,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:14,168 INFO L225 Difference]: With dead ends: 37 [2018-01-20 23:55:14,168 INFO L226 Difference]: Without dead ends: 28 [2018-01-20 23:55:14,168 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-20 23:55:14,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-20 23:55:14,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-20 23:55:14,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-20 23:55:14,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-20 23:55:14,172 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-20 23:55:14,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:14,173 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-20 23:55:14,173 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-20 23:55:14,173 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-20 23:55:14,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-20 23:55:14,173 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:14,173 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:14,174 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:14,174 INFO L82 PathProgramCache]: Analyzing trace with hash 139406347, now seen corresponding path program 9 times [2018-01-20 23:55:14,174 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:14,174 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:14,175 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:14,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:14,175 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:14,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:14,185 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:14,319 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:14,319 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:14,319 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:14,320 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:14,320 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:14,320 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:14,320 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:14,327 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:14,328 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:14,335 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,346 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,349 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,350 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,351 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,351 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:14,353 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:14,438 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:14,438 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:14,669 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:14,689 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:14,689 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:14,692 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:14,692 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:14,702 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,709 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,725 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,734 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,743 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:14,749 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:14,752 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:14,757 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:14,757 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:14,875 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:14,876 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:14,876 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-20 23:55:14,876 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:14,877 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-20 23:55:14,877 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-20 23:55:14,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-20 23:55:14,878 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 24 states. [2018-01-20 23:55:14,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:14,911 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-20 23:55:14,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-20 23:55:14,911 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 27 [2018-01-20 23:55:14,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:14,912 INFO L225 Difference]: With dead ends: 38 [2018-01-20 23:55:14,912 INFO L226 Difference]: Without dead ends: 29 [2018-01-20 23:55:14,913 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-20 23:55:14,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-20 23:55:14,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-20 23:55:14,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-20 23:55:14,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-20 23:55:14,916 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-20 23:55:14,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:14,916 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-20 23:55:14,916 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-20 23:55:14,916 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-20 23:55:14,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-20 23:55:14,917 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:14,917 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:14,917 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:14,918 INFO L82 PathProgramCache]: Analyzing trace with hash 1176811312, now seen corresponding path program 10 times [2018-01-20 23:55:14,918 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:14,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:14,919 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:14,919 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:14,919 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:14,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:14,928 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:15,027 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:15,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:15,027 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:15,027 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:15,027 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:15,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:15,027 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:15,032 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:15,032 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:15,044 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:15,046 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:15,125 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:15,125 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:15,364 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:15,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:15,384 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:15,387 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:15,387 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:15,412 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:15,415 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:15,420 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:15,420 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:15,490 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:15,492 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:15,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-20 23:55:15,497 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:15,497 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-20 23:55:15,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-20 23:55:15,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-20 23:55:15,499 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 26 states. [2018-01-20 23:55:15,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:15,531 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-20 23:55:15,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-20 23:55:15,531 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 28 [2018-01-20 23:55:15,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:15,532 INFO L225 Difference]: With dead ends: 39 [2018-01-20 23:55:15,532 INFO L226 Difference]: Without dead ends: 30 [2018-01-20 23:55:15,533 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 86 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-20 23:55:15,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-20 23:55:15,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-20 23:55:15,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-20 23:55:15,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-20 23:55:15,537 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-20 23:55:15,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:15,537 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-20 23:55:15,537 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-20 23:55:15,537 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-20 23:55:15,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-20 23:55:15,538 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:15,538 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:15,538 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:15,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1023373141, now seen corresponding path program 11 times [2018-01-20 23:55:15,539 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:15,539 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:15,539 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:15,540 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:15,540 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:15,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:15,549 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:15,642 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:15,642 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:15,643 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:15,643 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:15,643 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:15,643 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:15,643 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:15,648 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:15,648 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:15,651 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:15,652 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:15,653 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:15,654 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:15,655 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:15,655 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:15,659 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:15,660 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:15,661 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:15,732 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:15,732 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:16,019 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:16,051 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:16,051 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:16,054 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:16,054 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:16,059 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:16,060 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:16,064 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:16,068 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:16,073 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:16,077 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:16,088 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:16,096 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:16,099 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:16,105 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:16,106 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:16,208 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:16,209 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:16,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-20 23:55:16,209 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:16,209 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-20 23:55:16,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-20 23:55:16,210 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-20 23:55:16,210 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 28 states. [2018-01-20 23:55:16,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:16,251 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-20 23:55:16,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-20 23:55:16,251 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 29 [2018-01-20 23:55:16,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:16,252 INFO L225 Difference]: With dead ends: 40 [2018-01-20 23:55:16,252 INFO L226 Difference]: Without dead ends: 31 [2018-01-20 23:55:16,253 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-20 23:55:16,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-20 23:55:16,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-20 23:55:16,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-20 23:55:16,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-20 23:55:16,255 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-20 23:55:16,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:16,255 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-20 23:55:16,256 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-20 23:55:16,256 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-20 23:55:16,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-20 23:55:16,256 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:16,256 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:16,256 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:16,256 INFO L82 PathProgramCache]: Analyzing trace with hash -509614448, now seen corresponding path program 12 times [2018-01-20 23:55:16,257 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:16,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:16,257 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:16,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:16,257 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:16,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:16,267 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:16,427 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:16,427 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:16,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:16,428 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:16,428 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:16,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:16,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:16,434 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:16,434 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:16,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,444 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,445 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,446 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,447 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,449 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,449 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:16,450 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:16,533 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:16,533 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:16,908 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:16,929 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:16,929 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:16,936 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:16,936 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:16,947 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,954 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,962 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,970 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,980 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:16,989 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:17,000 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:17,008 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:17,011 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:17,017 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:17,018 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:17,137 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:17,139 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:17,139 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-20 23:55:17,140 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:17,140 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-20 23:55:17,140 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-20 23:55:17,141 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-20 23:55:17,141 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 30 states. [2018-01-20 23:55:17,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:17,219 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-20 23:55:17,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-20 23:55:17,219 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 30 [2018-01-20 23:55:17,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:17,220 INFO L225 Difference]: With dead ends: 41 [2018-01-20 23:55:17,220 INFO L226 Difference]: Without dead ends: 32 [2018-01-20 23:55:17,221 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-20 23:55:17,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-20 23:55:17,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-20 23:55:17,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-20 23:55:17,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-20 23:55:17,225 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-20 23:55:17,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:17,225 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-20 23:55:17,225 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-20 23:55:17,225 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-20 23:55:17,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-20 23:55:17,226 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:17,226 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:17,226 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:17,227 INFO L82 PathProgramCache]: Analyzing trace with hash -1762964149, now seen corresponding path program 13 times [2018-01-20 23:55:17,227 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:17,227 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:17,228 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:17,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:17,228 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:17,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:17,238 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:17,455 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:17,455 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:17,456 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:17,456 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:17,456 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:17,456 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:17,456 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:17,463 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:17,463 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:17,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:17,477 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:17,632 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:17,632 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:18,031 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:18,052 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:18,052 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:18,057 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:18,057 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:18,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:18,088 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:18,092 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:18,093 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:18,198 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:18,200 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:18,200 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 47 [2018-01-20 23:55:18,200 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:18,200 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-20 23:55:18,200 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-20 23:55:18,201 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=762, Invalid=1400, Unknown=0, NotChecked=0, Total=2162 [2018-01-20 23:55:18,201 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 32 states. [2018-01-20 23:55:18,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:18,237 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-20 23:55:18,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-20 23:55:18,238 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 31 [2018-01-20 23:55:18,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:18,238 INFO L225 Difference]: With dead ends: 42 [2018-01-20 23:55:18,238 INFO L226 Difference]: Without dead ends: 33 [2018-01-20 23:55:18,239 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 92 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=795, Invalid=1461, Unknown=0, NotChecked=0, Total=2256 [2018-01-20 23:55:18,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-20 23:55:18,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-20 23:55:18,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-20 23:55:18,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-20 23:55:18,241 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-20 23:55:18,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:18,242 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-20 23:55:18,242 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-20 23:55:18,242 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-20 23:55:18,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-20 23:55:18,242 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:18,242 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:18,242 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:18,242 INFO L82 PathProgramCache]: Analyzing trace with hash -1962099216, now seen corresponding path program 14 times [2018-01-20 23:55:18,242 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:18,243 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:18,243 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:18,243 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:18,243 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:18,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:18,251 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:18,415 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:18,416 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:18,416 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:18,416 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:18,416 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:18,416 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:18,416 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:18,427 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:18,427 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:18,436 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:18,443 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:18,444 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:18,447 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:18,605 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:18,606 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:19,016 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:19,036 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:19,036 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:19,039 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:19,039 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:19,049 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:19,059 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:19,068 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:19,071 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:19,075 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:19,076 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:19,179 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:19,180 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:19,180 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 50 [2018-01-20 23:55:19,181 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:19,181 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-20 23:55:19,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-20 23:55:19,182 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=1589, Unknown=0, NotChecked=0, Total=2450 [2018-01-20 23:55:19,182 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 34 states. [2018-01-20 23:55:19,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:19,287 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-20 23:55:19,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-20 23:55:19,288 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 32 [2018-01-20 23:55:19,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:19,289 INFO L225 Difference]: With dead ends: 43 [2018-01-20 23:55:19,289 INFO L226 Difference]: Without dead ends: 34 [2018-01-20 23:55:19,290 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 992 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=896, Invalid=1654, Unknown=0, NotChecked=0, Total=2550 [2018-01-20 23:55:19,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-20 23:55:19,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-20 23:55:19,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-20 23:55:19,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-20 23:55:19,294 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-20 23:55:19,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:19,294 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-20 23:55:19,294 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-20 23:55:19,294 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-20 23:55:19,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-20 23:55:19,295 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:19,295 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:19,295 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:19,296 INFO L82 PathProgramCache]: Analyzing trace with hash 454648299, now seen corresponding path program 15 times [2018-01-20 23:55:19,296 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:19,296 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:19,297 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:19,297 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:19,297 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:19,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:19,304 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:19,865 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:19,865 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:19,865 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:19,866 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:19,866 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:19,866 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:19,866 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:19,873 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:19,873 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:19,880 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,884 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,887 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,889 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,890 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,892 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,893 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:19,894 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:19,895 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:20,058 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:20,059 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:20,619 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:20,638 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:20,638 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:20,641 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:20,641 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:20,652 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,659 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,667 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,676 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,684 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,693 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,703 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,713 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,723 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:20,730 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:20,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:20,740 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:20,740 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:20,857 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:20,859 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:20,859 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-20 23:55:20,859 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:20,859 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-20 23:55:20,859 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-20 23:55:20,860 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-20 23:55:20,860 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 36 states. [2018-01-20 23:55:20,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:20,899 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-20 23:55:20,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-20 23:55:20,899 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 33 [2018-01-20 23:55:20,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:20,900 INFO L225 Difference]: With dead ends: 44 [2018-01-20 23:55:20,900 INFO L226 Difference]: Without dead ends: 35 [2018-01-20 23:55:20,901 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-20 23:55:20,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-20 23:55:20,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-20 23:55:20,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-20 23:55:20,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-20 23:55:20,904 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-20 23:55:20,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:20,905 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-20 23:55:20,905 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-20 23:55:20,905 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-20 23:55:20,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-20 23:55:20,905 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:20,905 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:20,905 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:20,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1935590064, now seen corresponding path program 16 times [2018-01-20 23:55:20,906 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:20,906 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:20,906 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:20,906 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:20,906 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:20,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:20,914 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:21,221 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:21,222 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:21,222 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:21,222 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:21,222 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:21,222 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:21,222 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:21,231 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:21,231 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:21,245 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:21,247 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:21,424 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:21,424 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:21,931 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:21,952 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:21,952 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:21,955 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:21,955 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:21,985 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:21,988 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:21,994 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:21,995 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:22,139 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:22,141 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:22,141 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-20 23:55:22,141 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:22,141 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-20 23:55:22,142 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-20 23:55:22,142 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-20 23:55:22,142 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 38 states. [2018-01-20 23:55:22,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:22,216 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-20 23:55:22,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-20 23:55:22,216 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 34 [2018-01-20 23:55:22,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:22,217 INFO L225 Difference]: With dead ends: 45 [2018-01-20 23:55:22,217 INFO L226 Difference]: Without dead ends: 36 [2018-01-20 23:55:22,218 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 98 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-20 23:55:22,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-20 23:55:22,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-20 23:55:22,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-20 23:55:22,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-20 23:55:22,220 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-20 23:55:22,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:22,221 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-20 23:55:22,221 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-20 23:55:22,221 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-20 23:55:22,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-20 23:55:22,222 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:22,222 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:22,222 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:22,222 INFO L82 PathProgramCache]: Analyzing trace with hash 1276432011, now seen corresponding path program 17 times [2018-01-20 23:55:22,222 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:22,223 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:22,223 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:22,223 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:22,223 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:22,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:22,233 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:22,469 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:22,469 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:22,469 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:22,469 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:22,469 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:22,469 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:22,470 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:22,474 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:22,474 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:22,478 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,479 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,479 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,481 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,482 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,482 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,483 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,484 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,488 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:22,489 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:22,490 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:22,619 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:22,619 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:23,155 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:23,175 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:23,175 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:23,178 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:23,178 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:23,182 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,183 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,187 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,190 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,195 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,199 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,204 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,209 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,215 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,226 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:23,235 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:23,238 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:23,242 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:23,243 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:23,401 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:23,403 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:23,403 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 59 [2018-01-20 23:55:23,403 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:23,404 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-20 23:55:23,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-20 23:55:23,405 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1194, Invalid=2228, Unknown=0, NotChecked=0, Total=3422 [2018-01-20 23:55:23,405 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 40 states. [2018-01-20 23:55:23,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:23,449 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-20 23:55:23,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-20 23:55:23,449 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 35 [2018-01-20 23:55:23,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:23,450 INFO L225 Difference]: With dead ends: 46 [2018-01-20 23:55:23,450 INFO L226 Difference]: Without dead ends: 37 [2018-01-20 23:55:23,450 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1235, Invalid=2305, Unknown=0, NotChecked=0, Total=3540 [2018-01-20 23:55:23,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-20 23:55:23,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-20 23:55:23,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-20 23:55:23,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-20 23:55:23,453 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-20 23:55:23,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:23,453 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-20 23:55:23,453 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-20 23:55:23,453 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-20 23:55:23,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-20 23:55:23,454 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:23,454 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:23,454 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:23,454 INFO L82 PathProgramCache]: Analyzing trace with hash 2064868528, now seen corresponding path program 18 times [2018-01-20 23:55:23,454 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:23,455 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:23,455 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:23,455 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:23,455 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:23,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:23,462 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:23,658 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:23,658 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:23,658 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:23,658 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:23,658 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:23,658 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:23,658 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:23,663 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:23,663 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:23,670 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,672 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,673 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,674 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,675 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,676 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,677 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,679 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,680 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:23,680 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:23,682 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:23,822 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:23,822 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:24,371 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:24,391 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:24,391 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:24,394 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:24,394 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:24,403 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,410 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,418 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,427 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,436 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,446 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,456 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,466 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,489 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:24,498 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:24,501 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:24,506 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:24,506 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:24,633 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:24,634 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:24,634 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 62 [2018-01-20 23:55:24,634 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:24,634 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-20 23:55:24,634 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-20 23:55:24,635 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1317, Invalid=2465, Unknown=0, NotChecked=0, Total=3782 [2018-01-20 23:55:24,635 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 42 states. [2018-01-20 23:55:24,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:24,694 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-20 23:55:24,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-20 23:55:24,694 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 36 [2018-01-20 23:55:24,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:24,695 INFO L225 Difference]: With dead ends: 47 [2018-01-20 23:55:24,695 INFO L226 Difference]: Without dead ends: 38 [2018-01-20 23:55:24,695 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1360, Invalid=2546, Unknown=0, NotChecked=0, Total=3906 [2018-01-20 23:55:24,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-20 23:55:24,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-20 23:55:24,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-20 23:55:24,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-20 23:55:24,698 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-20 23:55:24,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:24,698 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-20 23:55:24,698 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-20 23:55:24,698 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-20 23:55:24,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-20 23:55:24,699 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:24,699 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:24,699 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:24,699 INFO L82 PathProgramCache]: Analyzing trace with hash 736596779, now seen corresponding path program 19 times [2018-01-20 23:55:24,699 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:24,700 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:24,700 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:24,700 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:24,700 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:24,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:24,709 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:24,928 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:24,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:24,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:24,928 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:24,928 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:24,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:24,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:24,933 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:24,933 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:24,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:24,945 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:25,098 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:25,098 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:25,689 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:25,709 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:25,710 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:25,713 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:25,713 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:25,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:25,749 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:25,756 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:25,757 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:25,906 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:25,907 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:25,907 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 65 [2018-01-20 23:55:25,908 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:25,908 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-20 23:55:25,908 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-20 23:55:25,909 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=2714, Unknown=0, NotChecked=0, Total=4160 [2018-01-20 23:55:25,909 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 44 states. [2018-01-20 23:55:25,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:25,955 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-20 23:55:25,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-20 23:55:25,955 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 37 [2018-01-20 23:55:25,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:25,956 INFO L225 Difference]: With dead ends: 48 [2018-01-20 23:55:25,956 INFO L226 Difference]: Without dead ends: 39 [2018-01-20 23:55:25,956 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1727 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1491, Invalid=2799, Unknown=0, NotChecked=0, Total=4290 [2018-01-20 23:55:25,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-20 23:55:25,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-20 23:55:25,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-20 23:55:25,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-20 23:55:25,958 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-20 23:55:25,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:25,959 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-20 23:55:25,959 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-20 23:55:25,959 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-20 23:55:25,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-20 23:55:25,959 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:25,959 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:25,959 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:25,960 INFO L82 PathProgramCache]: Analyzing trace with hash -1785121776, now seen corresponding path program 20 times [2018-01-20 23:55:25,960 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:25,960 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:25,960 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:25,960 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:25,960 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:25,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:25,970 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:26,182 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:26,182 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:26,183 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:26,183 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:26,183 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:26,183 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:26,183 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:26,187 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:26,188 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:26,194 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:26,199 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:26,200 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:26,202 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:26,368 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:26,368 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:27,006 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:27,026 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:27,026 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:27,029 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:27,029 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:27,038 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:27,051 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:27,061 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:27,064 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:27,070 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:27,070 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:27,218 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:27,219 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:27,219 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 68 [2018-01-20 23:55:27,219 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:27,220 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-20 23:55:27,220 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-20 23:55:27,220 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1581, Invalid=2975, Unknown=0, NotChecked=0, Total=4556 [2018-01-20 23:55:27,220 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 46 states. [2018-01-20 23:55:27,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:27,284 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-20 23:55:27,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-20 23:55:27,285 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 38 [2018-01-20 23:55:27,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:27,285 INFO L225 Difference]: With dead ends: 49 [2018-01-20 23:55:27,285 INFO L226 Difference]: Without dead ends: 40 [2018-01-20 23:55:27,286 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1898 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1628, Invalid=3064, Unknown=0, NotChecked=0, Total=4692 [2018-01-20 23:55:27,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-20 23:55:27,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-20 23:55:27,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-20 23:55:27,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-20 23:55:27,289 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-20 23:55:27,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:27,289 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-20 23:55:27,289 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-20 23:55:27,289 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-20 23:55:27,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-20 23:55:27,290 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:27,290 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:27,290 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:27,290 INFO L82 PathProgramCache]: Analyzing trace with hash 1645981643, now seen corresponding path program 21 times [2018-01-20 23:55:27,290 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:27,291 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:27,291 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:27,291 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:27,291 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:27,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:27,298 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:27,588 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:27,589 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:27,589 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:27,589 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:27,589 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:27,589 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:27,589 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:27,594 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:27,594 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:27,601 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,603 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,604 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,605 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,605 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,606 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,608 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,609 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,610 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,611 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,612 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,613 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:27,613 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:27,614 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:27,792 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:27,792 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:28,469 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:28,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:28,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:28,492 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:28,492 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:28,501 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,524 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,532 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,542 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,552 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,562 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,573 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,584 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,595 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,606 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:28,615 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:28,618 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:28,623 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:28,623 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:28,794 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:28,795 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:28,795 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 71 [2018-01-20 23:55:28,796 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:28,796 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-20 23:55:28,796 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-20 23:55:28,797 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1722, Invalid=3248, Unknown=0, NotChecked=0, Total=4970 [2018-01-20 23:55:28,797 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 48 states. [2018-01-20 23:55:28,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:28,849 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-20 23:55:28,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-20 23:55:28,849 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 39 [2018-01-20 23:55:28,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:28,849 INFO L225 Difference]: With dead ends: 50 [2018-01-20 23:55:28,849 INFO L226 Difference]: Without dead ends: 41 [2018-01-20 23:55:28,850 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2077 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1771, Invalid=3341, Unknown=0, NotChecked=0, Total=5112 [2018-01-20 23:55:28,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-20 23:55:28,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-20 23:55:28,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-20 23:55:28,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-20 23:55:28,854 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-20 23:55:28,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:28,854 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-20 23:55:28,854 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-20 23:55:28,854 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-20 23:55:28,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-20 23:55:28,855 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:28,855 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:28,855 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:28,855 INFO L82 PathProgramCache]: Analyzing trace with hash 636005232, now seen corresponding path program 22 times [2018-01-20 23:55:28,855 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:28,856 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:28,856 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:28,856 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:28,856 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:28,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:28,864 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:29,143 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:29,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:29,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:29,144 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:29,144 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:29,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:29,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:29,149 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:29,149 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:29,162 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:29,164 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:29,356 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:29,356 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:30,119 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:30,139 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:30,140 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:30,142 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:30,143 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:30,176 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:30,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:30,185 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:30,185 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:30,349 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:30,350 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:30,350 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 74 [2018-01-20 23:55:30,350 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:30,350 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-20 23:55:30,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-20 23:55:30,351 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1869, Invalid=3533, Unknown=0, NotChecked=0, Total=5402 [2018-01-20 23:55:30,351 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 50 states. [2018-01-20 23:55:30,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:30,411 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-20 23:55:30,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-20 23:55:30,412 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 40 [2018-01-20 23:55:30,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:30,412 INFO L225 Difference]: With dead ends: 51 [2018-01-20 23:55:30,412 INFO L226 Difference]: Without dead ends: 42 [2018-01-20 23:55:30,413 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 110 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2264 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1920, Invalid=3630, Unknown=0, NotChecked=0, Total=5550 [2018-01-20 23:55:30,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-20 23:55:30,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-20 23:55:30,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-20 23:55:30,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-20 23:55:30,416 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-20 23:55:30,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:30,416 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-20 23:55:30,416 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-20 23:55:30,416 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-20 23:55:30,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-20 23:55:30,417 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:30,417 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:30,417 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:30,417 INFO L82 PathProgramCache]: Analyzing trace with hash -608492437, now seen corresponding path program 23 times [2018-01-20 23:55:30,417 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:30,418 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:30,418 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:30,418 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:30,418 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:30,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:30,426 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:30,679 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:30,679 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:30,713 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:30,713 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:30,713 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:30,713 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:30,713 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:30,718 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:30,718 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:30,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,723 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,724 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,726 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,727 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,728 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,729 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,729 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,730 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,734 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:30,736 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:30,738 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:30,951 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:30,951 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:31,738 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:31,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:31,758 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:31,760 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:31,761 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:31,765 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,770 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,773 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,777 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,782 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,786 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,791 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,797 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,803 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,809 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,815 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,827 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:31,837 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:31,841 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:31,849 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:31,849 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:32,069 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:32,070 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:32,070 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 77 [2018-01-20 23:55:32,070 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:32,070 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-20 23:55:32,071 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-20 23:55:32,071 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2022, Invalid=3830, Unknown=0, NotChecked=0, Total=5852 [2018-01-20 23:55:32,071 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 52 states. [2018-01-20 23:55:32,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:32,174 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-20 23:55:32,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-20 23:55:32,174 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 41 [2018-01-20 23:55:32,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:32,175 INFO L225 Difference]: With dead ends: 52 [2018-01-20 23:55:32,175 INFO L226 Difference]: Without dead ends: 43 [2018-01-20 23:55:32,175 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2459 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2075, Invalid=3931, Unknown=0, NotChecked=0, Total=6006 [2018-01-20 23:55:32,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-20 23:55:32,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-20 23:55:32,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-20 23:55:32,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-20 23:55:32,178 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-20 23:55:32,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:32,178 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-20 23:55:32,178 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-20 23:55:32,178 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-20 23:55:32,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-20 23:55:32,178 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:32,178 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:32,178 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:32,179 INFO L82 PathProgramCache]: Analyzing trace with hash -533214512, now seen corresponding path program 24 times [2018-01-20 23:55:32,179 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:32,179 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:32,179 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:32,179 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:32,179 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:32,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:32,187 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:32,464 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:32,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:32,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:32,465 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:32,465 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:32,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:32,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:32,470 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:32,470 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:32,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,480 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,481 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,482 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,483 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,484 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,485 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,489 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,490 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:32,490 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:32,492 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:32,719 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:32,719 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:33,566 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:33,586 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:33,586 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:33,589 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:33,589 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:33,599 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,606 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,615 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,624 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,632 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,642 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,651 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,661 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,671 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,682 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,694 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,706 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:33,727 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:33,731 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:33,736 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:33,736 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:33,929 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:33,930 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:33,930 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 80 [2018-01-20 23:55:33,930 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:33,930 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-20 23:55:33,931 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-20 23:55:33,931 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2181, Invalid=4139, Unknown=0, NotChecked=0, Total=6320 [2018-01-20 23:55:33,932 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 54 states. [2018-01-20 23:55:34,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:34,009 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-20 23:55:34,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-20 23:55:34,010 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 42 [2018-01-20 23:55:34,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:34,010 INFO L225 Difference]: With dead ends: 53 [2018-01-20 23:55:34,011 INFO L226 Difference]: Without dead ends: 44 [2018-01-20 23:55:34,011 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2662 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2236, Invalid=4244, Unknown=0, NotChecked=0, Total=6480 [2018-01-20 23:55:34,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-20 23:55:34,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-20 23:55:34,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-20 23:55:34,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-20 23:55:34,015 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-20 23:55:34,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:34,015 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-20 23:55:34,016 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-20 23:55:34,016 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-20 23:55:34,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-20 23:55:34,016 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:34,016 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:34,016 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:34,017 INFO L82 PathProgramCache]: Analyzing trace with hash 1800401163, now seen corresponding path program 25 times [2018-01-20 23:55:34,017 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:34,017 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:34,017 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:34,018 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:34,018 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:34,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:34,028 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:34,317 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:34,317 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:34,318 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:34,318 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:34,318 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:34,318 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:34,318 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:34,323 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:34,323 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:34,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:34,336 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:34,573 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:34,574 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:35,511 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:35,530 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:35,531 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:35,533 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:35,534 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:35,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:35,563 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:35,568 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:35,569 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:35,759 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:35,760 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:35,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 83 [2018-01-20 23:55:35,760 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:35,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-20 23:55:35,761 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-20 23:55:35,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2346, Invalid=4460, Unknown=0, NotChecked=0, Total=6806 [2018-01-20 23:55:35,761 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 56 states. [2018-01-20 23:55:35,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:35,810 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-20 23:55:35,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-20 23:55:35,811 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 43 [2018-01-20 23:55:35,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:35,811 INFO L225 Difference]: With dead ends: 54 [2018-01-20 23:55:35,811 INFO L226 Difference]: Without dead ends: 45 [2018-01-20 23:55:35,812 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2873 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2403, Invalid=4569, Unknown=0, NotChecked=0, Total=6972 [2018-01-20 23:55:35,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-20 23:55:35,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-20 23:55:35,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-20 23:55:35,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-20 23:55:35,814 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-20 23:55:35,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:35,815 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-20 23:55:35,815 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-20 23:55:35,815 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-20 23:55:35,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-20 23:55:35,815 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:35,815 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:35,815 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:35,815 INFO L82 PathProgramCache]: Analyzing trace with hash 1128043056, now seen corresponding path program 26 times [2018-01-20 23:55:35,815 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:35,816 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:35,816 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:35,816 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:35,816 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:35,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:35,825 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:36,260 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:36,260 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:36,260 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:36,261 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:36,261 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:36,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:36,261 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:36,272 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:36,273 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:36,280 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:36,287 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:36,289 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:36,291 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:36,565 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:36,565 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:37,537 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:37,556 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:37,556 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:37,559 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:37,559 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:37,569 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:37,584 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:37,596 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:37,599 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:37,605 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:37,605 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:37,806 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:37,807 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:37,807 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 86 [2018-01-20 23:55:37,808 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:37,808 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-20 23:55:37,808 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-20 23:55:37,808 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2517, Invalid=4793, Unknown=0, NotChecked=0, Total=7310 [2018-01-20 23:55:37,808 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 58 states. [2018-01-20 23:55:37,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:37,871 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-20 23:55:37,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-20 23:55:37,871 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 44 [2018-01-20 23:55:37,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:37,871 INFO L225 Difference]: With dead ends: 55 [2018-01-20 23:55:37,871 INFO L226 Difference]: Without dead ends: 46 [2018-01-20 23:55:37,872 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3092 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2576, Invalid=4906, Unknown=0, NotChecked=0, Total=7482 [2018-01-20 23:55:37,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-20 23:55:37,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-20 23:55:37,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-20 23:55:37,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-20 23:55:37,874 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-20 23:55:37,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:37,874 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-20 23:55:37,874 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-20 23:55:37,874 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-20 23:55:37,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-20 23:55:37,875 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:37,875 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:37,875 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:37,875 INFO L82 PathProgramCache]: Analyzing trace with hash 1759778219, now seen corresponding path program 27 times [2018-01-20 23:55:37,875 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:37,875 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:37,876 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:37,876 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:37,876 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:37,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:37,884 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:38,273 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:38,273 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:38,273 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:38,273 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:38,273 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:38,273 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:38,273 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:38,278 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:38,278 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:38,285 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,287 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,288 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,288 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,289 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,290 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,296 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,297 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,298 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,299 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,300 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:38,301 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:38,302 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:38,576 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:38,576 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:39,628 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:39,648 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:39,648 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:39,651 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:39,651 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:39,661 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,668 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,677 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,685 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,725 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,737 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,749 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,761 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,773 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,786 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,812 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:39,821 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:39,825 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:39,831 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:39,831 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:40,055 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:40,056 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:40,056 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 89 [2018-01-20 23:55:40,057 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:40,057 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-20 23:55:40,057 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-20 23:55:40,058 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2694, Invalid=5138, Unknown=0, NotChecked=0, Total=7832 [2018-01-20 23:55:40,058 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 60 states. [2018-01-20 23:55:40,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:40,114 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-20 23:55:40,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-20 23:55:40,114 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 45 [2018-01-20 23:55:40,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:40,115 INFO L225 Difference]: With dead ends: 56 [2018-01-20 23:55:40,115 INFO L226 Difference]: Without dead ends: 47 [2018-01-20 23:55:40,115 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3319 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2755, Invalid=5255, Unknown=0, NotChecked=0, Total=8010 [2018-01-20 23:55:40,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-20 23:55:40,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-20 23:55:40,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-20 23:55:40,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-20 23:55:40,117 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-20 23:55:40,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:40,118 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-20 23:55:40,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-20 23:55:40,118 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-20 23:55:40,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-20 23:55:40,118 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:40,118 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:40,118 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:40,118 INFO L82 PathProgramCache]: Analyzing trace with hash -131268208, now seen corresponding path program 28 times [2018-01-20 23:55:40,118 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:40,119 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:40,119 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:40,119 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:40,119 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:40,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:40,129 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:40,479 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:40,479 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:40,479 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:40,479 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:40,479 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:40,479 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:40,479 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:40,485 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:40,485 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:40,498 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:40,500 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:40,786 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:40,786 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:41,896 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:41,915 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:41,916 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:41,918 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:41,919 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:41,959 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:41,963 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:41,969 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:41,969 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:42,195 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:42,196 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:42,197 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 92 [2018-01-20 23:55:42,197 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:42,197 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-20 23:55:42,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-20 23:55:42,198 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2877, Invalid=5495, Unknown=0, NotChecked=0, Total=8372 [2018-01-20 23:55:42,198 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 62 states. [2018-01-20 23:55:42,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:42,258 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-20 23:55:42,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-20 23:55:42,259 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 46 [2018-01-20 23:55:42,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:42,259 INFO L225 Difference]: With dead ends: 57 [2018-01-20 23:55:42,259 INFO L226 Difference]: Without dead ends: 48 [2018-01-20 23:55:42,260 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3554 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2940, Invalid=5616, Unknown=0, NotChecked=0, Total=8556 [2018-01-20 23:55:42,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-20 23:55:42,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-20 23:55:42,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-20 23:55:42,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-20 23:55:42,262 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-20 23:55:42,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:42,263 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-20 23:55:42,263 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-20 23:55:42,263 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-20 23:55:42,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-20 23:55:42,263 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:42,263 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:42,263 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:42,263 INFO L82 PathProgramCache]: Analyzing trace with hash 1375834699, now seen corresponding path program 29 times [2018-01-20 23:55:42,264 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:42,264 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:42,264 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:42,264 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:42,264 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:42,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:42,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:42,697 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:42,698 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:42,698 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:42,698 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:42,698 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:42,698 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:42,698 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:42,703 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:42,703 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:42,707 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,710 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,714 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,716 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,718 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:42,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:42,725 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:43,036 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:43,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:44,208 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:44,227 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:44,228 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:44,231 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:44,231 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:44,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,237 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,241 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,244 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,248 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,252 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,273 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,286 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,301 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,322 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:44,333 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:44,336 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:44,342 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:44,342 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:44,582 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:44,583 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:44,583 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 95 [2018-01-20 23:55:44,584 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:44,584 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-20 23:55:44,584 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-20 23:55:44,584 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3066, Invalid=5864, Unknown=0, NotChecked=0, Total=8930 [2018-01-20 23:55:44,585 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 64 states. [2018-01-20 23:55:44,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:44,661 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-20 23:55:44,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-20 23:55:44,661 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 47 [2018-01-20 23:55:44,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:44,662 INFO L225 Difference]: With dead ends: 58 [2018-01-20 23:55:44,662 INFO L226 Difference]: Without dead ends: 49 [2018-01-20 23:55:44,662 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3797 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=3131, Invalid=5989, Unknown=0, NotChecked=0, Total=9120 [2018-01-20 23:55:44,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-20 23:55:44,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-20 23:55:44,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-20 23:55:44,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-20 23:55:44,665 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-20 23:55:44,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:44,665 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-20 23:55:44,665 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-20 23:55:44,665 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-20 23:55:44,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-20 23:55:44,665 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:44,665 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:44,665 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:44,666 INFO L82 PathProgramCache]: Analyzing trace with hash 851384560, now seen corresponding path program 30 times [2018-01-20 23:55:44,666 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:44,666 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:44,666 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:44,666 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:44,666 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:44,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:44,675 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:45,053 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:45,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:45,053 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:45,053 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:45,053 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:45,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:45,053 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:45,058 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:45,058 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:45,064 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,066 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,067 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,068 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,069 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,070 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,071 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,073 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,074 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,076 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,077 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,078 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,079 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,080 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,081 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:45,082 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:45,084 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:45,468 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:45,468 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:45,885 WARN L143 SmtUtils]: Spent 223ms on a formula simplification that was a NOOP. DAG size: 98 [2018-01-20 23:55:46,952 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:46,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:46,973 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:46,976 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:55:46,976 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:55:46,986 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:46,993 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,002 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,010 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,019 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,029 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,039 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,050 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,061 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,072 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,084 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,095 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,107 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,119 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,132 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,146 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:55:47,156 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:47,159 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:47,166 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:47,166 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:47,421 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:47,423 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:47,423 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 98 [2018-01-20 23:55:47,423 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:47,423 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-20 23:55:47,423 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-20 23:55:47,424 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3261, Invalid=6245, Unknown=0, NotChecked=0, Total=9506 [2018-01-20 23:55:47,424 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 66 states. [2018-01-20 23:55:47,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:47,487 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-20 23:55:47,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-20 23:55:47,487 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 48 [2018-01-20 23:55:47,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:47,487 INFO L225 Difference]: With dead ends: 59 [2018-01-20 23:55:47,487 INFO L226 Difference]: Without dead ends: 50 [2018-01-20 23:55:47,488 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4048 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3328, Invalid=6374, Unknown=0, NotChecked=0, Total=9702 [2018-01-20 23:55:47,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-20 23:55:47,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-20 23:55:47,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-20 23:55:47,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-20 23:55:47,490 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-20 23:55:47,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:47,490 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-20 23:55:47,490 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-20 23:55:47,490 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-20 23:55:47,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-20 23:55:47,491 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:47,491 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:47,491 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:47,491 INFO L82 PathProgramCache]: Analyzing trace with hash 1773299435, now seen corresponding path program 31 times [2018-01-20 23:55:47,491 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:47,492 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:47,492 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:47,492 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:47,492 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:47,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:47,504 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:48,000 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:48,000 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:48,000 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:48,000 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:48,000 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:48,000 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:48,001 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:48,006 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:48,006 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:48,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:48,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:48,358 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:48,358 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:49,703 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:49,722 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:49,722 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:49,725 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:49,725 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-20 23:55:49,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:49,759 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:49,766 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:49,766 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:50,023 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:50,024 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:50,024 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 101 [2018-01-20 23:55:50,025 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:50,025 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-20 23:55:50,025 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-20 23:55:50,026 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3462, Invalid=6638, Unknown=0, NotChecked=0, Total=10100 [2018-01-20 23:55:50,026 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 68 states. [2018-01-20 23:55:50,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:50,085 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-20 23:55:50,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-20 23:55:50,086 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 49 [2018-01-20 23:55:50,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:50,086 INFO L225 Difference]: With dead ends: 60 [2018-01-20 23:55:50,086 INFO L226 Difference]: Without dead ends: 51 [2018-01-20 23:55:50,087 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 128 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4307 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3531, Invalid=6771, Unknown=0, NotChecked=0, Total=10302 [2018-01-20 23:55:50,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-20 23:55:50,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-20 23:55:50,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-20 23:55:50,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-20 23:55:50,089 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-20 23:55:50,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:50,089 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-20 23:55:50,089 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-20 23:55:50,089 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-20 23:55:50,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-20 23:55:50,090 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:50,090 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:50,090 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:50,090 INFO L82 PathProgramCache]: Analyzing trace with hash 287889488, now seen corresponding path program 32 times [2018-01-20 23:55:50,090 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:50,090 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:50,091 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-20 23:55:50,091 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:50,091 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:50,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:50,102 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:50,547 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:50,547 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:50,547 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:50,547 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:50,547 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:50,547 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:50,547 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:50,552 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:50,553 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:50,559 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:50,565 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:50,567 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:50,569 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:50,922 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:50,922 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:52,331 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:52,351 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:52,351 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:52,354 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-20 23:55:52,355 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:52,365 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:52,380 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:52,393 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:52,397 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:52,407 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:52,408 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:52,692 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:52,694 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:52,694 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 104 [2018-01-20 23:55:52,694 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:52,695 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-20 23:55:52,695 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-20 23:55:52,696 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3669, Invalid=7043, Unknown=0, NotChecked=0, Total=10712 [2018-01-20 23:55:52,696 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 70 states. [2018-01-20 23:55:52,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:52,842 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-20 23:55:52,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-20 23:55:52,842 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 50 [2018-01-20 23:55:52,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:52,843 INFO L225 Difference]: With dead ends: 61 [2018-01-20 23:55:52,843 INFO L226 Difference]: Without dead ends: 52 [2018-01-20 23:55:52,844 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4574 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3740, Invalid=7180, Unknown=0, NotChecked=0, Total=10920 [2018-01-20 23:55:52,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-20 23:55:52,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-20 23:55:52,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-20 23:55:52,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-20 23:55:52,847 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-20 23:55:52,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:52,848 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-20 23:55:52,848 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-20 23:55:52,848 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-20 23:55:52,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-20 23:55:52,848 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:52,848 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:52,849 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:52,849 INFO L82 PathProgramCache]: Analyzing trace with hash 1484821387, now seen corresponding path program 33 times [2018-01-20 23:55:52,849 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:52,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:52,850 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:52,850 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:52,850 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:52,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:52,862 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:53,447 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:53,447 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:53,447 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:53,447 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:53,447 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:53,447 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:53,447 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:53,453 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:53,453 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:53,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,461 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,462 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,465 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,466 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,467 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,468 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,469 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,471 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,472 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,476 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,477 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,478 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:53,478 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:53,480 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:53,860 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:53,860 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:55,331 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:55,351 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:55,351 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:55,354 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-20 23:55:55,354 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-20 23:55:55,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,370 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,377 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,385 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,394 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,412 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,421 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,431 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,442 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,453 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,465 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,477 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,502 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,530 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,544 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-20 23:55:55,555 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:55,559 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:55,565 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:55,565 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:55,855 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:55,856 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:55,880 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 107 [2018-01-20 23:55:55,880 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:55,880 INFO L409 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-01-20 23:55:55,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-01-20 23:55:55,881 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3882, Invalid=7460, Unknown=0, NotChecked=0, Total=11342 [2018-01-20 23:55:55,881 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 72 states. [2018-01-20 23:55:55,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:55,975 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-20 23:55:55,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-20 23:55:55,975 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 51 [2018-01-20 23:55:55,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:55,976 INFO L225 Difference]: With dead ends: 62 [2018-01-20 23:55:55,976 INFO L226 Difference]: Without dead ends: 53 [2018-01-20 23:55:55,976 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4849 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=3955, Invalid=7601, Unknown=0, NotChecked=0, Total=11556 [2018-01-20 23:55:55,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-20 23:55:55,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-20 23:55:55,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-20 23:55:55,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-20 23:55:55,980 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-20 23:55:55,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:55,980 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-20 23:55:55,980 INFO L433 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-01-20 23:55:55,980 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-20 23:55:55,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-20 23:55:55,981 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:55,981 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:55,981 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:55,981 INFO L82 PathProgramCache]: Analyzing trace with hash -64995408, now seen corresponding path program 34 times [2018-01-20 23:55:55,981 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:55,982 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:55,982 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:55,982 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:55,982 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:55,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:55,994 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:56,572 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:56,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:56,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:56,572 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:56,573 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:56,573 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:56,573 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:56,577 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:56,577 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:56,593 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:56,594 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:56,996 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:56,996 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:58,629 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:58,649 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:58,650 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:55:58,652 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-20 23:55:58,652 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-20 23:55:58,698 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:58,702 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:55:58,713 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:58,713 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:55:58,833 WARN L143 SmtUtils]: Spent 118ms on a formula simplification that was a NOOP. DAG size: 110 [2018-01-20 23:55:59,094 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:59,095 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:55:59,095 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 110 [2018-01-20 23:55:59,095 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:55:59,095 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-20 23:55:59,095 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-20 23:55:59,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4101, Invalid=7889, Unknown=0, NotChecked=0, Total=11990 [2018-01-20 23:55:59,096 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 74 states. [2018-01-20 23:55:59,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:55:59,148 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-20 23:55:59,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-20 23:55:59,148 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 52 [2018-01-20 23:55:59,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:55:59,149 INFO L225 Difference]: With dead ends: 63 [2018-01-20 23:55:59,149 INFO L226 Difference]: Without dead ends: 54 [2018-01-20 23:55:59,149 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5132 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=4176, Invalid=8034, Unknown=0, NotChecked=0, Total=12210 [2018-01-20 23:55:59,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-20 23:55:59,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-20 23:55:59,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-20 23:55:59,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-20 23:55:59,151 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-20 23:55:59,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:55:59,152 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-20 23:55:59,152 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-20 23:55:59,152 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-20 23:55:59,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-20 23:55:59,152 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:55:59,152 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:55:59,152 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:55:59,152 INFO L82 PathProgramCache]: Analyzing trace with hash -864675797, now seen corresponding path program 35 times [2018-01-20 23:55:59,152 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:55:59,153 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:59,153 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:55:59,153 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:55:59,153 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:55:59,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:55:59,162 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:55:59,694 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:55:59,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:59,694 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:55:59,694 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:55:59,694 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:55:59,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:55:59,694 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:55:59,699 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:55:59,699 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:55:59,703 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,705 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,707 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,710 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,710 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,714 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,716 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,719 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,720 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:55:59,727 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:55:59,729 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:56:00,162 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:56:00,162 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:56:01,787 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:56:01,807 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:56:01,825 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-20 23:56:01,828 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-20 23:56:01,828 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-20 23:56:01,832 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,834 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,841 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,844 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,849 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,853 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,859 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,876 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,883 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,890 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,897 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,904 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,913 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,939 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,954 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-20 23:56:01,966 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:56:01,970 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:56:01,977 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:56:01,977 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-20 23:56:02,292 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:56:02,293 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-20 23:56:02,293 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 113 [2018-01-20 23:56:02,293 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-20 23:56:02,294 INFO L409 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-01-20 23:56:02,294 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-01-20 23:56:02,294 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4326, Invalid=8330, Unknown=0, NotChecked=0, Total=12656 [2018-01-20 23:56:02,294 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 76 states. [2018-01-20 23:56:02,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-20 23:56:02,365 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-20 23:56:02,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-20 23:56:02,366 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 53 [2018-01-20 23:56:02,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-20 23:56:02,367 INFO L225 Difference]: With dead ends: 64 [2018-01-20 23:56:02,367 INFO L226 Difference]: Without dead ends: 55 [2018-01-20 23:56:02,367 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5423 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=4403, Invalid=8479, Unknown=0, NotChecked=0, Total=12882 [2018-01-20 23:56:02,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-20 23:56:02,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-20 23:56:02,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-20 23:56:02,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-20 23:56:02,371 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-20 23:56:02,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-20 23:56:02,371 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-20 23:56:02,371 INFO L433 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-01-20 23:56:02,371 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-20 23:56:02,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-20 23:56:02,372 INFO L314 BasicCegarLoop]: Found error trace [2018-01-20 23:56:02,372 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-20 23:56:02,372 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-20 23:56:02,372 INFO L82 PathProgramCache]: Analyzing trace with hash 115035920, now seen corresponding path program 36 times [2018-01-20 23:56:02,373 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-20 23:56:02,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:56:02,373 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-20 23:56:02,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-20 23:56:02,373 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-20 23:56:02,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-20 23:56:02,386 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-20 23:56:02,908 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:56:02,908 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:56:02,908 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-20 23:56:02,908 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-20 23:56:02,909 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-20 23:56:02,909 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-20 23:56:02,909 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-20 23:56:02,914 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-20 23:56:02,915 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-20 23:56:02,921 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,923 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,924 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,925 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,926 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,927 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,928 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,929 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,930 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,931 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,932 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,933 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,934 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,935 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,939 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,940 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,941 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-20 23:56:02,942 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-20 23:56:02,943 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-20 23:56:03,368 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-20 23:56:03,368 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-20 23:56:03,944 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-20 23:56:03,944 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-20 23:56:03,946 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-20 23:56:03,946 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-20 23:56:03,946 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-20 23:56:03,946 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-20 23:56:03,946 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-20 23:56:03,946 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-20 23:56:03,946 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-20 23:56:03,947 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-20 23:56:03,947 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-20 23:56:03,947 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-20 23:56:03,947 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-20 23:56:03,948 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.01 11:56:03 BoogieIcfgContainer [2018-01-20 23:56:03,948 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-20 23:56:03,949 INFO L168 Benchmark]: Toolchain (without parser) took 55281.83 ms. Allocated memory was 307.8 MB in the beginning and 856.2 MB in the end (delta: 548.4 MB). Free memory was 268.7 MB in the beginning and 414.0 MB in the end (delta: -145.3 MB). Peak memory consumption was 403.1 MB. Max. memory is 5.3 GB. [2018-01-20 23:56:03,949 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 307.8 MB. Free memory is still 273.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-20 23:56:03,949 INFO L168 Benchmark]: CACSL2BoogieTranslator took 167.30 ms. Allocated memory is still 307.8 MB. Free memory was 267.7 MB in the beginning and 260.6 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-20 23:56:03,949 INFO L168 Benchmark]: Boogie Preprocessor took 38.55 ms. Allocated memory is still 307.8 MB. Free memory was 260.6 MB in the beginning and 258.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-20 23:56:03,950 INFO L168 Benchmark]: RCFGBuilder took 200.71 ms. Allocated memory is still 307.8 MB. Free memory was 258.6 MB in the beginning and 246.5 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-20 23:56:03,950 INFO L168 Benchmark]: TraceAbstraction took 54868.57 ms. Allocated memory was 307.8 MB in the beginning and 856.2 MB in the end (delta: 548.4 MB). Free memory was 245.6 MB in the beginning and 414.0 MB in the end (delta: -168.4 MB). Peak memory consumption was 380.0 MB. Max. memory is 5.3 GB. [2018-01-20 23:56:03,952 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 307.8 MB. Free memory is still 273.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 167.30 ms. Allocated memory is still 307.8 MB. Free memory was 267.7 MB in the beginning and 260.6 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 38.55 ms. Allocated memory is still 307.8 MB. Free memory was 260.6 MB in the beginning and 258.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 200.71 ms. Allocated memory is still 307.8 MB. Free memory was 258.6 MB in the beginning and 246.5 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 54868.57 ms. Allocated memory was 307.8 MB in the beginning and 856.2 MB in the end (delta: 548.4 MB). Free memory was 245.6 MB in the beginning and 414.0 MB in the end (delta: -168.4 MB). Peak memory consumption was 380.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 18 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 126 LocStat_NO_SUPPORTING_DISEQUALITIES : 29 LocStat_NO_DISJUNCTIONS : -36 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 25 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 35 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 25 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.539529 RENAME_VARIABLES(MILLISECONDS) : 0.158665 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.475341 PROJECTAWAY(MILLISECONDS) : 0.130798 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.169030 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.201894 ADD_EQUALITY(MILLISECONDS) : 0.065034 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.021345 #CONJOIN_DISJUNCTIVE : 34 #RENAME_VARIABLES : 64 #UNFREEZE : 0 #CONJOIN : 64 #PROJECTAWAY : 66 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 64 #ADD_EQUALITY : 35 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 55 with TraceHistMax 36, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 88 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 54.6s OverallTime, 37 OverallIterations, 36 TraceHistogramMax, 2.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 615 SDtfs, 117 SDslu, 11554 SDs, 0 SdLazy, 2569 SolverSat, 135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5780 GetRequests, 3572 SyntacticMatches, 70 SemanticMatches, 2138 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69020 ImplicationChecksByTransitivity, 33.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=55occurred in iteration=36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 36 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 2.8s SatisfiabilityAnalysisTime, 45.8s InterpolantComputationTime, 3798 NumberOfCodeBlocks, 3798 NumberOfCodeBlocksAsserted, 460 NumberOfCheckSat, 6142 ConstructedInterpolants, 0 QuantifiedInterpolants, 973390 SizeOfPredicates, 70 NumberOfNonLiveVariables, 8330 ConjunctsInSsa, 1470 ConjunctsInUnsatCore, 176 InterpolantComputations, 1 PerfectInterpolantSequences, 0/38850 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 22 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-20_23-56-03-961.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-20_23-56-03-961.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-20_23-56-03-961.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-20_23-56-03-961.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-20_23-56-03-961.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-20_23-56-03-961.csv Completed graceful shutdown