java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 00:32:24,729 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 00:32:24,731 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 00:32:24,745 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 00:32:24,745 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 00:32:24,746 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 00:32:24,748 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 00:32:24,749 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 00:32:24,752 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 00:32:24,753 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 00:32:24,754 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 00:32:24,754 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 00:32:24,755 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 00:32:24,757 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 00:32:24,757 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 00:32:24,760 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 00:32:24,762 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 00:32:24,765 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 00:32:24,766 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 00:32:24,767 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 00:32:24,770 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 00:32:24,777 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-21 00:32:24,787 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 00:32:24,787 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 00:32:24,788 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 00:32:24,788 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 00:32:24,789 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 00:32:24,789 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-21 00:32:24,789 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 00:32:24,789 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 00:32:24,790 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 00:32:24,790 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 00:32:24,790 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 00:32:24,791 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 00:32:24,791 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 00:32:24,791 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 00:32:24,791 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 00:32:24,791 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 00:32:24,792 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 00:32:24,792 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 00:32:24,792 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 00:32:24,792 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 00:32:24,792 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 00:32:24,793 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 00:32:24,793 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 00:32:24,793 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 00:32:24,793 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 00:32:24,793 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 00:32:24,794 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 00:32:24,794 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 00:32:24,794 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 00:32:24,794 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 00:32:24,794 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 00:32:24,795 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 00:32:24,795 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 00:32:24,795 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 00:32:24,795 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 00:32:24,795 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 00:32:24,796 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 00:32:24,796 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 00:32:24,797 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 00:32:24,832 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 00:32:24,846 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 00:32:24,850 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 00:32:24,852 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 00:32:24,852 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 00:32:24,853 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i [2018-01-21 00:32:25,030 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 00:32:25,033 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 00:32:25,034 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 00:32:25,034 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 00:32:25,039 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 00:32:25,040 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,043 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27e13832 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25, skipping insertion in model container [2018-01-21 00:32:25,044 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,059 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 00:32:25,098 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 00:32:25,227 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 00:32:25,255 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 00:32:25,264 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25 WrapperNode [2018-01-21 00:32:25,264 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 00:32:25,265 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 00:32:25,265 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 00:32:25,265 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 00:32:25,277 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,277 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,286 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,286 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,290 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,293 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,294 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (1/1) ... [2018-01-21 00:32:25,295 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 00:32:25,296 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 00:32:25,296 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 00:32:25,296 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 00:32:25,297 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 00:32:25,344 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 00:32:25,344 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 00:32:25,344 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum [2018-01-21 00:32:25,344 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum2 [2018-01-21 00:32:25,344 INFO L136 BoogieDeclarations]: Found implementation of procedure dummy_abort [2018-01-21 00:32:25,344 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 00:32:25,344 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-21 00:32:25,345 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-21 00:32:25,345 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 00:32:25,345 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 00:32:25,345 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 00:32:25,345 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 00:32:25,345 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 00:32:25,345 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 00:32:25,346 INFO L128 BoogieDeclarations]: Found specification of procedure Sum [2018-01-21 00:32:25,346 INFO L128 BoogieDeclarations]: Found specification of procedure Sum2 [2018-01-21 00:32:25,346 INFO L128 BoogieDeclarations]: Found specification of procedure dummy_abort [2018-01-21 00:32:25,346 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 00:32:25,346 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 00:32:25,346 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 00:32:25,586 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 00:32:25,586 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 12:32:25 BoogieIcfgContainer [2018-01-21 00:32:25,587 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 00:32:25,588 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 00:32:25,588 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 00:32:25,590 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 00:32:25,591 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 12:32:25" (1/3) ... [2018-01-21 00:32:25,592 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@748a83bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 12:32:25, skipping insertion in model container [2018-01-21 00:32:25,592 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:32:25" (2/3) ... [2018-01-21 00:32:25,593 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@748a83bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 12:32:25, skipping insertion in model container [2018-01-21 00:32:25,593 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 12:32:25" (3/3) ... [2018-01-21 00:32:25,595 INFO L105 eAbstractionObserver]: Analyzing ICFG 20051113-1.c_false-valid-memtrack.i [2018-01-21 00:32:25,604 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 00:32:25,613 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-01-21 00:32:25,657 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:32:25,657 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:32:25,657 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:32:25,657 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:32:25,657 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:32:25,658 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:32:25,658 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:32:25,658 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == Sum2Err0EnsuresViolation======== [2018-01-21 00:32:25,659 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:32:25,678 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 00:32:25,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 00:32:25,686 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:25,687 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:25,687 INFO L371 AbstractCegarLoop]: === Iteration 1 === [Sum2Err0EnsuresViolation]=== [2018-01-21 00:32:25,691 INFO L82 PathProgramCache]: Analyzing trace with hash -1865297126, now seen corresponding path program 1 times [2018-01-21 00:32:25,693 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:25,739 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:25,739 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:25,739 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:25,740 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:25,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:25,810 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:25,878 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:25,880 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:25,881 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 00:32:25,881 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:25,884 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 00:32:25,900 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 00:32:25,901 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:25,904 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 00:32:26,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:26,014 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 00:32:26,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 00:32:26,015 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 32 [2018-01-21 00:32:26,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:26,021 INFO L225 Difference]: With dead ends: 88 [2018-01-21 00:32:26,021 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 00:32:26,024 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 00:32:26,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 00:32:26,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 00:32:26,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 00:32:26,046 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 32 [2018-01-21 00:32:26,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:26,046 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 00:32:26,046 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 00:32:26,046 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 00:32:26,046 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 00:32:26,051 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-01-21 00:32:26,103 INFO L401 ceAbstractionStarter]: For program point Sum2FINAL(lines 658 666) no Hoare annotation was computed. [2018-01-21 00:32:26,103 INFO L401 ceAbstractionStarter]: For program point Sum2Err0EnsuresViolation(line 657) no Hoare annotation was computed. [2018-01-21 00:32:26,104 INFO L401 ceAbstractionStarter]: For program point L663(line 663) no Hoare annotation was computed. [2018-01-21 00:32:26,104 INFO L404 ceAbstractionStarter]: At program point L662''''(lines 662 664) the Hoare annotation is: true [2018-01-21 00:32:26,104 INFO L401 ceAbstractionStarter]: For program point L662(line 662) no Hoare annotation was computed. [2018-01-21 00:32:26,104 INFO L401 ceAbstractionStarter]: For program point L663'(line 663) no Hoare annotation was computed. [2018-01-21 00:32:26,104 INFO L401 ceAbstractionStarter]: For program point L662'(line 662) no Hoare annotation was computed. [2018-01-21 00:32:26,105 INFO L401 ceAbstractionStarter]: For program point L662'''''(lines 662 664) no Hoare annotation was computed. [2018-01-21 00:32:26,105 INFO L401 ceAbstractionStarter]: For program point L662'''(lines 662 664) no Hoare annotation was computed. [2018-01-21 00:32:26,105 INFO L404 ceAbstractionStarter]: At program point Sum2ENTRY(lines 658 666) the Hoare annotation is: true [2018-01-21 00:32:26,105 INFO L401 ceAbstractionStarter]: For program point Sum2EXIT(lines 658 666) no Hoare annotation was computed. [2018-01-21 00:32:26,105 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.initErr0EnsuresViolation(lines 1 686) no Hoare annotation was computed. [2018-01-21 00:32:26,105 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(lines 1 686) no Hoare annotation was computed. [2018-01-21 00:32:26,105 INFO L404 ceAbstractionStarter]: At program point ULTIMATE.initENTRY(lines 1 686) the Hoare annotation is: true [2018-01-21 00:32:26,105 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.initFINAL(lines 1 686) no Hoare annotation was computed. [2018-01-21 00:32:26,105 INFO L404 ceAbstractionStarter]: At program point #Ultimate.C_memsetENTRY(line -1) the Hoare annotation is: true [2018-01-21 00:32:26,106 INFO L404 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-01-21 00:32:26,106 INFO L401 ceAbstractionStarter]: For program point #Ultimate.C_memsetFINAL(line -1) no Hoare annotation was computed. [2018-01-21 00:32:26,106 INFO L401 ceAbstractionStarter]: For program point #Ultimate.C_memsetEXIT(line -1) no Hoare annotation was computed. [2018-01-21 00:32:26,106 INFO L404 ceAbstractionStarter]: At program point dummy_abortFINAL(lines 667 669) the Hoare annotation is: true [2018-01-21 00:32:26,106 INFO L401 ceAbstractionStarter]: For program point dummy_abortEXIT(lines 667 669) no Hoare annotation was computed. [2018-01-21 00:32:26,106 INFO L401 ceAbstractionStarter]: For program point dummy_abortErr0EnsuresViolation(lines 667 669) no Hoare annotation was computed. [2018-01-21 00:32:26,106 INFO L404 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(lines 1 686) the Hoare annotation is: true [2018-01-21 00:32:26,106 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(lines 1 686) no Hoare annotation was computed. [2018-01-21 00:32:26,106 INFO L404 ceAbstractionStarter]: At program point L1(lines 1 686) the Hoare annotation is: true [2018-01-21 00:32:26,107 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.startErr0EnsuresViolation(lines 1 686) no Hoare annotation was computed. [2018-01-21 00:32:26,107 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(lines 1 686) no Hoare annotation was computed. [2018-01-21 00:32:26,107 INFO L401 ceAbstractionStarter]: For program point L652'''(lines 652 654) no Hoare annotation was computed. [2018-01-21 00:32:26,107 INFO L401 ceAbstractionStarter]: For program point L652(line 652) no Hoare annotation was computed. [2018-01-21 00:32:26,107 INFO L401 ceAbstractionStarter]: For program point L652'''''(lines 652 654) no Hoare annotation was computed. [2018-01-21 00:32:26,107 INFO L401 ceAbstractionStarter]: For program point SumEXIT(lines 648 656) no Hoare annotation was computed. [2018-01-21 00:32:26,107 INFO L401 ceAbstractionStarter]: For program point L652'(line 652) no Hoare annotation was computed. [2018-01-21 00:32:26,107 INFO L404 ceAbstractionStarter]: At program point L652''''(lines 652 654) the Hoare annotation is: true [2018-01-21 00:32:26,107 INFO L401 ceAbstractionStarter]: For program point L653(line 653) no Hoare annotation was computed. [2018-01-21 00:32:26,108 INFO L404 ceAbstractionStarter]: At program point SumENTRY(lines 648 656) the Hoare annotation is: true [2018-01-21 00:32:26,108 INFO L401 ceAbstractionStarter]: For program point SumErr0EnsuresViolation(line 647) no Hoare annotation was computed. [2018-01-21 00:32:26,108 INFO L401 ceAbstractionStarter]: For program point L653'(line 653) no Hoare annotation was computed. [2018-01-21 00:32:26,108 INFO L401 ceAbstractionStarter]: For program point SumFINAL(lines 648 656) no Hoare annotation was computed. [2018-01-21 00:32:26,108 INFO L404 ceAbstractionStarter]: At program point L681(line 681) the Hoare annotation is: true [2018-01-21 00:32:26,109 INFO L401 ceAbstractionStarter]: For program point L680(line 680) no Hoare annotation was computed. [2018-01-21 00:32:26,109 INFO L404 ceAbstractionStarter]: At program point L683(line 683) the Hoare annotation is: true [2018-01-21 00:32:26,109 INFO L401 ceAbstractionStarter]: For program point L682(line 682) no Hoare annotation was computed. [2018-01-21 00:32:26,109 INFO L401 ceAbstractionStarter]: For program point L682''(lines 682 683) no Hoare annotation was computed. [2018-01-21 00:32:26,109 INFO L401 ceAbstractionStarter]: For program point L672'(line 672) no Hoare annotation was computed. [2018-01-21 00:32:26,109 INFO L401 ceAbstractionStarter]: For program point L682'(lines 682 683) no Hoare annotation was computed. [2018-01-21 00:32:26,109 INFO L404 ceAbstractionStarter]: At program point L680'(lines 680 681) the Hoare annotation is: true [2018-01-21 00:32:26,109 INFO L401 ceAbstractionStarter]: For program point mainErr0EnsuresViolation(lines 670 686) no Hoare annotation was computed. [2018-01-21 00:32:26,110 INFO L401 ceAbstractionStarter]: For program point L674(line 674) no Hoare annotation was computed. [2018-01-21 00:32:26,110 INFO L401 ceAbstractionStarter]: For program point L673(line 673) no Hoare annotation was computed. [2018-01-21 00:32:26,110 INFO L404 ceAbstractionStarter]: At program point L672(line 672) the Hoare annotation is: true [2018-01-21 00:32:26,110 INFO L401 ceAbstractionStarter]: For program point L671(line 671) no Hoare annotation was computed. [2018-01-21 00:32:26,110 INFO L401 ceAbstractionStarter]: For program point L678(line 678) no Hoare annotation was computed. [2018-01-21 00:32:26,110 INFO L401 ceAbstractionStarter]: For program point mainFINAL(lines 670 686) no Hoare annotation was computed. [2018-01-21 00:32:26,110 INFO L401 ceAbstractionStarter]: For program point L673'(line 673) no Hoare annotation was computed. [2018-01-21 00:32:26,111 INFO L401 ceAbstractionStarter]: For program point L677(line 677) no Hoare annotation was computed. [2018-01-21 00:32:26,111 INFO L401 ceAbstractionStarter]: For program point L676(line 676) no Hoare annotation was computed. [2018-01-21 00:32:26,111 INFO L401 ceAbstractionStarter]: For program point L675(line 675) no Hoare annotation was computed. [2018-01-21 00:32:26,111 INFO L404 ceAbstractionStarter]: At program point L679(line 679) the Hoare annotation is: true [2018-01-21 00:32:26,111 INFO L401 ceAbstractionStarter]: For program point mainEXIT(lines 670 686) no Hoare annotation was computed. [2018-01-21 00:32:26,111 INFO L404 ceAbstractionStarter]: At program point mainENTRY(lines 670 686) the Hoare annotation is: true [2018-01-21 00:32:26,115 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:32:26,115 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:32:26,115 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:32:26,116 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:32:26,116 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:32:26,116 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:32:26,116 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:32:26,116 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 00:32:26,116 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:32:26,119 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 00:32:26,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 00:32:26,119 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,120 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 00:32:26,120 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 00:32:26,120 INFO L82 PathProgramCache]: Analyzing trace with hash 128549, now seen corresponding path program 1 times [2018-01-21 00:32:26,120 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,122 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,122 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 00:32:26,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 00:32:26,148 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 00:32:26,152 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 00:32:26,156 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:32:26,157 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:32:26,157 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:32:26,157 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:32:26,157 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:32:26,157 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:32:26,157 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:32:26,157 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == dummy_abortErr0EnsuresViolation======== [2018-01-21 00:32:26,158 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:32:26,160 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 00:32:26,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 00:32:26,161 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,162 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:26,162 INFO L371 AbstractCegarLoop]: === Iteration 1 === [dummy_abortErr0EnsuresViolation]=== [2018-01-21 00:32:26,162 INFO L82 PathProgramCache]: Analyzing trace with hash 1195103445, now seen corresponding path program 1 times [2018-01-21 00:32:26,162 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,163 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,163 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,163 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,163 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:26,185 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:26,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:26,210 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:26,210 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 00:32:26,210 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:26,211 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 00:32:26,211 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 00:32:26,211 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,211 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 00:32:26,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:26,220 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 00:32:26,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 00:32:26,220 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 29 [2018-01-21 00:32:26,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:26,220 INFO L225 Difference]: With dead ends: 88 [2018-01-21 00:32:26,221 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 00:32:26,221 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 00:32:26,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 00:32:26,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 00:32:26,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 00:32:26,222 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 29 [2018-01-21 00:32:26,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:26,222 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 00:32:26,222 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 00:32:26,223 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 00:32:26,223 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 00:32:26,225 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:32:26,225 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:32:26,225 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:32:26,225 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:32:26,225 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:32:26,225 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:32:26,225 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:32:26,225 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 00:32:26,226 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:32:26,227 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 00:32:26,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 00:32:26,230 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,230 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:26,230 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:32:26,230 INFO L82 PathProgramCache]: Analyzing trace with hash 1502761729, now seen corresponding path program 1 times [2018-01-21 00:32:26,231 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,232 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,232 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:26,251 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:26,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:26,277 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:26,277 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 00:32:26,277 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:26,278 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 00:32:26,278 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 00:32:26,278 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,278 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 00:32:26,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:26,286 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 00:32:26,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 00:32:26,286 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 39 [2018-01-21 00:32:26,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:26,290 INFO L225 Difference]: With dead ends: 88 [2018-01-21 00:32:26,290 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 00:32:26,290 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 00:32:26,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 00:32:26,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 00:32:26,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 59 transitions. [2018-01-21 00:32:26,309 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 59 transitions. Word has length 39 [2018-01-21 00:32:26,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:26,309 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 59 transitions. [2018-01-21 00:32:26,309 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 00:32:26,309 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 59 transitions. [2018-01-21 00:32:26,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 00:32:26,312 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,312 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:26,312 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:32:26,313 INFO L82 PathProgramCache]: Analyzing trace with hash -809322687, now seen corresponding path program 1 times [2018-01-21 00:32:26,313 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,314 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,314 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,314 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,314 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:26,341 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:26,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:26,423 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:26,423 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-21 00:32:26,423 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:26,425 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-21 00:32:26,426 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-21 00:32:26,426 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-21 00:32:26,426 INFO L87 Difference]: Start difference. First operand 54 states and 59 transitions. Second operand 5 states. [2018-01-21 00:32:26,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:26,512 INFO L93 Difference]: Finished difference Result 69 states and 75 transitions. [2018-01-21 00:32:26,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 00:32:26,513 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-01-21 00:32:26,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:26,515 INFO L225 Difference]: With dead ends: 69 [2018-01-21 00:32:26,515 INFO L226 Difference]: Without dead ends: 64 [2018-01-21 00:32:26,517 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-21 00:32:26,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-01-21 00:32:26,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2018-01-21 00:32:26,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-21 00:32:26,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 68 transitions. [2018-01-21 00:32:26,526 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 68 transitions. Word has length 43 [2018-01-21 00:32:26,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:26,527 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 68 transitions. [2018-01-21 00:32:26,527 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-21 00:32:26,527 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 68 transitions. [2018-01-21 00:32:26,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 00:32:26,528 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,528 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:26,529 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:32:26,529 INFO L82 PathProgramCache]: Analyzing trace with hash 2078335056, now seen corresponding path program 1 times [2018-01-21 00:32:26,529 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,530 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,530 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,530 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,531 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:26,550 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:26,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:26,602 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:26,602 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 00:32:26,602 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:26,603 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 00:32:26,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 00:32:26,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 00:32:26,603 INFO L87 Difference]: Start difference. First operand 62 states and 68 transitions. Second operand 4 states. [2018-01-21 00:32:26,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:26,724 INFO L93 Difference]: Finished difference Result 62 states and 68 transitions. [2018-01-21 00:32:26,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 00:32:26,724 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 46 [2018-01-21 00:32:26,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:26,725 INFO L225 Difference]: With dead ends: 62 [2018-01-21 00:32:26,725 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 00:32:26,726 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 00:32:26,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 00:32:26,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 00:32:26,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 00:32:26,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 00:32:26,727 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 46 [2018-01-21 00:32:26,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:26,727 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 00:32:26,727 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 00:32:26,727 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 00:32:26,728 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 00:32:26,729 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:32:26,730 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:32:26,730 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:32:26,730 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:32:26,730 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:32:26,730 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:32:26,730 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:32:26,730 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == SumErr0EnsuresViolation======== [2018-01-21 00:32:26,730 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:32:26,731 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 00:32:26,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 00:32:26,732 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,732 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:26,732 INFO L371 AbstractCegarLoop]: === Iteration 1 === [SumErr0EnsuresViolation]=== [2018-01-21 00:32:26,732 INFO L82 PathProgramCache]: Analyzing trace with hash 112235281, now seen corresponding path program 1 times [2018-01-21 00:32:26,732 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,733 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,733 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,733 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,733 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:26,743 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:26,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:26,758 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:26,759 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 00:32:26,759 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:26,759 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 00:32:26,759 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 00:32:26,760 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,760 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 00:32:26,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:26,766 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 00:32:26,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 00:32:26,766 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 25 [2018-01-21 00:32:26,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:26,767 INFO L225 Difference]: With dead ends: 88 [2018-01-21 00:32:26,767 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 00:32:26,768 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 00:32:26,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 00:32:26,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 00:32:26,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 00:32:26,769 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 25 [2018-01-21 00:32:26,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:26,769 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 00:32:26,769 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 00:32:26,769 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 00:32:26,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 00:32:26,771 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:32:26,771 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:32:26,772 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:32:26,772 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:32:26,772 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:32:26,772 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:32:26,772 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:32:26,772 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 00:32:26,772 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:32:26,774 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 00:32:26,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 00:32:26,775 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,775 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:26,775 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:26,776 INFO L82 PathProgramCache]: Analyzing trace with hash -2005137936, now seen corresponding path program 1 times [2018-01-21 00:32:26,776 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,777 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,777 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,777 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,777 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:26,789 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:26,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:26,804 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:26,804 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 00:32:26,804 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:26,805 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 00:32:26,805 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 00:32:26,805 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,805 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 00:32:26,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:26,811 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 00:32:26,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 00:32:26,811 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 37 [2018-01-21 00:32:26,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:26,812 INFO L225 Difference]: With dead ends: 88 [2018-01-21 00:32:26,813 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 00:32:26,813 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:32:26,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 00:32:26,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 00:32:26,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 00:32:26,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2018-01-21 00:32:26,820 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 37 [2018-01-21 00:32:26,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:26,820 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2018-01-21 00:32:26,821 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 00:32:26,821 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2018-01-21 00:32:26,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 00:32:26,822 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,822 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:26,822 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:26,823 INFO L82 PathProgramCache]: Analyzing trace with hash -336037328, now seen corresponding path program 1 times [2018-01-21 00:32:26,823 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,824 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,824 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,824 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,824 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:26,839 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:26,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:26,914 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:26,914 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-21 00:32:26,914 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:26,915 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-21 00:32:26,915 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-21 00:32:26,915 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-21 00:32:26,916 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand 5 states. [2018-01-21 00:32:26,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:26,942 INFO L93 Difference]: Finished difference Result 65 states and 71 transitions. [2018-01-21 00:32:26,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 00:32:26,943 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2018-01-21 00:32:26,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:26,944 INFO L225 Difference]: With dead ends: 65 [2018-01-21 00:32:26,944 INFO L226 Difference]: Without dead ends: 62 [2018-01-21 00:32:26,944 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-21 00:32:26,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-01-21 00:32:26,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 60. [2018-01-21 00:32:26,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-21 00:32:26,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 66 transitions. [2018-01-21 00:32:26,950 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 66 transitions. Word has length 41 [2018-01-21 00:32:26,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:26,950 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 66 transitions. [2018-01-21 00:32:26,950 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-21 00:32:26,950 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 66 transitions. [2018-01-21 00:32:26,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 00:32:26,951 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:26,951 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:26,951 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:26,951 INFO L82 PathProgramCache]: Analyzing trace with hash 609983231, now seen corresponding path program 1 times [2018-01-21 00:32:26,951 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:26,952 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,952 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:26,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:26,953 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:26,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:26,968 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:27,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:32:27,013 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:27,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-21 00:32:27,014 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:27,014 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-21 00:32:27,014 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-21 00:32:27,014 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-21 00:32:27,015 INFO L87 Difference]: Start difference. First operand 60 states and 66 transitions. Second operand 5 states. [2018-01-21 00:32:27,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:27,049 INFO L93 Difference]: Finished difference Result 96 states and 106 transitions. [2018-01-21 00:32:27,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 00:32:27,049 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2018-01-21 00:32:27,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:27,051 INFO L225 Difference]: With dead ends: 96 [2018-01-21 00:32:27,051 INFO L226 Difference]: Without dead ends: 69 [2018-01-21 00:32:27,051 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-21 00:32:27,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-01-21 00:32:27,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 67. [2018-01-21 00:32:27,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-01-21 00:32:27,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 74 transitions. [2018-01-21 00:32:27,059 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 74 transitions. Word has length 44 [2018-01-21 00:32:27,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:27,059 INFO L432 AbstractCegarLoop]: Abstraction has 67 states and 74 transitions. [2018-01-21 00:32:27,060 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-21 00:32:27,060 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 74 transitions. [2018-01-21 00:32:27,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 00:32:27,061 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:27,061 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:27,061 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:27,061 INFO L82 PathProgramCache]: Analyzing trace with hash 1680046266, now seen corresponding path program 1 times [2018-01-21 00:32:27,062 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:27,062 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:27,063 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:27,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:27,063 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:27,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:27,085 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:27,334 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 00:32:27,334 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:32:27,334 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-21 00:32:27,335 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:27,335 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 00:32:27,335 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 00:32:27,335 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-21 00:32:27,336 INFO L87 Difference]: Start difference. First operand 67 states and 74 transitions. Second operand 6 states. [2018-01-21 00:32:27,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:27,483 INFO L93 Difference]: Finished difference Result 76 states and 82 transitions. [2018-01-21 00:32:27,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 00:32:27,484 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 47 [2018-01-21 00:32:27,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:27,485 INFO L225 Difference]: With dead ends: 76 [2018-01-21 00:32:27,485 INFO L226 Difference]: Without dead ends: 65 [2018-01-21 00:32:27,486 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 6 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-21 00:32:27,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-01-21 00:32:27,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 62. [2018-01-21 00:32:27,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-21 00:32:27,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 68 transitions. [2018-01-21 00:32:27,493 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 68 transitions. Word has length 47 [2018-01-21 00:32:27,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:27,495 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 68 transitions. [2018-01-21 00:32:27,495 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 00:32:27,495 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 68 transitions. [2018-01-21 00:32:27,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 00:32:27,496 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:27,497 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:27,497 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:27,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1025820889, now seen corresponding path program 1 times [2018-01-21 00:32:27,497 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:27,498 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:27,498 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:27,499 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:27,499 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:27,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:27,515 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:27,748 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 00:32:27,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:27,748 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:27,750 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 51 with the following transitions: [2018-01-21 00:32:27,751 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [8], [10], [11], [12], [14], [18], [19], [21], [27], [28], [29], [31], [35], [36], [39], [49], [50], [52], [53], [55], [56], [57], [58], [59], [60], [61], [62], [66], [72], [78], [80], [82], [83], [84], [90], [91], [92], [93], [94], [95], [96], [97], [100], [101], [102] [2018-01-21 00:32:27,802 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 00:32:27,802 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 00:32:28,071 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 00:32:28,073 INFO L268 AbstractInterpreter]: Visited 48 different actions 60 times. Merged at 11 different actions 11 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 20 variables. [2018-01-21 00:32:28,087 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 00:32:28,087 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:28,087 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:28,101 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:28,101 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:28,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:28,139 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:28,219 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 00:32:28,220 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:28,285 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 00:32:28,306 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-21 00:32:28,307 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [8] total 12 [2018-01-21 00:32:28,307 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:32:28,307 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 00:32:28,307 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 00:32:28,307 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2018-01-21 00:32:28,308 INFO L87 Difference]: Start difference. First operand 62 states and 68 transitions. Second operand 4 states. [2018-01-21 00:32:28,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:28,336 INFO L93 Difference]: Finished difference Result 115 states and 127 transitions. [2018-01-21 00:32:28,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 00:32:28,336 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 50 [2018-01-21 00:32:28,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:28,337 INFO L225 Difference]: With dead ends: 115 [2018-01-21 00:32:28,338 INFO L226 Difference]: Without dead ends: 63 [2018-01-21 00:32:28,338 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 96 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-01-21 00:32:28,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-21 00:32:28,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-01-21 00:32:28,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-01-21 00:32:28,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 69 transitions. [2018-01-21 00:32:28,345 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 69 transitions. Word has length 50 [2018-01-21 00:32:28,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:28,345 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 69 transitions. [2018-01-21 00:32:28,345 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 00:32:28,345 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 69 transitions. [2018-01-21 00:32:28,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 00:32:28,346 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:28,346 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:28,346 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:28,346 INFO L82 PathProgramCache]: Analyzing trace with hash -1453151358, now seen corresponding path program 1 times [2018-01-21 00:32:28,347 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:28,348 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:28,348 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:28,348 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:28,348 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:28,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:28,365 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:28,628 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 00:32:28,628 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:28,628 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:28,629 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 52 with the following transitions: [2018-01-21 00:32:28,629 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [8], [10], [11], [12], [14], [18], [19], [21], [25], [27], [28], [29], [31], [35], [36], [39], [49], [50], [52], [53], [55], [56], [57], [58], [59], [60], [61], [62], [66], [72], [78], [80], [82], [83], [84], [90], [91], [92], [93], [94], [95], [96], [97], [100], [101], [102] [2018-01-21 00:32:28,632 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 00:32:28,632 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 00:32:28,814 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 00:32:28,814 INFO L268 AbstractInterpreter]: Visited 49 different actions 65 times. Merged at 14 different actions 14 times. Never widened. Found 3 fixpoints after 3 different actions. Largest state had 20 variables. [2018-01-21 00:32:28,824 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 00:32:28,824 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:28,825 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:28,836 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:28,836 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:28,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:28,868 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:28,910 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 00:32:28,911 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:29,060 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 00:32:29,094 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:29,094 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 4 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:29,100 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:29,100 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:29,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:29,154 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:29,160 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 00:32:29,160 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:29,231 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 00:32:29,234 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:29,234 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 5, 5, 5, 5] total 14 [2018-01-21 00:32:29,234 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:29,234 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 00:32:29,235 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 00:32:29,235 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-01-21 00:32:29,235 INFO L87 Difference]: Start difference. First operand 63 states and 69 transitions. Second operand 11 states. [2018-01-21 00:32:29,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:29,724 INFO L93 Difference]: Finished difference Result 118 states and 130 transitions. [2018-01-21 00:32:29,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 00:32:29,724 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 51 [2018-01-21 00:32:29,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:29,725 INFO L225 Difference]: With dead ends: 118 [2018-01-21 00:32:29,725 INFO L226 Difference]: Without dead ends: 63 [2018-01-21 00:32:29,725 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 222 GetRequests, 196 SyntacticMatches, 11 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=52, Invalid=220, Unknown=0, NotChecked=0, Total=272 [2018-01-21 00:32:29,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-21 00:32:29,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 60. [2018-01-21 00:32:29,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-21 00:32:29,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 65 transitions. [2018-01-21 00:32:29,732 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 65 transitions. Word has length 51 [2018-01-21 00:32:29,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:29,732 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 65 transitions. [2018-01-21 00:32:29,732 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 00:32:29,732 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 65 transitions. [2018-01-21 00:32:29,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 00:32:29,733 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:29,733 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:29,733 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:29,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1200306608, now seen corresponding path program 1 times [2018-01-21 00:32:29,733 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:29,734 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:29,735 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:29,735 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:29,735 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:29,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:29,752 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:30,063 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 00:32:30,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:30,063 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:30,063 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 56 with the following transitions: [2018-01-21 00:32:30,064 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [8], [10], [11], [12], [14], [18], [19], [21], [25], [27], [28], [31], [35], [36], [39], [41], [42], [43], [45], [49], [50], [52], [53], [55], [56], [57], [58], [59], [60], [61], [62], [69], [72], [78], [80], [82], [83], [84], [90], [91], [92], [93], [96], [97], [100], [101], [102] [2018-01-21 00:32:30,066 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 00:32:30,066 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 00:32:30,226 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 00:32:30,226 INFO L268 AbstractInterpreter]: Visited 50 different actions 77 times. Merged at 24 different actions 24 times. Never widened. Found 5 fixpoints after 5 different actions. Largest state had 20 variables. [2018-01-21 00:32:30,249 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 00:32:30,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:30,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:30,261 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:30,261 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:30,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:30,290 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:30,389 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 00:32:30,389 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:30,559 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 00:32:30,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:30,580 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:30,583 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:30,583 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:30,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:30,623 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:30,629 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 00:32:30,630 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:30,667 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 00:32:30,668 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:30,668 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6, 6, 6, 6] total 17 [2018-01-21 00:32:30,668 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:30,669 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 00:32:30,669 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 00:32:30,669 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-01-21 00:32:30,669 INFO L87 Difference]: Start difference. First operand 60 states and 65 transitions. Second operand 13 states. [2018-01-21 00:32:30,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:30,970 INFO L93 Difference]: Finished difference Result 121 states and 132 transitions. [2018-01-21 00:32:30,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 00:32:30,988 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2018-01-21 00:32:30,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:30,989 INFO L225 Difference]: With dead ends: 121 [2018-01-21 00:32:30,989 INFO L226 Difference]: Without dead ends: 70 [2018-01-21 00:32:30,989 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 210 SyntacticMatches, 8 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=87, Invalid=333, Unknown=0, NotChecked=0, Total=420 [2018-01-21 00:32:30,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-01-21 00:32:30,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 67. [2018-01-21 00:32:30,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-01-21 00:32:30,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 72 transitions. [2018-01-21 00:32:30,996 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 72 transitions. Word has length 55 [2018-01-21 00:32:30,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:30,996 INFO L432 AbstractCegarLoop]: Abstraction has 67 states and 72 transitions. [2018-01-21 00:32:30,996 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 00:32:30,996 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 72 transitions. [2018-01-21 00:32:30,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-21 00:32:30,997 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:30,997 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:30,997 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:30,998 INFO L82 PathProgramCache]: Analyzing trace with hash -2066944597, now seen corresponding path program 2 times [2018-01-21 00:32:30,998 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:30,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:30,999 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:30,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:30,999 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:31,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:31,018 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:31,093 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 00:32:31,093 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:31,093 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:31,093 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:31,094 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:31,094 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:31,094 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:31,103 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:32:31,103 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:32:31,125 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:31,142 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:31,144 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:31,147 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:31,212 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 00:32:31,212 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:31,294 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 00:32:31,315 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:31,315 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:31,318 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:32:31,318 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:32:31,336 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:31,362 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:31,375 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:31,380 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:31,385 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 00:32:31,385 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:31,412 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 00:32:31,413 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:31,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 00:32:31,414 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:31,414 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 00:32:31,414 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 00:32:31,414 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 00:32:31,414 INFO L87 Difference]: Start difference. First operand 67 states and 72 transitions. Second operand 12 states. [2018-01-21 00:32:31,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:31,445 INFO L93 Difference]: Finished difference Result 122 states and 132 transitions. [2018-01-21 00:32:31,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 00:32:31,446 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 62 [2018-01-21 00:32:31,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:31,447 INFO L225 Difference]: With dead ends: 122 [2018-01-21 00:32:31,447 INFO L226 Difference]: Without dead ends: 68 [2018-01-21 00:32:31,447 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 236 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 00:32:31,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-01-21 00:32:31,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2018-01-21 00:32:31,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-01-21 00:32:31,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 73 transitions. [2018-01-21 00:32:31,452 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 73 transitions. Word has length 62 [2018-01-21 00:32:31,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:31,452 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 73 transitions. [2018-01-21 00:32:31,452 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 00:32:31,452 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 73 transitions. [2018-01-21 00:32:31,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-21 00:32:31,453 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:31,453 INFO L322 BasicCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:31,453 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:31,453 INFO L82 PathProgramCache]: Analyzing trace with hash -1647895852, now seen corresponding path program 3 times [2018-01-21 00:32:31,453 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:31,454 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:31,454 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:31,454 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:31,455 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:31,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:31,471 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:31,566 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 00:32:31,566 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:31,567 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:31,567 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:31,567 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:31,567 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:31,567 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:31,574 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:32:31,575 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:32:31,590 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:31,601 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:31,606 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:31,610 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:31,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 00:32:31,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 00:32:31,670 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,671 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,674 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,674 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 00:32:31,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 00:32:31,706 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,707 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 00:32:31,709 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,718 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,718 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 00:32:31,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 00:32:31,750 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,750 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,751 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,752 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,753 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,753 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 00:32:31,755 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,780 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,786 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 00:32:31,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 00:32:31,816 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,817 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,818 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,818 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,819 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,820 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,826 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,828 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,829 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 00:32:31,830 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,855 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,862 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,862 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 00:32:31,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 00:32:31,891 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,892 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,893 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,894 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,895 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,895 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,896 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,897 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,897 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,898 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,899 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,902 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,903 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,905 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,907 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 00:32:31,910 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,943 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:31,951 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 00:32:31,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 00:32:31,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,979 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,980 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,982 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,983 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,984 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,984 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,986 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,987 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,987 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,988 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,989 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,990 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:31,990 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,001 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,002 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,003 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,004 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 00:32:32,006 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,059 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,069 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,069 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 00:32:32,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 00:32:32,098 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,098 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,099 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,099 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,100 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,101 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,101 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,102 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,102 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,103 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,103 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,104 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,105 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,105 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,106 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,106 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,107 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,107 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,108 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,108 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,109 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,110 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,110 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,111 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,112 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,112 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,113 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 00:32:32,115 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,166 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,166 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 00:32:32,373 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-01-21 00:32:32,374 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,375 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,375 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:121, output treesize:1 [2018-01-21 00:32:32,397 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-01-21 00:32:32,397 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:32,654 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-01-21 00:32:32,687 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:32,687 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:32,691 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:32:32,691 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:32:32,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:32,733 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:32,760 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:32,765 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:32,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 00:32:32,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 00:32:32,777 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,778 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,780 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 00:32:32,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 00:32:32,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 00:32:32,787 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,802 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,806 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,806 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 00:32:32,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 00:32:32,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,814 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,815 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 00:32:32,816 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,824 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 00:32:32,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 00:32:32,835 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,840 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,841 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,843 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,845 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 00:32:32,849 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,867 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,874 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,875 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 00:32:32,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 00:32:32,898 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,899 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,904 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,905 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,907 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,908 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,908 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,909 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,909 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,910 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,910 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,911 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,912 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,912 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 00:32:32,914 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,937 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:32,945 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 00:32:32,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 00:32:32,952 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,953 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,953 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,954 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,954 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,955 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,956 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,956 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,957 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,958 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,958 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,959 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,959 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,960 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,961 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,961 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,962 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,963 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,963 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,964 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,964 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:32,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 00:32:32,966 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:33,037 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:33,046 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:33,047 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 00:32:33,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 00:32:33,059 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,060 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,061 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,064 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,065 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,066 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,066 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,067 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,067 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,068 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,069 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,069 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,070 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,071 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,071 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,072 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,072 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,073 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,074 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,074 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,075 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,076 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,076 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,077 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,078 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,078 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,079 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:33,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 00:32:33,084 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:33,137 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:33,147 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:33,147 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 00:32:33,222 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-01-21 00:32:33,222 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:33,338 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-01-21 00:32:33,340 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:33,341 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 16, 7, 16, 7] total 28 [2018-01-21 00:32:33,341 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:33,341 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 00:32:33,341 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 00:32:33,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=633, Unknown=0, NotChecked=0, Total=756 [2018-01-21 00:32:33,342 INFO L87 Difference]: Start difference. First operand 68 states and 73 transitions. Second operand 22 states. [2018-01-21 00:32:33,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:33,740 INFO L93 Difference]: Finished difference Result 135 states and 146 transitions. [2018-01-21 00:32:33,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 00:32:33,740 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 63 [2018-01-21 00:32:33,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:33,741 INFO L225 Difference]: With dead ends: 135 [2018-01-21 00:32:33,741 INFO L226 Difference]: Without dead ends: 78 [2018-01-21 00:32:33,742 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 217 SyntacticMatches, 16 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 730 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=252, Invalid=1308, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 00:32:33,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-01-21 00:32:33,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 75. [2018-01-21 00:32:33,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-01-21 00:32:33,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 80 transitions. [2018-01-21 00:32:33,751 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 80 transitions. Word has length 63 [2018-01-21 00:32:33,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:33,751 INFO L432 AbstractCegarLoop]: Abstraction has 75 states and 80 transitions. [2018-01-21 00:32:33,751 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 00:32:33,751 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 80 transitions. [2018-01-21 00:32:33,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-21 00:32:33,752 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:33,752 INFO L322 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:33,752 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:33,753 INFO L82 PathProgramCache]: Analyzing trace with hash 1961550311, now seen corresponding path program 4 times [2018-01-21 00:32:33,753 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:33,753 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:33,753 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:33,753 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:33,754 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:33,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:33,768 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:33,972 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:33,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:33,972 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:33,972 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:33,972 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:33,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:33,972 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:33,983 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:32:33,983 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:32:34,019 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:34,022 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:34,102 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,102 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:34,204 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,225 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:34,225 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:34,228 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:32:34,228 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:32:34,285 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:34,289 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:34,294 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,294 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:34,323 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,325 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:34,325 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 00:32:34,325 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:34,325 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 00:32:34,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 00:32:34,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 00:32:34,326 INFO L87 Difference]: Start difference. First operand 75 states and 80 transitions. Second operand 16 states. [2018-01-21 00:32:34,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:34,356 INFO L93 Difference]: Finished difference Result 136 states and 146 transitions. [2018-01-21 00:32:34,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 00:32:34,356 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 70 [2018-01-21 00:32:34,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:34,357 INFO L225 Difference]: With dead ends: 136 [2018-01-21 00:32:34,357 INFO L226 Difference]: Without dead ends: 76 [2018-01-21 00:32:34,357 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 288 GetRequests, 264 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 00:32:34,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-01-21 00:32:34,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2018-01-21 00:32:34,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-01-21 00:32:34,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 81 transitions. [2018-01-21 00:32:34,364 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 81 transitions. Word has length 70 [2018-01-21 00:32:34,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:34,365 INFO L432 AbstractCegarLoop]: Abstraction has 76 states and 81 transitions. [2018-01-21 00:32:34,365 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 00:32:34,365 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2018-01-21 00:32:34,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-01-21 00:32:34,365 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:34,365 INFO L322 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:34,366 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:34,366 INFO L82 PathProgramCache]: Analyzing trace with hash -1168255472, now seen corresponding path program 5 times [2018-01-21 00:32:34,366 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:34,366 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:34,366 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:34,366 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:34,367 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:34,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:34,379 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:34,446 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,446 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:34,446 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:34,446 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:34,447 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:34,447 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:34,447 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:34,452 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:32:34,452 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:32:34,459 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:34,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:34,465 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:34,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:34,478 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:34,480 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:34,520 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,520 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:34,632 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,653 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:34,653 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:34,656 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:32:34,656 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:32:34,664 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:34,669 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:34,680 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:34,723 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:34,739 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:34,743 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:34,751 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,751 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:34,845 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:34,847 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:34,847 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 00:32:34,847 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:34,848 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 00:32:34,848 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 00:32:34,848 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 00:32:34,849 INFO L87 Difference]: Start difference. First operand 76 states and 81 transitions. Second operand 18 states. [2018-01-21 00:32:34,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:34,886 INFO L93 Difference]: Finished difference Result 137 states and 147 transitions. [2018-01-21 00:32:34,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 00:32:34,887 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 71 [2018-01-21 00:32:34,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:34,887 INFO L225 Difference]: With dead ends: 137 [2018-01-21 00:32:34,888 INFO L226 Difference]: Without dead ends: 77 [2018-01-21 00:32:34,888 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 266 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 00:32:34,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-01-21 00:32:34,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-01-21 00:32:34,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-21 00:32:34,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 82 transitions. [2018-01-21 00:32:34,896 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 82 transitions. Word has length 71 [2018-01-21 00:32:34,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:34,896 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 82 transitions. [2018-01-21 00:32:34,896 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 00:32:34,896 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 82 transitions. [2018-01-21 00:32:34,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-21 00:32:34,897 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:34,897 INFO L322 BasicCegarLoop]: trace histogram [7, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:34,897 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:34,898 INFO L82 PathProgramCache]: Analyzing trace with hash 592013063, now seen corresponding path program 6 times [2018-01-21 00:32:34,898 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:34,899 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:34,899 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:34,899 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:34,899 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:34,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:34,916 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:35,005 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:35,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:35,005 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:35,005 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:35,005 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:35,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:35,005 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:35,010 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:32:35,010 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:32:35,033 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,042 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,049 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,077 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,091 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,092 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:35,095 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:35,140 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:35,140 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:35,280 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:35,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:35,301 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:35,304 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:32:35,304 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:32:35,323 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,371 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,507 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:32:35,816 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:35,821 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:35,827 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:35,827 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:35,873 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:35,875 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:35,875 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 00:32:35,875 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:35,875 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 00:32:35,875 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 00:32:35,876 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 00:32:35,876 INFO L87 Difference]: Start difference. First operand 77 states and 82 transitions. Second operand 20 states. [2018-01-21 00:32:35,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:35,902 INFO L93 Difference]: Finished difference Result 138 states and 148 transitions. [2018-01-21 00:32:35,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 00:32:35,903 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2018-01-21 00:32:35,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:35,903 INFO L225 Difference]: With dead ends: 138 [2018-01-21 00:32:35,903 INFO L226 Difference]: Without dead ends: 78 [2018-01-21 00:32:35,904 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 298 GetRequests, 268 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 00:32:35,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-01-21 00:32:35,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-01-21 00:32:35,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-01-21 00:32:35,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2018-01-21 00:32:35,910 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 72 [2018-01-21 00:32:35,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:35,910 INFO L432 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2018-01-21 00:32:35,910 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 00:32:35,910 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2018-01-21 00:32:35,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-21 00:32:35,911 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:35,911 INFO L322 BasicCegarLoop]: trace histogram [8, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:35,911 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:35,912 INFO L82 PathProgramCache]: Analyzing trace with hash -674237200, now seen corresponding path program 7 times [2018-01-21 00:32:35,912 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:35,912 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:35,912 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:35,912 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:35,913 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:35,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:35,927 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:36,061 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:36,061 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:36,061 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:36,062 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:36,062 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:36,062 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:36,062 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:36,071 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:36,071 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:36,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:36,102 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:36,168 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:36,168 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:36,462 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:36,482 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:36,482 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:36,485 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:36,485 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:36,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:36,534 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:36,540 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:36,541 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:36,607 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:36,609 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:36,609 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 00:32:36,609 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:36,609 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 00:32:36,609 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 00:32:36,609 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 00:32:36,610 INFO L87 Difference]: Start difference. First operand 78 states and 83 transitions. Second operand 22 states. [2018-01-21 00:32:36,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:36,646 INFO L93 Difference]: Finished difference Result 139 states and 149 transitions. [2018-01-21 00:32:36,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 00:32:36,647 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-01-21 00:32:36,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:36,648 INFO L225 Difference]: With dead ends: 139 [2018-01-21 00:32:36,648 INFO L226 Difference]: Without dead ends: 79 [2018-01-21 00:32:36,649 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 303 GetRequests, 270 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 00:32:36,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-01-21 00:32:36,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-01-21 00:32:36,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-21 00:32:36,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 84 transitions. [2018-01-21 00:32:36,655 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 84 transitions. Word has length 73 [2018-01-21 00:32:36,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:36,656 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 84 transitions. [2018-01-21 00:32:36,656 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 00:32:36,656 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 84 transitions. [2018-01-21 00:32:36,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-01-21 00:32:36,657 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:36,657 INFO L322 BasicCegarLoop]: trace histogram [9, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:36,657 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:36,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1273289689, now seen corresponding path program 8 times [2018-01-21 00:32:36,657 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:36,658 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:36,658 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:36,658 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:36,658 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:36,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:36,674 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:36,782 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:36,782 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:36,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:36,783 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:36,783 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:36,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:36,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:36,788 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:32:36,788 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:32:36,804 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:36,818 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:36,819 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:36,821 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:36,887 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:36,888 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:37,080 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:37,101 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:37,101 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:37,104 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:32:37,104 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:32:37,123 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:37,154 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:37,172 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:37,176 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:37,184 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:37,184 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:37,227 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:37,229 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:37,229 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 00:32:37,229 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:37,229 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 00:32:37,230 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 00:32:37,230 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 00:32:37,230 INFO L87 Difference]: Start difference. First operand 79 states and 84 transitions. Second operand 24 states. [2018-01-21 00:32:37,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:37,262 INFO L93 Difference]: Finished difference Result 140 states and 150 transitions. [2018-01-21 00:32:37,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 00:32:37,262 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-01-21 00:32:37,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:37,263 INFO L225 Difference]: With dead ends: 140 [2018-01-21 00:32:37,263 INFO L226 Difference]: Without dead ends: 80 [2018-01-21 00:32:37,264 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 308 GetRequests, 272 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 00:32:37,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-21 00:32:37,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2018-01-21 00:32:37,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-01-21 00:32:37,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 85 transitions. [2018-01-21 00:32:37,271 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 85 transitions. Word has length 74 [2018-01-21 00:32:37,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:37,271 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 85 transitions. [2018-01-21 00:32:37,271 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 00:32:37,271 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 85 transitions. [2018-01-21 00:32:37,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-21 00:32:37,272 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:37,272 INFO L322 BasicCegarLoop]: trace histogram [10, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:37,272 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:37,272 INFO L82 PathProgramCache]: Analyzing trace with hash 1630919632, now seen corresponding path program 9 times [2018-01-21 00:32:37,273 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:37,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:37,273 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:37,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:37,273 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:37,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:37,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:37,430 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:37,431 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:37,431 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:37,431 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:37,431 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:37,431 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:37,431 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:37,436 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:32:37,436 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:32:37,449 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:37,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:37,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:37,476 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:37,479 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:37,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-21 00:32:37,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-21 00:32:37,497 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,498 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,509 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-01-21 00:32:37,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-01-21 00:32:37,525 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,526 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-01-21 00:32:37,527 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,535 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:26, output treesize:22 [2018-01-21 00:32:37,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-01-21 00:32:37,552 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,552 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,553 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,553 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,554 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,555 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 88 [2018-01-21 00:32:37,555 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,564 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,569 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-01-21 00:32:37,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 48 [2018-01-21 00:32:37,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,919 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:37,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 3 [2018-01-21 00:32:37,921 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,927 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:37,928 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:56, output treesize:3 [2018-01-21 00:32:37,963 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-01-21 00:32:37,964 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:38,362 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-01-21 00:32:38,362 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,362 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,362 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:1 [2018-01-21 00:32:38,373 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-01-21 00:32:38,406 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:38,406 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:38,412 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:32:38,413 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:32:38,442 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:38,472 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:38,549 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:38,588 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:38,595 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:38,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 00:32:38,610 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 00:32:38,611 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,612 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,615 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,615 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 00:32:38,698 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 00:32:38,700 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,701 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 00:32:38,702 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,707 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,711 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 00:32:38,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 00:32:38,745 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,746 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,747 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,749 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,750 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,751 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 00:32:38,752 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,762 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,767 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 00:32:38,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 00:32:38,802 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,806 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,807 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,807 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 00:32:38,809 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,825 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,831 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,831 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 00:32:38,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 00:32:38,873 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,873 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,874 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,875 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,875 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,876 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,876 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,878 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,879 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,879 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,880 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 00:32:38,883 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,921 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:38,929 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 00:32:38,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 00:32:38,970 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,970 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,971 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,972 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,972 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,973 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,973 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,974 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,975 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,975 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,977 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,982 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,983 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,983 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,984 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:38,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 00:32:38,986 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:39,022 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:39,030 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:39,031 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 00:32:39,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 00:32:39,085 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,086 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,087 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,088 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,088 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,089 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,090 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,090 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,091 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,092 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,093 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,093 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,094 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,094 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,095 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,096 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,096 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,097 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,098 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,098 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,099 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,099 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,100 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,100 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,101 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,102 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,102 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:39,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 00:32:39,104 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:39,145 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:39,154 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:39,155 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 00:32:39,705 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-01-21 00:32:39,706 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:40,125 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-01-21 00:32:40,127 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:40,127 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 16, 12, 17, 8] total 57 [2018-01-21 00:32:40,127 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:40,128 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 00:32:40,128 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 00:32:40,129 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=2893, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 00:32:40,129 INFO L87 Difference]: Start difference. First operand 80 states and 85 transitions. Second operand 28 states. [2018-01-21 00:32:40,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:40,738 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-01-21 00:32:40,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 00:32:40,738 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 75 [2018-01-21 00:32:40,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:40,739 INFO L225 Difference]: With dead ends: 154 [2018-01-21 00:32:40,739 INFO L226 Difference]: Without dead ends: 94 [2018-01-21 00:32:40,741 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 321 GetRequests, 245 SyntacticMatches, 13 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1830 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=373, Invalid=3787, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 00:32:40,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-21 00:32:40,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 92. [2018-01-21 00:32:40,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-01-21 00:32:40,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 98 transitions. [2018-01-21 00:32:40,749 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 98 transitions. Word has length 75 [2018-01-21 00:32:40,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:40,749 INFO L432 AbstractCegarLoop]: Abstraction has 92 states and 98 transitions. [2018-01-21 00:32:40,749 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 00:32:40,749 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 98 transitions. [2018-01-21 00:32:40,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-01-21 00:32:40,750 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:40,750 INFO L322 BasicCegarLoop]: trace histogram [11, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:40,750 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:40,751 INFO L82 PathProgramCache]: Analyzing trace with hash 580128904, now seen corresponding path program 1 times [2018-01-21 00:32:40,751 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:40,751 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:40,751 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:40,752 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:40,752 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:40,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:40,766 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:40,897 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:40,897 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:40,897 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:40,897 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 80 with the following transitions: [2018-01-21 00:32:40,897 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [8], [10], [11], [12], [14], [18], [19], [21], [25], [27], [28], [29], [31], [35], [36], [39], [41], [42], [43], [45], [49], [50], [52], [53], [55], [56], [57], [58], [59], [60], [61], [62], [69], [72], [75], [80], [82], [83], [84], [90], [91], [92], [93], [96], [97], [98], [99], [100], [101], [102] [2018-01-21 00:32:40,899 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 00:32:40,900 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 00:32:41,008 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 00:32:41,008 INFO L268 AbstractInterpreter]: Visited 53 different actions 80 times. Merged at 24 different actions 24 times. Never widened. Found 6 fixpoints after 6 different actions. Largest state had 20 variables. [2018-01-21 00:32:41,017 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 00:32:41,017 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:41,017 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:41,031 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:41,031 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:41,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:41,068 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:41,175 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:41,175 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:41,467 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:41,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:41,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:41,494 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:41,494 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:32:41,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:41,560 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:41,566 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:41,566 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:41,649 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:41,650 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:41,650 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 00:32:41,650 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:41,651 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 00:32:41,651 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 00:32:41,651 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 00:32:41,651 INFO L87 Difference]: Start difference. First operand 92 states and 98 transitions. Second operand 28 states. [2018-01-21 00:32:41,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:41,694 INFO L93 Difference]: Finished difference Result 164 states and 176 transitions. [2018-01-21 00:32:41,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 00:32:41,694 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 79 [2018-01-21 00:32:41,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:41,695 INFO L225 Difference]: With dead ends: 164 [2018-01-21 00:32:41,695 INFO L226 Difference]: Without dead ends: 93 [2018-01-21 00:32:41,696 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 330 GetRequests, 288 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 00:32:41,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-01-21 00:32:41,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2018-01-21 00:32:41,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-01-21 00:32:41,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 99 transitions. [2018-01-21 00:32:41,702 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 99 transitions. Word has length 79 [2018-01-21 00:32:41,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:41,702 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 99 transitions. [2018-01-21 00:32:41,702 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 00:32:41,702 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 99 transitions. [2018-01-21 00:32:41,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-01-21 00:32:41,703 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:41,703 INFO L322 BasicCegarLoop]: trace histogram [12, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:41,703 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:41,703 INFO L82 PathProgramCache]: Analyzing trace with hash -50939265, now seen corresponding path program 2 times [2018-01-21 00:32:41,703 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:41,704 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:41,704 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:32:41,704 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:41,704 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:41,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:41,718 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:41,901 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:41,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:41,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:41,901 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:41,901 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:41,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:41,902 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:41,909 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:32:41,910 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:32:41,925 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:41,945 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:41,950 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:41,953 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:42,180 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:42,180 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:42,499 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:42,521 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:42,521 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:42,524 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:32:42,524 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:32:42,548 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:42,581 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:42,601 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:42,607 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:42,616 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:42,617 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:42,745 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:42,747 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:42,747 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 00:32:42,747 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:42,747 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 00:32:42,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 00:32:42,748 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 00:32:42,748 INFO L87 Difference]: Start difference. First operand 93 states and 99 transitions. Second operand 30 states. [2018-01-21 00:32:42,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:42,798 INFO L93 Difference]: Finished difference Result 165 states and 177 transitions. [2018-01-21 00:32:42,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 00:32:42,798 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 80 [2018-01-21 00:32:42,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:42,799 INFO L225 Difference]: With dead ends: 165 [2018-01-21 00:32:42,799 INFO L226 Difference]: Without dead ends: 94 [2018-01-21 00:32:42,800 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 335 GetRequests, 290 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 00:32:42,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-21 00:32:42,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2018-01-21 00:32:42,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-01-21 00:32:42,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 100 transitions. [2018-01-21 00:32:42,807 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 100 transitions. Word has length 80 [2018-01-21 00:32:42,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:42,807 INFO L432 AbstractCegarLoop]: Abstraction has 94 states and 100 transitions. [2018-01-21 00:32:42,807 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 00:32:42,807 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 100 transitions. [2018-01-21 00:32:42,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-01-21 00:32:42,808 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:42,808 INFO L322 BasicCegarLoop]: trace histogram [13, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:42,808 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:42,808 INFO L82 PathProgramCache]: Analyzing trace with hash 1860783976, now seen corresponding path program 3 times [2018-01-21 00:32:42,808 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:42,809 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:42,809 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:42,809 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:42,809 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:42,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:42,823 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:43,048 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 00:32:43,048 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:43,048 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:43,048 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:43,048 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:43,048 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:43,048 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:43,053 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:32:43,053 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:32:43,069 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:43,079 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:43,093 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:43,095 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:43,097 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:43,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 00:32:43,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 00:32:43,119 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,119 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,122 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 00:32:43,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 00:32:43,136 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,136 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 00:32:43,137 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,144 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,148 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 00:32:43,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 00:32:43,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 00:32:43,168 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,176 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,181 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,181 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 00:32:43,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 00:32:43,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 00:32:43,210 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,225 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,231 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 00:32:43,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 00:32:43,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,256 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,256 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 00:32:43,264 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,288 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,296 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,296 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 00:32:43,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 00:32:43,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,327 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,327 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,329 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,329 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,332 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,333 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,333 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,334 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,334 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,335 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 00:32:43,336 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,366 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,374 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,374 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 00:32:43,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 00:32:43,404 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,404 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,405 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,406 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,406 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,407 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,407 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,408 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,408 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,409 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,409 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,410 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,411 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,411 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,412 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,412 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,413 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,413 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,414 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,415 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,415 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,416 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,416 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,417 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,417 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,418 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,419 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:43,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 00:32:43,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,462 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,472 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:43,472 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 00:32:43,688 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2018-01-21 00:32:43,688 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:43,923 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2018-01-21 00:32:43,944 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:43,944 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:43,947 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:32:43,947 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:32:43,968 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:43,994 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:44,062 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:32:44,096 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:44,111 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:44,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 00:32:44,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 00:32:44,122 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,124 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,129 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,129 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 00:32:44,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 00:32:44,133 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,134 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 00:32:44,135 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,139 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,143 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,143 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 00:32:44,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 00:32:44,147 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,148 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,150 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,150 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 00:32:44,151 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,160 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,165 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,165 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 00:32:44,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 00:32:44,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 00:32:44,177 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,192 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,198 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,198 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 00:32:44,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 00:32:44,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 00:32:44,212 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,233 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,241 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 00:32:44,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 00:32:44,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,250 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,250 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,256 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 00:32:44,259 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,291 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,299 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 00:32:44,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 00:32:44,304 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,305 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,305 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 00:32:44,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 00:32:44,320 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:44,371 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 00:32:44,704 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2018-01-21 00:32:44,704 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:44,940 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2018-01-21 00:32:44,942 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:44,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 8, 17, 8] total 48 [2018-01-21 00:32:44,942 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:44,943 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 00:32:44,943 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 00:32:44,943 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=287, Invalid=1969, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 00:32:44,943 INFO L87 Difference]: Start difference. First operand 94 states and 100 transitions. Second operand 32 states. [2018-01-21 00:32:45,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:32:45,632 INFO L93 Difference]: Finished difference Result 178 states and 191 transitions. [2018-01-21 00:32:45,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 00:32:45,633 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 81 [2018-01-21 00:32:45,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:32:45,633 INFO L225 Difference]: With dead ends: 178 [2018-01-21 00:32:45,633 INFO L226 Difference]: Without dead ends: 104 [2018-01-21 00:32:45,634 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 353 GetRequests, 277 SyntacticMatches, 17 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1657 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=430, Invalid=3230, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 00:32:45,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-01-21 00:32:45,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 101. [2018-01-21 00:32:45,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-01-21 00:32:45,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 107 transitions. [2018-01-21 00:32:45,643 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 107 transitions. Word has length 81 [2018-01-21 00:32:45,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:32:45,643 INFO L432 AbstractCegarLoop]: Abstraction has 101 states and 107 transitions. [2018-01-21 00:32:45,643 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 00:32:45,643 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 107 transitions. [2018-01-21 00:32:45,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-21 00:32:45,644 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:32:45,644 INFO L322 BasicCegarLoop]: trace histogram [14, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:32:45,644 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0EnsuresViolation]=== [2018-01-21 00:32:45,645 INFO L82 PathProgramCache]: Analyzing trace with hash -777231677, now seen corresponding path program 4 times [2018-01-21 00:32:45,645 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:32:45,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:45,645 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:32:45,646 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:32:45,646 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:32:45,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:32:45,661 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:32:45,830 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2018-01-21 00:32:45,830 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:45,830 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:32:45,830 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:32:45,830 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:32:45,830 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:45,830 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:32:45,835 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:32:45,835 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:32:45,855 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:45,857 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:46,046 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 10 proven. 29 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-01-21 00:32:46,046 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:46,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 21 [2018-01-21 00:32:46,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2018-01-21 00:32:46,248 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-01-21 00:32:46,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-01-21 00:32:46,256 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:46,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-21 00:32:46,262 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:46,265 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-21 00:32:46,268 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-01-21 00:32:46,268 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:17, output treesize:10 [2018-01-21 00:32:46,305 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 11 proven. 28 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-01-21 00:32:46,325 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:32:46,325 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:32:46,328 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:32:46,328 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:32:46,370 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:32:46,375 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:32:46,432 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 10 proven. 29 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-01-21 00:32:46,432 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:32:46,558 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-01-21 00:32:46,558 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:46,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 00:32:46,559 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:1 [2018-01-21 00:32:46,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 21 [2018-01-21 00:32:46,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-01-21 00:32:46,631 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:46,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-21 00:32:46,639 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-21 00:32:46,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2018-01-21 00:32:46,649 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-01-21 00:32:46,653 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-21 00:32:46,656 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-01-21 00:32:46,656 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:17, output treesize:12 [2018-01-21 00:32:46,676 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 19 proven. 20 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-01-21 00:32:46,678 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:32:46,678 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 14, 13, 14, 14] total 39 [2018-01-21 00:32:46,678 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:32:46,678 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 00:32:46,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 00:32:46,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=240, Invalid=1242, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 00:32:46,679 INFO L87 Difference]: Start difference. First operand 101 states and 107 transitions. Second operand 30 states. [2018-01-21 00:33:08,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:33:08,619 INFO L93 Difference]: Finished difference Result 180 states and 192 transitions. [2018-01-21 00:33:08,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 00:33:08,619 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 88 [2018-01-21 00:33:08,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:33:08,620 INFO L225 Difference]: With dead ends: 180 [2018-01-21 00:33:08,620 INFO L226 Difference]: Without dead ends: 100 [2018-01-21 00:33:08,621 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 322 SyntacticMatches, 9 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=328, Invalid=1834, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 00:33:08,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-01-21 00:33:08,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 97. [2018-01-21 00:33:08,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-01-21 00:33:08,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 102 transitions. [2018-01-21 00:33:08,627 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 102 transitions. Word has length 88 [2018-01-21 00:33:08,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:33:08,627 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 102 transitions. [2018-01-21 00:33:08,627 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 00:33:08,627 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 102 transitions. [2018-01-21 00:33:08,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-21 00:33:08,628 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:33:08,628 INFO L322 BasicCegarLoop]: trace histogram [15, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:33:08,628 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0EnsuresViolation]=== [2018-01-21 00:33:08,628 INFO L82 PathProgramCache]: Analyzing trace with hash -468179545, now seen corresponding path program 10 times [2018-01-21 00:33:08,628 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:33:08,629 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:33:08,629 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:33:08,629 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:33:08,630 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:33:08,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:33:08,647 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:33:08,869 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:08,869 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:08,869 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:33:08,870 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:33:08,870 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:33:08,870 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:08,870 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:33:08,877 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:33:08,878 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:33:08,962 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:33:08,965 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:33:09,121 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:09,121 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:33:09,602 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:09,623 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:09,623 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:33:09,626 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:33:09,627 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:33:09,757 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:33:09,763 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:33:09,770 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:09,770 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:33:09,878 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:09,879 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:33:09,879 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 00:33:09,880 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:33:09,880 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 00:33:09,880 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 00:33:09,881 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 00:33:09,881 INFO L87 Difference]: Start difference. First operand 97 states and 102 transitions. Second operand 36 states. [2018-01-21 00:33:09,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:33:09,947 INFO L93 Difference]: Finished difference Result 170 states and 180 transitions. [2018-01-21 00:33:09,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 00:33:09,948 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 92 [2018-01-21 00:33:09,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:33:09,948 INFO L225 Difference]: With dead ends: 170 [2018-01-21 00:33:09,949 INFO L226 Difference]: Without dead ends: 98 [2018-01-21 00:33:09,949 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 386 GetRequests, 332 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 00:33:09,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-01-21 00:33:09,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-01-21 00:33:09,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-01-21 00:33:09,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 103 transitions. [2018-01-21 00:33:09,957 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 103 transitions. Word has length 92 [2018-01-21 00:33:09,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:33:09,957 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 103 transitions. [2018-01-21 00:33:09,957 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 00:33:09,957 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 103 transitions. [2018-01-21 00:33:09,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-21 00:33:09,958 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:33:09,958 INFO L322 BasicCegarLoop]: trace histogram [16, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:33:09,958 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0EnsuresViolation]=== [2018-01-21 00:33:09,959 INFO L82 PathProgramCache]: Analyzing trace with hash -804412144, now seen corresponding path program 11 times [2018-01-21 00:33:09,959 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:33:09,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:33:09,959 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:33:09,960 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:33:09,960 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:33:09,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:33:09,977 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:33:10,287 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:10,288 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:10,288 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:33:10,288 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:33:10,288 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:33:10,288 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:10,288 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:33:10,294 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:33:10,294 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:33:10,305 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,319 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,323 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,332 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,346 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,371 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,382 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,408 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:10,448 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:33:10,452 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:33:10,673 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:10,673 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:33:11,094 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:11,114 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:11,114 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:33:11,117 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:33:11,117 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:33:11,126 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,147 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,162 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,187 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,232 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,376 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,832 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:33:11,867 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:33:11,873 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:33:11,898 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:11,898 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:33:11,973 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:11,975 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:33:11,975 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 00:33:11,975 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:33:11,975 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 00:33:11,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 00:33:11,976 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 00:33:11,976 INFO L87 Difference]: Start difference. First operand 98 states and 103 transitions. Second operand 38 states. [2018-01-21 00:33:12,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:33:12,030 INFO L93 Difference]: Finished difference Result 171 states and 181 transitions. [2018-01-21 00:33:12,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 00:33:12,031 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 93 [2018-01-21 00:33:12,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:33:12,031 INFO L225 Difference]: With dead ends: 171 [2018-01-21 00:33:12,031 INFO L226 Difference]: Without dead ends: 99 [2018-01-21 00:33:12,032 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 391 GetRequests, 334 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 00:33:12,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-21 00:33:12,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-01-21 00:33:12,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-01-21 00:33:12,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 104 transitions. [2018-01-21 00:33:12,040 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 104 transitions. Word has length 93 [2018-01-21 00:33:12,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:33:12,041 INFO L432 AbstractCegarLoop]: Abstraction has 99 states and 104 transitions. [2018-01-21 00:33:12,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 00:33:12,041 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 104 transitions. [2018-01-21 00:33:12,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-01-21 00:33:12,041 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:33:12,042 INFO L322 BasicCegarLoop]: trace histogram [17, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:33:12,042 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0EnsuresViolation]=== [2018-01-21 00:33:12,042 INFO L82 PathProgramCache]: Analyzing trace with hash 1657279175, now seen corresponding path program 12 times [2018-01-21 00:33:12,042 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:33:12,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:33:12,042 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:33:12,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:33:12,043 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:33:12,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:33:12,058 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:33:12,341 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:12,341 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:12,342 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:33:12,342 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:33:12,342 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:33:12,342 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:12,342 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:33:12,348 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:33:12,348 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:33:12,361 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:12,369 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:12,377 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:12,395 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:12,416 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:12,475 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:12,597 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:12,802 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:13,318 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:13,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:13,785 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:33:13,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:33:13,934 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:13,934 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:33:14,401 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 00:33:14,423 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:33:14,423 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:33:14,426 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:33:14,426 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:33:14,446 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:14,468 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:14,498 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:14,641 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:15,074 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:15,858 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:33:17,917 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown