java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/memsafety/960521-1_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 00:31:13,359 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 00:31:13,361 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 00:31:13,377 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 00:31:13,377 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 00:31:13,378 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 00:31:13,379 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 00:31:13,381 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 00:31:13,382 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 00:31:13,383 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 00:31:13,384 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... 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[2018-01-21 00:31:13,404 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-21 00:31:13,414 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 00:31:13,414 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 00:31:13,415 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 00:31:13,415 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 00:31:13,415 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 00:31:13,415 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-21 00:31:13,416 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 00:31:13,416 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 00:31:13,416 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 00:31:13,417 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 00:31:13,417 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 00:31:13,417 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 00:31:13,417 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 00:31:13,417 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 00:31:13,418 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 00:31:13,418 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 00:31:13,418 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 00:31:13,418 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 00:31:13,418 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 00:31:13,418 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 00:31:13,419 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 00:31:13,419 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 00:31:13,419 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 00:31:13,419 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 00:31:13,419 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 00:31:13,420 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 00:31:13,420 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 00:31:13,420 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 00:31:13,420 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 00:31:13,420 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 00:31:13,420 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 00:31:13,421 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 00:31:13,421 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 00:31:13,421 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 00:31:13,421 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 00:31:13,421 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 00:31:13,422 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 00:31:13,422 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 00:31:13,423 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 00:31:13,458 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 00:31:13,470 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 00:31:13,474 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 00:31:13,476 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 00:31:13,476 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 00:31:13,477 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/960521-1_false-valid-deref.i [2018-01-21 00:31:13,639 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 00:31:13,644 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 00:31:13,645 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 00:31:13,646 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 00:31:13,652 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 00:31:13,653 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,655 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27e13832 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13, skipping insertion in model container [2018-01-21 00:31:13,656 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,675 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 00:31:13,715 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 00:31:13,837 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 00:31:13,853 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 00:31:13,859 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13 WrapperNode [2018-01-21 00:31:13,860 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 00:31:13,860 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 00:31:13,861 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 00:31:13,861 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 00:31:13,879 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,879 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,889 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,890 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,892 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,895 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,896 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (1/1) ... [2018-01-21 00:31:13,897 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 00:31:13,898 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 00:31:13,898 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 00:31:13,898 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 00:31:13,899 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 00:31:13,947 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 00:31:13,947 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 00:31:13,947 INFO L136 BoogieDeclarations]: Found implementation of procedure foo [2018-01-21 00:31:13,947 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 00:31:13,947 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-21 00:31:13,947 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-21 00:31:13,947 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 00:31:13,948 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 00:31:13,948 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 00:31:13,948 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-21 00:31:13,948 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-21 00:31:13,948 INFO L128 BoogieDeclarations]: Found specification of procedure foo [2018-01-21 00:31:13,948 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 00:31:13,948 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 00:31:13,948 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 00:31:14,140 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 00:31:14,140 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 12:31:14 BoogieIcfgContainer [2018-01-21 00:31:14,141 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 00:31:14,141 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 00:31:14,142 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 00:31:14,144 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 00:31:14,144 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 12:31:13" (1/3) ... [2018-01-21 00:31:14,145 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5148f91e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 12:31:14, skipping insertion in model container [2018-01-21 00:31:14,145 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:31:13" (2/3) ... [2018-01-21 00:31:14,146 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5148f91e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 12:31:14, skipping insertion in model container [2018-01-21 00:31:14,146 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 12:31:14" (3/3) ... [2018-01-21 00:31:14,148 INFO L105 eAbstractionObserver]: Analyzing ICFG 960521-1_false-valid-deref.i [2018-01-21 00:31:14,157 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 00:31:14,165 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 4 error locations. [2018-01-21 00:31:14,208 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:31:14,209 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:31:14,209 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:31:14,209 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:31:14,209 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:31:14,209 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:31:14,209 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:31:14,209 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 00:31:14,210 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:31:14,231 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2018-01-21 00:31:14,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 00:31:14,238 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:14,239 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 00:31:14,239 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 00:31:14,245 INFO L82 PathProgramCache]: Analyzing trace with hash 90336, now seen corresponding path program 1 times [2018-01-21 00:31:14,248 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:14,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,293 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:14,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,293 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:14,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 00:31:14,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 00:31:14,361 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 00:31:14,369 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 00:31:14,378 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:31:14,378 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:31:14,378 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:31:14,378 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:31:14,378 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:31:14,378 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:31:14,378 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:31:14,378 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == fooErr0EnsuresViolation======== [2018-01-21 00:31:14,378 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:31:14,380 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2018-01-21 00:31:14,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 00:31:14,380 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:14,381 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:14,381 INFO L371 AbstractCegarLoop]: === Iteration 1 === [fooErr0EnsuresViolation]=== [2018-01-21 00:31:14,381 INFO L82 PathProgramCache]: Analyzing trace with hash 935443697, now seen corresponding path program 1 times [2018-01-21 00:31:14,381 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:14,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,382 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:14,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,382 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:14,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:14,415 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:14,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:31:14,463 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:31:14,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 00:31:14,464 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:31:14,466 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 00:31:14,477 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 00:31:14,478 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:31:14,480 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 2 states. [2018-01-21 00:31:14,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:14,581 INFO L93 Difference]: Finished difference Result 60 states and 67 transitions. [2018-01-21 00:31:14,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 00:31:14,582 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 18 [2018-01-21 00:31:14,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:14,590 INFO L225 Difference]: With dead ends: 60 [2018-01-21 00:31:14,591 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 00:31:14,594 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:31:14,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 00:31:14,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 00:31:14,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 00:31:14,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 00:31:14,620 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 18 [2018-01-21 00:31:14,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:14,621 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 00:31:14,621 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 00:31:14,621 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 00:31:14,621 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 00:31:14,623 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:31:14,623 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:31:14,623 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:31:14,623 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:31:14,623 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:31:14,623 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:31:14,623 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:31:14,623 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 00:31:14,623 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:31:14,625 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2018-01-21 00:31:14,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 00:31:14,626 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:14,626 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:14,626 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:14,626 INFO L82 PathProgramCache]: Analyzing trace with hash 1172106943, now seen corresponding path program 1 times [2018-01-21 00:31:14,626 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:14,627 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,627 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:14,627 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,627 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:14,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:14,645 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:14,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:31:14,670 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:31:14,670 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 00:31:14,670 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:31:14,671 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 00:31:14,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 00:31:14,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:31:14,672 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 2 states. [2018-01-21 00:31:14,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:14,677 INFO L93 Difference]: Finished difference Result 60 states and 67 transitions. [2018-01-21 00:31:14,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 00:31:14,677 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 27 [2018-01-21 00:31:14,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:14,680 INFO L225 Difference]: With dead ends: 60 [2018-01-21 00:31:14,680 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 00:31:14,680 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 00:31:14,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 00:31:14,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 00:31:14,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 00:31:14,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-01-21 00:31:14,689 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 27 [2018-01-21 00:31:14,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:14,690 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-01-21 00:31:14,690 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 00:31:14,690 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-01-21 00:31:14,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 00:31:14,691 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:14,691 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:14,691 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:14,691 INFO L82 PathProgramCache]: Analyzing trace with hash -862637837, now seen corresponding path program 1 times [2018-01-21 00:31:14,691 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:14,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,692 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:14,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,693 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:14,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:14,712 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:14,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:31:14,770 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:31:14,770 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-21 00:31:14,770 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:31:14,772 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-21 00:31:14,773 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-21 00:31:14,773 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-21 00:31:14,773 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 3 states. [2018-01-21 00:31:14,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:14,812 INFO L93 Difference]: Finished difference Result 58 states and 62 transitions. [2018-01-21 00:31:14,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-21 00:31:14,813 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2018-01-21 00:31:14,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:14,814 INFO L225 Difference]: With dead ends: 58 [2018-01-21 00:31:14,814 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 00:31:14,815 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-21 00:31:14,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 00:31:14,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 38. [2018-01-21 00:31:14,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 00:31:14,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 40 transitions. [2018-01-21 00:31:14,821 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 40 transitions. Word has length 29 [2018-01-21 00:31:14,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:14,822 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 40 transitions. [2018-01-21 00:31:14,822 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-21 00:31:14,822 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 40 transitions. [2018-01-21 00:31:14,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 00:31:14,823 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:14,824 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:14,824 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:14,824 INFO L82 PathProgramCache]: Analyzing trace with hash -1162981958, now seen corresponding path program 1 times [2018-01-21 00:31:14,824 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:14,825 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,825 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:14,825 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:14,825 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:14,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:14,847 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:14,907 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 00:31:14,908 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:31:14,908 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-21 00:31:14,908 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:31:14,908 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-21 00:31:14,909 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-21 00:31:14,909 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-21 00:31:14,909 INFO L87 Difference]: Start difference. First operand 38 states and 40 transitions. Second operand 5 states. [2018-01-21 00:31:15,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:15,035 INFO L93 Difference]: Finished difference Result 64 states and 68 transitions. [2018-01-21 00:31:15,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 00:31:15,035 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2018-01-21 00:31:15,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:15,037 INFO L225 Difference]: With dead ends: 64 [2018-01-21 00:31:15,037 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 00:31:15,037 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-21 00:31:15,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 00:31:15,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 40. [2018-01-21 00:31:15,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 00:31:15,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 42 transitions. [2018-01-21 00:31:15,044 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 42 transitions. Word has length 33 [2018-01-21 00:31:15,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:15,044 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 42 transitions. [2018-01-21 00:31:15,044 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-21 00:31:15,044 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 42 transitions. [2018-01-21 00:31:15,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 00:31:15,045 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:15,046 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:15,046 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:15,046 INFO L82 PathProgramCache]: Analyzing trace with hash -797934829, now seen corresponding path program 1 times [2018-01-21 00:31:15,046 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:15,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:15,047 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:15,048 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:15,048 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:15,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:15,067 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:15,139 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 00:31:15,139 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:15,140 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:15,141 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 38 with the following transitions: [2018-01-21 00:31:15,143 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [10], [12], [13], [15], [19], [23], [26], [28], [29], [31], [35], [40], [41], [42], [43], [44], [45], [46], [47], [49], [52], [53], [54], [60], [61], [63], [64], [65], [66], [67], [68] [2018-01-21 00:31:15,191 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 00:31:15,192 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 00:31:15,494 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 00:31:15,496 INFO L268 AbstractInterpreter]: Visited 35 different actions 56 times. Merged at 20 different actions 20 times. Never widened. Found 3 fixpoints after 3 different actions. Largest state had 28 variables. [2018-01-21 00:31:15,517 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 00:31:15,518 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:15,518 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:15,524 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:15,524 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:31:15,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:15,556 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:15,597 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 00:31:15,598 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:15,756 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 00:31:15,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:15,778 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:15,781 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:15,782 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:31:15,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:15,826 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:15,846 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 00:31:15,846 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:15,893 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 00:31:15,895 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:15,895 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 6, 4, 4] total 14 [2018-01-21 00:31:15,895 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:15,896 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 00:31:15,896 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 00:31:15,897 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2018-01-21 00:31:15,897 INFO L87 Difference]: Start difference. First operand 40 states and 42 transitions. Second operand 8 states. [2018-01-21 00:31:16,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:16,016 INFO L93 Difference]: Finished difference Result 72 states and 77 transitions. [2018-01-21 00:31:16,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 00:31:16,016 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2018-01-21 00:31:16,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:16,017 INFO L225 Difference]: With dead ends: 72 [2018-01-21 00:31:16,017 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 00:31:16,018 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=137, Unknown=0, NotChecked=0, Total=210 [2018-01-21 00:31:16,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 00:31:16,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 48. [2018-01-21 00:31:16,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 00:31:16,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-21 00:31:16,022 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 37 [2018-01-21 00:31:16,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:16,022 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-21 00:31:16,023 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 00:31:16,023 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-21 00:31:16,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 00:31:16,024 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:16,024 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:16,025 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:16,025 INFO L82 PathProgramCache]: Analyzing trace with hash 883379251, now seen corresponding path program 2 times [2018-01-21 00:31:16,025 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:16,026 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:16,027 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:16,027 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:16,027 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:16,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:16,049 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:16,135 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-21 00:31:16,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:16,135 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:16,135 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:16,135 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:16,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:16,136 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:16,141 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:31:16,142 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:16,166 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:16,174 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:16,176 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:16,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:16,233 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-21 00:31:16,233 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:16,394 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-21 00:31:16,416 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:16,416 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:16,419 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:31:16,420 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:16,451 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:16,510 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:16,523 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:16,529 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:16,561 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-21 00:31:16,561 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:16,632 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-21 00:31:16,633 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:16,634 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 7, 5, 5] total 18 [2018-01-21 00:31:16,634 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:16,634 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 00:31:16,634 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 00:31:16,634 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=203, Unknown=0, NotChecked=0, Total=306 [2018-01-21 00:31:16,635 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 10 states. [2018-01-21 00:31:16,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:16,745 INFO L93 Difference]: Finished difference Result 84 states and 89 transitions. [2018-01-21 00:31:16,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 00:31:16,745 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 45 [2018-01-21 00:31:16,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:16,746 INFO L225 Difference]: With dead ends: 84 [2018-01-21 00:31:16,746 INFO L226 Difference]: Without dead ends: 60 [2018-01-21 00:31:16,746 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 167 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=120, Invalid=222, Unknown=0, NotChecked=0, Total=342 [2018-01-21 00:31:16,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-21 00:31:16,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 56. [2018-01-21 00:31:16,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 00:31:16,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 58 transitions. [2018-01-21 00:31:16,751 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 58 transitions. Word has length 45 [2018-01-21 00:31:16,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:16,751 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 58 transitions. [2018-01-21 00:31:16,751 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 00:31:16,751 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 58 transitions. [2018-01-21 00:31:16,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 00:31:16,752 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:16,752 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:16,752 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:16,752 INFO L82 PathProgramCache]: Analyzing trace with hash -2104023981, now seen corresponding path program 3 times [2018-01-21 00:31:16,752 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:16,753 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:16,753 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:16,753 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:16,753 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:16,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:16,770 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:16,841 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-01-21 00:31:16,841 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:16,841 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:16,841 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:16,842 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:16,842 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:16,842 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:16,850 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:31:16,850 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:31:16,867 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:16,872 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:16,875 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:16,880 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:16,880 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:16,883 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:16,895 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-01-21 00:31:16,895 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:16,961 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-01-21 00:31:16,982 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:16,983 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:16,986 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:31:16,986 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:31:17,012 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:17,065 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:17,113 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:17,168 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:17,181 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:17,186 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:17,195 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-01-21 00:31:17,195 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:17,229 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-01-21 00:31:17,231 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:17,231 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6, 6, 6] total 13 [2018-01-21 00:31:17,231 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:17,231 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 00:31:17,232 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 00:31:17,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=97, Unknown=0, NotChecked=0, Total=156 [2018-01-21 00:31:17,232 INFO L87 Difference]: Start difference. First operand 56 states and 58 transitions. Second operand 9 states. [2018-01-21 00:31:17,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:17,324 INFO L93 Difference]: Finished difference Result 96 states and 101 transitions. [2018-01-21 00:31:17,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 00:31:17,325 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 53 [2018-01-21 00:31:17,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:17,326 INFO L225 Difference]: With dead ends: 96 [2018-01-21 00:31:17,326 INFO L226 Difference]: Without dead ends: 68 [2018-01-21 00:31:17,326 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 211 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=104, Invalid=168, Unknown=0, NotChecked=0, Total=272 [2018-01-21 00:31:17,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-01-21 00:31:17,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 64. [2018-01-21 00:31:17,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-21 00:31:17,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 66 transitions. [2018-01-21 00:31:17,333 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 66 transitions. Word has length 53 [2018-01-21 00:31:17,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:17,333 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 66 transitions. [2018-01-21 00:31:17,333 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 00:31:17,334 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 66 transitions. [2018-01-21 00:31:17,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-01-21 00:31:17,335 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:17,335 INFO L322 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:17,335 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:17,335 INFO L82 PathProgramCache]: Analyzing trace with hash -807566477, now seen corresponding path program 4 times [2018-01-21 00:31:17,335 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:17,336 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:17,336 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:17,336 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:17,336 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:17,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:17,356 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:17,464 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-21 00:31:17,464 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:17,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:17,465 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:17,465 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:17,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:17,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:17,475 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:31:17,475 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:31:17,514 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:17,518 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:17,584 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-21 00:31:17,584 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:17,763 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-21 00:31:17,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:17,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:17,789 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:31:17,789 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:31:17,883 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:17,889 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:17,903 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-21 00:31:17,904 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:17,987 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-21 00:31:17,989 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:17,990 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 9, 8, 9] total 20 [2018-01-21 00:31:17,990 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:17,990 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 00:31:17,990 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 00:31:17,991 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=243, Unknown=0, NotChecked=0, Total=380 [2018-01-21 00:31:17,991 INFO L87 Difference]: Start difference. First operand 64 states and 66 transitions. Second operand 14 states. [2018-01-21 00:31:18,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:18,068 INFO L93 Difference]: Finished difference Result 108 states and 113 transitions. [2018-01-21 00:31:18,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 00:31:18,068 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 61 [2018-01-21 00:31:18,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:18,069 INFO L225 Difference]: With dead ends: 108 [2018-01-21 00:31:18,069 INFO L226 Difference]: Without dead ends: 76 [2018-01-21 00:31:18,070 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 252 GetRequests, 229 SyntacticMatches, 4 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-21 00:31:18,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-01-21 00:31:18,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 72. [2018-01-21 00:31:18,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-01-21 00:31:18,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 74 transitions. [2018-01-21 00:31:18,074 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 74 transitions. Word has length 61 [2018-01-21 00:31:18,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:18,074 INFO L432 AbstractCegarLoop]: Abstraction has 72 states and 74 transitions. [2018-01-21 00:31:18,074 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 00:31:18,074 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 74 transitions. [2018-01-21 00:31:18,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-01-21 00:31:18,075 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:18,075 INFO L322 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:18,075 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:18,076 INFO L82 PathProgramCache]: Analyzing trace with hash -1638405741, now seen corresponding path program 5 times [2018-01-21 00:31:18,076 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:18,076 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:18,076 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:18,076 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:18,076 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:18,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:18,093 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:18,258 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-21 00:31:18,259 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:18,260 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:18,260 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:18,260 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:18,260 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:18,260 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:18,270 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:31:18,270 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:18,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,286 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,304 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,363 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,366 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:18,370 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:18,387 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-21 00:31:18,387 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:18,493 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-21 00:31:18,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:18,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:18,528 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:31:18,528 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:18,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,542 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,549 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,564 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,585 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,642 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:18,660 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:18,666 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:18,675 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-21 00:31:18,675 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:18,728 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-21 00:31:18,729 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:18,730 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8, 8, 8] total 17 [2018-01-21 00:31:18,730 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:18,730 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 00:31:18,730 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 00:31:18,731 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=163, Unknown=0, NotChecked=0, Total=272 [2018-01-21 00:31:18,731 INFO L87 Difference]: Start difference. First operand 72 states and 74 transitions. Second operand 11 states. [2018-01-21 00:31:18,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:18,846 INFO L93 Difference]: Finished difference Result 120 states and 125 transitions. [2018-01-21 00:31:18,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 00:31:18,846 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 69 [2018-01-21 00:31:18,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:18,847 INFO L225 Difference]: With dead ends: 120 [2018-01-21 00:31:18,847 INFO L226 Difference]: Without dead ends: 84 [2018-01-21 00:31:18,848 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 275 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=200, Invalid=306, Unknown=0, NotChecked=0, Total=506 [2018-01-21 00:31:18,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-01-21 00:31:18,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 80. [2018-01-21 00:31:18,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-01-21 00:31:18,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 82 transitions. [2018-01-21 00:31:18,856 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 82 transitions. Word has length 69 [2018-01-21 00:31:18,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:18,857 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 82 transitions. [2018-01-21 00:31:18,857 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 00:31:18,857 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2018-01-21 00:31:18,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-21 00:31:18,858 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:18,858 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:18,859 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:18,859 INFO L82 PathProgramCache]: Analyzing trace with hash -1138501965, now seen corresponding path program 6 times [2018-01-21 00:31:18,859 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:18,860 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:18,860 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:18,860 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:18,860 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:18,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:18,877 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:18,972 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-21 00:31:18,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:18,972 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:18,972 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:18,972 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:18,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:18,972 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:18,980 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:31:18,980 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:31:18,994 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:18,998 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,000 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,004 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,012 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,042 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,054 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,055 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:19,057 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:19,164 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 22 proven. 72 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-21 00:31:19,165 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:19,288 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-21 00:31:19,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:19,309 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:19,312 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:31:19,312 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:31:19,333 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,377 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,481 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,642 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,733 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:19,751 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:19,757 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:19,838 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-21 00:31:19,838 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:20,082 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-21 00:31:20,084 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:20,084 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 9, 10, 11] total 43 [2018-01-21 00:31:20,084 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:20,085 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 00:31:20,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 00:31:20,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=610, Invalid=1196, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 00:31:20,086 INFO L87 Difference]: Start difference. First operand 80 states and 82 transitions. Second operand 21 states. [2018-01-21 00:31:20,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:20,206 INFO L93 Difference]: Finished difference Result 138 states and 145 transitions. [2018-01-21 00:31:20,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 00:31:20,206 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 77 [2018-01-21 00:31:20,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:20,209 INFO L225 Difference]: With dead ends: 138 [2018-01-21 00:31:20,209 INFO L226 Difference]: Without dead ends: 98 [2018-01-21 00:31:20,210 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 318 GetRequests, 274 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 870 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=652, Invalid=1240, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 00:31:20,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-01-21 00:31:20,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 92. [2018-01-21 00:31:20,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-01-21 00:31:20,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 94 transitions. [2018-01-21 00:31:20,220 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 94 transitions. Word has length 77 [2018-01-21 00:31:20,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:20,221 INFO L432 AbstractCegarLoop]: Abstraction has 92 states and 94 transitions. [2018-01-21 00:31:20,221 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 00:31:20,221 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 94 transitions. [2018-01-21 00:31:20,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-21 00:31:20,222 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:20,223 INFO L322 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:20,223 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:20,223 INFO L82 PathProgramCache]: Analyzing trace with hash -1493422676, now seen corresponding path program 7 times [2018-01-21 00:31:20,223 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:20,224 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:20,224 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:20,224 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:20,224 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:20,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:20,241 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:20,362 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-21 00:31:20,362 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:20,363 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:20,363 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:20,363 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:20,363 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:20,363 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:20,371 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:20,371 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:31:20,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:20,396 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:20,490 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-21 00:31:20,490 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:20,719 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-21 00:31:20,739 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:20,739 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:20,742 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:20,742 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:31:20,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:20,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:20,803 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-21 00:31:20,803 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:20,941 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-21 00:31:20,943 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:20,943 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 13, 12, 13] total 32 [2018-01-21 00:31:20,943 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:20,944 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 00:31:20,944 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 00:31:20,945 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=367, Invalid=625, Unknown=0, NotChecked=0, Total=992 [2018-01-21 00:31:20,945 INFO L87 Difference]: Start difference. First operand 92 states and 94 transitions. Second operand 22 states. [2018-01-21 00:31:21,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:21,134 INFO L93 Difference]: Finished difference Result 152 states and 158 transitions. [2018-01-21 00:31:21,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 00:31:21,134 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 89 [2018-01-21 00:31:21,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:21,135 INFO L225 Difference]: With dead ends: 152 [2018-01-21 00:31:21,135 INFO L226 Difference]: Without dead ends: 108 [2018-01-21 00:31:21,136 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 333 SyntacticMatches, 4 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=398, Invalid=658, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 00:31:21,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-01-21 00:31:21,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 104. [2018-01-21 00:31:21,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-01-21 00:31:21,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 106 transitions. [2018-01-21 00:31:21,145 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 106 transitions. Word has length 89 [2018-01-21 00:31:21,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:21,145 INFO L432 AbstractCegarLoop]: Abstraction has 104 states and 106 transitions. [2018-01-21 00:31:21,145 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 00:31:21,145 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2018-01-21 00:31:21,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-01-21 00:31:21,147 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:21,147 INFO L322 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:21,147 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:21,147 INFO L82 PathProgramCache]: Analyzing trace with hash -698890221, now seen corresponding path program 8 times [2018-01-21 00:31:21,148 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:21,148 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:21,149 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:21,149 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:21,149 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:21,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:21,165 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:21,279 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-21 00:31:21,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:21,280 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:21,280 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:21,280 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:21,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:21,280 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:21,285 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:31:21,286 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:21,300 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:21,308 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:21,309 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:21,312 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:21,403 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-21 00:31:21,403 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:21,661 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-21 00:31:21,683 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:21,683 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:21,686 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:31:21,686 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:21,709 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:21,778 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:21,796 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:21,801 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:21,816 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-21 00:31:21,816 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:21,957 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-21 00:31:21,959 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:21,959 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 14, 13, 14] total 35 [2018-01-21 00:31:21,959 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:21,959 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 00:31:21,960 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 00:31:21,960 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=442, Invalid=748, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 00:31:21,960 INFO L87 Difference]: Start difference. First operand 104 states and 106 transitions. Second operand 24 states. [2018-01-21 00:31:22,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:22,114 INFO L93 Difference]: Finished difference Result 168 states and 173 transitions. [2018-01-21 00:31:22,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 00:31:22,115 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 101 [2018-01-21 00:31:22,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:22,116 INFO L225 Difference]: With dead ends: 168 [2018-01-21 00:31:22,116 INFO L226 Difference]: Without dead ends: 116 [2018-01-21 00:31:22,116 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 417 GetRequests, 379 SyntacticMatches, 4 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 461 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=476, Invalid=784, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 00:31:22,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-01-21 00:31:22,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 112. [2018-01-21 00:31:22,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-21 00:31:22,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 114 transitions. [2018-01-21 00:31:22,131 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 114 transitions. Word has length 101 [2018-01-21 00:31:22,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:22,131 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 114 transitions. [2018-01-21 00:31:22,131 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 00:31:22,131 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 114 transitions. [2018-01-21 00:31:22,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-01-21 00:31:22,132 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:22,133 INFO L322 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:22,133 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:22,133 INFO L82 PathProgramCache]: Analyzing trace with hash -745483981, now seen corresponding path program 9 times [2018-01-21 00:31:22,133 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:22,134 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:22,134 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:22,134 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:22,134 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:22,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:22,152 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:22,359 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-21 00:31:22,359 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:22,360 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:22,360 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:22,360 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:22,360 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:22,360 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:22,367 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:31:22,367 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:31:22,387 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,407 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,414 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,428 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,439 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,457 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,491 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,565 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,588 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,589 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:22,592 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:22,607 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-21 00:31:22,607 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:22,751 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-21 00:31:22,772 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:22,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:22,777 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:31:22,778 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:31:22,801 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,844 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,893 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:22,949 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:23,023 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:23,119 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:23,238 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:23,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:23,574 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:23,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:24,076 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:24,108 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:24,115 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:24,127 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-21 00:31:24,128 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:24,188 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-21 00:31:24,190 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:24,190 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13, 13, 13, 13] total 27 [2018-01-21 00:31:24,190 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:24,191 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 00:31:24,191 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 00:31:24,191 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=398, Unknown=0, NotChecked=0, Total=702 [2018-01-21 00:31:24,191 INFO L87 Difference]: Start difference. First operand 112 states and 114 transitions. Second operand 16 states. [2018-01-21 00:31:24,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:24,377 INFO L93 Difference]: Finished difference Result 180 states and 185 transitions. [2018-01-21 00:31:24,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 00:31:24,377 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 109 [2018-01-21 00:31:24,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:24,378 INFO L225 Difference]: With dead ends: 180 [2018-01-21 00:31:24,378 INFO L226 Difference]: Without dead ends: 124 [2018-01-21 00:31:24,379 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 471 GetRequests, 435 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=580, Invalid=826, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 00:31:24,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-01-21 00:31:24,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 120. [2018-01-21 00:31:24,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-21 00:31:24,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 122 transitions. [2018-01-21 00:31:24,385 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 122 transitions. Word has length 109 [2018-01-21 00:31:24,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:24,385 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 122 transitions. [2018-01-21 00:31:24,385 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 00:31:24,385 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 122 transitions. [2018-01-21 00:31:24,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-21 00:31:24,386 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:24,386 INFO L322 BasicCegarLoop]: trace histogram [12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:24,386 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:24,386 INFO L82 PathProgramCache]: Analyzing trace with hash 1047454035, now seen corresponding path program 10 times [2018-01-21 00:31:24,386 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:24,387 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:24,387 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:24,387 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:24,387 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:24,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:24,405 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:24,583 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-21 00:31:24,583 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:24,583 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:24,583 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:24,584 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:24,584 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:24,584 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:24,589 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:31:24,589 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:31:24,842 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:24,845 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:24,980 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-21 00:31:24,980 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:25,300 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-21 00:31:25,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:25,322 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:25,326 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:31:25,327 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:31:25,481 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:25,486 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:25,511 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-21 00:31:25,512 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:25,689 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-21 00:31:25,692 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:25,692 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 16, 15, 16] total 41 [2018-01-21 00:31:25,692 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:25,693 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 00:31:25,693 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 00:31:25,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=613, Invalid=1027, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 00:31:25,694 INFO L87 Difference]: Start difference. First operand 120 states and 122 transitions. Second operand 28 states. [2018-01-21 00:31:25,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:25,838 INFO L93 Difference]: Finished difference Result 192 states and 197 transitions. [2018-01-21 00:31:25,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 00:31:25,838 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 117 [2018-01-21 00:31:25,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:25,839 INFO L225 Difference]: With dead ends: 192 [2018-01-21 00:31:25,839 INFO L226 Difference]: Without dead ends: 132 [2018-01-21 00:31:25,840 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 483 GetRequests, 439 SyntacticMatches, 4 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 662 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=653, Invalid=1069, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 00:31:25,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-21 00:31:25,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 128. [2018-01-21 00:31:25,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-01-21 00:31:25,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 130 transitions. [2018-01-21 00:31:25,848 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 130 transitions. Word has length 117 [2018-01-21 00:31:25,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:25,848 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 130 transitions. [2018-01-21 00:31:25,849 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 00:31:25,849 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 130 transitions. [2018-01-21 00:31:25,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-01-21 00:31:25,850 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:25,850 INFO L322 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:25,850 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:25,850 INFO L82 PathProgramCache]: Analyzing trace with hash 244283507, now seen corresponding path program 11 times [2018-01-21 00:31:25,850 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:25,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:25,851 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:25,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:25,851 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:25,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:25,871 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:26,039 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-21 00:31:26,040 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:26,040 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:26,040 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:26,040 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:26,040 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:26,040 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:26,045 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:31:26,045 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:26,053 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,054 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,056 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,059 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,063 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,069 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,148 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,185 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,421 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:26,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:28,730 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:28,738 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:28,745 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:28,762 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-21 00:31:28,763 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:28,964 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-21 00:31:28,988 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:28,988 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:28,991 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:31:28,991 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:29,001 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,004 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,024 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,042 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,069 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,227 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,349 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:29,511 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:30,081 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:30,857 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:31,919 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:31,964 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:31,970 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:31,984 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-21 00:31:31,984 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:32,024 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-21 00:31:32,026 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:32,026 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15, 15, 15, 15] total 31 [2018-01-21 00:31:32,026 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:32,027 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 00:31:32,027 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 00:31:32,027 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=410, Invalid=520, Unknown=0, NotChecked=0, Total=930 [2018-01-21 00:31:32,027 INFO L87 Difference]: Start difference. First operand 128 states and 130 transitions. Second operand 18 states. [2018-01-21 00:31:32,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:32,206 INFO L93 Difference]: Finished difference Result 204 states and 209 transitions. [2018-01-21 00:31:32,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 00:31:32,207 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 125 [2018-01-21 00:31:32,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:32,207 INFO L225 Difference]: With dead ends: 204 [2018-01-21 00:31:32,207 INFO L226 Difference]: Without dead ends: 140 [2018-01-21 00:31:32,208 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 541 GetRequests, 499 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=788, Invalid=1104, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 00:31:32,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-21 00:31:32,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 136. [2018-01-21 00:31:32,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-21 00:31:32,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-01-21 00:31:32,216 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 125 [2018-01-21 00:31:32,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:32,216 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-01-21 00:31:32,216 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 00:31:32,216 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-01-21 00:31:32,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-01-21 00:31:32,217 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:32,217 INFO L322 BasicCegarLoop]: trace histogram [14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:32,217 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:32,218 INFO L82 PathProgramCache]: Analyzing trace with hash -1479534957, now seen corresponding path program 12 times [2018-01-21 00:31:32,218 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:32,218 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:32,219 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:32,219 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:32,219 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:32,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:32,238 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:32,580 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-21 00:31:32,581 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:32,581 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:32,581 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:32,581 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:32,581 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:32,581 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:32,587 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:31:32,588 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:31:32,604 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,609 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,612 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,615 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,627 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,649 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,686 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:32,925 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:33,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:33,130 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:33,450 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:33,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:33,819 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:33,824 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:34,078 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 50 proven. 338 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-21 00:31:34,078 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:34,327 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-21 00:31:34,349 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:34,349 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:34,351 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:31:34,352 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:31:34,388 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:34,443 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:34,491 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:34,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:34,618 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:34,707 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:34,835 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:35,226 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:36,895 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:37,105 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:37,366 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:37,686 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:38,034 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:38,343 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:31:38,373 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:38,380 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:38,578 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-21 00:31:38,578 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:39,181 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-21 00:31:39,183 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:39,183 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19, 16, 17, 18] total 78 [2018-01-21 00:31:39,183 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:39,184 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 00:31:39,184 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 00:31:39,185 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2129, Invalid=3877, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 00:31:39,185 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 35 states. [2018-01-21 00:31:39,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:39,416 INFO L93 Difference]: Finished difference Result 222 states and 229 transitions. [2018-01-21 00:31:39,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 00:31:39,417 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 133 [2018-01-21 00:31:39,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:39,417 INFO L225 Difference]: With dead ends: 222 [2018-01-21 00:31:39,417 INFO L226 Difference]: Without dead ends: 154 [2018-01-21 00:31:39,419 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 549 GetRequests, 470 SyntacticMatches, 2 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3264 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2206, Invalid=3956, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 00:31:39,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-21 00:31:39,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 148. [2018-01-21 00:31:39,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-01-21 00:31:39,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 150 transitions. [2018-01-21 00:31:39,425 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 150 transitions. Word has length 133 [2018-01-21 00:31:39,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:39,425 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 150 transitions. [2018-01-21 00:31:39,425 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 00:31:39,425 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 150 transitions. [2018-01-21 00:31:39,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-01-21 00:31:39,426 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:39,426 INFO L322 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:39,426 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:39,426 INFO L82 PathProgramCache]: Analyzing trace with hash 144261004, now seen corresponding path program 13 times [2018-01-21 00:31:39,426 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:39,427 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:39,427 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:39,427 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:39,427 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:39,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:39,443 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:39,849 INFO L134 CoverageAnalysis]: Checked inductivity of 842 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-21 00:31:39,849 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:39,875 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:39,875 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:39,875 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:39,876 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:39,876 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:39,881 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:39,881 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:31:39,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:39,925 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:40,212 INFO L134 CoverageAnalysis]: Checked inductivity of 842 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-21 00:31:40,212 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:40,731 INFO L134 CoverageAnalysis]: Checked inductivity of 842 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-21 00:31:40,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:40,751 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:40,754 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:40,754 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:31:40,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:40,815 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:40,850 INFO L134 CoverageAnalysis]: Checked inductivity of 842 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-21 00:31:40,850 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:41,115 INFO L134 CoverageAnalysis]: Checked inductivity of 842 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-21 00:31:41,116 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:41,117 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 20, 19, 20] total 53 [2018-01-21 00:31:41,117 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:41,117 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 00:31:41,117 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 00:31:41,118 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1039, Invalid=1717, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 00:31:41,118 INFO L87 Difference]: Start difference. First operand 148 states and 150 transitions. Second operand 36 states. [2018-01-21 00:31:41,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:41,352 INFO L93 Difference]: Finished difference Result 236 states and 242 transitions. [2018-01-21 00:31:41,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 00:31:41,352 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 145 [2018-01-21 00:31:41,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:41,353 INFO L225 Difference]: With dead ends: 236 [2018-01-21 00:31:41,353 INFO L226 Difference]: Without dead ends: 164 [2018-01-21 00:31:41,354 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 599 GetRequests, 543 SyntacticMatches, 4 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1172 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1091, Invalid=1771, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 00:31:41,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-21 00:31:41,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 160. [2018-01-21 00:31:41,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-21 00:31:41,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 162 transitions. [2018-01-21 00:31:41,360 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 162 transitions. Word has length 145 [2018-01-21 00:31:41,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:41,360 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 162 transitions. [2018-01-21 00:31:41,360 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 00:31:41,360 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 162 transitions. [2018-01-21 00:31:41,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-01-21 00:31:41,361 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:41,362 INFO L322 BasicCegarLoop]: trace histogram [17, 17, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:41,362 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:41,362 INFO L82 PathProgramCache]: Analyzing trace with hash -927393037, now seen corresponding path program 14 times [2018-01-21 00:31:41,362 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:41,363 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:41,363 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:31:41,363 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:41,363 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:41,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:41,384 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:41,621 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-21 00:31:41,621 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:41,621 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:41,621 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:41,621 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:41,621 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:41,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:41,626 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:31:41,626 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:41,641 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:41,652 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:41,654 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:41,657 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:41,916 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-21 00:31:41,916 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:42,587 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-21 00:31:42,607 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:42,607 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:42,610 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:31:42,610 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:42,631 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:42,686 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:42,709 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:42,715 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:42,746 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-21 00:31:42,746 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:42,999 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-21 00:31:43,001 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:43,001 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 20, 21, 20, 21] total 56 [2018-01-21 00:31:43,001 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:43,001 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 00:31:43,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 00:31:43,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1163, Invalid=1917, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 00:31:43,002 INFO L87 Difference]: Start difference. First operand 160 states and 162 transitions. Second operand 38 states. [2018-01-21 00:31:43,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:43,222 INFO L93 Difference]: Finished difference Result 252 states and 257 transitions. [2018-01-21 00:31:43,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 00:31:43,223 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 157 [2018-01-21 00:31:43,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:43,223 INFO L225 Difference]: With dead ends: 252 [2018-01-21 00:31:43,223 INFO L226 Difference]: Without dead ends: 172 [2018-01-21 00:31:43,224 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 648 GetRequests, 589 SyntacticMatches, 4 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1322 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1218, Invalid=1974, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 00:31:43,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-21 00:31:43,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 168. [2018-01-21 00:31:43,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-01-21 00:31:43,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 170 transitions. [2018-01-21 00:31:43,231 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 170 transitions. Word has length 157 [2018-01-21 00:31:43,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:43,231 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 170 transitions. [2018-01-21 00:31:43,231 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 00:31:43,232 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 170 transitions. [2018-01-21 00:31:43,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2018-01-21 00:31:43,232 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:43,232 INFO L322 BasicCegarLoop]: trace histogram [18, 18, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:43,232 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:43,233 INFO L82 PathProgramCache]: Analyzing trace with hash -2111777517, now seen corresponding path program 15 times [2018-01-21 00:31:43,233 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:43,233 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:43,233 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:43,233 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:43,233 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:43,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:43,254 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:43,514 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-01-21 00:31:43,515 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:43,515 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:43,515 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:43,515 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:43,515 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:43,515 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:43,520 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:31:43,520 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:31:43,536 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,539 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,541 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,546 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,549 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,557 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,568 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,586 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,603 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,689 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,760 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,830 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,871 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:43,949 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:44,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:44,549 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:44,860 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:45,378 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:45,381 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:45,388 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:45,651 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-01-21 00:31:45,651 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:46,394 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 676 refuted. 0 times theorem prover too weak. 480 trivial. 0 not checked. [2018-01-21 00:31:46,416 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:46,416 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:46,419 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:31:46,420 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:31:46,442 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:46,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:46,533 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:46,587 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:46,659 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:46,752 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:46,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:47,032 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:47,209 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:47,433 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:47,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:48,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:48,416 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:48,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:49,490 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:50,177 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:50,919 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:51,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:31:51,859 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:51,866 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:51,895 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-01-21 00:31:51,896 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:52,232 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-01-21 00:31:52,234 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:52,235 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 25, 20, 20] total 81 [2018-01-21 00:31:52,235 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:52,235 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 00:31:52,235 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 00:31:52,236 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2362, Invalid=4118, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 00:31:52,237 INFO L87 Difference]: Start difference. First operand 168 states and 170 transitions. Second operand 40 states. [2018-01-21 00:31:52,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:52,439 INFO L93 Difference]: Finished difference Result 264 states and 269 transitions. [2018-01-21 00:31:52,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 00:31:52,439 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 165 [2018-01-21 00:31:52,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:52,440 INFO L225 Difference]: With dead ends: 264 [2018-01-21 00:31:52,440 INFO L226 Difference]: Without dead ends: 180 [2018-01-21 00:31:52,442 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 681 GetRequests, 599 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3174 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2442, Invalid=4200, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 00:31:52,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-21 00:31:52,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 176. [2018-01-21 00:31:52,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-21 00:31:52,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 178 transitions. [2018-01-21 00:31:52,450 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 178 transitions. Word has length 165 [2018-01-21 00:31:52,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:52,450 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 178 transitions. [2018-01-21 00:31:52,450 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 00:31:52,450 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 178 transitions. [2018-01-21 00:31:52,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-01-21 00:31:52,451 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:52,452 INFO L322 BasicCegarLoop]: trace histogram [19, 19, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:52,452 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:52,452 INFO L82 PathProgramCache]: Analyzing trace with hash -272886221, now seen corresponding path program 16 times [2018-01-21 00:31:52,452 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:52,453 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:52,453 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:52,453 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:52,453 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:52,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:52,473 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:52,865 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-01-21 00:31:52,866 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:52,866 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:52,866 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:52,866 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:52,866 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:52,866 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:52,872 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:31:52,872 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:31:54,247 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:54,251 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:54,458 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-01-21 00:31:54,459 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:55,083 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-01-21 00:31:55,105 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:55,105 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:31:55,108 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:31:55,108 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:31:55,386 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:31:55,392 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:31:55,421 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-01-21 00:31:55,422 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:31:55,676 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-01-21 00:31:55,678 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:31:55,679 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 23, 22, 23] total 62 [2018-01-21 00:31:55,679 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:31:55,679 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 00:31:55,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 00:31:55,680 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1432, Invalid=2350, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 00:31:55,680 INFO L87 Difference]: Start difference. First operand 176 states and 178 transitions. Second operand 42 states. [2018-01-21 00:31:55,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:31:55,867 INFO L93 Difference]: Finished difference Result 276 states and 281 transitions. [2018-01-21 00:31:55,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 00:31:55,867 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 173 [2018-01-21 00:31:55,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:31:55,868 INFO L225 Difference]: With dead ends: 276 [2018-01-21 00:31:55,868 INFO L226 Difference]: Without dead ends: 188 [2018-01-21 00:31:55,869 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 714 GetRequests, 649 SyntacticMatches, 4 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1649 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1493, Invalid=2413, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 00:31:55,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-01-21 00:31:55,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 184. [2018-01-21 00:31:55,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-21 00:31:55,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 186 transitions. [2018-01-21 00:31:55,878 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 186 transitions. Word has length 173 [2018-01-21 00:31:55,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:31:55,878 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 186 transitions. [2018-01-21 00:31:55,878 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 00:31:55,878 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 186 transitions. [2018-01-21 00:31:55,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-01-21 00:31:55,879 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:31:55,879 INFO L322 BasicCegarLoop]: trace histogram [20, 20, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:31:55,879 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:31:55,879 INFO L82 PathProgramCache]: Analyzing trace with hash 1592286803, now seen corresponding path program 17 times [2018-01-21 00:31:55,879 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:31:55,880 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:55,880 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:31:55,880 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:31:55,880 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:31:55,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:31:55,899 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:31:56,190 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-01-21 00:31:56,191 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:56,191 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:31:56,191 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:31:56,191 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:31:56,191 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:31:56,191 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:31:56,196 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:31:56,196 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:31:56,206 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,208 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,210 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,213 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,217 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,228 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,248 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,263 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,344 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,450 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:56,631 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:57,269 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:31:58,869 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:00,724 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:03,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:32:12,207 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command Received shutdown request... [2018-01-21 00:32:19,928 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command Cannot interrupt operation gracefully because timeout expired. Forcing shutdown