java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset3_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 00:46:09,586 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 00:46:09,587 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 00:46:09,600 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 00:46:09,600 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 00:46:09,601 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 00:46:09,602 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 00:46:09,604 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 00:46:09,606 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 00:46:09,607 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 00:46:09,608 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 00:46:09,608 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 00:46:09,609 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 00:46:09,609 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 00:46:09,610 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 00:46:09,612 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 00:46:09,615 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 00:46:09,617 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 00:46:09,618 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 00:46:09,619 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 00:46:09,622 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 00:46:09,628 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-21 00:46:09,638 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 00:46:09,638 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 00:46:09,639 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 00:46:09,639 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 00:46:09,639 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 00:46:09,639 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-21 00:46:09,640 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 00:46:09,640 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 00:46:09,640 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 00:46:09,641 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 00:46:09,641 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 00:46:09,641 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 00:46:09,641 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 00:46:09,641 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 00:46:09,642 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 00:46:09,642 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 00:46:09,642 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 00:46:09,642 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 00:46:09,642 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 00:46:09,643 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 00:46:09,643 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 00:46:09,643 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 00:46:09,643 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 00:46:09,643 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 00:46:09,644 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 00:46:09,644 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 00:46:09,644 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 00:46:09,644 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 00:46:09,644 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 00:46:09,645 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 00:46:09,645 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 00:46:09,645 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 00:46:09,645 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 00:46:09,645 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 00:46:09,646 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 00:46:09,646 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 00:46:09,646 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 00:46:09,647 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 00:46:09,647 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 00:46:09,681 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 00:46:09,693 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 00:46:09,698 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 00:46:09,699 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 00:46:09,700 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 00:46:09,701 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset3_false-valid-deref-write.c [2018-01-21 00:46:09,825 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 00:46:09,831 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 00:46:09,832 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 00:46:09,832 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 00:46:09,837 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 00:46:09,838 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 12:46:09" (1/1) ... [2018-01-21 00:46:09,841 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2c111afb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:09, skipping insertion in model container [2018-01-21 00:46:09,841 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 12:46:09" (1/1) ... [2018-01-21 00:46:09,858 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 00:46:09,880 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 00:46:09,991 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 00:46:10,006 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 00:46:10,011 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10 WrapperNode [2018-01-21 00:46:10,011 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 00:46:10,012 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 00:46:10,012 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 00:46:10,013 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 00:46:10,029 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (1/1) ... [2018-01-21 00:46:10,029 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (1/1) ... [2018-01-21 00:46:10,037 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (1/1) ... [2018-01-21 00:46:10,037 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (1/1) ... [2018-01-21 00:46:10,039 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (1/1) ... [2018-01-21 00:46:10,042 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (1/1) ... [2018-01-21 00:46:10,043 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (1/1) ... [2018-01-21 00:46:10,044 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 00:46:10,045 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 00:46:10,045 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 00:46:10,045 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 00:46:10,046 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 00:46:10,096 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 00:46:10,096 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 00:46:10,096 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 00:46:10,097 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 00:46:10,097 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 00:46:10,097 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 00:46:10,097 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 00:46:10,097 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 00:46:10,097 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 00:46:10,098 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 00:46:10,098 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 00:46:10,098 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 00:46:10,221 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 00:46:10,221 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 12:46:10 BoogieIcfgContainer [2018-01-21 00:46:10,222 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 00:46:10,222 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 00:46:10,222 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 00:46:10,224 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 00:46:10,224 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 12:46:09" (1/3) ... [2018-01-21 00:46:10,226 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@140fe26b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 12:46:10, skipping insertion in model container [2018-01-21 00:46:10,226 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:46:10" (2/3) ... [2018-01-21 00:46:10,226 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@140fe26b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 12:46:10, skipping insertion in model container [2018-01-21 00:46:10,226 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 12:46:10" (3/3) ... [2018-01-21 00:46:10,229 INFO L105 eAbstractionObserver]: Analyzing ICFG memset3_false-valid-deref-write.c [2018-01-21 00:46:10,235 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 00:46:10,242 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 00:46:10,282 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:46:10,282 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:46:10,282 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:46:10,283 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:46:10,283 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:46:10,283 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:46:10,283 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:46:10,283 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 00:46:10,284 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:46:10,306 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 00:46:10,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 00:46:10,314 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:10,315 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 00:46:10,315 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 00:46:10,321 INFO L82 PathProgramCache]: Analyzing trace with hash 51896, now seen corresponding path program 1 times [2018-01-21 00:46:10,324 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:10,379 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:10,379 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:10,379 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:10,379 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:10,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 00:46:10,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 00:46:10,438 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 00:46:10,444 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 00:46:10,451 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:46:10,451 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:46:10,451 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:46:10,451 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:46:10,451 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:46:10,451 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:46:10,452 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:46:10,452 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 00:46:10,452 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:46:10,453 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 00:46:10,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 00:46:10,454 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:10,455 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:10,455 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:10,455 INFO L82 PathProgramCache]: Analyzing trace with hash 126067280, now seen corresponding path program 1 times [2018-01-21 00:46:10,455 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:10,456 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:10,457 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:10,457 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:10,457 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:10,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:10,491 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:10,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:10,561 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:46:10,562 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 00:46:10,562 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:46:10,564 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 00:46:10,580 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 00:46:10,581 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 00:46:10,584 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 4 states. [2018-01-21 00:46:10,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:10,637 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 00:46:10,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 00:46:10,639 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-01-21 00:46:10,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:10,647 INFO L225 Difference]: With dead ends: 34 [2018-01-21 00:46:10,647 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 00:46:10,650 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 00:46:10,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 00:46:10,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 00:46:10,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 00:46:10,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 00:46:10,752 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 00:46:10,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:10,752 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 00:46:10,752 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 00:46:10,752 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 00:46:10,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 00:46:10,753 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:10,753 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:10,753 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:10,753 INFO L82 PathProgramCache]: Analyzing trace with hash 763300235, now seen corresponding path program 1 times [2018-01-21 00:46:10,754 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:10,754 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:10,754 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:10,755 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:10,755 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:10,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:10,768 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:10,836 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:10,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:10,836 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:10,837 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 20 with the following transitions: [2018-01-21 00:46:10,839 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [16], [18], [19], [20], [21], [23], [24], [25], [26], [27], [28] [2018-01-21 00:46:10,884 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 00:46:10,884 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 00:46:11,041 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 00:46:11,043 INFO L268 AbstractInterpreter]: Visited 19 different actions 23 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 00:46:11,055 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 00:46:11,055 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:11,055 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:11,063 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:11,063 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:11,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:11,091 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:11,115 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,116 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:11,316 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,349 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:11,350 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:11,356 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:11,356 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:11,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:11,388 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:11,393 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,394 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:11,456 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,458 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:11,458 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 00:46:11,458 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:11,459 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 00:46:11,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 00:46:11,460 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 00:46:11,460 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 6 states. [2018-01-21 00:46:11,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:11,488 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 00:46:11,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 00:46:11,488 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-21 00:46:11,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:11,489 INFO L225 Difference]: With dead ends: 30 [2018-01-21 00:46:11,489 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 00:46:11,490 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 00:46:11,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 00:46:11,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 00:46:11,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 00:46:11,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 00:46:11,493 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 00:46:11,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:11,493 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 00:46:11,493 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 00:46:11,493 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 00:46:11,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 00:46:11,494 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:11,494 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:11,495 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:11,495 INFO L82 PathProgramCache]: Analyzing trace with hash -957314640, now seen corresponding path program 2 times [2018-01-21 00:46:11,495 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:11,496 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:11,496 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:11,496 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:11,496 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:11,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:11,511 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:11,564 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,565 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:11,565 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:11,565 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:11,565 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:11,565 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:11,565 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:11,578 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:11,578 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:11,594 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:11,597 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:11,598 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:11,600 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:11,613 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,613 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:11,738 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,759 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:11,760 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:11,763 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:11,763 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:11,780 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:11,787 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:11,793 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:11,796 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:11,801 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,801 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:11,896 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:11,898 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:11,898 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 00:46:11,898 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:11,899 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 00:46:11,899 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 00:46:11,899 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 00:46:11,900 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 7 states. [2018-01-21 00:46:11,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:11,926 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 00:46:11,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 00:46:11,927 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-01-21 00:46:11,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:11,928 INFO L225 Difference]: With dead ends: 31 [2018-01-21 00:46:11,928 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 00:46:11,928 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 73 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 00:46:11,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 00:46:11,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 00:46:11,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 00:46:11,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 00:46:11,932 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 00:46:11,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:11,933 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 00:46:11,933 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 00:46:11,933 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 00:46:11,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 00:46:11,934 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:11,934 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:11,934 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:11,934 INFO L82 PathProgramCache]: Analyzing trace with hash 1538199083, now seen corresponding path program 3 times [2018-01-21 00:46:11,934 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:11,935 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:11,935 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:11,935 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:11,936 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:11,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:11,948 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:12,007 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:12,008 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:12,008 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:12,008 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:12,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:12,008 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:12,019 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:12,019 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:12,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:12,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:12,047 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:12,048 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:12,050 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:12,069 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,069 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:12,210 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,242 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:12,242 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:12,246 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:12,246 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:12,261 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:12,268 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:12,276 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:12,282 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:12,285 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:12,289 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,289 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:12,366 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,369 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:12,370 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 00:46:12,370 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:12,370 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 00:46:12,370 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 00:46:12,370 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 00:46:12,371 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 8 states. [2018-01-21 00:46:12,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:12,390 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 00:46:12,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 00:46:12,391 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-01-21 00:46:12,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:12,391 INFO L225 Difference]: With dead ends: 32 [2018-01-21 00:46:12,392 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 00:46:12,392 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 00:46:12,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 00:46:12,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 00:46:12,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 00:46:12,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 00:46:12,395 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 00:46:12,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:12,395 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 00:46:12,395 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 00:46:12,396 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 00:46:12,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 00:46:12,396 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:12,396 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:12,396 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:12,397 INFO L82 PathProgramCache]: Analyzing trace with hash 1589713168, now seen corresponding path program 4 times [2018-01-21 00:46:12,397 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:12,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:12,398 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:12,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:12,398 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:12,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:12,406 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:12,461 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,462 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:12,462 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:12,462 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:12,462 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:12,462 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:12,462 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:12,467 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:12,467 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:12,478 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:12,479 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:12,488 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,488 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:12,602 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:12,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:12,625 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:12,625 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:12,647 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:12,650 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:12,654 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,654 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:12,699 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,701 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:12,701 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 00:46:12,701 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:12,701 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 00:46:12,701 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 00:46:12,701 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 00:46:12,702 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 9 states. [2018-01-21 00:46:12,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:12,725 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 00:46:12,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 00:46:12,725 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-01-21 00:46:12,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:12,726 INFO L225 Difference]: With dead ends: 33 [2018-01-21 00:46:12,726 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 00:46:12,726 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 00:46:12,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 00:46:12,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 00:46:12,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 00:46:12,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 00:46:12,729 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 00:46:12,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:12,729 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 00:46:12,730 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 00:46:12,730 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 00:46:12,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 00:46:12,730 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:12,730 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:12,730 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:12,731 INFO L82 PathProgramCache]: Analyzing trace with hash -1108317493, now seen corresponding path program 5 times [2018-01-21 00:46:12,731 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:12,731 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:12,731 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:12,731 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:12,732 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:12,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:12,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:12,803 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,803 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:12,803 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:12,803 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:12,804 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:12,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:12,804 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:12,813 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:12,813 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:12,819 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:12,820 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:12,821 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:12,826 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:12,827 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:12,829 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:12,847 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:12,847 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:12,982 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,003 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:13,003 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:13,006 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:13,006 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:13,011 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:13,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:13,018 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:13,029 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:13,036 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:13,039 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:13,043 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,044 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:13,112 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,114 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:13,114 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 00:46:13,114 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:13,115 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 00:46:13,115 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 00:46:13,115 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 00:46:13,116 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 10 states. [2018-01-21 00:46:13,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:13,146 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 00:46:13,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 00:46:13,146 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 23 [2018-01-21 00:46:13,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:13,147 INFO L225 Difference]: With dead ends: 34 [2018-01-21 00:46:13,147 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 00:46:13,147 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 00:46:13,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 00:46:13,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 00:46:13,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 00:46:13,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 00:46:13,151 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 00:46:13,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:13,152 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 00:46:13,152 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 00:46:13,152 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 00:46:13,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 00:46:13,153 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:13,153 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:13,153 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:13,153 INFO L82 PathProgramCache]: Analyzing trace with hash 1152077936, now seen corresponding path program 6 times [2018-01-21 00:46:13,153 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:13,154 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:13,154 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:13,154 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:13,154 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:13,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:13,164 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:13,326 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,326 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:13,326 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:13,327 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:13,327 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:13,327 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:13,327 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:13,333 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:13,334 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:13,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:13,342 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:13,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:13,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:13,345 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:13,347 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:13,356 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,356 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:13,510 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:13,531 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:13,534 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:13,534 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:13,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:13,560 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:13,573 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:13,584 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:13,590 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:13,593 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:13,598 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,599 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:13,683 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,685 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:13,685 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 00:46:13,686 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:13,686 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 00:46:13,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 00:46:13,687 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 00:46:13,687 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 11 states. [2018-01-21 00:46:13,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:13,717 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 00:46:13,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 00:46:13,718 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 24 [2018-01-21 00:46:13,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:13,719 INFO L225 Difference]: With dead ends: 35 [2018-01-21 00:46:13,719 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 00:46:13,719 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 85 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 00:46:13,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 00:46:13,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 00:46:13,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 00:46:13,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 00:46:13,723 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 00:46:13,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:13,723 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 00:46:13,723 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 00:46:13,723 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 00:46:13,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 00:46:13,724 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:13,724 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:13,724 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:13,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1790107797, now seen corresponding path program 7 times [2018-01-21 00:46:13,725 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:13,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:13,726 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:13,726 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:13,726 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:13,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:13,736 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:13,892 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,893 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:13,893 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:13,893 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:13,893 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:13,893 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:13,893 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:13,898 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:13,898 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:13,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:13,909 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:13,919 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:13,919 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:14,103 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,124 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:14,124 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:14,127 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:14,127 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:14,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:14,149 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:14,155 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,155 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:14,224 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,225 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:14,225 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 00:46:14,226 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:14,226 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 00:46:14,226 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 00:46:14,227 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 00:46:14,227 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 12 states. [2018-01-21 00:46:14,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:14,252 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 00:46:14,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 00:46:14,252 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 25 [2018-01-21 00:46:14,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:14,253 INFO L225 Difference]: With dead ends: 36 [2018-01-21 00:46:14,253 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 00:46:14,254 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 00:46:14,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 00:46:14,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 00:46:14,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 00:46:14,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 00:46:14,256 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 00:46:14,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:14,257 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 00:46:14,257 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 00:46:14,257 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 00:46:14,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 00:46:14,257 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:14,257 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:14,257 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:14,258 INFO L82 PathProgramCache]: Analyzing trace with hash 1491414992, now seen corresponding path program 8 times [2018-01-21 00:46:14,258 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:14,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:14,258 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:14,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:14,258 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:14,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:14,268 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:14,339 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:14,339 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:14,340 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:14,340 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:14,340 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:14,340 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:14,345 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:14,345 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:14,352 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:14,355 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:14,356 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:14,358 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:14,366 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,366 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:14,598 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,629 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:14,630 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:14,633 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:14,633 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:14,642 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:14,651 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:14,658 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:14,661 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:14,666 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,666 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:14,758 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,759 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:14,759 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 00:46:14,760 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:14,760 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 00:46:14,760 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 00:46:14,760 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 00:46:14,760 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 13 states. [2018-01-21 00:46:14,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:14,789 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 00:46:14,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 00:46:14,789 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-01-21 00:46:14,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:14,790 INFO L225 Difference]: With dead ends: 37 [2018-01-21 00:46:14,790 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 00:46:14,791 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 00:46:14,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 00:46:14,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 00:46:14,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 00:46:14,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 00:46:14,795 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 00:46:14,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:14,796 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 00:46:14,796 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 00:46:14,796 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 00:46:14,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 00:46:14,796 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:14,796 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:14,796 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:14,797 INFO L82 PathProgramCache]: Analyzing trace with hash 139406347, now seen corresponding path program 9 times [2018-01-21 00:46:14,797 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:14,797 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:14,797 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:14,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:14,798 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:14,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:14,805 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:14,907 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,908 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:14,908 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:14,908 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:14,908 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:14,908 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:14,908 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:14,913 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:14,913 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:14,921 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:14,924 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:14,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:14,927 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:14,928 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:14,930 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:14,930 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:14,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:14,941 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:14,941 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:15,218 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:15,239 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:15,239 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:15,242 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:15,242 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:15,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:15,261 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:15,269 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:15,277 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:15,285 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:15,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:15,300 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:15,303 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:15,309 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:15,309 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:15,376 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:15,380 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:15,381 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 00:46:15,381 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:15,381 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 00:46:15,381 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 00:46:15,382 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 00:46:15,382 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 14 states. [2018-01-21 00:46:15,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:15,405 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 00:46:15,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 00:46:15,405 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 27 [2018-01-21 00:46:15,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:15,406 INFO L225 Difference]: With dead ends: 38 [2018-01-21 00:46:15,406 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 00:46:15,407 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 00:46:15,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 00:46:15,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 00:46:15,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 00:46:15,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 00:46:15,410 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 00:46:15,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:15,411 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 00:46:15,411 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 00:46:15,411 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 00:46:15,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 00:46:15,412 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:15,412 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:15,412 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:15,412 INFO L82 PathProgramCache]: Analyzing trace with hash 1176811312, now seen corresponding path program 10 times [2018-01-21 00:46:15,412 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:15,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:15,413 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:15,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:15,413 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:15,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:15,420 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:15,530 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:15,530 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:15,530 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:15,530 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:15,530 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:15,530 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:15,530 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:15,535 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:15,535 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:15,547 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:15,548 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:15,558 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:15,558 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:15,814 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:15,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:15,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:15,837 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:15,838 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:15,863 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:15,866 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:15,870 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:15,870 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:15,956 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:15,957 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:15,957 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 00:46:15,957 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:15,957 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 00:46:15,958 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 00:46:15,958 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 00:46:15,958 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 15 states. [2018-01-21 00:46:15,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:15,984 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 00:46:15,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 00:46:15,984 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 28 [2018-01-21 00:46:15,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:15,985 INFO L225 Difference]: With dead ends: 39 [2018-01-21 00:46:15,985 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 00:46:15,986 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 97 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 00:46:15,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 00:46:15,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 00:46:15,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 00:46:15,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 00:46:15,990 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 00:46:15,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:15,990 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 00:46:15,991 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 00:46:15,991 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 00:46:15,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 00:46:15,991 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:15,991 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:15,992 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:15,992 INFO L82 PathProgramCache]: Analyzing trace with hash -1023373141, now seen corresponding path program 11 times [2018-01-21 00:46:15,992 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:15,993 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:15,993 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:15,993 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:15,993 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:15,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:16,000 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:16,108 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:16,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:16,108 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:16,108 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:16,109 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:16,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:16,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:16,113 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:16,114 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:16,117 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,118 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,119 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,120 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,121 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,121 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,126 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:16,127 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:16,138 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:16,138 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:16,400 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:16,420 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:16,420 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:16,423 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:16,423 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:16,427 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,428 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,432 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:16,461 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:16,464 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:16,471 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:16,471 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:16,554 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:16,556 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:16,556 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 00:46:16,556 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:16,557 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 00:46:16,557 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 00:46:16,557 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 00:46:16,557 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 16 states. [2018-01-21 00:46:16,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:16,615 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 00:46:16,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 00:46:16,615 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 29 [2018-01-21 00:46:16,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:16,616 INFO L225 Difference]: With dead ends: 40 [2018-01-21 00:46:16,616 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 00:46:16,616 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 00:46:16,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 00:46:16,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 00:46:16,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 00:46:16,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 00:46:16,619 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 00:46:16,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:16,619 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 00:46:16,619 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 00:46:16,619 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 00:46:16,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 00:46:16,620 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:16,620 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:16,620 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:16,620 INFO L82 PathProgramCache]: Analyzing trace with hash -509614448, now seen corresponding path program 12 times [2018-01-21 00:46:16,620 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:16,621 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:16,621 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:16,621 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:16,621 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:16,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:16,628 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:16,712 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:16,712 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:16,712 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:16,712 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:16,713 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:16,713 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:16,713 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:16,717 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:16,718 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:16,724 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:16,726 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:16,727 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:16,728 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:16,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:16,730 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:16,731 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:16,732 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:16,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:16,742 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:16,742 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:17,047 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:17,067 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:17,067 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:17,070 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:17,070 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:17,080 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:17,086 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:17,094 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:17,102 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:17,110 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:17,119 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:17,129 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:17,136 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:17,138 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:17,143 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:17,143 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:17,239 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:17,241 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:17,241 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 00:46:17,241 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:17,241 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 00:46:17,242 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 00:46:17,242 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 00:46:17,242 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 17 states. [2018-01-21 00:46:17,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:17,271 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 00:46:17,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 00:46:17,271 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 30 [2018-01-21 00:46:17,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:17,272 INFO L225 Difference]: With dead ends: 41 [2018-01-21 00:46:17,272 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 00:46:17,273 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 103 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 00:46:17,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 00:46:17,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 00:46:17,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 00:46:17,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 00:46:17,276 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 00:46:17,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:17,276 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 00:46:17,276 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 00:46:17,277 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 00:46:17,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 00:46:17,277 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:17,277 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:17,277 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:17,278 INFO L82 PathProgramCache]: Analyzing trace with hash -1762964149, now seen corresponding path program 13 times [2018-01-21 00:46:17,278 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:17,278 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:17,278 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:17,278 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:17,279 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:17,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:17,286 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:17,438 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:17,438 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:17,438 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:17,438 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:17,438 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:17,438 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:17,438 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:17,445 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:17,445 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:17,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:17,458 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:17,466 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:17,466 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:17,822 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:17,843 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:17,843 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:17,846 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:17,846 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:17,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:17,870 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:17,874 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:17,875 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:18,007 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:18,008 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:18,008 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 00:46:18,008 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:18,008 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 00:46:18,008 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 00:46:18,009 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 00:46:18,009 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 18 states. [2018-01-21 00:46:18,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:18,036 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 00:46:18,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 00:46:18,036 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 31 [2018-01-21 00:46:18,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:18,036 INFO L225 Difference]: With dead ends: 42 [2018-01-21 00:46:18,037 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 00:46:18,037 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 00:46:18,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 00:46:18,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 00:46:18,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 00:46:18,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 00:46:18,040 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 00:46:18,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:18,040 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 00:46:18,040 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 00:46:18,040 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 00:46:18,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 00:46:18,040 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:18,040 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:18,041 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:18,041 INFO L82 PathProgramCache]: Analyzing trace with hash -1962099216, now seen corresponding path program 14 times [2018-01-21 00:46:18,041 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:18,041 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:18,041 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:18,041 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:18,042 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:18,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:18,048 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:18,147 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:18,147 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:18,147 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:18,147 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:18,147 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:18,147 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:18,147 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:18,155 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:18,155 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:18,162 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:18,169 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:18,170 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:18,171 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:18,182 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:18,183 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:18,554 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:18,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:18,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:18,580 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:18,580 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:18,592 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:18,603 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:18,617 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:18,621 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:18,626 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:18,627 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:18,758 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:18,760 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:18,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 00:46:18,760 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:18,760 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 00:46:18,760 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 00:46:18,760 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 00:46:18,761 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 19 states. [2018-01-21 00:46:18,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:18,911 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 00:46:18,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 00:46:18,912 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 32 [2018-01-21 00:46:18,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:18,912 INFO L225 Difference]: With dead ends: 43 [2018-01-21 00:46:18,912 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 00:46:18,913 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 109 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 00:46:18,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 00:46:18,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 00:46:18,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 00:46:18,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 00:46:18,917 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 00:46:18,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:18,917 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 00:46:18,917 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 00:46:18,917 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 00:46:18,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 00:46:18,918 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:18,918 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:18,918 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:18,919 INFO L82 PathProgramCache]: Analyzing trace with hash 454648299, now seen corresponding path program 15 times [2018-01-21 00:46:18,919 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:18,919 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:18,920 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:18,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:18,920 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:18,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:18,927 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:19,576 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:19,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:19,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:19,576 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:19,577 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:19,577 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:19,577 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:19,588 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:19,588 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:19,596 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,603 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,611 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,619 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,625 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,630 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,638 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,642 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,646 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:19,647 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:19,648 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:19,662 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:19,662 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:20,305 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:20,326 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:20,326 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:20,329 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:20,330 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:20,340 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,347 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,356 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,364 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,373 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,383 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,404 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,415 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:20,424 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:20,428 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:20,435 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:20,435 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:20,590 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:20,591 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:20,591 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 00:46:20,591 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:20,591 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 00:46:20,592 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 00:46:20,592 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 00:46:20,592 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 20 states. [2018-01-21 00:46:20,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:20,620 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 00:46:20,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 00:46:20,621 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 33 [2018-01-21 00:46:20,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:20,621 INFO L225 Difference]: With dead ends: 44 [2018-01-21 00:46:20,621 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 00:46:20,622 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 00:46:20,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 00:46:20,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 00:46:20,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 00:46:20,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 00:46:20,625 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 00:46:20,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:20,625 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 00:46:20,625 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 00:46:20,625 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 00:46:20,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 00:46:20,625 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:20,626 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:20,626 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:20,626 INFO L82 PathProgramCache]: Analyzing trace with hash -1935590064, now seen corresponding path program 16 times [2018-01-21 00:46:20,626 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:20,626 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:20,627 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:20,627 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:20,627 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:20,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:20,636 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:20,833 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:20,833 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:20,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:20,834 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:20,834 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:20,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:20,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:20,842 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:20,842 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:20,864 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:20,865 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:20,889 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:20,889 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:22,068 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:22,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:22,089 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:22,093 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:22,093 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:22,131 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:22,135 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:22,140 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:22,141 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:22,302 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:22,303 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:22,304 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 00:46:22,304 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:22,304 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 00:46:22,304 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 00:46:22,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 00:46:22,305 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 21 states. [2018-01-21 00:46:22,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:22,380 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 00:46:22,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 00:46:22,380 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 34 [2018-01-21 00:46:22,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:22,380 INFO L225 Difference]: With dead ends: 45 [2018-01-21 00:46:22,380 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 00:46:22,381 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 115 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 00:46:22,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 00:46:22,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 00:46:22,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 00:46:22,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 00:46:22,385 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 00:46:22,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:22,385 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 00:46:22,385 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 00:46:22,385 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 00:46:22,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 00:46:22,386 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:22,386 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:22,386 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:22,387 INFO L82 PathProgramCache]: Analyzing trace with hash 1276432011, now seen corresponding path program 17 times [2018-01-21 00:46:22,387 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:22,387 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:22,387 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:22,388 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:22,388 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:22,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:22,396 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:22,526 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:22,526 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:22,526 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:22,526 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:22,526 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:22,526 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:22,526 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:22,531 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:22,531 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:22,535 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,536 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,536 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,539 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,540 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,541 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,545 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:22,546 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:22,547 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:22,555 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:22,555 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:23,045 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:23,066 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:23,066 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:23,069 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:23,069 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:23,072 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,074 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,077 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,081 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,085 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,089 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,095 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,106 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,117 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:23,127 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:23,130 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:23,135 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:23,135 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:23,355 WARN L143 SmtUtils]: Spent 146ms on a formula simplification that was a NOOP. DAG size: 59 [2018-01-21 00:46:23,392 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:23,393 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:23,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 00:46:23,393 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:23,393 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 00:46:23,394 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 00:46:23,394 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 00:46:23,394 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 22 states. [2018-01-21 00:46:23,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:23,428 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 00:46:23,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 00:46:23,429 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 35 [2018-01-21 00:46:23,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:23,429 INFO L225 Difference]: With dead ends: 46 [2018-01-21 00:46:23,429 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 00:46:23,430 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 00:46:23,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 00:46:23,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 00:46:23,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 00:46:23,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 00:46:23,434 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 00:46:23,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:23,434 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 00:46:23,435 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 00:46:23,435 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 00:46:23,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 00:46:23,435 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:23,435 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:23,436 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:23,436 INFO L82 PathProgramCache]: Analyzing trace with hash 2064868528, now seen corresponding path program 18 times [2018-01-21 00:46:23,436 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:23,437 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:23,437 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:23,437 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:23,437 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:23,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:23,444 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:23,736 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:23,736 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:23,736 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:23,736 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:23,736 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:23,736 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:23,736 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:23,741 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:23,741 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:23,751 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,765 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,780 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,813 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,822 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,823 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:23,824 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:23,825 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:23,834 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:23,834 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:24,389 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:24,408 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:24,408 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:24,411 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:24,411 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:24,422 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,429 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,437 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,445 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,454 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,463 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,472 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,482 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,492 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,503 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:24,511 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:24,514 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:24,519 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:24,519 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:24,653 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:24,654 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:24,654 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 00:46:24,654 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:24,654 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 00:46:24,654 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 00:46:24,655 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 00:46:24,655 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 23 states. [2018-01-21 00:46:24,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:24,689 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 00:46:24,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 00:46:24,689 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 36 [2018-01-21 00:46:24,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:24,690 INFO L225 Difference]: With dead ends: 47 [2018-01-21 00:46:24,690 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 00:46:24,690 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 121 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 00:46:24,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 00:46:24,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 00:46:24,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 00:46:24,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 00:46:24,693 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 00:46:24,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:24,693 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 00:46:24,693 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 00:46:24,694 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 00:46:24,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 00:46:24,694 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:24,694 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:24,694 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:24,694 INFO L82 PathProgramCache]: Analyzing trace with hash 736596779, now seen corresponding path program 19 times [2018-01-21 00:46:24,694 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:24,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:24,695 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:24,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:24,695 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:24,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:24,702 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:24,877 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:24,877 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:24,877 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:24,877 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:24,877 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:24,877 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:24,877 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:24,882 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:24,882 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:24,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:24,894 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:24,902 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:24,902 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:25,479 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:25,500 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:25,500 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:25,503 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:25,504 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:25,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:25,530 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:25,535 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:25,535 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:25,682 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:25,683 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:25,683 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 00:46:25,683 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:25,683 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 00:46:25,683 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 00:46:25,684 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 00:46:25,684 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 24 states. [2018-01-21 00:46:25,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:25,717 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 00:46:25,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 00:46:25,717 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 37 [2018-01-21 00:46:25,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:25,717 INFO L225 Difference]: With dead ends: 48 [2018-01-21 00:46:25,717 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 00:46:25,718 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 00:46:25,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 00:46:25,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 00:46:25,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 00:46:25,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 00:46:25,721 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 00:46:25,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:25,721 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 00:46:25,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 00:46:25,721 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 00:46:25,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 00:46:25,722 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:25,722 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:25,722 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:25,722 INFO L82 PathProgramCache]: Analyzing trace with hash -1785121776, now seen corresponding path program 20 times [2018-01-21 00:46:25,722 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:25,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:25,723 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:25,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:25,723 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:25,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:25,729 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:25,903 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:25,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:25,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:25,903 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:25,903 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:25,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:25,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:25,908 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:25,908 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:25,915 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:25,920 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:25,921 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:25,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:25,930 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:25,931 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:26,566 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:26,585 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:26,585 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:26,588 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:26,588 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:26,597 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:26,609 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:26,627 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:26,631 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:26,639 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:26,639 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:26,807 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:26,808 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:26,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 00:46:26,809 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:26,809 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 00:46:26,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 00:46:26,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 00:46:26,810 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 25 states. [2018-01-21 00:46:26,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:26,859 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 00:46:26,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 00:46:26,860 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 38 [2018-01-21 00:46:26,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:26,860 INFO L225 Difference]: With dead ends: 49 [2018-01-21 00:46:26,860 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 00:46:26,861 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 127 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 00:46:26,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 00:46:26,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 00:46:26,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 00:46:26,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 00:46:26,864 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 00:46:26,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:26,864 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 00:46:26,864 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 00:46:26,864 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 00:46:26,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 00:46:26,865 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:26,865 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:26,865 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:26,865 INFO L82 PathProgramCache]: Analyzing trace with hash 1645981643, now seen corresponding path program 21 times [2018-01-21 00:46:26,865 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:26,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:26,866 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:26,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:26,866 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:26,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:26,874 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:27,050 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:27,050 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:27,050 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:27,050 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:27,051 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:27,051 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:27,051 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:27,056 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:27,056 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:27,062 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,064 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,065 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,066 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,067 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,068 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,069 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,070 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,071 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,072 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,073 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,074 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,074 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:27,076 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:27,084 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:27,084 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:27,762 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:27,822 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:27,822 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:27,825 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:27,826 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:27,835 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,841 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,849 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,857 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,866 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,875 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,884 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,894 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,905 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,927 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:27,947 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:27,950 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:27,956 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:27,956 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:28,109 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:28,110 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:28,110 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 00:46:28,110 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:28,111 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 00:46:28,111 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 00:46:28,112 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1130, Invalid=1222, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 00:46:28,112 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 26 states. [2018-01-21 00:46:28,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:28,161 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 00:46:28,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 00:46:28,161 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 39 [2018-01-21 00:46:28,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:28,162 INFO L225 Difference]: With dead ends: 50 [2018-01-21 00:46:28,162 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 00:46:28,162 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1157, Invalid=1293, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 00:46:28,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 00:46:28,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 00:46:28,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 00:46:28,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 00:46:28,165 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 00:46:28,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:28,166 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 00:46:28,166 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 00:46:28,166 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 00:46:28,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 00:46:28,167 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:28,167 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:28,167 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:28,167 INFO L82 PathProgramCache]: Analyzing trace with hash 636005232, now seen corresponding path program 22 times [2018-01-21 00:46:28,167 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:28,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:28,168 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:28,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:28,168 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:28,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:28,177 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:28,389 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:28,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:28,389 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:28,389 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:28,389 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:28,390 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:28,390 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:28,394 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:28,395 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:28,407 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:28,409 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:28,426 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:28,426 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:29,222 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:29,241 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:29,242 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:29,244 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:29,244 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:29,278 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:29,281 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:29,286 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:29,286 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:29,446 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:29,447 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:29,448 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 00:46:29,448 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:29,448 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 00:46:29,448 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 00:46:29,449 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1227, Invalid=1323, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 00:46:29,449 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 27 states. [2018-01-21 00:46:29,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:29,482 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 00:46:29,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 00:46:29,482 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 40 [2018-01-21 00:46:29,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:29,482 INFO L225 Difference]: With dead ends: 51 [2018-01-21 00:46:29,483 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 00:46:29,483 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 133 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1255, Invalid=1397, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 00:46:29,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 00:46:29,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 00:46:29,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 00:46:29,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 00:46:29,486 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 00:46:29,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:29,486 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 00:46:29,486 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 00:46:29,486 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 00:46:29,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 00:46:29,487 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:29,487 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:29,487 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:29,487 INFO L82 PathProgramCache]: Analyzing trace with hash -608492437, now seen corresponding path program 23 times [2018-01-21 00:46:29,487 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:29,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:29,487 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:29,488 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:29,488 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:29,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:29,496 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:29,707 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:29,707 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:29,708 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:29,708 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:29,708 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:29,708 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:29,708 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:29,713 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:29,713 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:29,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,718 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,719 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,720 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,720 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,721 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,723 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,724 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,724 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,730 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:29,731 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:29,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:29,741 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:29,741 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:30,528 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:30,548 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:30,548 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:30,551 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:30,551 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:30,555 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,556 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,561 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,567 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,571 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,575 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,580 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,585 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,596 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,602 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,609 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,621 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:30,631 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:30,634 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:30,639 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:30,639 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:30,817 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:30,818 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:30,818 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 00:46:30,818 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:30,818 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 00:46:30,818 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 00:46:30,819 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1328, Invalid=1428, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 00:46:30,819 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 28 states. [2018-01-21 00:46:30,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:30,861 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 00:46:30,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 00:46:30,861 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 41 [2018-01-21 00:46:30,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:30,862 INFO L225 Difference]: With dead ends: 52 [2018-01-21 00:46:30,862 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 00:46:30,862 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1357, Invalid=1505, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 00:46:30,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 00:46:30,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 00:46:30,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 00:46:30,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 00:46:30,865 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 00:46:30,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:30,866 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 00:46:30,866 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 00:46:30,866 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 00:46:30,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 00:46:30,867 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:30,867 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:30,867 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:30,867 INFO L82 PathProgramCache]: Analyzing trace with hash -533214512, now seen corresponding path program 24 times [2018-01-21 00:46:30,867 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:30,868 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:30,868 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:30,868 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:30,868 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:30,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:30,877 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:31,102 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:31,103 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:31,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:31,103 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:31,103 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:31,103 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:31,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:31,108 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:31,109 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:31,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,117 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,118 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,119 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,120 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,121 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,122 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,123 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,124 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,125 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,126 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,127 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,128 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:31,129 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:31,130 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:31,138 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:31,139 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:31,978 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:31,998 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:31,998 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:32,001 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:32,001 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:32,011 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,018 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,026 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,034 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,042 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,052 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,062 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,072 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,092 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,103 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,127 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:32,136 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:32,139 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:32,145 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:32,145 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:32,337 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:32,338 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:32,338 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 00:46:32,338 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:32,338 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 00:46:32,338 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 00:46:32,339 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1433, Invalid=1537, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 00:46:32,339 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 29 states. [2018-01-21 00:46:32,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:32,383 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 00:46:32,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 00:46:32,383 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 42 [2018-01-21 00:46:32,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:32,384 INFO L225 Difference]: With dead ends: 53 [2018-01-21 00:46:32,384 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 00:46:32,385 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 139 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1463, Invalid=1617, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 00:46:32,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 00:46:32,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 00:46:32,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 00:46:32,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 00:46:32,387 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 00:46:32,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:32,387 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 00:46:32,388 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 00:46:32,388 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 00:46:32,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 00:46:32,388 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:32,388 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:32,388 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:32,388 INFO L82 PathProgramCache]: Analyzing trace with hash 1800401163, now seen corresponding path program 25 times [2018-01-21 00:46:32,388 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:32,389 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:32,389 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:32,389 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:32,389 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:32,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:32,396 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:32,633 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:32,633 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:32,633 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:32,633 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:32,633 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:32,633 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:32,634 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:32,638 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:32,638 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:32,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:32,652 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:32,661 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:32,661 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:33,591 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:33,611 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:33,611 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:33,614 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:33,614 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:33,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:33,643 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:33,649 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:33,650 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:33,857 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:33,858 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:33,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 00:46:33,858 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:33,858 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 00:46:33,858 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 00:46:33,859 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1542, Invalid=1650, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 00:46:33,859 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 30 states. [2018-01-21 00:46:33,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:33,893 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 00:46:33,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 00:46:33,893 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 43 [2018-01-21 00:46:33,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:33,894 INFO L225 Difference]: With dead ends: 54 [2018-01-21 00:46:33,894 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 00:46:33,894 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 142 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1573, Invalid=1733, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 00:46:33,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 00:46:33,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 00:46:33,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 00:46:33,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 00:46:33,897 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 00:46:33,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:33,897 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 00:46:33,897 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 00:46:33,897 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 00:46:33,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 00:46:33,898 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:33,898 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:33,898 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:33,898 INFO L82 PathProgramCache]: Analyzing trace with hash 1128043056, now seen corresponding path program 26 times [2018-01-21 00:46:33,898 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:33,898 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:33,898 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:33,899 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:33,899 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:33,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:33,905 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:34,166 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:34,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:34,167 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:34,167 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:34,167 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:34,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:34,167 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:34,173 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:34,173 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:34,179 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:34,184 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:34,186 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:34,187 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:34,200 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:34,200 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:35,182 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:35,201 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:35,201 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:35,204 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:35,204 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:35,213 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:35,227 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:35,239 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:35,242 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:35,248 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:35,248 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:35,457 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:35,458 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:35,458 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 00:46:35,458 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:35,459 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 00:46:35,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 00:46:35,459 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1655, Invalid=1767, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 00:46:35,459 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 31 states. [2018-01-21 00:46:35,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:35,511 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 00:46:35,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 00:46:35,513 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 44 [2018-01-21 00:46:35,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:35,514 INFO L225 Difference]: With dead ends: 55 [2018-01-21 00:46:35,514 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 00:46:35,515 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 145 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1687, Invalid=1853, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 00:46:35,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 00:46:35,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 00:46:35,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 00:46:35,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 00:46:35,518 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 00:46:35,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:35,519 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 00:46:35,519 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 00:46:35,519 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 00:46:35,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 00:46:35,519 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:35,519 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:35,520 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:35,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1759778219, now seen corresponding path program 27 times [2018-01-21 00:46:35,520 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:35,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:35,521 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:35,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:35,521 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:35,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:35,530 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:35,804 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:35,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:35,804 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:35,804 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:35,804 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:35,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:35,804 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:35,809 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:35,809 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:35,815 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,817 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,818 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,819 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,820 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,822 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,823 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,824 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,825 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,826 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,827 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,828 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,829 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,831 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,832 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:35,832 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:35,833 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:35,842 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:35,842 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:36,870 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:36,890 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:36,890 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:36,893 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:36,893 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:36,903 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,909 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,917 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,933 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,942 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,972 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,983 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:36,995 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:37,006 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:37,018 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:37,031 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:37,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:37,054 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:37,058 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:37,065 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:37,065 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:37,288 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:37,289 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:37,289 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 00:46:37,289 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:37,289 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 00:46:37,290 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 00:46:37,290 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1772, Invalid=1888, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 00:46:37,290 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 32 states. [2018-01-21 00:46:37,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:37,347 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 00:46:37,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 00:46:37,347 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 45 [2018-01-21 00:46:37,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:37,347 INFO L225 Difference]: With dead ends: 56 [2018-01-21 00:46:37,347 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 00:46:37,348 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 148 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1805, Invalid=1977, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 00:46:37,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 00:46:37,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 00:46:37,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 00:46:37,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 00:46:37,350 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 00:46:37,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:37,350 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 00:46:37,350 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 00:46:37,350 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 00:46:37,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 00:46:37,351 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:37,351 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:37,351 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:37,351 INFO L82 PathProgramCache]: Analyzing trace with hash -131268208, now seen corresponding path program 28 times [2018-01-21 00:46:37,351 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:37,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:37,352 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:37,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:37,352 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:37,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:37,360 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:37,665 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:37,665 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:37,665 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:37,665 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:37,665 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:37,665 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:37,665 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:37,670 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:37,670 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:37,685 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:37,687 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:37,696 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:37,696 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:38,803 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:38,822 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:38,822 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:38,825 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:38,826 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:38,864 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:38,868 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:38,874 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:38,874 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:39,102 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:39,103 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:39,104 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 00:46:39,104 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:39,104 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 00:46:39,104 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 00:46:39,104 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1893, Invalid=2013, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 00:46:39,105 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 33 states. [2018-01-21 00:46:39,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:39,167 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 00:46:39,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 00:46:39,167 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 46 [2018-01-21 00:46:39,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:39,168 INFO L225 Difference]: With dead ends: 57 [2018-01-21 00:46:39,168 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 00:46:39,168 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 151 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1927, Invalid=2105, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 00:46:39,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 00:46:39,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 00:46:39,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 00:46:39,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 00:46:39,171 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 00:46:39,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:39,171 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 00:46:39,171 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 00:46:39,171 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 00:46:39,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 00:46:39,172 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:39,172 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:39,172 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:39,172 INFO L82 PathProgramCache]: Analyzing trace with hash 1375834699, now seen corresponding path program 29 times [2018-01-21 00:46:39,172 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:39,173 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:39,173 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:39,173 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:39,173 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:39,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:39,182 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:39,611 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:39,612 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:39,612 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:39,612 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:39,612 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:39,612 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:39,612 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:39,619 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:39,619 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:39,623 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,624 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,626 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,628 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,628 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,629 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,630 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,631 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,632 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,633 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,634 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,635 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,638 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:39,640 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:39,641 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:39,651 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:39,651 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:40,835 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:40,854 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:40,854 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:40,858 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:40,858 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:40,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,864 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,871 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,875 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,879 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,884 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,889 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,894 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,900 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,906 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,913 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,928 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,936 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,950 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:40,962 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:40,965 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:40,971 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:40,971 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:41,213 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:41,214 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:41,214 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 00:46:41,214 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:41,214 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 00:46:41,215 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 00:46:41,215 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2018, Invalid=2142, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 00:46:41,215 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 34 states. [2018-01-21 00:46:41,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:41,271 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 00:46:41,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 00:46:41,271 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 47 [2018-01-21 00:46:41,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:41,271 INFO L225 Difference]: With dead ends: 58 [2018-01-21 00:46:41,272 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 00:46:41,272 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 154 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2053, Invalid=2237, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 00:46:41,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 00:46:41,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 00:46:41,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 00:46:41,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 00:46:41,275 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 00:46:41,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:41,275 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 00:46:41,276 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 00:46:41,276 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 00:46:41,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 00:46:41,276 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:41,276 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:41,277 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:41,277 INFO L82 PathProgramCache]: Analyzing trace with hash 851384560, now seen corresponding path program 30 times [2018-01-21 00:46:41,277 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:41,277 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:41,277 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:41,278 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:41,278 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:41,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:41,284 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:41,772 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:41,772 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:41,772 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:41,772 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:41,772 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:41,772 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:41,772 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:41,779 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:41,779 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:41,787 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,790 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,794 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,797 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,798 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,800 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,803 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,804 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,806 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,807 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:41,810 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:41,811 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:41,825 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:41,825 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:42,156 WARN L143 SmtUtils]: Spent 153ms on a formula simplification that was a NOOP. DAG size: 98 [2018-01-21 00:46:43,232 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:43,252 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:43,252 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:43,255 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:43,255 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:43,264 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,279 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,287 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,296 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,305 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,325 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,335 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,346 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,357 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,369 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,381 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,393 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,407 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,421 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:43,431 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:43,435 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:43,441 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:43,441 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:43,723 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:43,724 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:43,725 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 00:46:43,725 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:43,725 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 00:46:43,725 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 00:46:43,726 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=2275, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 00:46:43,726 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 35 states. [2018-01-21 00:46:43,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:43,794 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 00:46:43,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 00:46:43,795 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 48 [2018-01-21 00:46:43,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:43,795 INFO L225 Difference]: With dead ends: 59 [2018-01-21 00:46:43,795 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 00:46:43,796 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2183, Invalid=2373, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 00:46:43,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 00:46:43,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 00:46:43,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 00:46:43,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 00:46:43,798 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 00:46:43,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:43,798 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 00:46:43,798 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 00:46:43,798 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 00:46:43,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 00:46:43,799 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:43,799 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:43,799 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:43,799 INFO L82 PathProgramCache]: Analyzing trace with hash 1773299435, now seen corresponding path program 31 times [2018-01-21 00:46:43,799 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:43,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:43,800 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:43,800 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:43,800 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:43,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:43,806 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:44,220 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:44,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:44,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:44,220 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:44,220 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:44,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:44,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:44,226 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:44,226 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:44,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:44,241 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:44,250 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:44,250 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:45,557 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:45,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:45,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:45,579 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:45,579 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:45,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:45,613 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:45,619 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:45,620 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:45,894 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:45,895 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:45,895 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 00:46:45,895 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:45,895 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 00:46:45,895 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 00:46:45,896 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2280, Invalid=2412, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 00:46:45,896 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 36 states. [2018-01-21 00:46:45,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:45,946 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 00:46:45,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 00:46:45,946 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 49 [2018-01-21 00:46:45,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:45,947 INFO L225 Difference]: With dead ends: 60 [2018-01-21 00:46:45,947 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 00:46:45,947 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 160 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2317, Invalid=2513, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 00:46:45,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 00:46:45,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 00:46:45,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 00:46:45,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 00:46:45,950 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 00:46:45,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:45,950 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 00:46:45,950 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 00:46:45,950 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 00:46:45,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 00:46:45,950 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:45,950 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:45,950 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:45,950 INFO L82 PathProgramCache]: Analyzing trace with hash 287889488, now seen corresponding path program 32 times [2018-01-21 00:46:45,951 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:45,951 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:45,951 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:45,951 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:45,952 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:45,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:45,961 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:46,305 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:46,306 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:46,306 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:46,306 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:46,306 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:46,306 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:46,306 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:46,311 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:46,312 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:46,318 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:46,324 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:46,326 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:46,327 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:46,337 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:46,337 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:47,716 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:47,735 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:47,736 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:47,739 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:46:47,739 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:47,749 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:47,765 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:47,778 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:47,782 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:47,788 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:47,789 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:48,069 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:48,070 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:48,071 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 00:46:48,071 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:48,071 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 00:46:48,071 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 00:46:48,072 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2417, Invalid=2553, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 00:46:48,072 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 37 states. [2018-01-21 00:46:48,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:48,202 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 00:46:48,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 00:46:48,203 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 50 [2018-01-21 00:46:48,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:48,204 INFO L225 Difference]: With dead ends: 61 [2018-01-21 00:46:48,204 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 00:46:48,204 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 163 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2455, Invalid=2657, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 00:46:48,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 00:46:48,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 00:46:48,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 00:46:48,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 00:46:48,208 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 00:46:48,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:48,208 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 00:46:48,208 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 00:46:48,209 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 00:46:48,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 00:46:48,209 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:48,209 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:48,210 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:48,210 INFO L82 PathProgramCache]: Analyzing trace with hash 1484821387, now seen corresponding path program 33 times [2018-01-21 00:46:48,210 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:48,210 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:48,211 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:48,211 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:48,211 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:48,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:48,220 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:48,675 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:48,675 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:48,675 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:48,675 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:48,675 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:48,675 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:48,675 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:48,680 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:48,680 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:48,687 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,688 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,689 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,690 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,691 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,692 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,693 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,695 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,696 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,698 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,699 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,700 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,701 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,702 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,703 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,705 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,706 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:48,706 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:48,708 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:48,717 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:48,718 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:50,184 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:50,205 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:50,206 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:50,208 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:46:50,209 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:46:50,218 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,225 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,233 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,242 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,250 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,260 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,270 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,303 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,315 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,339 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,352 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,365 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,379 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,394 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:46:50,420 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:50,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:50,431 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:50,432 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:50,721 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:50,722 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:50,722 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 00:46:50,722 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:50,723 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 00:46:50,723 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 00:46:50,723 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2558, Invalid=2698, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 00:46:50,723 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 38 states. [2018-01-21 00:46:50,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:50,762 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 00:46:50,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 00:46:50,763 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 51 [2018-01-21 00:46:50,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:50,763 INFO L225 Difference]: With dead ends: 62 [2018-01-21 00:46:50,763 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 00:46:50,763 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 166 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2597, Invalid=2805, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 00:46:50,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 00:46:50,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 00:46:50,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 00:46:50,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 00:46:50,767 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 00:46:50,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:50,767 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 00:46:50,767 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 00:46:50,767 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 00:46:50,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 00:46:50,768 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:50,768 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:50,768 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:50,768 INFO L82 PathProgramCache]: Analyzing trace with hash -64995408, now seen corresponding path program 34 times [2018-01-21 00:46:50,768 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:50,769 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:50,769 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:50,769 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:50,769 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:50,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:50,778 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:51,148 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:51,149 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:51,149 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:51,149 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:51,149 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:51,149 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:51,149 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:51,154 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:51,154 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:51,169 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:51,171 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:51,180 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:51,181 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:52,763 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:52,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:52,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:52,786 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:46:52,786 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:46:52,832 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:52,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:52,842 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:52,843 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:53,143 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:53,144 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:53,144 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 00:46:53,144 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:53,145 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 00:46:53,145 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 00:46:53,145 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2703, Invalid=2847, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 00:46:53,145 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 39 states. [2018-01-21 00:46:53,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:53,192 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 00:46:53,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 00:46:53,193 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 52 [2018-01-21 00:46:53,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:53,193 INFO L225 Difference]: With dead ends: 63 [2018-01-21 00:46:53,193 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 00:46:53,193 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 169 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2743, Invalid=2957, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 00:46:53,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 00:46:53,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 00:46:53,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 00:46:53,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 00:46:53,196 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 00:46:53,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:53,196 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 00:46:53,196 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 00:46:53,197 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 00:46:53,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 00:46:53,197 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:53,197 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:53,197 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:53,197 INFO L82 PathProgramCache]: Analyzing trace with hash -864675797, now seen corresponding path program 35 times [2018-01-21 00:46:53,198 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:53,198 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:53,198 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:53,198 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:53,198 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:53,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:53,205 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:53,676 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:53,676 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:53,676 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:53,676 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:53,676 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:53,676 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:53,676 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:53,681 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:53,681 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:53,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,686 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,687 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,687 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,688 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,690 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,690 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,691 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,692 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,693 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,694 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,695 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,696 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,697 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,698 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,699 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,700 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:53,705 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:53,707 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:53,716 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:53,717 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:55,338 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:55,358 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:55,358 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:55,361 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:46:55,361 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:46:55,368 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,370 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,375 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,381 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,388 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,395 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,403 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,411 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,421 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,441 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,465 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,478 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,492 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,506 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,559 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:46:55,572 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:55,576 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:55,586 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:55,587 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:55,910 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:55,911 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:55,912 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 00:46:55,912 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:55,912 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 00:46:55,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 00:46:55,912 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2852, Invalid=3000, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 00:46:55,913 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 40 states. [2018-01-21 00:46:55,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:55,966 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 00:46:55,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 00:46:55,966 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 53 [2018-01-21 00:46:55,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:55,967 INFO L225 Difference]: With dead ends: 64 [2018-01-21 00:46:55,967 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 00:46:55,967 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 172 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2893, Invalid=3113, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 00:46:55,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 00:46:55,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 00:46:55,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 00:46:55,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 00:46:55,970 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 00:46:55,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:55,970 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 00:46:55,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 00:46:55,970 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 00:46:55,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 00:46:55,970 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:55,970 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:55,970 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:55,971 INFO L82 PathProgramCache]: Analyzing trace with hash 115035920, now seen corresponding path program 36 times [2018-01-21 00:46:55,971 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:55,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:55,971 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:55,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:55,971 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:55,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:55,979 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:56,460 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:56,460 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:56,460 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:56,460 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:56,461 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:56,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:56,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:56,465 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:56,465 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:56,472 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,475 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,478 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,480 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,481 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,482 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,483 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,484 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,485 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,486 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,490 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,491 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,492 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:56,493 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:56,494 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:56,504 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:56,504 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:58,208 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:58,227 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:58,227 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:46:58,230 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:46:58,230 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:46:58,240 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,247 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,263 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,281 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,290 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,301 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,311 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,322 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,333 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,356 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,368 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,381 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,395 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,408 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,422 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,437 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:46:58,449 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:46:58,452 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:58,459 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:58,459 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:46:58,789 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:58,791 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:46:58,811 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 00:46:58,812 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:46:58,812 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 00:46:58,812 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 00:46:58,812 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=3157, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 00:46:58,812 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 41 states. [2018-01-21 00:46:58,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:46:58,855 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 00:46:58,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 00:46:58,856 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 54 [2018-01-21 00:46:58,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:46:58,856 INFO L225 Difference]: With dead ends: 65 [2018-01-21 00:46:58,856 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 00:46:58,857 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 175 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3047, Invalid=3273, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 00:46:58,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 00:46:58,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 00:46:58,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 00:46:58,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 00:46:58,859 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 00:46:58,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:46:58,859 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 00:46:58,859 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 00:46:58,859 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 00:46:58,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 00:46:58,859 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:46:58,860 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:46:58,860 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:46:58,860 INFO L82 PathProgramCache]: Analyzing trace with hash 421328075, now seen corresponding path program 37 times [2018-01-21 00:46:58,860 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:46:58,860 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:58,860 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:46:58,860 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:46:58,860 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:46:58,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:58,867 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:46:59,326 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:59,326 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:59,326 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:46:59,326 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:46:59,326 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:46:59,326 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:46:59,326 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:46:59,331 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:46:59,332 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:46:59,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:46:59,348 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:46:59,358 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:46:59,358 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:47:01,148 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:47:01,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:47:01,167 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:47:01,170 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:47:01,170 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:47:01,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:47:01,208 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:47:01,216 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:47:01,216 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:47:01,546 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:47:01,547 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:47:01,547 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 00:47:01,547 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:47:01,548 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 00:47:01,548 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 00:47:01,548 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3162, Invalid=3318, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 00:47:01,548 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 42 states. [2018-01-21 00:47:01,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:47:01,599 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 00:47:01,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 00:47:01,600 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 55 [2018-01-21 00:47:01,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:47:01,600 INFO L225 Difference]: With dead ends: 66 [2018-01-21 00:47:01,600 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 00:47:01,601 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 178 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3205, Invalid=3437, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 00:47:01,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 00:47:01,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 00:47:01,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 00:47:01,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 00:47:01,603 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 00:47:01,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:47:01,603 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 00:47:01,603 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 00:47:01,603 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 00:47:01,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 00:47:01,603 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:47:01,603 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:47:01,603 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:47:01,604 INFO L82 PathProgramCache]: Analyzing trace with hash 1326450288, now seen corresponding path program 38 times [2018-01-21 00:47:01,604 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:47:01,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:47:01,604 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:47:01,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:47:01,604 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:47:01,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:47:01,611 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:47:02,143 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:47:02,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:47:02,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:47:02,144 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:47:02,144 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:47:02,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:47:02,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:47:02,149 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:47:02,149 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:47:02,157 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:47:02,164 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:47:02,166 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:47:02,167 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:47:02,184 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:47:02,184 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 00:47:03,654 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 00:47:03,654 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 00:47:03,656 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:47:03,656 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:47:03,656 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:47:03,656 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:47:03,656 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:47:03,656 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:47:03,656 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:47:03,657 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 00:47:03,657 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:47:03,657 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 00:47:03,657 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 00:47:03,658 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 12:47:03 BoogieIcfgContainer [2018-01-21 00:47:03,658 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 00:47:03,659 INFO L168 Benchmark]: Toolchain (without parser) took 53832.88 ms. Allocated memory was 300.9 MB in the beginning and 821.0 MB in the end (delta: 520.1 MB). Free memory was 260.2 MB in the beginning and 328.3 MB in the end (delta: -68.0 MB). Peak memory consumption was 452.1 MB. Max. memory is 5.3 GB. [2018-01-21 00:47:03,659 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 300.9 MB. Free memory is still 265.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 00:47:03,659 INFO L168 Benchmark]: CACSL2BoogieTranslator took 179.97 ms. Allocated memory is still 300.9 MB. Free memory was 259.3 MB in the beginning and 252.2 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-21 00:47:03,660 INFO L168 Benchmark]: Boogie Preprocessor took 32.46 ms. Allocated memory is still 300.9 MB. Free memory was 252.2 MB in the beginning and 250.2 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 00:47:03,660 INFO L168 Benchmark]: RCFGBuilder took 176.49 ms. Allocated memory is still 300.9 MB. Free memory was 250.2 MB in the beginning and 238.5 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 00:47:03,660 INFO L168 Benchmark]: TraceAbstraction took 53435.72 ms. Allocated memory was 300.9 MB in the beginning and 821.0 MB in the end (delta: 520.1 MB). Free memory was 237.5 MB in the beginning and 328.3 MB in the end (delta: -90.7 MB). Peak memory consumption was 429.4 MB. Max. memory is 5.3 GB. [2018-01-21 00:47:03,662 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 300.9 MB. Free memory is still 265.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 179.97 ms. Allocated memory is still 300.9 MB. Free memory was 259.3 MB in the beginning and 252.2 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 32.46 ms. Allocated memory is still 300.9 MB. Free memory was 252.2 MB in the beginning and 250.2 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 176.49 ms. Allocated memory is still 300.9 MB. Free memory was 250.2 MB in the beginning and 238.5 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 53435.72 ms. Allocated memory was 300.9 MB in the beginning and 821.0 MB in the end (delta: 520.1 MB). Free memory was 237.5 MB in the beginning and 328.3 MB in the end (delta: -90.7 MB). Peak memory consumption was 429.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 18 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 117 LocStat_NO_SUPPORTING_DISEQUALITIES : 29 LocStat_NO_DISJUNCTIONS : -36 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 25 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 35 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 25 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.387194 RENAME_VARIABLES(MILLISECONDS) : 0.188968 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.323315 PROJECTAWAY(MILLISECONDS) : 0.117837 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.002087 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.237033 ADD_EQUALITY(MILLISECONDS) : 0.074332 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.020864 #CONJOIN_DISJUNCTIVE : 34 #RENAME_VARIABLES : 64 #UNFREEZE : 0 #CONJOIN : 64 #PROJECTAWAY : 66 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 64 #ADD_EQUALITY : 35 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 57 with TraceHistMax 38, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 73 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 53.2s OverallTime, 39 OverallIterations, 38 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 649 SDtfs, 76 SDslu, 9191 SDs, 0 SdLazy, 1487 SolverSat, 53 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6295 GetRequests, 4590 SyntacticMatches, 74 SemanticMatches, 1631 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 29.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.2s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 38 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.2s SatisfiabilityAnalysisTime, 43.8s InterpolantComputationTime, 4125 NumberOfCodeBlocks, 4125 NumberOfCodeBlocksAsserted, 502 NumberOfCheckSat, 6677 ConstructedInterpolants, 0 QuantifiedInterpolants, 961429 SizeOfPredicates, 74 NumberOfNonLiveVariables, 9028 ConjunctsInSsa, 1628 ConjunctsInUnsatCore, 186 InterpolantComputations, 1 PerfectInterpolantSequences, 0/45695 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 22 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_00-47-03-671.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_00-47-03-671.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_00-47-03-671.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_00-47-03-671.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_00-47-03-671.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_00-47-03-671.csv Completed graceful shutdown