java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 00:48:04,897 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 00:48:04,899 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 00:48:04,917 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 00:48:04,917 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 00:48:04,918 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 00:48:04,920 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 00:48:04,921 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 00:48:04,924 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 00:48:04,925 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 00:48:04,926 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 00:48:04,926 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 00:48:04,927 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 00:48:04,929 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 00:48:04,930 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 00:48:04,932 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 00:48:04,935 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 00:48:04,936 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 00:48:04,938 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 00:48:04,939 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 00:48:04,942 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 00:48:04,947 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 00:48:04,948 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 00:48:04,948 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-21 00:48:04,958 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 00:48:04,959 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 00:48:04,959 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 00:48:04,960 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 00:48:04,960 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 00:48:04,960 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-21 00:48:04,960 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 00:48:04,960 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 00:48:04,961 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 00:48:04,961 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 00:48:04,962 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 00:48:04,962 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 00:48:04,962 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 00:48:04,962 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 00:48:04,962 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 00:48:04,963 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 00:48:04,963 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 00:48:04,963 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 00:48:04,963 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 00:48:04,963 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 00:48:04,963 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 00:48:04,964 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 00:48:04,964 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 00:48:04,964 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 00:48:04,964 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 00:48:04,965 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 00:48:04,965 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 00:48:04,965 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 00:48:04,965 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 00:48:04,965 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 00:48:04,966 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 00:48:04,966 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 00:48:04,966 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 00:48:04,966 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 00:48:04,966 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 00:48:04,966 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 00:48:04,967 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 00:48:04,968 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 00:48:04,968 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 00:48:05,004 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 00:48:05,018 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 00:48:05,022 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 00:48:05,023 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 00:48:05,024 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 00:48:05,024 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero_false-valid-deref-write.c [2018-01-21 00:48:05,146 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 00:48:05,151 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 00:48:05,151 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 00:48:05,151 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 00:48:05,156 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 00:48:05,157 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,160 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@29127b4c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05, skipping insertion in model container [2018-01-21 00:48:05,160 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,174 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 00:48:05,188 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 00:48:05,296 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 00:48:05,311 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 00:48:05,316 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05 WrapperNode [2018-01-21 00:48:05,317 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 00:48:05,317 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 00:48:05,318 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 00:48:05,318 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 00:48:05,329 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,329 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,337 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,337 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,340 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,343 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,344 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (1/1) ... [2018-01-21 00:48:05,345 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 00:48:05,346 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 00:48:05,346 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 00:48:05,346 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 00:48:05,347 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 00:48:05,400 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 00:48:05,400 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 00:48:05,400 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 00:48:05,400 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 00:48:05,400 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 00:48:05,400 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 00:48:05,401 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 00:48:05,401 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 00:48:05,401 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 00:48:05,401 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 00:48:05,401 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 00:48:05,401 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 00:48:05,513 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 00:48:05,513 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 12:48:05 BoogieIcfgContainer [2018-01-21 00:48:05,513 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 00:48:05,514 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 00:48:05,514 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 00:48:05,517 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 00:48:05,517 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 12:48:05" (1/3) ... [2018-01-21 00:48:05,518 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f956f85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 12:48:05, skipping insertion in model container [2018-01-21 00:48:05,519 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 12:48:05" (2/3) ... [2018-01-21 00:48:05,519 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f956f85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 12:48:05, skipping insertion in model container [2018-01-21 00:48:05,519 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 12:48:05" (3/3) ... [2018-01-21 00:48:05,521 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero_false-valid-deref-write.c [2018-01-21 00:48:05,530 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 00:48:05,538 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 00:48:05,580 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:48:05,580 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:48:05,580 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:48:05,581 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:48:05,581 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:48:05,581 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:48:05,581 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:48:05,581 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 00:48:05,582 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:48:05,596 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 00:48:05,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 00:48:05,602 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:05,603 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 00:48:05,603 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 00:48:05,606 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 00:48:05,608 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:05,650 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:05,650 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:05,650 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:05,651 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:05,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 00:48:05,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 00:48:05,711 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 00:48:05,717 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 00:48:05,723 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:48:05,723 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:48:05,723 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:48:05,723 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:48:05,724 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:48:05,724 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:48:05,724 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:48:05,724 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 00:48:05,724 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:48:05,725 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 00:48:05,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 00:48:05,727 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:05,727 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:05,727 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:05,727 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 00:48:05,727 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:05,729 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:05,729 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:05,729 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:05,729 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:05,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:05,760 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:05,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:05,858 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 00:48:05,859 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 00:48:05,859 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 00:48:05,861 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 00:48:05,875 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 00:48:05,876 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 00:48:05,878 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 00:48:05,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:05,929 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 00:48:05,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 00:48:05,931 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 00:48:05,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:05,939 INFO L225 Difference]: With dead ends: 33 [2018-01-21 00:48:05,939 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 00:48:05,942 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 00:48:06,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 00:48:06,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 00:48:06,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 00:48:06,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 00:48:06,041 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 00:48:06,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:06,042 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 00:48:06,042 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 00:48:06,042 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 00:48:06,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 00:48:06,043 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:06,043 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:06,043 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:06,043 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 00:48:06,043 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:06,044 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:06,045 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:06,045 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:06,045 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:06,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:06,061 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:06,108 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:06,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:06,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:06,110 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 00:48:06,113 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 00:48:06,163 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 00:48:06,163 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 00:48:06,312 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 00:48:06,313 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 00:48:06,322 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 00:48:06,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:06,322 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:06,333 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:06,333 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:06,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:06,360 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:06,385 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:06,386 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:06,595 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:06,616 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:06,616 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:06,620 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:06,620 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:06,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:06,643 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:06,648 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:06,649 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:06,740 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:06,741 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:06,742 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 00:48:06,742 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:06,743 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 00:48:06,743 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 00:48:06,743 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 00:48:06,744 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 00:48:06,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:06,816 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 00:48:06,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 00:48:06,816 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 00:48:06,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:06,817 INFO L225 Difference]: With dead ends: 29 [2018-01-21 00:48:06,817 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 00:48:06,818 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 00:48:06,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 00:48:06,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 00:48:06,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 00:48:06,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 00:48:06,823 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 00:48:06,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:06,823 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 00:48:06,823 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 00:48:06,823 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 00:48:06,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 00:48:06,824 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:06,824 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:06,824 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:06,825 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 00:48:06,825 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:06,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:06,826 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:06,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:06,826 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:06,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:06,841 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:06,926 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:06,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:06,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:06,927 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:06,927 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:06,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:06,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:06,940 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:06,941 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:06,956 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:06,959 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:06,962 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:06,964 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:06,997 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:06,998 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:07,151 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,174 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:07,174 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:07,177 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:07,178 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:07,192 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:07,199 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:07,208 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:07,212 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:07,217 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,217 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:07,319 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,320 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:07,321 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 00:48:07,321 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:07,321 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 00:48:07,322 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 00:48:07,322 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 00:48:07,322 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 00:48:07,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:07,345 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 00:48:07,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 00:48:07,346 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 00:48:07,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:07,347 INFO L225 Difference]: With dead ends: 30 [2018-01-21 00:48:07,347 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 00:48:07,348 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 00:48:07,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 00:48:07,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 00:48:07,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 00:48:07,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 00:48:07,352 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 00:48:07,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:07,352 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 00:48:07,352 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 00:48:07,352 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 00:48:07,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 00:48:07,353 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:07,353 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:07,353 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:07,354 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 00:48:07,354 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:07,354 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:07,355 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:07,355 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:07,355 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:07,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:07,366 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:07,427 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:07,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:07,428 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:07,428 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:07,429 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:07,429 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:07,441 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:07,441 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:07,452 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:07,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:07,455 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:07,456 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:07,458 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:07,487 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,488 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:07,604 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,624 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:07,624 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:07,627 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:07,628 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:07,640 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:07,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:07,656 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:07,661 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:07,665 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:07,669 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,669 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:07,720 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,722 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:07,723 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 00:48:07,723 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:07,723 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 00:48:07,724 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 00:48:07,724 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 00:48:07,724 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 00:48:07,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:07,751 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 00:48:07,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 00:48:07,752 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 00:48:07,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:07,753 INFO L225 Difference]: With dead ends: 31 [2018-01-21 00:48:07,753 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 00:48:07,753 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 00:48:07,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 00:48:07,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 00:48:07,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 00:48:07,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 00:48:07,756 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 00:48:07,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:07,756 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 00:48:07,756 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 00:48:07,756 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 00:48:07,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 00:48:07,757 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:07,757 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:07,757 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:07,757 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 00:48:07,757 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:07,758 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:07,758 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:07,758 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:07,759 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:07,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:07,767 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:07,808 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,808 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:07,808 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:07,809 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:07,809 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:07,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:07,809 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:07,815 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:07,815 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:07,827 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:07,829 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:07,845 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,846 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:07,938 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:07,959 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:07,962 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:07,962 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:07,985 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:07,988 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:07,992 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:07,992 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:08,053 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,054 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:08,054 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 00:48:08,054 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:08,054 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 00:48:08,055 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 00:48:08,055 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 00:48:08,055 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 00:48:08,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:08,076 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 00:48:08,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 00:48:08,079 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 00:48:08,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:08,080 INFO L225 Difference]: With dead ends: 32 [2018-01-21 00:48:08,080 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 00:48:08,081 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 00:48:08,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 00:48:08,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 00:48:08,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 00:48:08,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 00:48:08,085 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 00:48:08,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:08,085 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 00:48:08,085 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 00:48:08,085 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 00:48:08,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 00:48:08,086 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:08,086 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:08,086 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:08,086 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 00:48:08,087 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:08,087 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:08,088 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:08,088 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:08,088 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:08,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:08,100 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:08,243 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:08,244 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:08,244 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:08,244 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:08,244 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:08,244 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:08,253 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:08,253 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:08,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:08,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:08,263 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:08,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:08,268 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:08,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:08,278 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,278 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:08,407 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,427 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:08,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:08,431 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:08,431 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:08,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:08,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:08,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:08,450 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:08,457 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:08,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:08,466 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,466 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:08,544 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,546 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:08,546 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 00:48:08,546 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:08,546 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 00:48:08,546 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 00:48:08,546 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 00:48:08,547 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 00:48:08,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:08,565 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 00:48:08,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 00:48:08,565 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 00:48:08,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:08,565 INFO L225 Difference]: With dead ends: 33 [2018-01-21 00:48:08,566 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 00:48:08,566 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 00:48:08,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 00:48:08,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 00:48:08,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 00:48:08,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 00:48:08,569 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 00:48:08,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:08,569 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 00:48:08,569 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 00:48:08,569 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 00:48:08,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 00:48:08,569 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:08,570 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:08,570 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:08,570 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 00:48:08,570 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:08,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:08,571 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:08,571 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:08,571 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:08,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:08,582 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:08,650 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,650 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:08,650 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:08,650 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:08,650 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:08,650 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:08,651 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:08,657 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:08,657 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:08,665 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:08,667 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:08,668 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:08,669 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:08,669 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:08,671 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:08,686 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,686 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:08,832 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,852 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:08,852 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:08,855 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:08,856 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:08,866 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:08,875 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:08,883 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:08,891 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:08,896 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:08,899 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:08,905 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:08,905 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:09,006 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,008 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:09,008 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 00:48:09,008 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:09,008 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 00:48:09,008 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 00:48:09,008 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 00:48:09,009 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 00:48:09,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:09,040 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 00:48:09,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 00:48:09,040 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 00:48:09,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:09,041 INFO L225 Difference]: With dead ends: 34 [2018-01-21 00:48:09,041 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 00:48:09,041 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 00:48:09,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 00:48:09,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 00:48:09,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 00:48:09,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 00:48:09,045 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 00:48:09,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:09,045 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 00:48:09,045 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 00:48:09,045 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 00:48:09,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 00:48:09,045 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:09,046 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:09,046 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:09,046 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 00:48:09,046 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:09,046 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:09,047 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:09,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:09,047 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:09,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:09,058 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:09,194 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,194 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:09,194 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:09,194 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:09,194 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:09,194 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:09,194 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:09,203 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:09,203 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:09,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:09,218 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:09,235 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,235 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:09,475 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:09,496 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:09,500 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:09,500 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:09,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:09,519 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:09,525 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,525 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:09,591 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,592 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:09,592 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 00:48:09,592 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:09,593 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 00:48:09,593 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 00:48:09,593 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 00:48:09,593 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 00:48:09,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:09,620 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 00:48:09,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 00:48:09,620 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 00:48:09,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:09,620 INFO L225 Difference]: With dead ends: 35 [2018-01-21 00:48:09,621 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 00:48:09,621 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 00:48:09,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 00:48:09,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 00:48:09,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 00:48:09,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 00:48:09,624 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 00:48:09,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:09,624 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 00:48:09,625 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 00:48:09,625 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 00:48:09,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 00:48:09,625 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:09,625 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:09,625 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:09,625 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 00:48:09,625 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:09,626 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:09,626 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:09,626 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:09,626 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:09,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:09,635 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:09,724 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,725 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:09,725 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:09,725 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:09,725 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:09,725 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:09,725 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:09,731 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:09,731 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:09,739 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:09,742 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:09,743 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:09,744 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:09,761 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,761 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:09,945 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:09,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:09,965 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:09,969 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:09,969 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:09,977 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:09,986 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:09,992 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:09,995 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:10,000 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,000 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:10,085 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,087 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:10,087 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 00:48:10,087 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:10,088 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 00:48:10,088 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 00:48:10,088 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 00:48:10,089 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 00:48:10,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:10,123 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 00:48:10,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 00:48:10,124 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 00:48:10,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:10,124 INFO L225 Difference]: With dead ends: 36 [2018-01-21 00:48:10,124 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 00:48:10,125 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 00:48:10,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 00:48:10,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 00:48:10,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 00:48:10,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 00:48:10,128 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 00:48:10,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:10,128 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 00:48:10,128 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 00:48:10,128 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 00:48:10,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 00:48:10,128 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:10,128 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:10,128 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:10,129 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 00:48:10,129 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:10,129 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:10,129 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:10,129 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:10,130 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:10,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:10,138 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:10,243 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:10,243 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:10,243 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:10,243 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:10,244 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:10,244 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:10,255 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:10,256 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:10,266 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,269 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,270 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,272 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,274 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,276 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,277 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:10,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:10,308 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,308 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:10,631 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,651 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:10,651 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:10,654 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:10,654 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:10,663 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,669 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,677 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,685 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,702 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:10,709 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:10,712 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:10,716 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,716 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:10,780 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,781 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:10,781 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 00:48:10,781 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:10,782 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 00:48:10,782 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 00:48:10,782 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 00:48:10,782 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 00:48:10,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:10,816 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 00:48:10,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 00:48:10,818 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 00:48:10,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:10,819 INFO L225 Difference]: With dead ends: 37 [2018-01-21 00:48:10,819 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 00:48:10,819 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 00:48:10,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 00:48:10,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 00:48:10,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 00:48:10,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 00:48:10,824 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 00:48:10,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:10,824 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 00:48:10,824 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 00:48:10,824 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 00:48:10,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 00:48:10,825 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:10,825 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:10,825 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:10,825 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 00:48:10,826 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:10,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:10,826 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:10,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:10,827 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:10,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:10,834 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:10,920 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,920 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:10,920 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:10,920 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:10,920 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:10,920 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:10,921 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:10,930 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:10,930 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:10,940 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:10,942 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:10,950 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:10,950 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:11,199 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:11,219 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:11,219 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:11,222 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:11,222 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:11,248 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:11,252 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:11,258 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:11,258 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:11,351 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:11,352 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:11,352 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 00:48:11,352 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:11,352 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 00:48:11,353 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 00:48:11,353 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 00:48:11,353 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 00:48:11,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:11,377 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 00:48:11,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 00:48:11,378 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 00:48:11,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:11,378 INFO L225 Difference]: With dead ends: 38 [2018-01-21 00:48:11,378 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 00:48:11,379 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 00:48:11,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 00:48:11,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 00:48:11,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 00:48:11,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 00:48:11,383 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 00:48:11,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:11,383 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 00:48:11,383 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 00:48:11,383 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 00:48:11,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 00:48:11,384 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:11,384 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:11,384 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:11,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 00:48:11,385 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:11,385 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:11,385 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:11,385 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:11,385 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:11,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:11,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:11,486 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:11,487 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:11,487 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:11,487 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:11,487 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:11,487 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:11,487 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:11,492 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:11,492 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:11,495 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,496 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,497 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,498 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,499 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,499 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,503 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,504 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:11,505 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:11,513 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:11,513 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:11,773 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:11,793 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:11,793 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:11,796 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:11,796 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:11,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,801 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,804 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,808 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,812 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,816 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:11,833 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:11,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:11,842 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:11,842 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:11,923 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:11,924 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:11,924 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 00:48:11,924 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:11,925 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 00:48:11,925 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 00:48:11,925 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 00:48:11,925 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 00:48:11,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:11,957 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 00:48:11,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 00:48:11,957 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 00:48:11,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:11,957 INFO L225 Difference]: With dead ends: 39 [2018-01-21 00:48:11,958 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 00:48:11,958 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 00:48:11,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 00:48:11,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 00:48:11,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 00:48:11,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 00:48:11,962 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 00:48:11,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:11,962 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 00:48:11,962 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 00:48:11,962 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 00:48:11,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 00:48:11,963 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:11,963 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:11,963 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:11,964 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 00:48:11,964 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:11,964 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:11,965 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:11,965 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:11,965 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:11,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:11,974 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:12,063 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:12,064 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:12,064 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:12,064 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:12,064 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:12,064 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:12,064 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:12,071 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:12,071 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:12,078 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,080 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,083 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,085 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,086 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,087 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,088 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:12,089 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:12,097 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:12,097 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:12,398 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:12,418 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:12,418 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:12,421 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:12,421 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:12,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,436 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,444 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,452 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,461 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,469 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:12,486 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:12,489 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:12,493 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:12,493 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:12,588 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:12,589 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:12,589 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 00:48:12,589 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:12,590 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 00:48:12,590 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 00:48:12,590 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 00:48:12,591 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 00:48:12,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:12,622 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 00:48:12,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 00:48:12,622 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 00:48:12,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:12,623 INFO L225 Difference]: With dead ends: 40 [2018-01-21 00:48:12,623 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 00:48:12,624 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 00:48:12,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 00:48:12,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 00:48:12,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 00:48:12,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 00:48:12,628 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 00:48:12,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:12,628 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 00:48:12,628 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 00:48:12,628 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 00:48:12,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 00:48:12,629 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:12,629 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:12,629 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:12,629 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 00:48:12,629 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:12,630 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:12,630 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:12,630 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:12,630 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:12,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:12,638 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:12,723 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:12,724 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:12,724 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:12,724 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:12,724 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:12,724 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:12,724 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:12,729 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:12,729 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:12,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:12,739 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:12,747 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:12,747 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:13,102 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:13,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:13,123 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:13,126 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:13,126 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:13,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:13,147 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:13,152 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:13,152 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:13,288 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:13,289 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:13,290 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 00:48:13,290 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:13,290 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 00:48:13,290 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 00:48:13,290 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 00:48:13,290 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 00:48:13,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:13,327 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 00:48:13,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 00:48:13,328 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 00:48:13,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:13,328 INFO L225 Difference]: With dead ends: 41 [2018-01-21 00:48:13,328 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 00:48:13,329 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 00:48:13,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 00:48:13,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 00:48:13,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 00:48:13,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 00:48:13,331 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 00:48:13,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:13,332 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 00:48:13,332 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 00:48:13,332 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 00:48:13,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 00:48:13,332 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:13,332 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:13,332 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:13,332 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 00:48:13,332 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:13,333 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:13,333 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:13,333 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:13,333 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:13,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:13,341 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:13,460 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:13,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:13,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:13,461 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:13,461 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:13,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:13,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:13,471 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:13,472 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:13,480 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:13,490 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:13,492 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:13,494 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:13,505 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:13,506 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:13,898 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:13,918 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:13,918 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:13,922 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:13,922 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:13,939 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:13,949 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:13,958 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:13,961 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:13,968 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:13,968 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:14,077 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:14,078 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:14,078 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 00:48:14,078 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:14,079 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 00:48:14,079 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 00:48:14,079 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 00:48:14,079 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 00:48:14,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:14,211 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 00:48:14,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 00:48:14,213 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 00:48:14,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:14,214 INFO L225 Difference]: With dead ends: 42 [2018-01-21 00:48:14,214 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 00:48:14,215 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 00:48:14,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 00:48:14,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 00:48:14,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 00:48:14,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 00:48:14,219 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 00:48:14,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:14,219 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 00:48:14,219 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 00:48:14,219 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 00:48:14,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 00:48:14,220 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:14,220 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:14,220 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:14,221 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 00:48:14,221 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:14,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:14,221 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:14,222 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:14,222 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:14,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:14,229 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:14,488 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:14,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:14,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:14,489 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:14,489 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:14,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:14,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:14,497 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:14,497 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:14,504 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,507 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,520 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,521 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,523 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,524 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:14,536 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:14,538 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:14,554 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:14,554 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:15,596 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:15,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:15,627 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:15,630 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:15,631 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:15,641 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,648 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,657 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,665 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,674 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,684 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:15,722 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:15,726 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:15,731 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:15,731 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:15,853 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:15,855 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:15,855 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 00:48:15,855 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:15,855 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 00:48:15,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 00:48:15,856 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 00:48:15,856 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 00:48:15,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:15,883 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 00:48:15,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 00:48:15,883 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 00:48:15,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:15,884 INFO L225 Difference]: With dead ends: 43 [2018-01-21 00:48:15,884 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 00:48:15,885 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 00:48:15,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 00:48:15,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 00:48:15,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 00:48:15,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 00:48:15,889 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 00:48:15,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:15,889 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 00:48:15,889 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 00:48:15,889 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 00:48:15,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 00:48:15,890 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:15,890 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:15,890 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:15,891 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 00:48:15,891 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:15,891 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:15,892 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:15,892 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:15,892 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:15,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:15,899 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:16,089 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:16,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:16,089 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:16,089 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:16,089 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:16,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:16,089 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:16,098 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:16,098 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:16,111 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:16,113 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:16,125 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:16,126 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:16,985 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:17,017 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:17,017 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:17,020 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:17,020 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:17,050 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:17,053 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:17,060 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:17,061 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:17,257 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:17,258 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:17,259 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 00:48:17,259 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:17,259 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 00:48:17,259 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 00:48:17,260 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 00:48:17,260 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 00:48:17,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:17,318 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 00:48:17,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 00:48:17,320 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 00:48:17,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:17,320 INFO L225 Difference]: With dead ends: 44 [2018-01-21 00:48:17,320 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 00:48:17,321 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 00:48:17,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 00:48:17,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 00:48:17,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 00:48:17,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 00:48:17,326 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 00:48:17,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:17,326 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 00:48:17,326 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 00:48:17,326 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 00:48:17,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 00:48:17,327 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:17,327 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:17,327 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:17,327 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 00:48:17,327 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:17,328 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:17,328 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:17,328 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:17,328 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:17,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:17,337 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:17,615 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:17,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:17,615 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:17,615 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:17,616 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:17,616 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:17,616 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:17,621 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:17,621 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:17,624 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,626 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,628 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,629 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,630 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,631 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,634 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:17,636 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:17,637 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:17,645 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:17,645 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:18,132 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:18,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:18,152 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:18,155 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:18,155 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:18,159 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,160 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,164 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,177 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,182 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,187 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,193 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,204 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:18,213 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:18,216 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:18,221 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:18,221 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:18,370 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:18,371 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:18,371 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 00:48:18,371 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:18,372 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 00:48:18,372 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 00:48:18,372 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 00:48:18,372 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 00:48:18,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:18,400 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 00:48:18,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 00:48:18,400 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 00:48:18,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:18,401 INFO L225 Difference]: With dead ends: 45 [2018-01-21 00:48:18,401 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 00:48:18,401 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 00:48:18,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 00:48:18,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 00:48:18,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 00:48:18,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 00:48:18,404 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 00:48:18,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:18,404 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 00:48:18,404 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 00:48:18,404 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 00:48:18,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 00:48:18,405 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:18,405 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:18,405 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:18,405 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 00:48:18,405 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:18,405 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:18,405 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:18,406 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:18,406 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:18,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:18,413 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:18,805 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:18,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:18,806 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:18,806 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:18,806 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:18,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:18,806 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:18,817 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:18,817 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:18,827 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,832 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,834 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,837 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,842 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:18,850 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:18,851 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:18,862 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:18,862 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:19,459 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:19,479 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:19,479 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:19,482 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:19,482 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:19,492 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,498 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,506 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,523 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,533 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,565 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,576 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:19,584 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:19,588 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:19,592 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:19,593 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:19,746 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:19,747 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:19,747 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 00:48:19,747 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:19,748 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 00:48:19,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 00:48:19,748 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 00:48:19,748 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 00:48:19,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:19,782 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 00:48:19,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 00:48:19,782 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 00:48:19,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:19,783 INFO L225 Difference]: With dead ends: 46 [2018-01-21 00:48:19,783 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 00:48:19,783 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 00:48:19,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 00:48:19,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 00:48:19,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 00:48:19,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 00:48:19,786 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 00:48:19,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:19,786 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 00:48:19,786 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 00:48:19,786 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 00:48:19,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 00:48:19,787 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:19,787 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:19,787 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:19,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 00:48:19,787 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:19,788 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:19,788 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:19,788 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:19,788 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:19,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:19,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:19,956 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:19,956 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:19,956 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:19,956 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:19,956 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:19,956 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:19,956 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:19,961 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:19,962 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:19,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:19,974 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:19,982 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:19,982 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:20,563 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:20,583 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:20,583 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:20,586 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:20,586 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:20,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:20,611 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:20,615 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:20,616 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:20,751 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:20,752 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:20,752 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 00:48:20,752 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:20,752 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 00:48:20,753 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 00:48:20,753 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 00:48:20,753 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 00:48:20,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:20,797 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 00:48:20,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 00:48:20,797 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 00:48:20,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:20,797 INFO L225 Difference]: With dead ends: 47 [2018-01-21 00:48:20,797 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 00:48:20,798 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 00:48:20,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 00:48:20,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 00:48:20,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 00:48:20,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 00:48:20,800 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 00:48:20,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:20,800 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 00:48:20,800 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 00:48:20,800 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 00:48:20,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 00:48:20,801 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:20,801 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:20,801 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:20,801 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 00:48:20,801 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:20,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:20,802 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:20,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:20,802 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:20,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:20,808 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:20,972 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:20,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:20,972 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:20,972 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:20,973 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:20,973 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:20,973 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:20,977 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:20,977 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:20,984 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:20,989 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:20,990 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:20,991 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:21,002 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:21,002 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:21,656 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:21,675 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:21,675 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:21,678 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:21,678 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:21,688 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:21,699 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:21,709 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:21,712 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:21,718 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:21,718 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:21,871 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:21,873 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:21,873 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 00:48:21,873 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:21,873 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 00:48:21,874 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 00:48:21,874 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 00:48:21,874 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 00:48:21,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:21,906 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 00:48:21,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 00:48:21,906 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 00:48:21,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:21,907 INFO L225 Difference]: With dead ends: 48 [2018-01-21 00:48:21,907 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 00:48:21,908 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 00:48:21,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 00:48:21,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 00:48:21,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 00:48:21,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 00:48:21,910 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 00:48:21,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:21,910 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 00:48:21,910 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 00:48:21,910 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 00:48:21,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 00:48:21,910 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:21,910 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:21,910 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:21,911 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 00:48:21,911 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:21,911 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:21,911 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:21,911 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:21,911 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:21,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:21,918 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:22,113 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:22,113 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:22,113 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:22,113 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:22,113 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:22,113 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:22,114 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:22,118 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:22,118 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:22,125 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,127 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,128 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,129 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,130 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,131 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,132 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,133 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,135 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,136 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,138 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,138 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:22,140 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:22,148 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:22,148 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:22,824 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:22,844 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:22,844 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:22,847 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:22,847 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:22,856 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,862 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,870 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,894 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,904 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,913 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,934 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,944 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,955 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:22,963 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:22,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:22,972 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:22,972 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:23,126 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:23,127 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:23,127 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 00:48:23,127 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:23,127 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 00:48:23,128 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 00:48:23,128 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1130, Invalid=1222, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 00:48:23,128 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 00:48:23,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:23,158 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 00:48:23,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 00:48:23,158 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 00:48:23,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:23,159 INFO L225 Difference]: With dead ends: 49 [2018-01-21 00:48:23,159 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 00:48:23,159 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1157, Invalid=1293, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 00:48:23,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 00:48:23,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 00:48:23,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 00:48:23,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 00:48:23,163 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 00:48:23,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:23,163 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 00:48:23,163 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 00:48:23,163 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 00:48:23,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 00:48:23,164 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:23,164 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:23,164 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:23,164 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 00:48:23,164 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:23,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:23,165 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:23,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:23,165 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:23,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:23,172 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:23,346 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:23,346 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:23,346 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:23,346 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:23,347 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:23,347 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:23,347 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:23,351 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:23,351 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:23,364 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:23,365 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:23,373 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:23,374 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:24,175 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:24,195 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:24,195 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:24,197 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:24,198 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:24,230 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:24,233 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:24,239 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:24,239 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:24,399 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:24,400 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:24,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 00:48:24,400 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:24,401 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 00:48:24,401 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 00:48:24,401 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1227, Invalid=1323, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 00:48:24,402 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 00:48:24,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:24,456 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 00:48:24,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 00:48:24,456 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 00:48:24,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:24,457 INFO L225 Difference]: With dead ends: 50 [2018-01-21 00:48:24,457 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 00:48:24,458 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1255, Invalid=1397, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 00:48:24,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 00:48:24,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 00:48:24,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 00:48:24,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 00:48:24,462 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 00:48:24,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:24,462 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 00:48:24,463 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 00:48:24,463 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 00:48:24,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 00:48:24,463 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:24,463 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:24,463 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:24,464 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 00:48:24,464 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:24,464 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:24,464 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:24,465 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:24,465 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:24,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:24,471 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:24,671 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:24,671 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:24,672 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:24,672 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:24,672 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:24,672 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:24,672 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:24,677 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:24,678 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:24,681 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,683 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,684 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,686 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,687 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,688 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,688 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,690 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,694 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:24,695 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:24,696 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:24,704 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:24,704 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:25,482 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:25,501 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:25,501 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:25,504 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:25,504 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:25,509 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,510 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,513 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,517 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,525 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,535 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,540 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,552 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,559 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,571 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:25,580 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:25,583 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:25,589 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:25,589 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:25,772 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:25,773 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:25,773 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 00:48:25,773 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:25,773 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 00:48:25,773 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 00:48:25,774 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1328, Invalid=1428, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 00:48:25,774 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 00:48:25,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:25,807 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 00:48:25,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 00:48:25,809 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 00:48:25,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:25,810 INFO L225 Difference]: With dead ends: 51 [2018-01-21 00:48:25,810 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 00:48:25,810 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1357, Invalid=1505, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 00:48:25,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 00:48:25,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 00:48:25,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 00:48:25,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 00:48:25,813 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 00:48:25,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:25,813 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 00:48:25,813 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 00:48:25,813 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 00:48:25,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 00:48:25,814 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:25,814 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:25,814 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:25,814 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 00:48:25,814 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:25,814 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:25,815 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:25,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:25,815 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:25,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:25,821 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:26,026 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:26,026 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:26,026 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:26,027 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:26,027 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:26,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:26,027 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:26,032 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:26,032 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:26,039 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,040 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,042 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,044 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,045 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,047 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,048 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,049 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,050 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,051 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,052 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,053 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:26,054 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:26,064 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:26,065 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:26,907 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:26,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:26,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:26,930 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:26,930 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:26,939 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,945 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,952 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,960 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,968 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,976 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,985 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:26,995 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:27,005 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:27,015 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:27,026 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:27,037 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:27,049 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:27,058 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:27,061 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:27,067 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:27,067 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:27,258 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:27,259 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:27,259 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 00:48:27,259 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:27,259 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 00:48:27,260 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 00:48:27,260 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1433, Invalid=1537, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 00:48:27,260 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 00:48:27,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:27,333 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 00:48:27,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 00:48:27,333 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 00:48:27,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:27,334 INFO L225 Difference]: With dead ends: 52 [2018-01-21 00:48:27,334 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 00:48:27,335 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1463, Invalid=1617, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 00:48:27,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 00:48:27,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 00:48:27,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 00:48:27,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 00:48:27,337 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 00:48:27,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:27,338 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 00:48:27,338 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 00:48:27,338 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 00:48:27,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 00:48:27,338 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:27,339 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:27,339 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:27,339 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 00:48:27,339 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:27,340 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:27,340 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:27,340 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:27,340 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:27,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:27,347 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:27,581 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:27,581 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:27,581 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:27,581 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:27,581 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:27,581 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:27,581 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:27,586 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:27,586 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:27,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:27,599 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:27,607 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:27,607 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:28,512 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:28,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:28,532 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:28,534 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:28,534 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:28,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:28,564 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:28,569 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:28,570 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:28,763 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:28,764 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:28,764 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 00:48:28,764 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:28,764 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 00:48:28,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 00:48:28,765 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1542, Invalid=1650, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 00:48:28,765 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 00:48:28,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:28,801 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 00:48:28,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 00:48:28,801 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 00:48:28,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:28,802 INFO L225 Difference]: With dead ends: 53 [2018-01-21 00:48:28,802 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 00:48:28,802 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1573, Invalid=1733, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 00:48:28,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 00:48:28,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 00:48:28,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 00:48:28,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 00:48:28,805 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 00:48:28,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:28,805 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 00:48:28,806 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 00:48:28,806 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 00:48:28,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 00:48:28,806 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:28,806 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:28,806 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:28,806 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 00:48:28,806 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:28,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:28,807 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:28,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:28,807 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:28,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:28,813 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:29,095 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:29,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:29,096 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:29,096 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:29,096 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:29,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:29,096 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:29,102 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:29,102 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:29,108 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:29,113 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:29,114 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:29,116 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:29,124 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:29,124 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:30,076 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:30,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:30,096 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:30,099 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:30,099 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:30,109 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:30,122 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:30,134 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:30,137 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:30,143 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:30,143 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:30,356 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:30,357 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:30,358 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 00:48:30,358 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:30,358 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 00:48:30,358 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 00:48:30,359 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1655, Invalid=1767, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 00:48:30,359 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 00:48:30,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:30,407 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 00:48:30,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 00:48:30,407 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 00:48:30,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:30,408 INFO L225 Difference]: With dead ends: 54 [2018-01-21 00:48:30,408 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 00:48:30,408 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1687, Invalid=1853, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 00:48:30,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 00:48:30,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 00:48:30,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 00:48:30,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 00:48:30,410 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 00:48:30,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:30,410 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 00:48:30,410 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 00:48:30,410 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 00:48:30,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 00:48:30,411 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:30,411 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:30,411 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:30,411 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 00:48:30,411 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:30,412 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:30,412 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:30,412 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:30,412 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:30,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:30,420 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:30,749 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:30,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:30,749 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:30,749 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:30,749 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:30,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:30,749 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:30,754 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:30,754 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:30,760 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,762 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,763 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,764 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,765 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,768 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,771 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,773 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,774 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,775 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,776 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:30,776 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:30,778 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:30,787 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:30,787 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:31,808 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:31,828 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:31,828 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:31,831 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:31,831 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:31,842 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,848 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,856 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,864 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,872 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,880 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,890 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,899 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,909 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,920 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,942 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,954 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,979 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:31,988 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:31,992 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:31,998 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:31,998 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:32,215 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:32,216 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:32,216 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 00:48:32,217 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:32,217 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 00:48:32,217 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 00:48:32,217 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1772, Invalid=1888, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 00:48:32,217 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 00:48:32,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:32,266 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 00:48:32,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 00:48:32,267 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 00:48:32,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:32,267 INFO L225 Difference]: With dead ends: 55 [2018-01-21 00:48:32,267 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 00:48:32,268 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1805, Invalid=1977, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 00:48:32,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 00:48:32,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 00:48:32,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 00:48:32,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 00:48:32,272 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 00:48:32,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:32,272 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 00:48:32,272 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 00:48:32,272 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 00:48:32,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 00:48:32,273 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:32,273 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:32,273 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:32,273 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 00:48:32,273 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:32,274 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:32,274 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:32,274 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:32,274 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:32,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:32,284 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:32,609 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:32,610 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:32,610 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:32,610 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:32,610 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:32,610 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:32,610 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:32,615 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:32,615 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:32,628 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:32,630 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:32,640 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:32,640 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:33,738 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:33,757 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:33,758 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:33,760 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:33,760 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:33,798 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:33,801 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:33,809 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:33,810 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:34,041 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:34,042 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:34,042 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 00:48:34,042 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:34,043 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 00:48:34,043 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 00:48:34,043 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1893, Invalid=2013, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 00:48:34,043 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 00:48:34,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:34,097 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 00:48:34,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 00:48:34,097 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 00:48:34,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:34,097 INFO L225 Difference]: With dead ends: 56 [2018-01-21 00:48:34,097 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 00:48:34,098 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1927, Invalid=2105, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 00:48:34,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 00:48:34,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 00:48:34,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 00:48:34,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 00:48:34,100 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 00:48:34,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:34,100 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 00:48:34,100 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 00:48:34,100 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 00:48:34,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 00:48:34,100 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:34,101 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:34,101 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:34,101 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 00:48:34,101 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:34,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:34,101 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:34,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:34,102 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:34,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:34,110 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:34,424 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:34,424 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:34,424 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:34,425 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:34,425 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:34,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:34,425 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:34,432 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:34,432 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:34,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,441 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,442 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,446 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,447 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,451 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:34,452 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:34,453 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:34,462 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:34,463 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:35,624 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:35,644 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:35,645 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:35,648 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:35,648 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:35,653 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,655 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,660 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,666 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,672 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,679 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,686 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,693 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,699 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,705 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,719 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,727 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,735 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,744 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,758 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:35,769 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:35,774 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:35,783 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:35,783 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:35,893 WARN L143 SmtUtils]: Spent 108ms on a formula simplification that was a NOOP. DAG size: 95 [2018-01-21 00:48:36,084 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:36,085 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:36,085 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 00:48:36,085 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:36,086 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 00:48:36,086 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 00:48:36,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2018, Invalid=2142, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 00:48:36,086 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 00:48:36,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:36,143 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 00:48:36,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 00:48:36,143 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 00:48:36,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:36,144 INFO L225 Difference]: With dead ends: 57 [2018-01-21 00:48:36,144 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 00:48:36,144 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2053, Invalid=2237, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 00:48:36,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 00:48:36,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 00:48:36,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 00:48:36,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 00:48:36,147 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 00:48:36,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:36,148 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 00:48:36,148 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 00:48:36,148 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 00:48:36,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 00:48:36,149 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:36,149 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:36,149 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:36,149 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 00:48:36,149 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:36,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:36,150 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:36,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:36,150 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:36,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:36,159 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:36,496 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:36,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:36,496 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:36,496 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:36,496 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:36,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:36,497 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:36,506 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:36,506 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:36,513 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,518 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,519 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,521 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,522 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,523 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,524 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,526 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,529 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:36,529 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:36,531 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:36,540 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:36,540 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:37,765 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:37,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:37,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:37,788 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:37,788 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:37,798 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,813 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,829 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,838 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,848 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,867 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,888 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,899 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,923 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,935 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:37,959 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:37,963 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:37,969 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:37,969 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:38,225 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:38,226 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:38,227 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 00:48:38,227 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:38,227 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 00:48:38,227 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 00:48:38,228 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=2275, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 00:48:38,228 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 00:48:38,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:38,270 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 00:48:38,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 00:48:38,270 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 00:48:38,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:38,271 INFO L225 Difference]: With dead ends: 58 [2018-01-21 00:48:38,271 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 00:48:38,271 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2183, Invalid=2373, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 00:48:38,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 00:48:38,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 00:48:38,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 00:48:38,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 00:48:38,275 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 00:48:38,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:38,275 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 00:48:38,275 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 00:48:38,275 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 00:48:38,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 00:48:38,276 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:38,276 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:38,276 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:38,277 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 00:48:38,277 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:38,277 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:38,278 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:38,278 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:38,278 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:38,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:38,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:38,830 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:38,830 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:38,830 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:38,830 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:38,830 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:38,830 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:38,830 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:38,841 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:38,841 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:38,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:38,858 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:38,901 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:38,901 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:39,116 WARN L143 SmtUtils]: Spent 213ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 00:48:40,456 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:40,476 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:40,476 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:40,479 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:40,479 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:40,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:40,513 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:40,519 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:40,519 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:40,775 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:40,776 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:40,776 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 00:48:40,776 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:40,776 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 00:48:40,776 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 00:48:40,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2280, Invalid=2412, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 00:48:40,777 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 00:48:40,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:40,828 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 00:48:40,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 00:48:40,828 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 00:48:40,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:40,829 INFO L225 Difference]: With dead ends: 59 [2018-01-21 00:48:40,829 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 00:48:40,830 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2317, Invalid=2513, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 00:48:40,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 00:48:40,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 00:48:40,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 00:48:40,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 00:48:40,833 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 00:48:40,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:40,833 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 00:48:40,834 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 00:48:40,834 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 00:48:40,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 00:48:40,834 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:40,834 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:40,835 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:40,835 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 00:48:40,835 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:40,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:40,836 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:40,836 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:40,836 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:40,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:40,845 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:41,189 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:41,189 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:41,189 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:41,189 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:41,189 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:41,189 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:41,189 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:41,196 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:41,196 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:41,203 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:41,211 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:41,212 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:41,214 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:41,232 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:41,233 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:42,610 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:42,631 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:42,631 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:42,634 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:42,634 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:42,644 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:42,658 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:42,672 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:42,676 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:42,683 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:42,683 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:42,960 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:42,961 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:42,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 00:48:42,961 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:42,962 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 00:48:42,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 00:48:42,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2417, Invalid=2553, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 00:48:42,962 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 00:48:43,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:43,025 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 00:48:43,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 00:48:43,025 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 00:48:43,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:43,026 INFO L225 Difference]: With dead ends: 60 [2018-01-21 00:48:43,026 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 00:48:43,026 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2455, Invalid=2657, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 00:48:43,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 00:48:43,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 00:48:43,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 00:48:43,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 00:48:43,029 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 00:48:43,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:43,029 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 00:48:43,029 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 00:48:43,029 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 00:48:43,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 00:48:43,030 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:43,030 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:43,030 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:43,030 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 00:48:43,030 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:43,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:43,031 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:43,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:43,031 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:43,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:43,037 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:43,465 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:43,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:43,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:43,465 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:43,466 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:43,466 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:43,466 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:43,470 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:43,470 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:43,477 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,479 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,480 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,481 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,482 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,483 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,484 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,486 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,487 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,488 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,490 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,491 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,492 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,493 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,494 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,496 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,497 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:43,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:43,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:43,514 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:43,514 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:44,963 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:44,983 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:44,983 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:44,986 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:44,986 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:44,996 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,003 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,010 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,018 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,054 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,064 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,075 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,086 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,098 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,109 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,122 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,134 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,148 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,176 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:45,187 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:45,190 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:45,197 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:45,197 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:45,488 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:45,489 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:45,489 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 00:48:45,490 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:45,490 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 00:48:45,490 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 00:48:45,490 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2558, Invalid=2698, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 00:48:45,490 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 00:48:45,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:45,535 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 00:48:45,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 00:48:45,536 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 00:48:45,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:45,536 INFO L225 Difference]: With dead ends: 61 [2018-01-21 00:48:45,536 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 00:48:45,536 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2597, Invalid=2805, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 00:48:45,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 00:48:45,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 00:48:45,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 00:48:45,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 00:48:45,539 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 00:48:45,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:45,540 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 00:48:45,540 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 00:48:45,540 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 00:48:45,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 00:48:45,540 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:45,541 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:45,541 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:45,541 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 00:48:45,541 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:45,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:45,541 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:45,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:45,541 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:45,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:45,549 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:45,928 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:45,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:45,960 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:45,960 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:45,961 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:45,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:45,961 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:45,965 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:45,965 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:45,981 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:45,983 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:45,993 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:45,993 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:47,523 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:47,542 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:47,543 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:47,546 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 00:48:47,546 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 00:48:47,588 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:47,591 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:47,598 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:47,598 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:47,904 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:47,906 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:47,906 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 00:48:47,906 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:47,906 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 00:48:47,906 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 00:48:47,907 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2703, Invalid=2847, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 00:48:47,907 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 00:48:47,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:47,964 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 00:48:47,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 00:48:47,964 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 00:48:47,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:47,965 INFO L225 Difference]: With dead ends: 62 [2018-01-21 00:48:47,965 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 00:48:47,965 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2743, Invalid=2957, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 00:48:47,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 00:48:47,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 00:48:47,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 00:48:47,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 00:48:47,967 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 00:48:47,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:47,967 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 00:48:47,968 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 00:48:47,968 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 00:48:47,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 00:48:47,968 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:47,968 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:47,968 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:47,968 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 00:48:47,969 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:47,969 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:47,970 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:47,970 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:47,970 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:47,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:47,979 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:48,492 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:48,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:48,492 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:48,492 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:48,492 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:48,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:48,493 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:48,497 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:48,497 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:48,501 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,502 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,503 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,503 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,504 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,505 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,506 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,507 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,508 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,508 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,509 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,510 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,511 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,512 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,513 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,520 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:48,521 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:48,523 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:48,536 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:48,536 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:50,140 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:50,160 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:50,160 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:50,163 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 00:48:50,163 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:50,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,169 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,176 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,179 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,183 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,188 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,193 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,198 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,204 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,210 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,216 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,223 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,256 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,265 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:50,292 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:50,295 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:50,302 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:50,302 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:50,603 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:50,605 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:50,605 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 00:48:50,605 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:50,605 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 00:48:50,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 00:48:50,606 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2852, Invalid=3000, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 00:48:50,606 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 00:48:50,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:50,650 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 00:48:50,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 00:48:50,650 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 00:48:50,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:50,650 INFO L225 Difference]: With dead ends: 63 [2018-01-21 00:48:50,651 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 00:48:50,651 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2893, Invalid=3113, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 00:48:50,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 00:48:50,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 00:48:50,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 00:48:50,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 00:48:50,653 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 00:48:50,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:50,654 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 00:48:50,654 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 00:48:50,654 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 00:48:50,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 00:48:50,654 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:50,654 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:50,654 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:50,654 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 00:48:50,655 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:50,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:50,655 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:50,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:50,655 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:50,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:50,663 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:51,085 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:51,094 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:51,094 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:51,094 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:51,094 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:51,094 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:51,094 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:51,099 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:51,099 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:51,106 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,108 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,109 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,110 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,111 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,112 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,113 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,117 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,118 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,119 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,120 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,121 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,122 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,123 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,124 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,125 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,127 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:51,127 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:51,129 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:51,139 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:51,139 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:52,822 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:52,843 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:52,843 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:52,845 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 00:48:52,846 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 00:48:52,861 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,872 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,884 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,897 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,910 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,919 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,928 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,959 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,969 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,980 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:52,992 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:53,004 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:53,016 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:53,029 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:53,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:53,057 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:53,071 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 00:48:53,082 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:53,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:53,093 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:53,093 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:53,410 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:53,412 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:53,412 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 00:48:53,412 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:53,412 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 00:48:53,413 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 00:48:53,413 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=3157, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 00:48:53,413 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-21 00:48:53,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:53,458 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 00:48:53,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 00:48:53,458 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-21 00:48:53,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:53,459 INFO L225 Difference]: With dead ends: 64 [2018-01-21 00:48:53,459 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 00:48:53,459 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3047, Invalid=3273, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 00:48:53,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 00:48:53,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 00:48:53,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 00:48:53,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 00:48:53,462 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 00:48:53,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:53,462 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 00:48:53,462 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 00:48:53,462 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 00:48:53,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 00:48:53,462 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:53,462 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:53,462 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:53,463 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 00:48:53,463 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:53,463 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:53,463 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:53,463 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:53,463 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:53,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:53,472 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:53,948 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:53,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:53,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:53,948 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:53,948 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:53,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:53,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:53,955 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:53,955 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:53,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:53,974 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:53,984 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:53,985 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:55,766 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:55,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:55,786 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:55,788 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:55,789 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 00:48:55,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:55,823 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:55,830 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:55,830 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:56,192 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:56,193 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:56,194 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 00:48:56,194 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:56,194 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 00:48:56,194 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 00:48:56,194 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3162, Invalid=3318, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 00:48:56,194 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-21 00:48:56,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:56,282 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 00:48:56,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 00:48:56,282 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-21 00:48:56,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:56,283 INFO L225 Difference]: With dead ends: 65 [2018-01-21 00:48:56,283 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 00:48:56,283 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3205, Invalid=3437, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 00:48:56,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 00:48:56,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 00:48:56,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 00:48:56,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 00:48:56,285 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 00:48:56,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:56,286 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 00:48:56,286 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 00:48:56,286 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 00:48:56,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 00:48:56,286 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:56,286 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:56,286 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:56,286 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-21 00:48:56,286 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:56,287 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:56,287 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 00:48:56,287 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:56,287 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:56,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:56,293 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:56,994 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:56,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:56,994 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:56,994 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:56,994 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:56,995 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:56,995 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:57,000 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:57,000 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:57,007 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:57,015 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:57,017 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:57,019 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:57,029 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:57,029 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:58,876 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:58,895 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:58,896 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 00:48:58,898 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 00:48:58,898 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 00:48:58,908 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:58,923 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 00:48:58,938 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:58,941 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:58,949 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:58,949 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 00:48:59,290 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:59,291 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 00:48:59,291 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-21 00:48:59,292 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 00:48:59,292 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-21 00:48:59,292 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-21 00:48:59,292 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3323, Invalid=3483, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 00:48:59,292 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 43 states. [2018-01-21 00:48:59,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 00:48:59,338 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 00:48:59,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-21 00:48:59,339 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 55 [2018-01-21 00:48:59,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 00:48:59,339 INFO L225 Difference]: With dead ends: 66 [2018-01-21 00:48:59,339 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 00:48:59,339 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 177 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=3367, Invalid=3605, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 00:48:59,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 00:48:59,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 00:48:59,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 00:48:59,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 00:48:59,342 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 00:48:59,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 00:48:59,342 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 00:48:59,342 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-21 00:48:59,342 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 00:48:59,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 00:48:59,343 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 00:48:59,343 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 00:48:59,343 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 00:48:59,343 INFO L82 PathProgramCache]: Analyzing trace with hash -1090430805, now seen corresponding path program 39 times [2018-01-21 00:48:59,343 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 00:48:59,343 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:59,343 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 00:48:59,344 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 00:48:59,344 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 00:48:59,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 00:48:59,353 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 00:48:59,845 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:59,845 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:59,845 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 00:48:59,845 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 00:48:59,845 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 00:48:59,845 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 00:48:59,845 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 00:48:59,850 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 00:48:59,851 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 00:48:59,859 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,861 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,862 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,863 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,864 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,866 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,867 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,869 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,871 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,872 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,873 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,874 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,876 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,878 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,879 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,881 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,884 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,887 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 00:48:59,888 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 00:48:59,890 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 00:48:59,901 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 00:48:59,901 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 00:49:00,223 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 00:49:00,223 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 00:49:00,225 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 00:49:00,225 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 00:49:00,225 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 00:49:00,225 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 00:49:00,225 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 00:49:00,225 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 00:49:00,225 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 00:49:00,225 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 00:49:00,225 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 00:49:00,226 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 00:49:00,226 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 00:49:00,226 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 12:49:00 BoogieIcfgContainer [2018-01-21 00:49:00,227 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 00:49:00,227 INFO L168 Benchmark]: Toolchain (without parser) took 55080.67 ms. Allocated memory was 303.0 MB in the beginning and 811.1 MB in the end (delta: 508.0 MB). Free memory was 262.4 MB in the beginning and 581.9 MB in the end (delta: -319.6 MB). Peak memory consumption was 188.5 MB. Max. memory is 5.3 GB. [2018-01-21 00:49:00,228 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 303.0 MB. Free memory is still 267.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 00:49:00,228 INFO L168 Benchmark]: CACSL2BoogieTranslator took 165.73 ms. Allocated memory is still 303.0 MB. Free memory was 262.4 MB in the beginning and 254.3 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. [2018-01-21 00:49:00,228 INFO L168 Benchmark]: Boogie Preprocessor took 28.20 ms. Allocated memory is still 303.0 MB. Free memory was 254.3 MB in the beginning and 252.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 00:49:00,229 INFO L168 Benchmark]: RCFGBuilder took 167.56 ms. Allocated memory is still 303.0 MB. Free memory was 252.3 MB in the beginning and 240.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 00:49:00,229 INFO L168 Benchmark]: TraceAbstraction took 54712.25 ms. Allocated memory was 303.0 MB in the beginning and 811.1 MB in the end (delta: 508.0 MB). Free memory was 239.7 MB in the beginning and 581.9 MB in the end (delta: -342.2 MB). Peak memory consumption was 165.9 MB. Max. memory is 5.3 GB. [2018-01-21 00:49:00,231 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 303.0 MB. Free memory is still 267.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 165.73 ms. Allocated memory is still 303.0 MB. Free memory was 262.4 MB in the beginning and 254.3 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 28.20 ms. Allocated memory is still 303.0 MB. Free memory was 254.3 MB in the beginning and 252.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 167.56 ms. Allocated memory is still 303.0 MB. Free memory was 252.3 MB in the beginning and 240.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 54712.25 ms. Allocated memory was 303.0 MB in the beginning and 811.1 MB in the end (delta: 508.0 MB). Free memory was 239.7 MB in the beginning and 581.9 MB in the end (delta: -342.2 MB). Peak memory consumption was 165.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 93 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.350017 RENAME_VARIABLES(MILLISECONDS) : 0.167729 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.293814 PROJECTAWAY(MILLISECONDS) : 0.131045 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001803 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.212656 ADD_EQUALITY(MILLISECONDS) : 0.054230 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.020002 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 57 with TraceHistMax 39, while TraceCheckSpWp was constructing backward predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 125. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 54.5s OverallTime, 40 OverallIterations, 39 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 627 SDtfs, 78 SDslu, 10596 SDs, 0 SdLazy, 1654 SolverSat, 49 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6408 GetRequests, 4619 SyntacticMatches, 76 SemanticMatches, 1713 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4559 ImplicationChecksByTransitivity, 31.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57occurred in iteration=39, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.2s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.1s SatisfiabilityAnalysisTime, 46.4s InterpolantComputationTime, 4178 NumberOfCodeBlocks, 4178 NumberOfCodeBlocksAsserted, 507 NumberOfCheckSat, 6761 ConstructedInterpolants, 0 QuantifiedInterpolants, 993159 SizeOfPredicates, 76 NumberOfNonLiveVariables, 9082 ConjunctsInSsa, 1710 ConjunctsInUnsatCore, 191 InterpolantComputations, 1 PerfectInterpolantSequences, 0/49400 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_00-49-00-239.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_00-49-00-239.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_00-49-00-239.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_00-49-00-239.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_00-49-00-239.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_00-49-00-239.csv Completed graceful shutdown