java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset2_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 03:23:57,671 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 03:23:57,674 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 03:23:57,690 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 03:23:57,691 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 03:23:57,692 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 03:23:57,693 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 03:23:57,695 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 03:23:57,697 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 03:23:57,698 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 03:23:57,698 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 03:23:57,699 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 03:23:57,699 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 03:23:57,700 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 03:23:57,701 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 03:23:57,704 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 03:23:57,706 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 03:23:57,708 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 03:23:57,710 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 03:23:57,711 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 03:23:57,713 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 03:23:57,720 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf [2018-01-21 03:23:57,730 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 03:23:57,730 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 03:23:57,731 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 03:23:57,731 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 03:23:57,731 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 03:23:57,732 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 03:23:57,732 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 03:23:57,732 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-21 03:23:57,732 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 03:23:57,733 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 03:23:57,733 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 03:23:57,733 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 03:23:57,733 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 03:23:57,734 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 03:23:57,734 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 03:23:57,734 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 03:23:57,734 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 03:23:57,734 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 03:23:57,734 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 03:23:57,735 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 03:23:57,735 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 03:23:57,735 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 03:23:57,735 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 03:23:57,736 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 03:23:57,736 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 03:23:57,736 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 03:23:57,736 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 03:23:57,736 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 03:23:57,737 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 03:23:57,737 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 03:23:57,737 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 03:23:57,737 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 03:23:57,737 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 03:23:57,738 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 03:23:57,738 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 03:23:57,738 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 03:23:57,738 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 03:23:57,738 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 03:23:57,739 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 03:23:57,740 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 03:23:57,777 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 03:23:57,791 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 03:23:57,795 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 03:23:57,797 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 03:23:57,798 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 03:23:57,798 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset2_true-valid-memsafety_true-termination.c [2018-01-21 03:23:57,931 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 03:23:57,935 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 03:23:57,936 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 03:23:57,936 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 03:23:57,943 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 03:23:57,944 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 03:23:57" (1/1) ... [2018-01-21 03:23:57,947 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2145b668 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:57, skipping insertion in model container [2018-01-21 03:23:57,948 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 03:23:57" (1/1) ... [2018-01-21 03:23:57,972 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 03:23:57,995 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 03:23:58,121 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 03:23:58,139 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 03:23:58,145 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58 WrapperNode [2018-01-21 03:23:58,145 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 03:23:58,146 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 03:23:58,147 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 03:23:58,147 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 03:23:58,164 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (1/1) ... [2018-01-21 03:23:58,164 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (1/1) ... [2018-01-21 03:23:58,175 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (1/1) ... [2018-01-21 03:23:58,175 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (1/1) ... [2018-01-21 03:23:58,178 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (1/1) ... [2018-01-21 03:23:58,181 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (1/1) ... [2018-01-21 03:23:58,183 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (1/1) ... [2018-01-21 03:23:58,184 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 03:23:58,185 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 03:23:58,185 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 03:23:58,185 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 03:23:58,186 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 03:23:58,243 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 03:23:58,243 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 03:23:58,243 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 03:23:58,243 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 03:23:58,244 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 03:23:58,244 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 03:23:58,244 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 03:23:58,244 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 03:23:58,244 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 03:23:58,244 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 03:23:58,245 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 03:23:58,245 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 03:23:58,379 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 03:23:58,379 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 03:23:58 BoogieIcfgContainer [2018-01-21 03:23:58,379 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 03:23:58,380 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 03:23:58,380 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 03:23:58,382 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 03:23:58,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 03:23:57" (1/3) ... [2018-01-21 03:23:58,383 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@316accce and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 03:23:58, skipping insertion in model container [2018-01-21 03:23:58,383 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:23:58" (2/3) ... [2018-01-21 03:23:58,384 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@316accce and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 03:23:58, skipping insertion in model container [2018-01-21 03:23:58,384 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 03:23:58" (3/3) ... [2018-01-21 03:23:58,386 INFO L105 eAbstractionObserver]: Analyzing ICFG memset2_true-valid-memsafety_true-termination.c [2018-01-21 03:23:58,395 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 03:23:58,403 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 03:23:58,443 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 03:23:58,444 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 03:23:58,444 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 03:23:58,444 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 03:23:58,444 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 03:23:58,444 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 03:23:58,444 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 03:23:58,444 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 03:23:58,445 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 03:23:58,462 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 03:23:58,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 03:23:58,468 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:23:58,470 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 03:23:58,470 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 03:23:58,474 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 03:23:58,476 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:23:58,523 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:23:58,523 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:23:58,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:23:58,524 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:23:58,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 03:23:58,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 03:23:58,584 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 03:23:58,591 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 03:23:58,596 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 03:23:58,596 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 03:23:58,596 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 03:23:58,597 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 03:23:58,597 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 03:23:58,597 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 03:23:58,597 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 03:23:58,597 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 03:23:58,597 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 03:23:58,598 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 03:23:58,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 03:23:58,599 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:23:58,599 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:23:58,600 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:23:58,600 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 03:23:58,600 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:23:58,601 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:23:58,601 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:23:58,602 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:23:58,602 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:23:58,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:23:58,632 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:23:58,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:23:58,754 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 03:23:58,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 03:23:58,755 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 03:23:58,757 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 03:23:58,771 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 03:23:58,771 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 03:23:58,774 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 03:23:58,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:23:58,910 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 03:23:58,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 03:23:58,912 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 03:23:58,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:23:58,925 INFO L225 Difference]: With dead ends: 33 [2018-01-21 03:23:58,926 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 03:23:58,929 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 03:23:59,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 03:23:59,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 03:23:59,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 03:23:59,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 03:23:59,046 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 03:23:59,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:23:59,046 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 03:23:59,046 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 03:23:59,047 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 03:23:59,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 03:23:59,047 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:23:59,048 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:23:59,048 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:23:59,048 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 03:23:59,048 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:23:59,049 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:23:59,050 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:23:59,050 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:23:59,050 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:23:59,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:23:59,067 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:23:59,181 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:23:59,181 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:23:59,181 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:23:59,182 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 03:23:59,184 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 03:23:59,242 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 03:23:59,242 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 03:24:00,137 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 03:24:00,138 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 03:24:00,148 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 03:24:00,149 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:00,149 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:00,161 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:00,162 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:00,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:00,190 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:00,527 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:00,528 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:00,894 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:00,917 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:00,917 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:00,924 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:00,925 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:00,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:00,962 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:00,969 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:00,969 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:01,153 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:01,157 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:01,157 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 11 [2018-01-21 03:24:01,157 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:01,158 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 03:24:01,159 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 03:24:01,159 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-21 03:24:01,159 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 8 states. [2018-01-21 03:24:01,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:01,187 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 03:24:01,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 03:24:01,187 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 18 [2018-01-21 03:24:01,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:01,188 INFO L225 Difference]: With dead ends: 29 [2018-01-21 03:24:01,189 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 03:24:01,190 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 64 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-21 03:24:01,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 03:24:01,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 03:24:01,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 03:24:01,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 03:24:01,194 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 03:24:01,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:01,194 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 03:24:01,195 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 03:24:01,195 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 03:24:01,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 03:24:01,195 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:01,195 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:01,195 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:01,196 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 03:24:01,196 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:01,197 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:01,197 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:01,197 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:01,197 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:01,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:01,218 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:01,388 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:01,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:01,389 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:01,389 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:01,389 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:01,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:01,389 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:01,396 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:01,396 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:01,410 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:01,413 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:01,413 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:01,415 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:01,601 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:01,601 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:01,711 WARN L143 SmtUtils]: Spent 108ms on a formula simplification that was a NOOP. DAG size: 14 [2018-01-21 03:24:01,941 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:01,967 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:01,968 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:01,972 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:01,972 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:01,987 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:01,996 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:02,005 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:02,010 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:02,014 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,015 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:02,100 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,103 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:02,103 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 14 [2018-01-21 03:24:02,103 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:02,103 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 03:24:02,104 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 03:24:02,104 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-01-21 03:24:02,104 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 10 states. [2018-01-21 03:24:02,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:02,148 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 03:24:02,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 03:24:02,149 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-01-21 03:24:02,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:02,149 INFO L225 Difference]: With dead ends: 30 [2018-01-21 03:24:02,149 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 03:24:02,150 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2018-01-21 03:24:02,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 03:24:02,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 03:24:02,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 03:24:02,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 03:24:02,154 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 03:24:02,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:02,154 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 03:24:02,155 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 03:24:02,155 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 03:24:02,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 03:24:02,155 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:02,156 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:02,156 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:02,156 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 03:24:02,156 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:02,157 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:02,157 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:02,157 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:02,158 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:02,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:02,183 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:02,270 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,271 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:02,271 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:02,271 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:02,271 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:02,271 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:02,271 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:02,279 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:02,279 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:02,290 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:02,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:02,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:02,294 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:02,296 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:02,351 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,351 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:02,514 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,535 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:02,535 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:02,539 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:02,539 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:02,553 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:02,561 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:02,569 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:02,575 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:02,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:02,582 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,582 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:02,631 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,633 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:02,633 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 03:24:02,633 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:02,633 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 03:24:02,634 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 03:24:02,634 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 03:24:02,634 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 12 states. [2018-01-21 03:24:02,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:02,681 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 03:24:02,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 03:24:02,681 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 20 [2018-01-21 03:24:02,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:02,682 INFO L225 Difference]: With dead ends: 31 [2018-01-21 03:24:02,682 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 03:24:02,683 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 68 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 03:24:02,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 03:24:02,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 03:24:02,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 03:24:02,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 03:24:02,687 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 03:24:02,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:02,687 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 03:24:02,687 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 03:24:02,687 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 03:24:02,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 03:24:02,688 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:02,688 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:02,688 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:02,688 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 03:24:02,689 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:02,689 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:02,690 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:02,690 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:02,690 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:02,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:02,704 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:02,801 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,801 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:02,802 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:02,802 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:02,802 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:02,802 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:02,802 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:02,808 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:02,808 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:02,819 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:02,821 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:02,864 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:02,865 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:03,265 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:03,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:03,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:03,290 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:03,290 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:03,316 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:03,319 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:03,325 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:03,325 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:03,461 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:03,463 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:03,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 20 [2018-01-21 03:24:03,463 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:03,464 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 03:24:03,464 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 03:24:03,464 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=239, Unknown=0, NotChecked=0, Total=380 [2018-01-21 03:24:03,465 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 14 states. [2018-01-21 03:24:03,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:03,565 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 03:24:03,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 03:24:03,566 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-01-21 03:24:03,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:03,567 INFO L225 Difference]: With dead ends: 32 [2018-01-21 03:24:03,567 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 03:24:03,567 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-21 03:24:03,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 03:24:03,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 03:24:03,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 03:24:03,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 03:24:03,571 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 03:24:03,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:03,572 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 03:24:03,572 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 03:24:03,572 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 03:24:03,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 03:24:03,573 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:03,573 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:03,573 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:03,573 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 03:24:03,573 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:03,574 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:03,574 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:03,574 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:03,574 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:03,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:03,587 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:03,665 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:03,665 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:03,665 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:03,665 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:03,666 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:03,666 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:03,666 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:03,673 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:03,673 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:03,677 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:03,678 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:03,679 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:03,684 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:03,685 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:03,687 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:03,739 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:03,740 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:04,021 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:04,057 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:04,057 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:04,061 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:04,061 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:04,066 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:04,069 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:04,074 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:04,087 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:04,097 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:04,101 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:04,108 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:04,108 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:04,194 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:04,196 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:04,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 03:24:04,197 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:04,197 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 03:24:04,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 03:24:04,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 03:24:04,197 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 16 states. [2018-01-21 03:24:04,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:04,229 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 03:24:04,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 03:24:04,229 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 22 [2018-01-21 03:24:04,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:04,230 INFO L225 Difference]: With dead ends: 33 [2018-01-21 03:24:04,231 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 03:24:04,231 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 03:24:04,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 03:24:04,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 03:24:04,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 03:24:04,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 03:24:04,235 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 03:24:04,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:04,236 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 03:24:04,236 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 03:24:04,236 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 03:24:04,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 03:24:04,237 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:04,237 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:04,237 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:04,237 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 03:24:04,237 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:04,238 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:04,238 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:04,238 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:04,238 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:04,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:04,250 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:04,321 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:04,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:04,322 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:04,322 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:04,322 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:04,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:04,322 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:04,327 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:04,328 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:04,335 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:04,337 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:04,338 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:04,339 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:04,340 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:04,341 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:04,404 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:04,404 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:04,619 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:04,640 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:04,640 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:04,644 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:04,644 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:04,655 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:04,662 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:04,672 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:04,682 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:04,690 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:04,695 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:04,701 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:04,701 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:04,816 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:04,818 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:04,818 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 03:24:04,818 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:04,819 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 03:24:04,819 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 03:24:04,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 03:24:04,820 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 18 states. [2018-01-21 03:24:04,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:04,892 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 03:24:04,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 03:24:04,895 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 23 [2018-01-21 03:24:04,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:04,896 INFO L225 Difference]: With dead ends: 34 [2018-01-21 03:24:04,896 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 03:24:04,897 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 03:24:04,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 03:24:04,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 03:24:04,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 03:24:04,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 03:24:04,899 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 03:24:04,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:04,900 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 03:24:04,900 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 03:24:04,900 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 03:24:04,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 03:24:04,901 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:04,901 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:04,902 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:04,902 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 03:24:04,902 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:04,903 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:04,903 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:04,903 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:04,903 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:04,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:04,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:05,049 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:05,049 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:05,049 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:05,049 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:05,049 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:05,049 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:05,050 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:05,055 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:05,055 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:05,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:05,068 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:05,141 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:05,142 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:05,520 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:05,541 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:05,542 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:05,548 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:05,548 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:05,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:05,571 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:05,577 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:05,577 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:05,656 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:05,657 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:05,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 03:24:05,657 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:05,658 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 03:24:05,658 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 03:24:05,659 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 03:24:05,659 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 20 states. [2018-01-21 03:24:05,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:05,693 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 03:24:05,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 03:24:05,693 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 24 [2018-01-21 03:24:05,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:05,694 INFO L225 Difference]: With dead ends: 35 [2018-01-21 03:24:05,694 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 03:24:05,695 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 03:24:05,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 03:24:05,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 03:24:05,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 03:24:05,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 03:24:05,698 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 03:24:05,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:05,699 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 03:24:05,699 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 03:24:05,699 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 03:24:05,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 03:24:05,699 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:05,699 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:05,700 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:05,700 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 03:24:05,700 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:05,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:05,701 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:05,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:05,701 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:05,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:05,711 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:05,973 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:05,973 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:05,974 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:05,974 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:05,974 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:05,974 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:05,974 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:05,982 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:05,982 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:05,991 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:05,995 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:05,995 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:06,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:06,122 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:06,122 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:06,453 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:06,474 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:06,474 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:06,478 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:06,478 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:06,488 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:06,499 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:06,510 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:06,513 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:06,518 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:06,519 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:06,639 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:06,640 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:06,641 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 03:24:06,641 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:06,641 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 03:24:06,641 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 03:24:06,641 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 03:24:06,642 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 22 states. [2018-01-21 03:24:06,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:06,669 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 03:24:06,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 03:24:06,670 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 25 [2018-01-21 03:24:06,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:06,670 INFO L225 Difference]: With dead ends: 36 [2018-01-21 03:24:06,670 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 03:24:06,671 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 03:24:06,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 03:24:06,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 03:24:06,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 03:24:06,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 03:24:06,674 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 03:24:06,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:06,674 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 03:24:06,674 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 03:24:06,674 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 03:24:06,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 03:24:06,674 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:06,674 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:06,675 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:06,675 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 03:24:06,675 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:06,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:06,675 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:06,676 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:06,676 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:06,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:06,685 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:06,809 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:06,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:06,809 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:06,809 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:06,809 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:06,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:06,809 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:06,820 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:06,820 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:06,828 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:06,830 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:06,837 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:06,838 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:06,840 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:06,842 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:06,845 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:06,846 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:06,971 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:06,971 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:07,261 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:07,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:07,285 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:07,291 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:07,291 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:07,302 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:07,312 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:07,324 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:07,336 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:07,350 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:07,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:07,373 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:07,377 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:07,383 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:07,383 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:07,532 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:07,534 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:07,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 03:24:07,534 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:07,534 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 03:24:07,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 03:24:07,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 03:24:07,535 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 24 states. [2018-01-21 03:24:07,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:07,621 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 03:24:07,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 03:24:07,622 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 26 [2018-01-21 03:24:07,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:07,623 INFO L225 Difference]: With dead ends: 37 [2018-01-21 03:24:07,624 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 03:24:07,624 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 03:24:07,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 03:24:07,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 03:24:07,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 03:24:07,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 03:24:07,628 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 03:24:07,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:07,628 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 03:24:07,628 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 03:24:07,628 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 03:24:07,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 03:24:07,629 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:07,629 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:07,629 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:07,629 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 03:24:07,630 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:07,630 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:07,630 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:07,630 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:07,631 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:07,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:07,640 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:07,824 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:07,825 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:07,825 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:07,825 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:07,825 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:07,825 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:07,825 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:07,835 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:07,835 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:07,876 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:07,878 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:08,060 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:08,060 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:08,461 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:08,482 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:08,482 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:08,485 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:08,486 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:08,512 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:08,516 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:08,522 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:08,522 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:08,698 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:08,700 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:08,700 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-21 03:24:08,700 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:08,701 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 03:24:08,701 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 03:24:08,702 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 03:24:08,702 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 26 states. [2018-01-21 03:24:08,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:08,783 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 03:24:08,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 03:24:08,783 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 27 [2018-01-21 03:24:08,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:08,784 INFO L225 Difference]: With dead ends: 38 [2018-01-21 03:24:08,784 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 03:24:08,785 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 03:24:08,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 03:24:08,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 03:24:08,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 03:24:08,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 03:24:08,793 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 03:24:08,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:08,793 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 03:24:08,793 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 03:24:08,793 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 03:24:08,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 03:24:08,794 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:08,794 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:08,794 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:08,795 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 03:24:08,795 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:08,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:08,796 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:08,796 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:08,796 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:08,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:08,811 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:09,001 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:09,001 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:09,001 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:09,001 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:09,001 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:09,001 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:09,001 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:09,006 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:09,007 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:09,011 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:09,012 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:09,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:09,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:09,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:09,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:09,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:09,020 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:09,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:09,116 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:09,116 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:09,441 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:11,410 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:11,410 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:11,415 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:11,415 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:11,421 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:11,423 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:11,428 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:11,433 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:11,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:11,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:11,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:11,469 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:11,473 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:11,479 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:11,480 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:11,605 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:11,607 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:11,607 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 03:24:11,607 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:11,607 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 03:24:11,608 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 03:24:11,608 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 03:24:11,608 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 28 states. [2018-01-21 03:24:11,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:11,653 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 03:24:11,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 03:24:11,653 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 28 [2018-01-21 03:24:11,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:11,654 INFO L225 Difference]: With dead ends: 39 [2018-01-21 03:24:11,654 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 03:24:11,655 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 03:24:11,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 03:24:11,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 03:24:11,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 03:24:11,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 03:24:11,659 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 03:24:11,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:11,659 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 03:24:11,659 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 03:24:11,659 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 03:24:11,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 03:24:11,660 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:11,660 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:11,660 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:11,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 03:24:11,661 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:11,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:11,662 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:11,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:11,662 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:11,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:11,671 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:11,801 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:11,802 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:11,802 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:11,802 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:11,802 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:11,802 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:11,802 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:11,810 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:11,810 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:11,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:11,819 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:11,820 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:11,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:11,823 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:11,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:11,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:11,826 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:11,828 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:11,944 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:11,944 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:12,449 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:12,473 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:12,473 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:12,476 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:12,476 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:12,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:12,494 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:12,502 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:12,511 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:12,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:12,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:12,541 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:12,549 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:12,552 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:12,559 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:12,559 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:12,698 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:12,699 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:12,699 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 03:24:12,699 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:12,699 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 03:24:12,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 03:24:12,700 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 03:24:12,700 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 30 states. [2018-01-21 03:24:12,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:12,753 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 03:24:12,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 03:24:12,754 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 29 [2018-01-21 03:24:12,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:12,755 INFO L225 Difference]: With dead ends: 40 [2018-01-21 03:24:12,755 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 03:24:12,756 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 86 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 03:24:12,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 03:24:12,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 03:24:12,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 03:24:12,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 03:24:12,760 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 03:24:12,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:12,760 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 03:24:12,760 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 03:24:12,760 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 03:24:12,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 03:24:12,761 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:12,761 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:12,761 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:12,761 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 03:24:12,762 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:12,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:12,762 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:12,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:12,763 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:12,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:12,773 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:12,963 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:12,963 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:12,963 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:12,963 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:12,963 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:12,963 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:12,963 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:12,972 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:12,972 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:12,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:12,990 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:13,156 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:13,156 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:13,555 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:13,586 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:13,586 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:13,589 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:13,589 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:13,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:13,615 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:13,620 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:13,621 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:13,749 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:13,751 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:13,751 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 47 [2018-01-21 03:24:13,751 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:13,751 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 03:24:13,751 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 03:24:13,752 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=762, Invalid=1400, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 03:24:13,752 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 32 states. [2018-01-21 03:24:13,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:13,787 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 03:24:13,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 03:24:13,787 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 30 [2018-01-21 03:24:13,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:13,788 INFO L225 Difference]: With dead ends: 41 [2018-01-21 03:24:13,788 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 03:24:13,788 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=795, Invalid=1461, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 03:24:13,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 03:24:13,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 03:24:13,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 03:24:13,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 03:24:13,791 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 03:24:13,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:13,791 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 03:24:13,791 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 03:24:13,791 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 03:24:13,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 03:24:13,792 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:13,792 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:13,792 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:13,792 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 03:24:13,792 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:13,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:13,793 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:13,793 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:13,793 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:13,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:13,800 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:13,989 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:13,989 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:13,989 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:13,989 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:13,990 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:13,990 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:13,990 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:14,002 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:14,003 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:14,013 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:14,020 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:14,022 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:14,024 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:14,236 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:14,236 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:14,680 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:14,700 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:14,701 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:14,704 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:14,704 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:14,713 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:14,724 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:14,732 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:14,735 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:14,740 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:14,740 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:14,898 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:14,900 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:14,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 50 [2018-01-21 03:24:14,900 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:14,900 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 03:24:14,901 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 03:24:14,901 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=1589, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 03:24:14,902 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 34 states. [2018-01-21 03:24:15,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:15,005 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 03:24:15,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 03:24:15,011 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 31 [2018-01-21 03:24:15,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:15,012 INFO L225 Difference]: With dead ends: 42 [2018-01-21 03:24:15,012 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 03:24:15,013 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 992 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=896, Invalid=1654, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 03:24:15,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 03:24:15,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 03:24:15,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 03:24:15,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 03:24:15,017 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 03:24:15,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:15,017 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 03:24:15,017 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 03:24:15,017 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 03:24:15,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 03:24:15,018 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:15,018 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:15,018 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:15,018 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 03:24:15,018 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:15,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:15,019 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:15,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:15,019 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:15,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:15,028 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:15,284 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:15,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:15,285 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:15,285 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:15,285 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:15,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:15,285 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:15,297 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:15,297 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:15,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,309 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,310 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,312 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,313 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,315 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,316 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,318 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:15,318 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:15,320 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:15,557 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:15,557 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:16,287 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:16,307 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:16,307 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:16,310 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:16,310 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:16,322 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,328 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,340 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,352 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,367 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,397 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,413 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,427 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:16,439 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:16,442 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:16,448 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:16,448 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:16,611 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:16,612 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:16,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 03:24:16,612 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:16,613 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 03:24:16,613 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 03:24:16,613 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 03:24:16,614 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 36 states. [2018-01-21 03:24:16,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:16,657 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 03:24:16,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 03:24:16,657 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 32 [2018-01-21 03:24:16,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:16,658 INFO L225 Difference]: With dead ends: 43 [2018-01-21 03:24:16,658 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 03:24:16,658 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 92 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 03:24:16,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 03:24:16,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 03:24:16,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 03:24:16,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 03:24:16,662 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 03:24:16,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:16,662 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 03:24:16,662 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 03:24:16,662 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 03:24:16,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 03:24:16,663 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:16,663 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:16,663 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:16,663 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 03:24:16,663 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:16,664 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:16,664 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:16,664 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:16,664 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:16,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:16,673 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:16,948 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:16,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:16,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:16,948 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:16,948 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:16,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:16,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:16,953 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:16,954 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:16,966 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:16,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:17,094 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:17,094 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:17,641 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:17,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:17,662 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:17,665 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:17,666 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:17,703 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:17,707 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:17,712 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:17,712 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:17,897 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:17,898 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:17,898 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 03:24:17,898 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:17,899 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 03:24:17,899 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 03:24:17,900 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 03:24:17,900 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 38 states. [2018-01-21 03:24:18,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:18,140 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 03:24:18,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 03:24:18,141 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 33 [2018-01-21 03:24:18,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:18,141 INFO L225 Difference]: With dead ends: 44 [2018-01-21 03:24:18,141 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 03:24:18,142 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 03:24:18,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 03:24:18,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 03:24:18,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 03:24:18,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 03:24:18,145 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 03:24:18,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:18,145 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 03:24:18,146 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 03:24:18,146 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 03:24:18,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 03:24:18,146 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:18,146 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:18,146 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:18,146 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 03:24:18,147 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:18,147 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:18,147 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:18,147 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:18,147 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:18,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:18,156 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:18,488 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:18,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:18,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:18,489 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:18,489 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:18,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:18,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:18,500 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:18,500 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:18,504 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,505 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,507 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:18,551 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:18,554 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:18,743 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:18,743 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:19,413 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:19,444 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:19,444 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:19,448 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:19,448 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:19,454 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,456 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,464 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,468 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,473 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,478 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,484 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,490 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,502 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:19,512 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:19,516 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:19,523 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:19,523 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:19,709 WARN L143 SmtUtils]: Spent 103ms on a formula simplification that was a NOOP. DAG size: 59 [2018-01-21 03:24:19,761 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:19,762 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:19,763 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 59 [2018-01-21 03:24:19,763 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:19,763 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 03:24:19,763 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 03:24:19,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1194, Invalid=2228, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 03:24:19,764 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 40 states. [2018-01-21 03:24:19,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:19,818 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 03:24:19,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 03:24:19,819 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 34 [2018-01-21 03:24:19,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:19,819 INFO L225 Difference]: With dead ends: 45 [2018-01-21 03:24:19,820 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 03:24:19,820 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1235, Invalid=2305, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 03:24:19,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 03:24:19,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 03:24:19,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 03:24:19,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 03:24:19,825 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 03:24:19,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:19,825 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 03:24:19,825 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 03:24:19,825 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 03:24:19,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 03:24:19,826 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:19,826 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:19,826 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:19,826 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 03:24:19,826 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:19,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:19,827 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:19,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:19,827 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:19,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:19,837 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:20,488 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:20,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:20,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:20,489 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:20,489 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:20,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:20,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:20,502 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:20,502 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:20,510 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,513 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,519 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,522 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,523 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:20,526 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:20,527 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:20,698 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:20,698 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:21,346 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:21,367 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:21,367 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:21,370 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:21,371 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:21,380 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,387 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,395 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,403 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,412 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,422 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,432 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,453 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,465 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:21,473 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:21,477 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:21,483 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:21,483 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:21,666 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:21,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:21,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 62 [2018-01-21 03:24:21,667 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:21,667 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 03:24:21,668 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 03:24:21,669 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1317, Invalid=2465, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 03:24:21,669 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 42 states. [2018-01-21 03:24:21,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:21,716 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 03:24:21,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 03:24:21,716 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 35 [2018-01-21 03:24:21,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:21,717 INFO L225 Difference]: With dead ends: 46 [2018-01-21 03:24:21,717 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 03:24:21,718 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 98 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1360, Invalid=2546, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 03:24:21,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 03:24:21,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 03:24:21,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 03:24:21,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 03:24:21,721 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 03:24:21,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:21,721 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 03:24:21,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 03:24:21,721 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 03:24:21,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 03:24:21,722 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:21,722 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:21,722 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:21,722 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 03:24:21,722 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:21,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:21,723 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:21,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:21,723 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:21,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:21,732 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:22,029 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:22,029 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:22,029 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:22,029 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:22,029 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:22,029 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:22,029 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:22,035 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:22,035 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:22,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:22,054 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:22,301 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:22,302 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:23,013 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:23,033 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:23,033 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:23,037 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:23,037 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:23,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:23,065 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:23,070 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:23,070 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:23,229 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:23,230 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:23,230 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 65 [2018-01-21 03:24:23,230 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:23,230 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 03:24:23,231 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 03:24:23,231 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=2714, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 03:24:23,232 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 44 states. [2018-01-21 03:24:23,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:23,281 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 03:24:23,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 03:24:23,281 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 36 [2018-01-21 03:24:23,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:23,282 INFO L225 Difference]: With dead ends: 47 [2018-01-21 03:24:23,282 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 03:24:23,282 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1727 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1491, Invalid=2799, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 03:24:23,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 03:24:23,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 03:24:23,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 03:24:23,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 03:24:23,285 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 03:24:23,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:23,286 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 03:24:23,286 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 03:24:23,286 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 03:24:23,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 03:24:23,286 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:23,287 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:23,287 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:23,287 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 03:24:23,287 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:23,288 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:23,288 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:23,288 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:23,288 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:23,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:23,296 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:23,552 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:23,553 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:23,553 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:23,553 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:23,553 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:23,553 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:23,553 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:23,558 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:23,558 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:23,566 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:23,574 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:23,577 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:23,579 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:23,822 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:23,822 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:24,589 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:24,616 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:24,616 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:24,620 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:24,620 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:24,631 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:24,644 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:24,658 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:24,663 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:24,669 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:24,670 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:24,847 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:24,848 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:24,848 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 68 [2018-01-21 03:24:24,848 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:24,848 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-21 03:24:24,849 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-21 03:24:24,849 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1583, Invalid=2973, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 03:24:24,849 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 46 states. [2018-01-21 03:24:24,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:24,901 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 03:24:24,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 03:24:24,901 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 37 [2018-01-21 03:24:24,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:24,901 INFO L225 Difference]: With dead ends: 48 [2018-01-21 03:24:24,902 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 03:24:24,902 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1916 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1630, Invalid=3062, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 03:24:24,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 03:24:24,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 03:24:24,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 03:24:24,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 03:24:24,905 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 03:24:24,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:24,905 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 03:24:24,905 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-21 03:24:24,906 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 03:24:24,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 03:24:24,906 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:24,906 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:24,906 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:24,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 03:24:24,906 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:24,907 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:24,907 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:24,907 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:24,907 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:24,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:24,916 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:25,166 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:25,166 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:25,166 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:25,166 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:25,167 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:25,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:25,167 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:25,172 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:25,172 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:25,179 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,183 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,184 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,185 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,186 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,187 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,188 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,190 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,191 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,193 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:25,193 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:25,195 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:25,412 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:25,412 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:26,318 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:26,338 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:26,338 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:26,341 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:26,341 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:26,351 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,358 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,366 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,374 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,383 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,403 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,415 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,426 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,438 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,450 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,462 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:26,471 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:26,475 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:26,483 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:26,483 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:26,681 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:26,682 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:26,682 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 71 [2018-01-21 03:24:26,682 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:26,682 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-21 03:24:26,683 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-21 03:24:26,683 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1726, Invalid=3244, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 03:24:26,683 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 48 states. [2018-01-21 03:24:26,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:26,751 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 03:24:26,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 03:24:26,751 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 38 [2018-01-21 03:24:26,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:26,752 INFO L225 Difference]: With dead ends: 49 [2018-01-21 03:24:26,752 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 03:24:26,752 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2136 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1775, Invalid=3337, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 03:24:26,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 03:24:26,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 03:24:26,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 03:24:26,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 03:24:26,762 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 03:24:26,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:26,762 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 03:24:26,763 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-21 03:24:26,763 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 03:24:26,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 03:24:26,763 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:26,763 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:26,763 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:26,764 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 03:24:26,764 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:26,764 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:26,765 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:26,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:26,765 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:26,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:26,773 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:27,068 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:27,068 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:27,068 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:27,068 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:27,068 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:27,068 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:27,068 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:27,073 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:27,073 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:27,085 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:27,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:27,310 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:27,310 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:28,146 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:28,178 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:28,178 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:28,182 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:28,182 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:28,223 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:28,228 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:28,233 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:28,233 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:28,435 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:28,436 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:28,436 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 74 [2018-01-21 03:24:28,436 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:28,437 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-21 03:24:28,437 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-21 03:24:28,437 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1875, Invalid=3527, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 03:24:28,437 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 50 states. [2018-01-21 03:24:28,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:28,518 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 03:24:28,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 03:24:28,521 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 39 [2018-01-21 03:24:28,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:28,522 INFO L225 Difference]: With dead ends: 50 [2018-01-21 03:24:28,522 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 03:24:28,523 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2368 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1926, Invalid=3624, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 03:24:28,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 03:24:28,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 03:24:28,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 03:24:28,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 03:24:28,527 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 03:24:28,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:28,528 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 03:24:28,528 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-21 03:24:28,528 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 03:24:28,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 03:24:28,529 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:28,529 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:28,529 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:28,529 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 03:24:28,529 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:28,530 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:28,530 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:28,530 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:28,530 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:28,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:28,540 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:29,041 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:29,042 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:29,042 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:29,042 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:29,042 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:29,042 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:29,042 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:29,048 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:29,048 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:29,053 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,054 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,055 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,056 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,057 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,058 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,059 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,060 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,061 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,062 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,063 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,064 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,069 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:29,070 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:29,072 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:29,319 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:29,320 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:30,231 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:30,251 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:30,251 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:30,254 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:30,254 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:30,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,265 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,269 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,273 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,278 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,288 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,294 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,300 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,307 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,314 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,327 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:30,337 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:30,340 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:30,346 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:30,346 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:30,561 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:30,562 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:30,562 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 77 [2018-01-21 03:24:30,562 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:30,562 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-21 03:24:30,563 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-21 03:24:30,563 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2030, Invalid=3822, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 03:24:30,563 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 52 states. [2018-01-21 03:24:30,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:30,633 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 03:24:30,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 03:24:30,634 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 40 [2018-01-21 03:24:30,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:30,634 INFO L225 Difference]: With dead ends: 51 [2018-01-21 03:24:30,634 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 03:24:30,635 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2612 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2083, Invalid=3923, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 03:24:30,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 03:24:30,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 03:24:30,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 03:24:30,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 03:24:30,637 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 03:24:30,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:30,637 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 03:24:30,638 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-21 03:24:30,638 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 03:24:30,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 03:24:30,638 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:30,638 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:30,638 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:30,639 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 03:24:30,639 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:30,639 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:30,639 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:30,640 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:30,640 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:30,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:30,649 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:30,996 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:30,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:30,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:30,997 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:30,997 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:30,997 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:30,997 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:31,002 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:31,003 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:31,010 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,012 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,013 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,014 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,016 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,017 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,018 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,019 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,021 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,022 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,023 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,025 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,026 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:31,026 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:31,028 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:31,437 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:31,437 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:32,344 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:32,364 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:32,365 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:32,368 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:32,368 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:32,378 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,385 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,393 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,401 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,409 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,418 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,428 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,438 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,459 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,470 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,482 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,494 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:32,503 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:32,507 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:32,516 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:32,516 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:32,742 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:32,743 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:32,744 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 80 [2018-01-21 03:24:32,744 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:32,744 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-21 03:24:32,744 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-21 03:24:32,745 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2191, Invalid=4129, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 03:24:32,745 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 54 states. [2018-01-21 03:24:32,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:32,870 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 03:24:32,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 03:24:32,871 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 41 [2018-01-21 03:24:32,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:32,871 INFO L225 Difference]: With dead ends: 52 [2018-01-21 03:24:32,871 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 03:24:32,872 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 110 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2868 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2246, Invalid=4234, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 03:24:32,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 03:24:32,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 03:24:32,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 03:24:32,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 03:24:32,876 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 03:24:32,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:32,877 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 03:24:32,877 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-21 03:24:32,877 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 03:24:32,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 03:24:32,877 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:32,877 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:32,878 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:32,878 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 03:24:32,878 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:32,879 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:32,879 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:32,879 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:32,879 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:32,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:32,892 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:33,322 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:33,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:33,322 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:33,322 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:33,322 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:33,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:33,322 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:33,327 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:33,327 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:33,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:33,343 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:33,624 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:33,624 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:34,682 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:34,702 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:34,702 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:34,705 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:34,705 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:34,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:34,734 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:34,740 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:34,740 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:34,947 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:34,947 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:34,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 83 [2018-01-21 03:24:34,948 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:34,948 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-21 03:24:34,948 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-21 03:24:34,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2358, Invalid=4448, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 03:24:34,949 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 56 states. [2018-01-21 03:24:35,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:35,037 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 03:24:35,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 03:24:35,037 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 42 [2018-01-21 03:24:35,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:35,038 INFO L225 Difference]: With dead ends: 53 [2018-01-21 03:24:35,038 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 03:24:35,038 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3136 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2415, Invalid=4557, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 03:24:35,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 03:24:35,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 03:24:35,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 03:24:35,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 03:24:35,041 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 03:24:35,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:35,041 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 03:24:35,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-21 03:24:35,041 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 03:24:35,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 03:24:35,042 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:35,042 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:35,042 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:35,042 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 03:24:35,042 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:35,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:35,043 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:35,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:35,043 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:35,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:35,050 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:35,489 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:35,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:35,490 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:35,490 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:35,490 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:35,490 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:35,490 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:35,495 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:35,495 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:35,503 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:35,509 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:35,511 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:35,513 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:35,847 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:35,847 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:36,918 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:36,951 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:36,951 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:36,954 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:36,954 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:36,965 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:36,979 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:36,991 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:36,995 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:37,001 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:37,001 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:37,252 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:37,253 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:37,253 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 86 [2018-01-21 03:24:37,253 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:37,254 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-21 03:24:37,254 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-21 03:24:37,254 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2531, Invalid=4779, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 03:24:37,254 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 58 states. [2018-01-21 03:24:37,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:37,321 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 03:24:37,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 03:24:37,322 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 43 [2018-01-21 03:24:37,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:37,323 INFO L225 Difference]: With dead ends: 54 [2018-01-21 03:24:37,323 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 03:24:37,324 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3416 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2590, Invalid=4892, Unknown=0, NotChecked=0, Total=7482 [2018-01-21 03:24:37,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 03:24:37,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 03:24:37,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 03:24:37,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 03:24:37,327 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 03:24:37,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:37,327 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 03:24:37,327 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-21 03:24:37,327 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 03:24:37,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 03:24:37,327 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:37,328 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:37,328 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:37,328 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 03:24:37,328 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:37,328 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:37,328 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:37,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:37,329 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:37,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:37,337 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:37,897 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:37,898 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:37,898 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:37,898 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:37,898 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:37,898 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:37,898 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:37,904 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:37,904 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:37,911 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,913 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,914 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,915 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,918 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,919 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,920 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,921 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,924 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,926 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,928 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,929 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:37,929 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:37,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:38,273 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:38,274 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:39,366 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:39,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:39,386 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:39,390 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:24:39,390 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:24:39,404 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,412 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,420 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,428 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,436 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,445 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,455 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,465 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,476 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,488 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,499 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,511 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,523 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,536 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,549 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:24:39,559 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:39,564 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:39,573 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:39,573 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:39,824 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:39,825 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:39,825 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 89 [2018-01-21 03:24:39,825 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:39,826 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-21 03:24:39,826 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-21 03:24:39,826 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2710, Invalid=5122, Unknown=0, NotChecked=0, Total=7832 [2018-01-21 03:24:39,826 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 60 states. [2018-01-21 03:24:39,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:39,891 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 03:24:39,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 03:24:39,892 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 44 [2018-01-21 03:24:39,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:39,892 INFO L225 Difference]: With dead ends: 55 [2018-01-21 03:24:39,892 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 03:24:39,893 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3708 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2771, Invalid=5239, Unknown=0, NotChecked=0, Total=8010 [2018-01-21 03:24:39,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 03:24:39,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 03:24:39,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 03:24:39,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 03:24:39,895 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 03:24:39,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:39,896 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 03:24:39,896 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-21 03:24:39,896 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 03:24:39,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 03:24:39,896 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:39,896 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:39,897 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:39,897 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 03:24:39,897 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:39,898 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:39,898 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:39,898 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:39,898 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:39,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:39,909 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:40,315 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:40,315 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:40,315 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:40,315 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:40,316 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:40,316 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:40,316 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:40,322 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:40,323 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:40,341 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:40,343 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:40,704 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:40,704 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:41,819 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:41,839 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:41,839 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:41,842 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:24:41,843 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:24:41,884 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:41,888 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:41,898 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:41,898 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:42,162 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:42,163 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:42,164 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 92 [2018-01-21 03:24:42,164 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:42,164 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-21 03:24:42,164 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-21 03:24:42,165 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2895, Invalid=5477, Unknown=0, NotChecked=0, Total=8372 [2018-01-21 03:24:42,165 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 62 states. [2018-01-21 03:24:42,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:42,245 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 03:24:42,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 03:24:42,246 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 45 [2018-01-21 03:24:42,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:42,246 INFO L225 Difference]: With dead ends: 56 [2018-01-21 03:24:42,246 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 03:24:42,247 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4012 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2958, Invalid=5598, Unknown=0, NotChecked=0, Total=8556 [2018-01-21 03:24:42,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 03:24:42,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 03:24:42,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 03:24:42,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 03:24:42,249 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 03:24:42,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:42,249 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 03:24:42,249 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-21 03:24:42,249 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 03:24:42,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 03:24:42,249 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:42,249 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:42,250 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:42,250 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 03:24:42,250 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:42,250 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:42,250 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:42,250 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:42,250 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:42,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:42,261 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:42,776 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:42,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:42,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:42,776 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:42,776 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:42,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:42,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:42,784 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:42,784 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:42,788 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,789 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,790 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,791 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,792 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,793 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,794 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,795 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,796 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,797 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,798 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,801 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,802 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,803 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,808 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:42,809 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:42,811 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:43,195 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:43,195 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:44,256 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:44,276 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:44,276 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:44,666 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:24:44,666 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:44,672 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,674 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,679 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,683 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,688 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,693 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,699 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,705 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,718 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,733 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,741 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,750 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,760 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,776 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:44,795 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:44,800 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:44,810 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:44,811 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:45,077 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:45,078 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:45,078 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 95 [2018-01-21 03:24:45,078 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:45,078 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-21 03:24:45,078 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-21 03:24:45,079 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3086, Invalid=5844, Unknown=0, NotChecked=0, Total=8930 [2018-01-21 03:24:45,079 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 64 states. [2018-01-21 03:24:45,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:45,149 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 03:24:45,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 03:24:45,150 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 46 [2018-01-21 03:24:45,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:45,150 INFO L225 Difference]: With dead ends: 57 [2018-01-21 03:24:45,150 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 03:24:45,151 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=3151, Invalid=5969, Unknown=0, NotChecked=0, Total=9120 [2018-01-21 03:24:45,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 03:24:45,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 03:24:45,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 03:24:45,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 03:24:45,153 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 03:24:45,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:45,153 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 03:24:45,153 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-21 03:24:45,153 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 03:24:45,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 03:24:45,154 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:45,154 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:45,154 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:45,154 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 03:24:45,154 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:45,155 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:45,155 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:45,155 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:45,155 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:45,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:45,166 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:45,552 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:45,553 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:45,553 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:45,553 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:45,553 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:45,553 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:45,553 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:45,558 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:45,558 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:45,565 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,567 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,568 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,569 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,570 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,571 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,572 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,573 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,575 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,576 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,577 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,578 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,579 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,581 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,582 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:45,582 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:45,584 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:45,919 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:45,919 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:47,171 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:47,192 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:47,192 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:47,195 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:24:47,195 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:24:47,207 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,213 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,221 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,245 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,260 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,276 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,286 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,297 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,308 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,320 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,332 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,358 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,372 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,386 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:24:47,397 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:47,402 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:47,411 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:47,411 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:47,731 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:47,732 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:47,732 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 98 [2018-01-21 03:24:47,732 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:47,733 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-21 03:24:47,733 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-21 03:24:47,733 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3283, Invalid=6223, Unknown=0, NotChecked=0, Total=9506 [2018-01-21 03:24:47,733 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 66 states. [2018-01-21 03:24:47,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:47,801 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 03:24:47,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 03:24:47,802 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 47 [2018-01-21 03:24:47,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:47,802 INFO L225 Difference]: With dead ends: 58 [2018-01-21 03:24:47,802 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 03:24:47,803 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4656 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=3350, Invalid=6352, Unknown=0, NotChecked=0, Total=9702 [2018-01-21 03:24:47,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 03:24:47,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 03:24:47,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 03:24:47,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 03:24:47,805 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 03:24:47,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:47,805 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 03:24:47,805 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-21 03:24:47,805 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 03:24:47,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 03:24:47,806 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:47,806 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:47,806 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:47,806 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 03:24:47,806 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:47,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:47,807 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:24:47,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:47,807 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:47,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:47,817 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:48,280 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:48,281 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:48,281 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:48,281 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:48,281 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:48,281 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:48,281 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:48,287 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:48,287 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:48,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:48,306 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:49,326 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:49,326 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:50,610 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:50,631 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:50,631 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:50,634 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:50,634 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:24:50,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:50,677 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:50,684 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:50,684 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:50,976 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:50,977 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:24:50,978 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 101 [2018-01-21 03:24:50,978 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:24:50,978 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-21 03:24:50,978 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-21 03:24:50,979 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3486, Invalid=6614, Unknown=0, NotChecked=0, Total=10100 [2018-01-21 03:24:50,979 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 68 states. [2018-01-21 03:24:51,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:24:51,080 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 03:24:51,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 03:24:51,081 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 48 [2018-01-21 03:24:51,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:24:51,081 INFO L225 Difference]: With dead ends: 59 [2018-01-21 03:24:51,081 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 03:24:51,082 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4996 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=3555, Invalid=6747, Unknown=0, NotChecked=0, Total=10302 [2018-01-21 03:24:51,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 03:24:51,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 03:24:51,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 03:24:51,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 03:24:51,085 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 03:24:51,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:24:51,086 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 03:24:51,086 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-21 03:24:51,086 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 03:24:51,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 03:24:51,087 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:24:51,087 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:24:51,087 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:24:51,088 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 03:24:51,088 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:24:51,088 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:51,088 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:24:51,089 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:24:51,089 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:24:51,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:24:51,102 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:24:51,859 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:51,859 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:51,859 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:24:51,859 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:24:51,859 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:24:51,859 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:51,859 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:24:51,866 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:51,866 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:51,874 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:51,882 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:51,885 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:51,886 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:52,310 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:52,311 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:24:53,688 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:53,720 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:24:53,720 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:24:53,723 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:24:53,723 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:24:53,735 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:53,751 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:24:53,765 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:24:53,769 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:24:53,775 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:24:53,775 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 03:24:53,882 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 03:24:53,882 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 03:24:53,884 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 03:24:53,884 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 03:24:53,884 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 03:24:53,884 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 03:24:53,885 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 03:24:53,885 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 03:24:53,885 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 03:24:53,885 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 03:24:53,885 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 03:24:53,885 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 03:24:53,885 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 03:24:53,886 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 03:24:53 BoogieIcfgContainer [2018-01-21 03:24:53,886 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 03:24:53,887 INFO L168 Benchmark]: Toolchain (without parser) took 55955.57 ms. Allocated memory was 299.4 MB in the beginning and 793.8 MB in the end (delta: 494.4 MB). Free memory was 258.5 MB in the beginning and 550.0 MB in the end (delta: -291.4 MB). Peak memory consumption was 203.0 MB. Max. memory is 5.3 GB. [2018-01-21 03:24:53,888 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 299.4 MB. Free memory is still 262.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 03:24:53,888 INFO L168 Benchmark]: CACSL2BoogieTranslator took 209.64 ms. Allocated memory is still 299.4 MB. Free memory was 258.5 MB in the beginning and 250.5 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-21 03:24:53,888 INFO L168 Benchmark]: Boogie Preprocessor took 38.11 ms. Allocated memory is still 299.4 MB. Free memory was 250.5 MB in the beginning and 248.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 03:24:53,889 INFO L168 Benchmark]: RCFGBuilder took 194.70 ms. Allocated memory is still 299.4 MB. Free memory was 248.6 MB in the beginning and 235.6 MB in the end (delta: 13.0 MB). Peak memory consumption was 13.0 MB. Max. memory is 5.3 GB. [2018-01-21 03:24:53,889 INFO L168 Benchmark]: TraceAbstraction took 55506.14 ms. Allocated memory was 299.4 MB in the beginning and 793.8 MB in the end (delta: 494.4 MB). Free memory was 235.6 MB in the beginning and 550.0 MB in the end (delta: -314.4 MB). Peak memory consumption was 180.0 MB. Max. memory is 5.3 GB. [2018-01-21 03:24:53,891 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 299.4 MB. Free memory is still 262.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 209.64 ms. Allocated memory is still 299.4 MB. Free memory was 258.5 MB in the beginning and 250.5 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 38.11 ms. Allocated memory is still 299.4 MB. Free memory was 250.5 MB in the beginning and 248.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 194.70 ms. Allocated memory is still 299.4 MB. Free memory was 248.6 MB in the beginning and 235.6 MB in the end (delta: 13.0 MB). Peak memory consumption was 13.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55506.14 ms. Allocated memory was 299.4 MB in the beginning and 793.8 MB in the end (delta: 494.4 MB). Free memory was 235.6 MB in the beginning and 550.0 MB in the end (delta: -314.4 MB). Peak memory consumption was 180.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.203445 RENAME_VARIABLES(MILLISECONDS) : 0.069197 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.156451 PROJECTAWAY(MILLISECONDS) : 0.098592 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.234853 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.096499 ADD_EQUALITY(MILLISECONDS) : 0.032946 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.012388 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 50 with TraceHistMax 32, while TraceCheckSpWp was constructing backward predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 104. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 55.2s OverallTime, 33 OverallIterations, 32 TraceHistogramMax, 2.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 515 SDtfs, 102 SDslu, 9656 SDs, 0 SdLazy, 2140 SolverSat, 116 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 4686 GetRequests, 2916 SyntacticMatches, 62 SemanticMatches, 1708 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52844 ImplicationChecksByTransitivity, 30.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=50occurred in iteration=32, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.9s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 2.6s SatisfiabilityAnalysisTime, 44.2s InterpolantComputationTime, 3086 NumberOfCodeBlocks, 3086 NumberOfCodeBlocksAsserted, 374 NumberOfCheckSat, 4976 ConstructedInterpolants, 0 QuantifiedInterpolants, 706688 SizeOfPredicates, 62 NumberOfNonLiveVariables, 6758 ConjunctsInSsa, 1178 ConjunctsInUnsatCore, 156 InterpolantComputations, 1 PerfectInterpolantSequences, 0/27280 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_03-24-53-901.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_03-24-53-901.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_03-24-53-901.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_03-24-53-901.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_03-24-53-901.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_03-24-53-901.csv Completed graceful shutdown