java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset2_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 06:07:37,378 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 06:07:37,380 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 06:07:37,393 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 06:07:37,393 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 06:07:37,393 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 06:07:37,394 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 06:07:37,395 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 06:07:37,397 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 06:07:37,398 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 06:07:37,398 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 06:07:37,399 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 06:07:37,399 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 06:07:37,400 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 06:07:37,401 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 06:07:37,403 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 06:07:37,405 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 06:07:37,408 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 06:07:37,409 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 06:07:37,410 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 06:07:37,413 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 06:07:37,413 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 06:07:37,413 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 06:07:37,414 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 06:07:37,415 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 06:07:37,416 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 06:07:37,417 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 06:07:37,417 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 06:07:37,418 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 06:07:37,418 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 06:07:37,419 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 06:07:37,419 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf [2018-01-21 06:07:37,429 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 06:07:37,429 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 06:07:37,430 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 06:07:37,430 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 06:07:37,430 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 06:07:37,430 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 06:07:37,431 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 06:07:37,431 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 06:07:37,431 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 06:07:37,432 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 06:07:37,432 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 06:07:37,432 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 06:07:37,432 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 06:07:37,432 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 06:07:37,433 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 06:07:37,433 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 06:07:37,433 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 06:07:37,433 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 06:07:37,433 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 06:07:37,433 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 06:07:37,434 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 06:07:37,434 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 06:07:37,434 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 06:07:37,434 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 06:07:37,434 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 06:07:37,435 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 06:07:37,435 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:07:37,435 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 06:07:37,435 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 06:07:37,436 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 06:07:37,436 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 06:07:37,436 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 06:07:37,436 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 06:07:37,436 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 06:07:37,436 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 06:07:37,437 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 06:07:37,437 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 06:07:37,438 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 06:07:37,438 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 06:07:37,473 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 06:07:37,486 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 06:07:37,490 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 06:07:37,491 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 06:07:37,492 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 06:07:37,493 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset2_true-valid-memsafety_true-termination.c [2018-01-21 06:07:37,631 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 06:07:37,635 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 06:07:37,636 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 06:07:37,636 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 06:07:37,642 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 06:07:37,643 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,645 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8d55d51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37, skipping insertion in model container [2018-01-21 06:07:37,645 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,659 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:07:37,673 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:07:37,780 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:07:37,794 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:07:37,798 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37 WrapperNode [2018-01-21 06:07:37,799 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 06:07:37,799 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 06:07:37,799 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 06:07:37,800 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 06:07:37,811 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,811 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,818 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,819 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,821 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,824 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,825 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (1/1) ... [2018-01-21 06:07:37,827 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 06:07:37,827 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 06:07:37,827 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 06:07:37,828 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 06:07:37,829 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:07:37,875 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 06:07:37,875 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 06:07:37,875 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 06:07:37,875 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 06:07:37,876 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 06:07:37,876 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 06:07:37,876 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 06:07:37,876 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 06:07:37,876 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 06:07:37,876 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 06:07:37,877 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 06:07:37,877 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 06:07:37,992 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 06:07:37,993 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:07:37 BoogieIcfgContainer [2018-01-21 06:07:37,993 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 06:07:37,994 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 06:07:37,994 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 06:07:37,996 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 06:07:37,996 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 06:07:37" (1/3) ... [2018-01-21 06:07:37,997 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:07:37, skipping insertion in model container [2018-01-21 06:07:37,997 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:07:37" (2/3) ... [2018-01-21 06:07:37,997 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:07:37, skipping insertion in model container [2018-01-21 06:07:37,997 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:07:37" (3/3) ... [2018-01-21 06:07:37,999 INFO L105 eAbstractionObserver]: Analyzing ICFG memset2_true-valid-memsafety_true-termination.c [2018-01-21 06:07:38,006 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 06:07:38,012 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 06:07:38,049 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:07:38,050 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:07:38,050 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:07:38,050 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:07:38,050 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:07:38,050 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:07:38,050 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:07:38,051 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 06:07:38,051 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:07:38,073 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:07:38,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 06:07:38,080 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:38,082 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 06:07:38,082 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 06:07:38,087 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 06:07:38,090 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:38,144 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:38,145 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:38,145 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:38,145 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:38,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:07:38,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:07:38,202 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 06:07:38,208 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 06:07:38,215 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:07:38,215 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:07:38,215 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:07:38,215 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:07:38,216 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:07:38,216 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:07:38,216 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:07:38,216 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 06:07:38,216 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:07:38,217 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:07:38,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 06:07:38,218 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:38,218 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:38,218 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:38,219 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 06:07:38,219 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:38,220 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:38,220 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:38,220 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:38,221 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:38,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:38,249 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:38,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:38,358 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 06:07:38,358 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 06:07:38,359 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 06:07:38,361 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 06:07:38,375 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 06:07:38,376 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 06:07:38,379 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 06:07:38,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:38,427 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:07:38,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 06:07:38,429 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 06:07:38,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:38,442 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:07:38,442 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 06:07:38,509 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 06:07:38,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 06:07:38,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 06:07:38,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 06:07:38,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 06:07:38,539 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 06:07:38,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:38,539 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 06:07:38,539 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 06:07:38,540 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 06:07:38,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 06:07:38,540 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:38,540 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:38,540 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:38,540 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 06:07:38,541 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:38,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:38,541 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:38,542 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:38,542 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:38,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:38,556 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:38,628 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:38,628 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:38,628 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:38,629 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 06:07:38,631 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 06:07:38,675 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 06:07:38,675 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 06:07:39,449 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 06:07:39,450 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 06:07:39,468 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 06:07:39,468 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:39,469 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:39,483 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:39,483 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:07:39,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:39,510 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:39,576 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:39,576 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:39,714 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:39,736 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:39,736 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:39,740 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:39,740 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:07:39,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:39,769 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:39,775 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:39,775 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:39,839 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:39,841 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:39,842 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 11 [2018-01-21 06:07:39,842 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:39,843 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 06:07:39,843 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 06:07:39,843 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-21 06:07:39,844 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 8 states. [2018-01-21 06:07:39,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:39,881 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 06:07:39,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 06:07:39,882 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 18 [2018-01-21 06:07:39,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:39,883 INFO L225 Difference]: With dead ends: 29 [2018-01-21 06:07:39,883 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 06:07:39,884 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 64 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-21 06:07:39,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 06:07:39,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 06:07:39,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 06:07:39,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 06:07:39,887 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 06:07:39,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:39,887 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 06:07:39,888 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 06:07:39,888 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 06:07:39,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 06:07:39,888 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:39,888 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:39,889 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:39,889 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 06:07:39,889 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:39,890 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:39,890 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:39,890 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:39,890 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:39,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:39,904 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:40,029 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,029 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:40,029 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:40,030 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:40,030 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:40,030 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:40,030 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:40,041 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:07:40,041 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:40,055 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:40,063 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:40,069 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:40,071 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:40,228 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,228 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:40,369 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,392 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:40,392 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:40,437 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:07:40,438 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:40,451 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:40,463 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:40,472 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:40,478 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:40,483 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,483 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:40,544 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,552 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:40,552 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 14 [2018-01-21 06:07:40,552 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:40,553 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 06:07:40,553 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 06:07:40,553 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-01-21 06:07:40,554 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 10 states. [2018-01-21 06:07:40,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:40,609 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 06:07:40,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 06:07:40,609 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-01-21 06:07:40,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:40,610 INFO L225 Difference]: With dead ends: 30 [2018-01-21 06:07:40,610 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 06:07:40,611 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2018-01-21 06:07:40,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 06:07:40,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 06:07:40,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 06:07:40,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 06:07:40,615 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 06:07:40,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:40,615 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 06:07:40,615 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 06:07:40,615 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 06:07:40,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 06:07:40,616 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:40,616 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:40,616 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:40,617 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 06:07:40,617 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:40,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:40,618 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:40,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:40,618 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:40,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:40,631 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:40,700 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:40,701 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:40,701 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:40,701 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:40,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:40,701 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:40,706 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:07:40,706 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:07:40,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:40,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:40,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:40,717 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:40,718 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:40,744 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,744 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:40,860 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,880 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:40,880 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:40,883 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:07:40,884 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:07:40,894 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:40,901 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:40,909 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:40,914 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:40,917 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:40,921 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,921 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:40,964 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:40,965 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:40,965 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 06:07:40,965 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:40,966 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 06:07:40,966 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 06:07:40,966 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 06:07:40,966 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 12 states. [2018-01-21 06:07:40,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:40,988 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 06:07:40,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 06:07:40,988 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 20 [2018-01-21 06:07:40,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:40,989 INFO L225 Difference]: With dead ends: 31 [2018-01-21 06:07:40,989 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 06:07:40,990 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 68 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 06:07:40,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 06:07:40,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 06:07:40,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 06:07:40,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 06:07:40,992 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 06:07:40,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:40,993 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 06:07:40,993 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 06:07:40,993 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 06:07:40,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 06:07:40,993 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:40,993 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:40,993 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:40,994 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 06:07:40,994 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:40,994 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:40,994 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:40,995 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:40,995 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:41,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:41,008 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:41,069 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,069 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:41,070 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:41,070 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:41,070 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:41,070 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:41,070 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:41,078 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:07:41,078 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:07:41,089 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:41,090 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:41,132 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,132 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:41,272 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,293 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:41,293 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:41,297 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:07:41,297 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:07:41,319 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:41,322 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:41,326 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,327 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:41,398 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,400 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:41,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 20 [2018-01-21 06:07:41,400 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:41,400 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 06:07:41,401 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 06:07:41,401 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=239, Unknown=0, NotChecked=0, Total=380 [2018-01-21 06:07:41,401 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 14 states. [2018-01-21 06:07:41,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:41,435 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 06:07:41,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 06:07:41,435 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-01-21 06:07:41,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:41,436 INFO L225 Difference]: With dead ends: 32 [2018-01-21 06:07:41,436 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 06:07:41,437 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-21 06:07:41,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 06:07:41,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 06:07:41,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 06:07:41,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 06:07:41,441 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 06:07:41,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:41,441 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 06:07:41,441 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 06:07:41,441 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 06:07:41,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 06:07:41,442 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:41,442 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:41,442 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:41,442 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 06:07:41,442 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:41,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:41,443 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:41,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:41,443 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:41,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:41,457 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:41,528 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:41,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:41,528 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:41,528 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:41,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:41,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:41,533 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:07:41,534 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:41,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:41,539 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:41,540 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:41,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:41,546 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:41,547 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:41,605 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,605 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:41,820 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,841 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:41,841 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:41,844 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:07:41,844 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:41,848 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:41,849 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:41,853 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:41,862 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:41,868 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:41,871 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:41,875 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,875 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:41,927 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:41,929 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:41,929 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 06:07:41,929 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:41,929 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 06:07:41,930 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 06:07:41,930 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 06:07:41,930 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 16 states. [2018-01-21 06:07:41,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:41,961 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:07:41,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 06:07:41,961 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 22 [2018-01-21 06:07:41,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:41,962 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:07:41,962 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 06:07:41,962 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 06:07:41,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 06:07:41,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 06:07:41,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 06:07:41,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 06:07:41,965 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 06:07:41,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:41,965 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 06:07:41,965 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 06:07:41,966 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 06:07:41,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 06:07:41,966 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:41,966 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:41,966 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:41,966 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 06:07:41,966 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:41,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:41,967 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:41,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:41,967 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:41,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:41,978 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:42,060 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,061 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:42,061 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:42,061 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:42,061 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:42,061 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:42,061 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:42,066 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:07:42,066 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:07:42,073 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:42,074 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:42,076 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:42,077 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:42,078 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:42,079 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:42,124 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,124 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:42,264 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:42,285 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:42,288 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:07:42,288 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:07:42,298 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:42,305 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:42,313 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:42,321 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:42,327 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:42,330 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:42,335 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,335 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:42,411 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,413 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:42,413 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 06:07:42,413 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:42,413 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 06:07:42,414 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 06:07:42,414 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 06:07:42,414 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 18 states. [2018-01-21 06:07:42,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:42,475 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 06:07:42,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 06:07:42,476 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 23 [2018-01-21 06:07:42,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:42,477 INFO L225 Difference]: With dead ends: 34 [2018-01-21 06:07:42,477 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 06:07:42,478 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 06:07:42,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 06:07:42,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 06:07:42,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 06:07:42,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 06:07:42,481 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 06:07:42,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:42,482 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 06:07:42,482 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 06:07:42,482 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 06:07:42,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 06:07:42,483 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:42,483 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:42,483 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:42,483 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 06:07:42,483 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:42,484 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:42,484 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:42,484 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:42,485 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:42,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:42,496 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:42,616 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,616 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:42,616 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:42,617 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:42,617 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:42,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:42,617 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:42,622 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:42,622 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:07:42,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:42,631 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:42,679 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,680 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:42,868 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,888 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:42,888 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:42,891 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:42,892 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:07:42,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:42,910 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:42,915 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,915 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:42,975 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:42,976 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:42,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 06:07:42,976 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:42,977 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 06:07:42,977 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 06:07:42,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 06:07:42,977 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 20 states. [2018-01-21 06:07:43,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:43,011 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 06:07:43,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 06:07:43,011 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 24 [2018-01-21 06:07:43,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:43,012 INFO L225 Difference]: With dead ends: 35 [2018-01-21 06:07:43,012 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 06:07:43,012 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 06:07:43,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 06:07:43,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 06:07:43,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 06:07:43,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 06:07:43,016 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 06:07:43,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:43,017 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 06:07:43,017 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 06:07:43,017 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 06:07:43,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 06:07:43,018 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:43,018 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:43,018 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:43,018 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 06:07:43,018 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:43,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:43,019 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:43,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:43,019 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:43,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:43,031 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:43,139 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:43,139 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:43,139 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:43,139 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:43,139 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:43,139 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:43,139 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:43,148 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:07:43,149 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:43,156 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:43,159 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:43,160 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:43,162 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:43,252 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:43,252 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:43,537 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:43,557 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:43,557 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:43,560 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:07:43,560 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:43,569 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:43,577 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:43,584 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:43,587 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:43,591 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:43,592 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:43,675 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:43,677 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:43,678 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 06:07:43,678 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:43,678 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 06:07:43,678 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 06:07:43,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 06:07:43,679 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 22 states. [2018-01-21 06:07:43,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:43,712 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 06:07:43,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 06:07:43,713 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 25 [2018-01-21 06:07:43,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:43,714 INFO L225 Difference]: With dead ends: 36 [2018-01-21 06:07:43,714 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 06:07:43,714 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 06:07:43,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 06:07:43,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 06:07:43,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 06:07:43,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 06:07:43,718 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 06:07:43,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:43,719 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 06:07:43,719 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 06:07:43,719 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 06:07:43,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 06:07:43,720 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:43,720 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:43,720 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:43,720 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 06:07:43,720 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:43,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:43,721 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:43,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:43,721 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:43,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:43,730 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:43,841 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:43,841 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:43,841 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:43,841 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:43,841 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:43,841 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:43,841 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:43,855 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:07:43,855 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:07:43,863 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:43,871 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:43,872 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:43,873 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:43,874 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:43,875 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:43,876 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:43,877 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:43,960 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:43,960 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:44,180 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:44,200 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:44,200 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:44,203 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:07:44,203 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:07:44,212 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:44,219 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:44,227 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:44,236 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:44,244 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:44,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:44,259 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:44,262 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:44,266 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:44,267 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:44,336 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:44,337 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:44,337 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 06:07:44,337 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:44,337 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 06:07:44,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 06:07:44,338 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 06:07:44,338 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 24 states. [2018-01-21 06:07:44,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:44,371 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 06:07:44,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 06:07:44,371 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 26 [2018-01-21 06:07:44,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:44,372 INFO L225 Difference]: With dead ends: 37 [2018-01-21 06:07:44,372 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 06:07:44,373 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 06:07:44,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 06:07:44,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 06:07:44,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 06:07:44,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 06:07:44,375 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 06:07:44,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:44,375 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 06:07:44,375 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 06:07:44,375 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 06:07:44,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 06:07:44,376 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:44,376 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:44,376 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:44,376 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 06:07:44,377 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:44,377 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:44,378 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:44,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:44,378 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:44,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:44,387 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:44,528 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:44,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:44,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:44,528 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:44,528 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:44,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:44,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:44,533 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:07:44,533 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:07:44,545 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:44,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:44,627 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:44,628 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:44,862 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:44,882 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:44,882 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:44,885 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:07:44,886 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:07:44,911 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:44,914 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:44,920 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:44,921 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:44,997 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:44,998 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:44,998 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-21 06:07:44,998 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:44,999 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 06:07:44,999 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 06:07:44,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 06:07:44,999 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 26 states. [2018-01-21 06:07:45,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:45,025 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 06:07:45,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 06:07:45,025 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 27 [2018-01-21 06:07:45,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:45,026 INFO L225 Difference]: With dead ends: 38 [2018-01-21 06:07:45,026 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 06:07:45,027 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 06:07:45,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 06:07:45,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 06:07:45,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 06:07:45,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 06:07:45,029 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 06:07:45,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:45,030 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 06:07:45,030 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 06:07:45,030 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 06:07:45,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 06:07:45,030 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:45,030 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:45,030 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:45,031 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 06:07:45,031 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:45,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:45,031 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:45,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:45,031 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:45,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:45,040 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:45,201 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:45,201 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:45,202 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:45,202 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:45,202 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:45,202 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:45,202 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:45,209 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:07:45,209 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:45,213 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,214 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,219 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,219 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,221 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,224 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,225 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:45,227 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:45,301 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:45,301 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:45,575 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:45,596 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:45,596 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:45,599 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:07:45,599 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:45,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,606 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,611 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,621 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,626 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,635 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:45,643 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:45,645 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:45,650 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:45,650 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:45,736 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:45,738 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:45,738 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 06:07:45,738 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:45,738 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 06:07:45,739 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 06:07:45,739 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 06:07:45,739 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 28 states. [2018-01-21 06:07:45,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:45,784 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 06:07:45,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 06:07:45,785 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 28 [2018-01-21 06:07:45,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:45,786 INFO L225 Difference]: With dead ends: 39 [2018-01-21 06:07:45,786 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 06:07:45,787 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 06:07:45,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 06:07:45,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 06:07:45,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 06:07:45,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 06:07:45,790 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 06:07:45,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:45,791 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 06:07:45,791 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 06:07:45,791 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 06:07:45,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 06:07:45,792 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:45,792 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:45,792 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:45,792 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 06:07:45,792 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:45,793 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:45,793 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:45,793 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:45,793 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:45,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:45,802 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:45,947 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:45,947 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:45,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:45,948 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:45,948 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:45,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:45,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:45,956 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:07:45,956 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:07:45,963 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:45,965 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:45,967 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:45,968 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:45,969 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:45,971 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:45,972 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:45,973 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:45,974 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:46,077 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:46,078 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:46,469 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:46,501 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:46,501 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:46,504 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:07:46,504 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:07:46,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:46,524 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:46,532 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:46,540 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:46,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:46,558 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:46,568 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:46,575 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:46,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:46,584 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:46,585 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:46,696 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:46,697 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:46,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 06:07:46,698 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:46,698 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 06:07:46,698 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 06:07:46,699 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 06:07:46,699 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 30 states. [2018-01-21 06:07:46,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:46,755 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 06:07:46,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 06:07:46,755 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 29 [2018-01-21 06:07:46,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:46,756 INFO L225 Difference]: With dead ends: 40 [2018-01-21 06:07:46,757 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 06:07:46,757 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 86 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 06:07:46,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 06:07:46,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 06:07:46,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 06:07:46,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 06:07:46,762 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 06:07:46,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:46,762 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 06:07:46,762 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 06:07:46,763 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 06:07:46,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 06:07:46,763 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:46,763 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:46,764 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:46,764 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 06:07:46,764 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:46,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:46,765 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:46,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:46,765 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:46,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:46,775 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:46,932 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:46,932 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:46,932 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:46,932 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:46,932 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:46,932 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:46,932 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:46,938 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:46,938 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:07:46,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:46,950 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:47,054 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:47,054 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:47,458 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:47,490 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:47,490 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:47,499 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:47,500 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:07:47,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:47,525 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:47,529 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:47,530 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:47,634 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:47,636 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:47,636 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 47 [2018-01-21 06:07:47,636 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:47,636 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 06:07:47,637 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 06:07:47,637 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=762, Invalid=1400, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 06:07:47,638 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 32 states. [2018-01-21 06:07:47,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:47,676 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 06:07:47,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 06:07:47,677 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 30 [2018-01-21 06:07:47,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:47,677 INFO L225 Difference]: With dead ends: 41 [2018-01-21 06:07:47,677 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 06:07:47,678 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=795, Invalid=1461, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 06:07:47,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 06:07:47,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 06:07:47,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 06:07:47,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 06:07:47,681 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 06:07:47,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:47,681 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 06:07:47,681 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 06:07:47,681 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 06:07:47,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 06:07:47,681 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:47,681 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:47,681 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:47,682 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 06:07:47,682 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:47,682 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:47,682 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:47,682 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:47,682 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:47,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:47,689 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:47,880 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:47,880 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:47,880 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:47,880 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:47,881 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:47,881 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:47,881 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:47,892 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:07:47,892 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:47,899 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:47,908 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:47,916 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:47,917 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:48,214 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:48,214 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:48,645 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:48,665 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:48,665 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:48,668 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:07:48,668 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:48,678 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:48,688 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:48,696 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:48,699 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:48,704 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:48,710 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:48,814 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:48,816 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:48,816 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 50 [2018-01-21 06:07:48,817 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:48,817 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 06:07:48,817 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 06:07:48,818 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=1589, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 06:07:48,818 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 34 states. [2018-01-21 06:07:48,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:48,904 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 06:07:48,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 06:07:48,906 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 31 [2018-01-21 06:07:48,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:48,906 INFO L225 Difference]: With dead ends: 42 [2018-01-21 06:07:48,906 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 06:07:48,907 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 992 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=896, Invalid=1654, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 06:07:48,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 06:07:48,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 06:07:48,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 06:07:48,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 06:07:48,911 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 06:07:48,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:48,912 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 06:07:48,912 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 06:07:48,912 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 06:07:48,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 06:07:48,913 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:48,913 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:48,913 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:48,913 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 06:07:48,913 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:48,914 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:48,914 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:48,914 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:48,914 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:48,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:48,921 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:49,136 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:49,136 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:49,136 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:49,137 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:49,137 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:49,137 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:49,137 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:49,145 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:07:49,145 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:07:49,152 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,154 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,156 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,157 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,158 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,160 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:49,163 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:49,164 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:49,314 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:49,314 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:49,988 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:50,009 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:50,010 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:50,014 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:07:50,014 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:07:50,026 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,050 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,059 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,068 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,078 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,087 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,097 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:50,105 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:50,108 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:50,113 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:50,113 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:50,232 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:50,234 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:50,234 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 06:07:50,235 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:50,235 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 06:07:50,235 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 06:07:50,236 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 06:07:50,236 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 36 states. [2018-01-21 06:07:50,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:50,278 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 06:07:50,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 06:07:50,278 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 32 [2018-01-21 06:07:50,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:50,279 INFO L225 Difference]: With dead ends: 43 [2018-01-21 06:07:50,279 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 06:07:50,280 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 92 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 06:07:50,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 06:07:50,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 06:07:50,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 06:07:50,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 06:07:50,282 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 06:07:50,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:50,282 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 06:07:50,282 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 06:07:50,283 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 06:07:50,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 06:07:50,283 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:50,283 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:50,283 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:50,283 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 06:07:50,283 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:50,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:50,284 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:50,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:50,284 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:50,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:50,292 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:50,504 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:50,504 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:50,504 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:50,504 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:50,504 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:50,504 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:50,504 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:50,509 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:07:50,509 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:07:50,520 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:50,521 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:50,642 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:50,642 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:51,091 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:51,111 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:51,111 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:51,114 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:07:51,114 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:07:51,143 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:51,146 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:51,150 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:51,150 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:51,303 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:51,304 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:51,305 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 06:07:51,305 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:51,305 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 06:07:51,305 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 06:07:51,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 06:07:51,306 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 38 states. [2018-01-21 06:07:51,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:51,385 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 06:07:51,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 06:07:51,386 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 33 [2018-01-21 06:07:51,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:51,386 INFO L225 Difference]: With dead ends: 44 [2018-01-21 06:07:51,386 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 06:07:51,387 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 06:07:51,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 06:07:51,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 06:07:51,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 06:07:51,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 06:07:51,391 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 06:07:51,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:51,391 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 06:07:51,391 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 06:07:51,391 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 06:07:51,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 06:07:51,392 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:51,392 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:51,392 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:51,392 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 06:07:51,392 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:51,393 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:51,393 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:51,393 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:51,393 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:51,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:51,402 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:51,775 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:51,775 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:51,775 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:51,775 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:51,776 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:51,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:51,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:51,784 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:07:51,784 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:51,789 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,793 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,794 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,795 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,796 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,798 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,800 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,801 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,802 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,806 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:51,809 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:51,811 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:51,973 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:51,973 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:52,509 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:52,529 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:52,529 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:52,532 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:07:52,532 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:52,536 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,541 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,552 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,557 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,562 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,567 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,577 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:52,586 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:52,589 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:52,596 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:52,596 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:52,739 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:52,740 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:52,740 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 59 [2018-01-21 06:07:52,740 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:52,740 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 06:07:52,741 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 06:07:52,741 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1194, Invalid=2228, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 06:07:52,742 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 40 states. [2018-01-21 06:07:52,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:52,795 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 06:07:52,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 06:07:52,795 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 34 [2018-01-21 06:07:52,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:52,796 INFO L225 Difference]: With dead ends: 45 [2018-01-21 06:07:52,796 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 06:07:52,797 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1235, Invalid=2305, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 06:07:52,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 06:07:52,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 06:07:52,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 06:07:52,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 06:07:52,801 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 06:07:52,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:52,801 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 06:07:52,801 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 06:07:52,801 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 06:07:52,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 06:07:52,801 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:52,801 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:52,801 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:52,801 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 06:07:52,802 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:52,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:52,802 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:52,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:52,802 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:52,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:52,809 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:53,020 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:53,020 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:53,020 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:53,020 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:53,020 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:53,020 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:53,020 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:53,025 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:07:53,025 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:07:53,032 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,034 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,035 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,036 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,037 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,038 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,039 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,040 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,042 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,043 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:53,044 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:53,186 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:53,186 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:53,728 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:53,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:53,748 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:53,752 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:07:53,752 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:07:53,761 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,775 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,800 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,819 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,829 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,840 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:07:53,847 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:53,850 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:53,855 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:53,856 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:53,996 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:53,997 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:53,997 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 62 [2018-01-21 06:07:53,997 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:53,997 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 06:07:53,998 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 06:07:53,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1317, Invalid=2465, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 06:07:53,999 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 42 states. [2018-01-21 06:07:54,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:54,043 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 06:07:54,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 06:07:54,044 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 35 [2018-01-21 06:07:54,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:54,044 INFO L225 Difference]: With dead ends: 46 [2018-01-21 06:07:54,044 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 06:07:54,045 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 98 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1360, Invalid=2546, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 06:07:54,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 06:07:54,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 06:07:54,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 06:07:54,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 06:07:54,049 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 06:07:54,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:54,049 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 06:07:54,049 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 06:07:54,049 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 06:07:54,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 06:07:54,050 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:54,050 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:54,050 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:54,050 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 06:07:54,050 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:54,051 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:54,051 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:54,051 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:54,051 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:54,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:54,057 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:54,331 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:54,331 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:54,331 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:54,331 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:54,331 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:54,331 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:54,331 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:54,336 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:54,336 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:07:54,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:54,352 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:54,508 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:54,508 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:55,110 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:55,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:55,131 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:55,133 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:55,133 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:07:55,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:55,157 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:55,163 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:55,163 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:55,298 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:55,299 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:55,299 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 65 [2018-01-21 06:07:55,299 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:55,299 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 06:07:55,299 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 06:07:55,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=2714, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 06:07:55,300 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 44 states. [2018-01-21 06:07:55,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:55,341 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 06:07:55,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 06:07:55,341 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 36 [2018-01-21 06:07:55,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:55,342 INFO L225 Difference]: With dead ends: 47 [2018-01-21 06:07:55,342 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 06:07:55,342 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1727 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1491, Invalid=2799, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 06:07:55,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 06:07:55,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 06:07:55,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 06:07:55,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 06:07:55,345 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 06:07:55,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:55,345 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 06:07:55,345 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 06:07:55,345 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 06:07:55,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 06:07:55,346 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:55,346 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:55,346 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:55,346 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 06:07:55,346 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:55,346 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:55,347 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:07:55,347 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:55,347 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:55,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:55,355 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:55,572 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:55,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:55,600 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:55,600 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:55,601 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:55,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:55,601 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:55,606 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:07:55,606 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:55,614 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:55,622 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:55,624 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:55,633 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:55,820 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:55,821 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:56,445 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:56,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:56,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:56,468 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:07:56,468 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:07:56,476 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:56,487 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:07:56,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:56,500 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:56,505 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:56,505 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:56,653 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:56,654 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:56,654 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 68 [2018-01-21 06:07:56,654 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:56,654 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-21 06:07:56,654 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-21 06:07:56,655 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1583, Invalid=2973, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 06:07:56,655 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 46 states. [2018-01-21 06:07:56,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:56,695 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 06:07:56,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 06:07:56,696 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 37 [2018-01-21 06:07:56,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:56,696 INFO L225 Difference]: With dead ends: 48 [2018-01-21 06:07:56,696 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 06:07:56,697 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1916 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1630, Invalid=3062, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 06:07:56,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 06:07:56,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 06:07:56,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 06:07:56,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 06:07:56,699 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 06:07:56,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:56,700 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 06:07:56,700 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-21 06:07:56,700 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 06:07:56,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 06:07:56,700 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:56,700 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:56,700 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:56,701 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 06:07:56,701 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:56,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:56,701 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:56,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:56,702 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:56,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:56,711 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:56,960 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:56,960 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:56,960 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:56,960 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:56,961 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:56,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:56,961 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:56,965 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:07:56,966 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:07:56,972 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,974 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,975 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,976 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,977 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,978 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,979 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,980 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,981 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,982 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,983 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,984 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:56,984 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:56,986 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:57,163 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:57,163 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:57,825 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:57,852 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:57,852 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:57,856 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:07:57,856 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:07:57,864 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,871 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,879 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,887 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,895 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,904 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,913 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,933 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,945 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,956 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,968 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:07:57,977 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:57,980 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:57,986 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:57,986 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:58,140 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:58,141 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:58,142 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 71 [2018-01-21 06:07:58,142 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:58,142 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-21 06:07:58,142 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-21 06:07:58,143 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1726, Invalid=3244, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 06:07:58,143 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 48 states. [2018-01-21 06:07:58,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:58,207 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 06:07:58,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 06:07:58,207 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 38 [2018-01-21 06:07:58,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:58,208 INFO L225 Difference]: With dead ends: 49 [2018-01-21 06:07:58,208 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 06:07:58,208 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2136 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1775, Invalid=3337, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 06:07:58,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 06:07:58,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 06:07:58,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 06:07:58,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 06:07:58,212 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 06:07:58,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:58,212 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 06:07:58,212 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-21 06:07:58,212 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 06:07:58,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 06:07:58,213 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:58,213 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:58,213 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:58,213 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 06:07:58,213 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:58,214 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:58,214 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:58,214 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:58,214 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:58,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:58,222 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:07:58,460 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:58,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:58,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:07:58,461 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:07:58,461 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:07:58,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:58,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:07:58,466 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:07:58,466 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:07:58,478 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:58,479 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:58,676 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:58,677 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:59,384 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:59,404 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:07:59,404 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:07:59,407 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:07:59,408 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:07:59,441 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:07:59,445 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:07:59,450 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:59,450 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:07:59,676 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:07:59,677 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:07:59,677 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 74 [2018-01-21 06:07:59,677 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:07:59,678 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-21 06:07:59,678 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-21 06:07:59,678 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1875, Invalid=3527, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 06:07:59,678 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 50 states. [2018-01-21 06:07:59,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:07:59,762 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 06:07:59,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 06:07:59,762 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 39 [2018-01-21 06:07:59,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:07:59,763 INFO L225 Difference]: With dead ends: 50 [2018-01-21 06:07:59,763 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 06:07:59,764 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2368 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1926, Invalid=3624, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 06:07:59,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 06:07:59,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 06:07:59,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 06:07:59,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 06:07:59,768 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 06:07:59,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:07:59,769 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 06:07:59,769 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-21 06:07:59,769 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 06:07:59,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 06:07:59,769 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:07:59,769 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:07:59,770 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:07:59,770 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 06:07:59,770 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:07:59,771 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:59,771 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:07:59,771 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:07:59,771 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:07:59,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:07:59,781 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:00,045 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:00,045 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:00,045 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:00,045 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:00,045 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:00,045 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:00,045 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:00,050 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:00,050 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:00,054 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,055 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,056 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,056 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,057 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,058 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,059 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,059 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,060 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,061 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,062 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,063 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,066 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:00,067 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:00,069 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:00,280 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:00,280 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:01,019 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:01,039 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:01,039 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:01,042 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:01,042 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:01,047 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,049 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,052 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,056 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,060 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,065 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,070 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,075 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,081 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,088 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,094 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,101 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,113 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:01,123 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:01,127 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:01,132 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:01,132 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:01,319 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:01,320 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:01,320 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 77 [2018-01-21 06:08:01,321 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:01,321 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-21 06:08:01,321 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-21 06:08:01,322 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2030, Invalid=3822, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 06:08:01,322 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 52 states. [2018-01-21 06:08:01,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:01,432 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 06:08:01,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 06:08:01,432 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 40 [2018-01-21 06:08:01,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:01,433 INFO L225 Difference]: With dead ends: 51 [2018-01-21 06:08:01,433 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 06:08:01,433 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2612 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2083, Invalid=3923, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 06:08:01,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 06:08:01,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 06:08:01,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 06:08:01,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 06:08:01,435 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 06:08:01,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:01,436 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 06:08:01,436 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-21 06:08:01,436 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 06:08:01,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 06:08:01,436 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:01,437 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:01,437 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:01,437 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 06:08:01,437 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:01,437 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:01,437 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:01,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:01,438 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:01,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:01,445 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:01,717 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:01,717 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:01,717 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:01,717 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:01,718 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:01,718 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:01,718 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:01,723 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:01,723 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:01,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,730 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,731 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,732 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,733 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,734 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,735 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,736 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,737 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,738 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,739 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,741 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,742 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:01,742 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:01,744 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:01,967 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:01,968 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:02,753 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:02,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:02,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:02,776 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:02,776 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:02,785 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,800 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,835 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,867 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,879 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,892 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,905 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:02,914 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:02,918 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:02,923 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:02,924 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:03,111 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:03,112 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:03,112 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 80 [2018-01-21 06:08:03,113 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:03,113 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-21 06:08:03,113 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-21 06:08:03,114 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2191, Invalid=4129, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 06:08:03,114 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 54 states. [2018-01-21 06:08:03,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:03,215 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 06:08:03,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 06:08:03,216 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 41 [2018-01-21 06:08:03,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:03,216 INFO L225 Difference]: With dead ends: 52 [2018-01-21 06:08:03,216 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 06:08:03,217 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 110 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2868 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2246, Invalid=4234, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 06:08:03,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 06:08:03,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 06:08:03,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 06:08:03,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 06:08:03,219 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 06:08:03,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:03,220 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 06:08:03,220 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-21 06:08:03,220 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 06:08:03,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 06:08:03,221 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:03,221 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:03,221 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:03,221 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 06:08:03,221 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:03,222 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:03,222 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:03,222 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:03,222 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:03,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:03,230 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:03,546 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:03,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:03,546 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:03,546 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:03,546 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:03,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:03,546 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:03,551 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:03,551 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:03,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:03,565 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:03,803 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:03,803 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:04,622 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:04,642 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:04,642 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:04,644 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:04,645 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:04,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:04,674 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:04,683 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:04,683 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:04,890 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:04,891 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:04,891 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 83 [2018-01-21 06:08:04,891 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:04,891 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-21 06:08:04,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-21 06:08:04,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2358, Invalid=4448, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 06:08:04,892 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 56 states. [2018-01-21 06:08:04,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:04,957 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 06:08:04,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 06:08:04,958 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 42 [2018-01-21 06:08:04,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:04,958 INFO L225 Difference]: With dead ends: 53 [2018-01-21 06:08:04,958 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 06:08:04,959 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3136 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2415, Invalid=4557, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 06:08:04,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 06:08:04,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 06:08:04,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 06:08:04,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 06:08:04,961 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 06:08:04,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:04,961 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 06:08:04,962 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-21 06:08:04,962 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 06:08:04,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 06:08:04,962 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:04,962 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:04,962 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:04,962 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 06:08:04,962 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:04,963 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:04,963 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:04,963 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:04,963 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:04,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:04,973 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:05,349 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:05,350 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:05,350 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:05,350 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:05,350 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:05,350 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:05,350 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:05,360 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:05,360 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:05,367 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:05,377 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:05,378 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:05,380 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:05,740 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:05,740 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:06,611 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:06,631 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:06,632 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:06,634 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:06,634 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:06,643 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:06,656 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:06,668 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:06,672 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:06,677 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:06,678 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:06,890 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:06,891 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:06,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 86 [2018-01-21 06:08:06,892 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:06,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-21 06:08:06,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-21 06:08:06,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2531, Invalid=4779, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 06:08:06,893 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 58 states. [2018-01-21 06:08:06,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:06,965 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 06:08:06,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 06:08:06,965 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 43 [2018-01-21 06:08:06,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:06,966 INFO L225 Difference]: With dead ends: 54 [2018-01-21 06:08:06,966 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 06:08:06,966 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3416 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2590, Invalid=4892, Unknown=0, NotChecked=0, Total=7482 [2018-01-21 06:08:06,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 06:08:06,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 06:08:06,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 06:08:06,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 06:08:06,968 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 06:08:06,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:06,969 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 06:08:06,969 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-21 06:08:06,969 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 06:08:06,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 06:08:06,969 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:06,969 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:06,969 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:06,969 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 06:08:06,970 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:06,970 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:06,970 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:06,970 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:06,970 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:06,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:06,978 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:07,371 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:07,372 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:07,372 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:07,372 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:07,372 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:07,372 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:07,372 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:07,377 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:07,377 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:07,384 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,385 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,387 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,389 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,391 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,392 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,394 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,395 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,396 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,397 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,399 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:07,399 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:07,401 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:07,665 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:07,665 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:08,577 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:08,597 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:08,597 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:08,600 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:08,600 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:08,611 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,619 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,627 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,635 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,643 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,652 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,662 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,672 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,683 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,705 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,730 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,742 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,755 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:08,765 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:08,769 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:08,775 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:08,775 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:08,998 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:08,999 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:08,999 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 89 [2018-01-21 06:08:08,999 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:09,000 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-21 06:08:09,000 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-21 06:08:09,000 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2710, Invalid=5122, Unknown=0, NotChecked=0, Total=7832 [2018-01-21 06:08:09,000 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 60 states. [2018-01-21 06:08:09,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:09,057 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 06:08:09,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 06:08:09,057 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 44 [2018-01-21 06:08:09,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:09,058 INFO L225 Difference]: With dead ends: 55 [2018-01-21 06:08:09,058 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 06:08:09,058 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3708 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2771, Invalid=5239, Unknown=0, NotChecked=0, Total=8010 [2018-01-21 06:08:09,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 06:08:09,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 06:08:09,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 06:08:09,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 06:08:09,061 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 06:08:09,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:09,061 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 06:08:09,061 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-21 06:08:09,061 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 06:08:09,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 06:08:09,062 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:09,062 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:09,062 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:09,062 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 06:08:09,062 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:09,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:09,063 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:09,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:09,063 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:09,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:09,074 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:09,413 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:09,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:09,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:09,414 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:09,414 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:09,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:09,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:09,421 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:09,422 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:09,436 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:09,437 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:09,720 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:09,720 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:10,684 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:10,703 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:10,704 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:10,707 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:10,707 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:10,744 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:10,747 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:10,753 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:10,753 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:10,974 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:10,975 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:10,975 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 92 [2018-01-21 06:08:10,975 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:10,976 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-21 06:08:10,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-21 06:08:10,976 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2895, Invalid=5477, Unknown=0, NotChecked=0, Total=8372 [2018-01-21 06:08:10,976 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 62 states. [2018-01-21 06:08:11,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:11,037 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 06:08:11,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 06:08:11,037 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 45 [2018-01-21 06:08:11,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:11,038 INFO L225 Difference]: With dead ends: 56 [2018-01-21 06:08:11,038 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 06:08:11,038 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4012 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2958, Invalid=5598, Unknown=0, NotChecked=0, Total=8556 [2018-01-21 06:08:11,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 06:08:11,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 06:08:11,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 06:08:11,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 06:08:11,040 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 06:08:11,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:11,041 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 06:08:11,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-21 06:08:11,041 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 06:08:11,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 06:08:11,041 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:11,041 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:11,041 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:11,041 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 06:08:11,041 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:11,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:11,042 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:11,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:11,042 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:11,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:11,052 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:11,425 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:11,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:11,425 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:11,425 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:11,425 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:11,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:11,425 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:11,430 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:11,430 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:11,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,441 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,442 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,449 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:11,450 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:11,452 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:11,761 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:11,762 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:12,767 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:12,787 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:12,787 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:12,791 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:12,791 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:12,796 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,798 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,803 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,809 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,815 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,822 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,829 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,846 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,854 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,861 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,876 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,884 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,893 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,908 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:12,926 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:12,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:12,941 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:12,941 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:13,203 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:13,204 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:13,204 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 95 [2018-01-21 06:08:13,204 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:13,204 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-21 06:08:13,205 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-21 06:08:13,205 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3086, Invalid=5844, Unknown=0, NotChecked=0, Total=8930 [2018-01-21 06:08:13,205 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 64 states. [2018-01-21 06:08:13,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:13,274 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 06:08:13,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 06:08:13,274 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 46 [2018-01-21 06:08:13,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:13,275 INFO L225 Difference]: With dead ends: 57 [2018-01-21 06:08:13,275 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 06:08:13,276 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=3151, Invalid=5969, Unknown=0, NotChecked=0, Total=9120 [2018-01-21 06:08:13,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 06:08:13,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 06:08:13,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 06:08:13,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 06:08:13,278 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 06:08:13,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:13,278 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 06:08:13,278 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-21 06:08:13,278 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 06:08:13,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 06:08:13,278 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:13,278 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:13,278 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:13,279 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 06:08:13,279 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:13,279 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:13,279 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:13,279 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:13,279 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:13,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:13,290 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:13,686 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:13,686 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:13,686 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:13,686 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:13,686 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:13,686 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:13,686 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:13,691 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:13,691 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:13,697 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,699 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,700 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,701 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,702 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,704 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,705 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,706 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,707 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,708 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,710 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,711 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,712 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,713 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,714 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:13,715 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:13,717 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:14,035 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:14,035 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:15,087 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:15,107 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:15,107 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:15,110 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:15,110 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:15,119 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,126 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,133 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,140 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,149 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,157 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,166 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,175 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,185 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,195 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,206 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,217 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,229 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,241 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,254 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,267 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:15,277 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:15,281 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:15,287 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:15,287 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:15,544 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:15,545 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:15,545 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 98 [2018-01-21 06:08:15,546 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:15,546 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-21 06:08:15,546 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-21 06:08:15,546 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3283, Invalid=6223, Unknown=0, NotChecked=0, Total=9506 [2018-01-21 06:08:15,547 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 66 states. [2018-01-21 06:08:15,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:15,604 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 06:08:15,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 06:08:15,604 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 47 [2018-01-21 06:08:15,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:15,604 INFO L225 Difference]: With dead ends: 58 [2018-01-21 06:08:15,604 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 06:08:15,605 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4656 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=3350, Invalid=6352, Unknown=0, NotChecked=0, Total=9702 [2018-01-21 06:08:15,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 06:08:15,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 06:08:15,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 06:08:15,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 06:08:15,607 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 06:08:15,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:15,607 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 06:08:15,607 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-21 06:08:15,607 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 06:08:15,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 06:08:15,608 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:15,608 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:15,608 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:15,608 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 06:08:15,608 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:15,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:15,609 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:15,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:15,609 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:15,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:15,618 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:16,027 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:16,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:16,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:16,028 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:16,028 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:16,028 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:16,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:16,033 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:16,033 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:16,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:16,048 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:16,677 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:16,677 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:17,794 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:17,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:17,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:17,817 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:17,817 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:17,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:17,853 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:17,859 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:17,859 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:18,116 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:18,117 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:18,117 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 101 [2018-01-21 06:08:18,117 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:18,117 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-21 06:08:18,118 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-21 06:08:18,118 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3486, Invalid=6614, Unknown=0, NotChecked=0, Total=10100 [2018-01-21 06:08:18,118 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 68 states. [2018-01-21 06:08:18,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:18,209 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 06:08:18,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 06:08:18,209 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 48 [2018-01-21 06:08:18,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:18,210 INFO L225 Difference]: With dead ends: 59 [2018-01-21 06:08:18,210 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 06:08:18,211 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4996 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3555, Invalid=6747, Unknown=0, NotChecked=0, Total=10302 [2018-01-21 06:08:18,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 06:08:18,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 06:08:18,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 06:08:18,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 06:08:18,213 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 06:08:18,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:18,213 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 06:08:18,213 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-21 06:08:18,213 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 06:08:18,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 06:08:18,214 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:18,214 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:18,214 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:18,214 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 06:08:18,214 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:18,215 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:18,215 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:18,215 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:18,215 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:18,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:18,223 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:18,798 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:18,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:18,799 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:18,799 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:18,799 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:18,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:18,799 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:18,804 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:18,804 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:18,811 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:18,817 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:18,819 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:18,820 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:19,184 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:19,184 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:20,338 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:20,357 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:20,357 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:20,360 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:20,360 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:20,370 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:20,383 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:20,396 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:20,400 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:20,406 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:20,407 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:20,683 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:20,684 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:20,684 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 104 [2018-01-21 06:08:20,684 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:20,685 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-21 06:08:20,685 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-21 06:08:20,686 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3695, Invalid=7017, Unknown=0, NotChecked=0, Total=10712 [2018-01-21 06:08:20,686 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 70 states. [2018-01-21 06:08:20,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:20,798 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 06:08:20,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 06:08:20,799 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 49 [2018-01-21 06:08:20,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:20,799 INFO L225 Difference]: With dead ends: 60 [2018-01-21 06:08:20,799 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 06:08:20,800 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5348 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3766, Invalid=7154, Unknown=0, NotChecked=0, Total=10920 [2018-01-21 06:08:20,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 06:08:20,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 06:08:20,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 06:08:20,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 06:08:20,802 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 06:08:20,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:20,803 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 06:08:20,803 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-21 06:08:20,803 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 06:08:20,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 06:08:20,803 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:20,803 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:20,804 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:20,804 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 06:08:20,804 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:20,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:20,804 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:20,805 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:20,805 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:20,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:20,813 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:21,332 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:21,332 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:21,332 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:21,332 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:21,333 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:21,333 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:21,333 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:21,339 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:21,339 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:21,346 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,349 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,350 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,351 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,352 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,353 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,354 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,355 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,356 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,358 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,359 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,360 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,361 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,362 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,364 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:21,365 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:21,366 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:21,746 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:21,746 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:22,945 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:22,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:22,965 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:22,968 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:22,968 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:22,978 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:22,984 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:22,992 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,000 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,008 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,017 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,026 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,056 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,067 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,079 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,091 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,103 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,115 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,129 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,143 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,157 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:23,167 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:23,171 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:23,177 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:23,178 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:23,462 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:23,463 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:23,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 107 [2018-01-21 06:08:23,463 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:23,464 INFO L409 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-01-21 06:08:23,464 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-01-21 06:08:23,464 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3910, Invalid=7432, Unknown=0, NotChecked=0, Total=11342 [2018-01-21 06:08:23,464 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 72 states. [2018-01-21 06:08:23,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:23,535 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 06:08:23,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 06:08:23,535 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 50 [2018-01-21 06:08:23,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:23,535 INFO L225 Difference]: With dead ends: 61 [2018-01-21 06:08:23,536 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 06:08:23,536 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 128 SyntacticMatches, 2 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5712 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3983, Invalid=7573, Unknown=0, NotChecked=0, Total=11556 [2018-01-21 06:08:23,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 06:08:23,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 06:08:23,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 06:08:23,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 06:08:23,539 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 06:08:23,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:23,539 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 06:08:23,539 INFO L433 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-01-21 06:08:23,539 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 06:08:23,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 06:08:23,540 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:23,540 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:23,540 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:23,540 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 06:08:23,540 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:23,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:23,541 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:23,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:23,541 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:23,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:23,550 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:24,024 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:24,024 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:24,024 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:24,024 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:24,024 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:24,024 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:24,024 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:24,029 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:24,029 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:24,044 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:24,046 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:24,444 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:24,444 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:25,722 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:25,742 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:25,742 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:25,745 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:25,745 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:25,790 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:25,794 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:25,801 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:25,801 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:26,170 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:26,171 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:26,171 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 110 [2018-01-21 06:08:26,171 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:26,172 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-21 06:08:26,172 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-21 06:08:26,173 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4131, Invalid=7859, Unknown=0, NotChecked=0, Total=11990 [2018-01-21 06:08:26,173 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 74 states. [2018-01-21 06:08:26,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:26,273 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 06:08:26,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 06:08:26,274 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 51 [2018-01-21 06:08:26,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:26,274 INFO L225 Difference]: With dead ends: 62 [2018-01-21 06:08:26,274 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 06:08:26,275 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6088 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=4206, Invalid=8004, Unknown=0, NotChecked=0, Total=12210 [2018-01-21 06:08:26,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 06:08:26,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 06:08:26,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 06:08:26,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 06:08:26,278 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 06:08:26,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:26,278 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 06:08:26,278 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-21 06:08:26,278 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 06:08:26,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 06:08:26,279 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:26,279 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:26,279 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:26,279 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 06:08:26,279 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:26,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:26,280 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:26,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:26,280 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:26,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:26,289 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:26,960 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:26,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:26,961 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:26,961 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:26,961 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:26,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:26,961 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:26,966 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:26,966 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:26,970 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,970 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,971 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,972 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,973 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,973 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,974 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,975 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,976 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,977 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,977 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,978 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,979 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,980 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,981 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,982 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,983 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,984 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,988 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:26,989 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:26,990 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:27,422 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:27,422 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:28,723 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:28,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:28,743 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:28,745 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:28,746 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:28,750 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,754 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,758 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,762 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,771 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,776 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,782 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,787 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,794 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,800 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,807 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,815 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,823 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,831 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,849 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:28,875 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:28,879 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:28,886 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:28,886 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:29,197 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:29,198 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:29,198 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 113 [2018-01-21 06:08:29,198 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:29,199 INFO L409 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-01-21 06:08:29,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-01-21 06:08:29,200 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4358, Invalid=8298, Unknown=0, NotChecked=0, Total=12656 [2018-01-21 06:08:29,200 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 76 states. [2018-01-21 06:08:29,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:29,276 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 06:08:29,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 06:08:29,277 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 52 [2018-01-21 06:08:29,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:29,277 INFO L225 Difference]: With dead ends: 63 [2018-01-21 06:08:29,277 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 06:08:29,278 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6476 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=4435, Invalid=8447, Unknown=0, NotChecked=0, Total=12882 [2018-01-21 06:08:29,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 06:08:29,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 06:08:29,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 06:08:29,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 06:08:29,281 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 06:08:29,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:29,281 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 06:08:29,281 INFO L433 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-01-21 06:08:29,281 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 06:08:29,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 06:08:29,282 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:29,282 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:29,282 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:29,282 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 06:08:29,282 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:29,283 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:29,283 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:29,283 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:29,283 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:29,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:29,297 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:29,833 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:29,833 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:29,833 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:29,833 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:29,834 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:29,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:29,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:29,838 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:29,838 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:29,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,848 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,850 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,851 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,854 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,855 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,858 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,859 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,861 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,863 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,864 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,866 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:29,866 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:29,868 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:30,313 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:30,313 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:31,668 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:31,688 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:31,688 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:31,691 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:31,691 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:31,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,713 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,724 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,734 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,743 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,752 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,762 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,771 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,782 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,803 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,835 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,866 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,879 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,892 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,906 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,920 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,935 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:31,946 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:31,950 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:31,957 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:31,957 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:32,269 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:32,270 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:32,270 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 116 [2018-01-21 06:08:32,270 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:32,271 INFO L409 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-01-21 06:08:32,271 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-01-21 06:08:32,271 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4591, Invalid=8749, Unknown=0, NotChecked=0, Total=13340 [2018-01-21 06:08:32,272 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 78 states. [2018-01-21 06:08:32,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:32,351 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 06:08:32,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 06:08:32,351 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 53 [2018-01-21 06:08:32,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:32,352 INFO L225 Difference]: With dead ends: 64 [2018-01-21 06:08:32,352 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 06:08:32,353 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6876 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=4670, Invalid=8902, Unknown=0, NotChecked=0, Total=13572 [2018-01-21 06:08:32,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. Received shutdown request... [2018-01-21 06:08:32,354 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:08:32,356 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:08:32,356 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:08:32,356 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:08:32,356 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:08:32,356 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:08:32,356 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:08:32,356 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:08:32,356 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 06:08:32,356 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:08:32,357 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:08:32,357 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:08:32,357 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 06:08:32 BoogieIcfgContainer [2018-01-21 06:08:32,358 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 06:08:32,358 INFO L168 Benchmark]: Toolchain (without parser) took 54727.17 ms. Allocated memory was 303.0 MB in the beginning and 836.8 MB in the end (delta: 533.7 MB). Free memory was 263.9 MB in the beginning and 562.0 MB in the end (delta: -298.0 MB). Peak memory consumption was 235.7 MB. Max. memory is 5.3 GB. [2018-01-21 06:08:32,359 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 303.0 MB. Free memory is still 268.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 06:08:32,359 INFO L168 Benchmark]: CACSL2BoogieTranslator took 163.10 ms. Allocated memory is still 303.0 MB. Free memory was 263.0 MB in the beginning and 255.8 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-21 06:08:32,360 INFO L168 Benchmark]: Boogie Preprocessor took 27.32 ms. Allocated memory is still 303.0 MB. Free memory was 255.8 MB in the beginning and 253.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 06:08:32,360 INFO L168 Benchmark]: RCFGBuilder took 165.99 ms. Allocated memory is still 303.0 MB. Free memory was 253.8 MB in the beginning and 241.8 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-21 06:08:32,360 INFO L168 Benchmark]: TraceAbstraction took 54363.90 ms. Allocated memory was 303.0 MB in the beginning and 836.8 MB in the end (delta: 533.7 MB). Free memory was 241.8 MB in the beginning and 562.0 MB in the end (delta: -320.1 MB). Peak memory consumption was 213.6 MB. Max. memory is 5.3 GB. [2018-01-21 06:08:32,362 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 303.0 MB. Free memory is still 268.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 163.10 ms. Allocated memory is still 303.0 MB. Free memory was 263.0 MB in the beginning and 255.8 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.32 ms. Allocated memory is still 303.0 MB. Free memory was 255.8 MB in the beginning and 253.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 165.99 ms. Allocated memory is still 303.0 MB. Free memory was 253.8 MB in the beginning and 241.8 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 54363.90 ms. Allocated memory was 303.0 MB in the beginning and 836.8 MB in the end (delta: 533.7 MB). Free memory was 241.8 MB in the beginning and 562.0 MB in the end (delta: -320.1 MB). Peak memory consumption was 213.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.193762 RENAME_VARIABLES(MILLISECONDS) : 0.071843 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.145560 PROJECTAWAY(MILLISECONDS) : 0.091225 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.289240 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.102380 ADD_EQUALITY(MILLISECONDS) : 0.035386 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.011781 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while executing MinimizeSevpa. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 54.1s OverallTime, 37 OverallIterations, 36 TraceHistogramMax, 2.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 595 SDtfs, 117 SDslu, 12907 SDs, 0 SdLazy, 2847 SolverSat, 135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5891 GetRequests, 3566 SyntacticMatches, 72 SemanticMatches, 2253 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83344 ImplicationChecksByTransitivity, 32.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=54occurred in iteration=36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 37 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.0s SatisfiabilityAnalysisTime, 45.9s InterpolantComputationTime, 3851 NumberOfCodeBlocks, 3851 NumberOfCodeBlocksAsserted, 499 NumberOfCheckSat, 6226 ConstructedInterpolants, 0 QuantifiedInterpolants, 1009008 SizeOfPredicates, 72 NumberOfNonLiveVariables, 8388 ConjunctsInSsa, 1548 ConjunctsInUnsatCore, 181 InterpolantComputations, 1 PerfectInterpolantSequences, 0/42180 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_06-08-32-371.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_06-08-32-371.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_06-08-32-371.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_06-08-32-371.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_06-08-32-371.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_06-08-32-371.csv Completed graceful shutdown