java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 06:02:36,636 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 06:02:36,637 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 06:02:36,653 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 06:02:36,653 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 06:02:36,654 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 06:02:36,655 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 06:02:36,657 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 06:02:36,659 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 06:02:36,659 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 06:02:36,660 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 06:02:36,661 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 06:02:36,662 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 06:02:36,663 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 06:02:36,664 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 06:02:36,666 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 06:02:36,668 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 06:02:36,670 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 06:02:36,672 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 06:02:36,673 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 06:02:36,675 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 06:02:36,676 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 06:02:36,676 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 06:02:36,677 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 06:02:36,678 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 06:02:36,679 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 06:02:36,679 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 06:02:36,680 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 06:02:36,680 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 06:02:36,680 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 06:02:36,681 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 06:02:36,681 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf [2018-01-21 06:02:36,690 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 06:02:36,690 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 06:02:36,691 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 06:02:36,691 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 06:02:36,691 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 06:02:36,692 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 06:02:36,692 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 06:02:36,692 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 06:02:36,692 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 06:02:36,693 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 06:02:36,693 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 06:02:36,693 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 06:02:36,693 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 06:02:36,693 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 06:02:36,693 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 06:02:36,693 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 06:02:36,694 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 06:02:36,694 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 06:02:36,694 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 06:02:36,694 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 06:02:36,694 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 06:02:36,694 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 06:02:36,695 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 06:02:36,695 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 06:02:36,695 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 06:02:36,695 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 06:02:36,695 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:02:36,695 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 06:02:36,696 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 06:02:36,697 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 06:02:36,697 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 06:02:36,730 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 06:02:36,740 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 06:02:36,743 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 06:02:36,744 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 06:02:36,745 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 06:02:36,745 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_false-valid-deref-write.c [2018-01-21 06:02:36,856 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 06:02:36,860 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 06:02:36,861 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 06:02:36,861 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 06:02:36,866 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 06:02:36,867 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:02:36" (1/1) ... [2018-01-21 06:02:36,870 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8d55d51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:36, skipping insertion in model container [2018-01-21 06:02:36,870 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:02:36" (1/1) ... [2018-01-21 06:02:36,883 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:02:36,897 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:02:37,001 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:02:37,015 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:02:37,020 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37 WrapperNode [2018-01-21 06:02:37,020 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 06:02:37,021 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 06:02:37,021 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 06:02:37,021 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 06:02:37,031 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (1/1) ... [2018-01-21 06:02:37,032 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (1/1) ... [2018-01-21 06:02:37,039 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (1/1) ... [2018-01-21 06:02:37,039 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (1/1) ... [2018-01-21 06:02:37,042 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (1/1) ... [2018-01-21 06:02:37,044 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (1/1) ... [2018-01-21 06:02:37,045 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (1/1) ... [2018-01-21 06:02:37,047 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 06:02:37,048 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 06:02:37,048 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 06:02:37,048 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 06:02:37,050 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:02:37,098 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 06:02:37,098 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 06:02:37,099 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 06:02:37,099 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 06:02:37,099 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 06:02:37,099 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 06:02:37,099 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 06:02:37,099 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 06:02:37,100 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 06:02:37,100 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 06:02:37,100 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 06:02:37,100 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 06:02:37,232 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 06:02:37,233 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:02:37 BoogieIcfgContainer [2018-01-21 06:02:37,233 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 06:02:37,234 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 06:02:37,234 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 06:02:37,236 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 06:02:37,237 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 06:02:36" (1/3) ... [2018-01-21 06:02:37,238 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:02:37, skipping insertion in model container [2018-01-21 06:02:37,238 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:02:37" (2/3) ... [2018-01-21 06:02:37,238 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:02:37, skipping insertion in model container [2018-01-21 06:02:37,239 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:02:37" (3/3) ... [2018-01-21 06:02:37,241 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero2_false-valid-deref-write.c [2018-01-21 06:02:37,250 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 06:02:37,257 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 06:02:37,298 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:02:37,298 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:02:37,299 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:02:37,299 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:02:37,299 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:02:37,299 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:02:37,299 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:02:37,299 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 06:02:37,300 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:02:37,315 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:02:37,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 06:02:37,320 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:37,320 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 06:02:37,320 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 06:02:37,324 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 06:02:37,326 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:37,366 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:37,366 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:37,366 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:37,367 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:37,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:02:37,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:02:37,430 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 06:02:37,438 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 06:02:37,444 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:02:37,445 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:02:37,445 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:02:37,445 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:02:37,445 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:02:37,445 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:02:37,445 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:02:37,445 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 06:02:37,446 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:02:37,447 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:02:37,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 06:02:37,448 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:37,448 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:37,448 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:37,449 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 06:02:37,449 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:37,450 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:37,450 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:37,450 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:37,451 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:37,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:37,483 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:37,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:37,561 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 06:02:37,561 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 06:02:37,561 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 06:02:37,563 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 06:02:37,574 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 06:02:37,575 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 06:02:37,577 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 06:02:37,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:37,633 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:02:37,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 06:02:37,636 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 06:02:37,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:37,647 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:02:37,648 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 06:02:37,651 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 06:02:37,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 06:02:37,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 06:02:37,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 06:02:37,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 06:02:37,743 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 06:02:37,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:37,743 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 06:02:37,744 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 06:02:37,744 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 06:02:37,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 06:02:37,744 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:37,744 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:37,744 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:37,745 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 06:02:37,745 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:37,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:37,746 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:37,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:37,746 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:37,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:37,757 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:37,811 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:37,811 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:37,811 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:37,812 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 06:02:37,814 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 06:02:37,858 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 06:02:37,858 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 06:02:38,612 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 06:02:38,614 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 06:02:38,636 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 06:02:38,636 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:38,636 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:38,651 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:38,651 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:02:38,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:38,679 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:38,702 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:38,703 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:38,858 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:38,891 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:38,891 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:38,895 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:38,895 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:02:38,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:38,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:38,927 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:38,927 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:39,075 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,076 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:39,077 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 06:02:39,077 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:39,078 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 06:02:39,078 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 06:02:39,078 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 06:02:39,079 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 06:02:39,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:39,109 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 06:02:39,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 06:02:39,111 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 06:02:39,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:39,112 INFO L225 Difference]: With dead ends: 29 [2018-01-21 06:02:39,112 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 06:02:39,113 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 06:02:39,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 06:02:39,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 06:02:39,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 06:02:39,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 06:02:39,117 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 06:02:39,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:39,117 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 06:02:39,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 06:02:39,118 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 06:02:39,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 06:02:39,118 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:39,119 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:39,119 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:39,119 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 06:02:39,119 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:39,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:39,121 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:39,121 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:39,121 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:39,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:39,135 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:39,180 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,180 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:39,181 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:39,181 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:39,181 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:39,181 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:39,181 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:39,190 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:02:39,190 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:39,206 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:39,209 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:39,210 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:39,212 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:39,231 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,232 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:39,362 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:39,386 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:39,389 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:02:39,389 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:39,400 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:39,408 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:39,413 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:39,417 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:39,420 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,420 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:39,505 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,508 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:39,509 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 06:02:39,509 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:39,509 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 06:02:39,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 06:02:39,510 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 06:02:39,510 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 06:02:39,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:39,560 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 06:02:39,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 06:02:39,561 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 06:02:39,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:39,561 INFO L225 Difference]: With dead ends: 30 [2018-01-21 06:02:39,562 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 06:02:39,562 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 06:02:39,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 06:02:39,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 06:02:39,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 06:02:39,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 06:02:39,566 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 06:02:39,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:39,566 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 06:02:39,567 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 06:02:39,567 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 06:02:39,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 06:02:39,567 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:39,568 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:39,568 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:39,568 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 06:02:39,568 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:39,569 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:39,570 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:39,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:39,570 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:39,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:39,584 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:39,659 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,659 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:39,659 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:39,659 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:39,660 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:39,660 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:39,660 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:39,666 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:02:39,667 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:02:39,678 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:39,680 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:39,681 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:39,682 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:39,683 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:39,708 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,708 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:39,842 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,863 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:39,863 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:39,866 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:02:39,866 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:02:39,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:39,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:39,891 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:39,896 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:39,900 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:39,906 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:39,906 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:39,958 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (7)] Exception during sending of exit command (exit): Broken pipe [2018-01-21 06:02:39,962 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:39,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 06:02:39,962 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:39,962 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 06:02:39,963 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 06:02:39,963 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 06:02:39,963 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 06:02:39,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:39,982 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 06:02:39,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 06:02:39,983 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 06:02:39,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:39,983 INFO L225 Difference]: With dead ends: 31 [2018-01-21 06:02:39,984 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 06:02:39,984 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 06:02:39,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 06:02:39,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 06:02:39,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 06:02:39,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 06:02:39,987 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 06:02:39,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:39,987 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 06:02:39,987 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 06:02:39,987 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 06:02:39,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 06:02:39,988 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:39,988 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:39,988 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:39,988 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 06:02:39,988 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:39,989 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:39,989 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:39,989 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:39,990 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:39,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:40,000 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:40,052 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,052 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:40,052 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:40,052 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:40,053 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:40,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:40,053 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:40,059 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:02:40,059 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:02:40,069 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:40,071 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:40,086 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,087 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:40,219 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,239 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:40,240 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:40,242 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:02:40,243 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:02:40,266 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:40,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:40,273 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,273 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:40,346 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,348 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:40,348 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 06:02:40,348 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:40,349 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 06:02:40,349 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 06:02:40,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 06:02:40,350 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 06:02:40,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:40,377 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 06:02:40,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 06:02:40,378 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 06:02:40,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:40,378 INFO L225 Difference]: With dead ends: 32 [2018-01-21 06:02:40,378 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 06:02:40,379 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 06:02:40,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 06:02:40,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 06:02:40,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 06:02:40,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 06:02:40,382 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 06:02:40,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:40,382 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 06:02:40,382 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 06:02:40,382 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 06:02:40,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 06:02:40,383 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:40,383 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:40,383 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:40,383 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 06:02:40,383 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:40,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:40,384 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:40,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:40,384 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:40,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:40,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:40,473 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,473 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:40,473 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:40,474 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:40,474 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:40,474 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:40,474 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:40,482 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:02:40,482 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:40,488 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:40,489 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:40,491 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:40,496 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:40,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:40,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:40,511 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,511 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:40,636 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,660 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:40,660 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:40,663 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:02:40,663 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:40,666 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:40,668 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:40,671 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:40,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:40,689 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:40,692 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:40,698 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,698 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:40,746 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,747 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:40,748 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 06:02:40,748 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:40,748 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 06:02:40,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 06:02:40,748 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 06:02:40,748 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 06:02:40,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:40,773 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:02:40,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 06:02:40,774 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 06:02:40,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:40,775 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:02:40,775 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 06:02:40,775 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 06:02:40,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 06:02:40,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 06:02:40,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 06:02:40,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 06:02:40,779 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 06:02:40,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:40,780 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 06:02:40,780 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 06:02:40,780 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 06:02:40,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 06:02:40,781 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:40,781 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:40,781 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:40,781 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 06:02:40,781 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:40,782 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:40,782 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:40,782 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:40,782 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:40,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:40,793 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:40,887 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,888 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:40,888 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:40,888 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:40,888 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:40,888 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:40,888 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:40,896 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:02:40,896 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:02:40,904 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:40,908 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:40,909 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:40,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:40,911 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:40,912 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:40,931 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:40,932 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:41,091 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,111 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:41,111 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:41,114 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:02:41,115 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:02:41,123 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:41,130 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:41,138 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:41,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:41,151 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:41,154 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:41,159 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,159 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:41,237 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,238 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:41,238 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 06:02:41,238 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:41,239 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 06:02:41,239 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 06:02:41,239 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 06:02:41,239 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 06:02:41,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:41,281 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 06:02:41,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 06:02:41,281 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 06:02:41,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:41,282 INFO L225 Difference]: With dead ends: 34 [2018-01-21 06:02:41,282 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 06:02:41,283 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 06:02:41,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 06:02:41,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 06:02:41,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 06:02:41,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 06:02:41,287 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 06:02:41,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:41,287 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 06:02:41,287 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 06:02:41,287 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 06:02:41,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 06:02:41,288 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:41,288 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:41,288 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:41,288 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 06:02:41,288 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:41,289 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:41,289 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:41,289 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:41,289 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:41,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:41,299 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:41,453 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,454 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:41,454 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:41,454 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:41,454 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:41,454 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:41,454 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:41,459 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:41,459 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:02:41,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:41,471 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:41,484 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,484 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:41,677 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,709 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:41,710 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:41,714 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:41,714 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:02:41,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:41,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:41,737 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,738 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:41,800 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,802 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:41,802 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 06:02:41,802 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:41,802 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 06:02:41,802 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 06:02:41,802 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 06:02:41,803 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 06:02:41,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:41,822 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 06:02:41,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 06:02:41,823 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 06:02:41,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:41,823 INFO L225 Difference]: With dead ends: 35 [2018-01-21 06:02:41,823 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 06:02:41,824 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 06:02:41,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 06:02:41,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 06:02:41,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 06:02:41,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 06:02:41,826 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 06:02:41,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:41,827 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 06:02:41,827 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 06:02:41,827 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 06:02:41,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 06:02:41,827 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:41,827 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:41,827 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:41,827 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 06:02:41,828 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:41,828 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:41,828 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:41,828 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:41,828 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:41,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:41,838 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:41,909 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,909 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:41,909 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:41,910 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:41,910 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:41,910 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:41,910 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:41,916 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:02:41,917 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:41,926 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:41,929 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:41,930 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:41,932 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:41,950 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:41,950 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:42,164 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:42,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:42,185 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:42,188 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:02:42,188 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:42,198 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:42,206 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:42,213 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:42,217 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:42,221 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:42,221 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:42,306 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:42,307 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:42,308 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 06:02:42,308 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:42,308 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 06:02:42,308 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 06:02:42,309 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 06:02:42,309 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 06:02:42,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:42,366 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 06:02:42,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 06:02:42,366 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 06:02:42,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:42,367 INFO L225 Difference]: With dead ends: 36 [2018-01-21 06:02:42,367 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 06:02:42,368 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 06:02:42,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 06:02:42,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 06:02:42,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 06:02:42,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 06:02:42,372 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 06:02:42,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:42,373 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 06:02:42,373 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 06:02:42,373 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 06:02:42,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 06:02:42,374 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:42,374 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:42,374 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:42,374 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 06:02:42,374 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:42,375 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:42,375 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:42,376 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:42,376 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:42,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:42,387 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:42,522 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:42,522 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:42,522 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:42,522 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:42,523 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:42,523 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:42,523 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:42,544 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:02:42,544 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:02:42,552 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,565 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,573 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,588 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,593 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,594 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,594 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:42,596 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:42,618 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:42,618 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:42,913 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:42,933 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:42,933 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:42,936 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:02:42,936 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:02:42,945 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,960 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,968 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,976 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,984 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:42,990 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:42,993 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:42,997 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:42,997 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:43,070 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:43,071 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:43,071 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 06:02:43,071 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:43,072 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 06:02:43,072 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 06:02:43,072 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 06:02:43,072 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 06:02:43,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:43,103 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 06:02:43,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 06:02:43,106 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 06:02:43,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:43,107 INFO L225 Difference]: With dead ends: 37 [2018-01-21 06:02:43,107 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 06:02:43,108 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 06:02:43,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 06:02:43,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 06:02:43,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 06:02:43,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 06:02:43,111 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 06:02:43,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:43,112 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 06:02:43,112 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 06:02:43,112 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 06:02:43,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 06:02:43,112 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:43,113 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:43,113 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:43,113 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 06:02:43,113 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:43,114 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:43,114 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:43,114 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:43,114 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:43,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:43,121 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:43,209 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:43,209 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:43,209 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:43,209 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:43,210 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:43,210 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:43,210 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:43,218 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:02:43,218 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:02:43,228 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:43,230 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:43,237 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:43,237 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:43,490 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:43,510 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:43,510 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:43,517 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:02:43,518 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:02:43,545 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:43,548 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:43,554 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:43,554 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:43,639 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:43,641 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:43,641 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 06:02:43,641 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:43,641 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 06:02:43,641 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 06:02:43,641 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 06:02:43,642 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 06:02:43,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:43,666 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 06:02:43,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 06:02:43,666 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 06:02:43,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:43,667 INFO L225 Difference]: With dead ends: 38 [2018-01-21 06:02:43,667 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 06:02:43,667 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 06:02:43,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 06:02:43,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 06:02:43,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 06:02:43,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 06:02:43,670 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 06:02:43,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:43,670 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 06:02:43,670 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 06:02:43,670 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 06:02:43,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 06:02:43,671 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:43,671 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:43,671 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:43,671 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 06:02:43,671 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:43,672 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:43,672 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:43,672 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:43,672 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:43,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:43,679 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:43,756 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:43,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:43,756 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:43,756 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:43,757 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:43,757 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:43,757 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:43,762 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:02:43,762 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:43,765 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:43,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:43,767 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:43,768 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:43,769 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:43,770 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:43,774 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:43,775 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:43,776 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:43,783 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:43,783 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:44,060 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:44,080 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:44,080 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:44,083 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:02:44,083 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:44,087 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:44,088 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:44,091 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:44,095 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:44,099 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:44,103 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:44,112 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:44,119 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:44,122 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:44,126 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:44,127 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:44,243 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:44,244 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:44,244 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 06:02:44,244 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:44,244 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 06:02:44,245 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 06:02:44,245 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 06:02:44,245 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 06:02:44,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:44,290 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 06:02:44,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 06:02:44,290 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 06:02:44,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:44,290 INFO L225 Difference]: With dead ends: 39 [2018-01-21 06:02:44,291 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 06:02:44,291 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 06:02:44,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 06:02:44,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 06:02:44,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 06:02:44,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 06:02:44,294 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 06:02:44,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:44,294 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 06:02:44,294 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 06:02:44,294 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 06:02:44,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 06:02:44,294 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:44,294 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:44,294 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:44,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 06:02:44,295 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:44,295 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:44,295 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:44,295 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:44,296 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:44,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:44,304 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:44,400 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:44,400 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:44,400 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:44,400 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:44,400 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:44,401 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:44,401 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:44,406 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:02:44,406 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:02:44,413 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,415 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,416 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,417 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,418 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,419 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,420 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,421 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:44,422 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:44,436 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:44,436 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:44,756 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:44,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:44,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:44,779 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:02:44,779 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:02:44,790 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,800 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,812 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,829 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,838 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,850 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:44,857 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:44,860 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:44,865 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:44,865 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:44,964 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:44,965 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:44,966 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 06:02:44,966 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:44,966 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 06:02:44,966 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 06:02:44,967 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 06:02:44,967 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 06:02:45,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:45,003 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 06:02:45,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 06:02:45,004 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 06:02:45,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:45,004 INFO L225 Difference]: With dead ends: 40 [2018-01-21 06:02:45,004 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 06:02:45,005 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 06:02:45,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 06:02:45,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 06:02:45,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 06:02:45,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 06:02:45,007 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 06:02:45,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:45,008 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 06:02:45,008 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 06:02:45,008 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 06:02:45,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 06:02:45,008 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:45,008 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:45,008 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:45,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 06:02:45,008 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:45,009 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:45,009 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:45,009 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:45,009 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:45,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:45,016 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:45,193 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:45,193 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:45,193 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:45,193 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:45,193 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:45,194 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:45,194 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:45,201 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:45,201 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:02:45,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:45,213 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:45,225 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:45,225 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:45,647 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:45,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:45,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:45,670 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:45,670 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:02:45,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:45,694 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:45,698 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:45,698 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:45,805 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:45,806 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:45,806 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 06:02:45,806 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:45,806 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 06:02:45,806 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 06:02:45,806 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 06:02:45,807 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 06:02:45,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:45,842 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 06:02:45,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 06:02:45,843 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 06:02:45,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:45,844 INFO L225 Difference]: With dead ends: 41 [2018-01-21 06:02:45,844 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 06:02:45,844 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 06:02:45,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 06:02:45,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 06:02:45,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 06:02:45,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 06:02:45,848 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 06:02:45,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:45,848 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 06:02:45,848 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 06:02:45,849 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 06:02:45,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 06:02:45,849 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:45,849 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:45,849 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:45,850 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 06:02:45,850 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:45,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:45,851 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:45,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:45,851 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:45,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:45,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:46,190 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:46,190 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:46,190 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:46,190 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:46,191 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:46,191 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:46,191 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:46,202 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:02:46,202 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:46,210 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:46,214 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:46,216 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:46,217 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:46,225 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:46,225 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:46,646 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:46,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:46,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:46,670 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:02:46,670 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:46,681 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:46,695 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:46,709 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:46,713 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:46,719 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:46,719 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:46,870 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:46,872 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:46,872 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 06:02:46,872 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:46,873 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 06:02:46,873 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 06:02:46,873 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 06:02:46,873 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 06:02:46,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:46,987 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 06:02:46,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 06:02:46,991 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 06:02:46,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:46,992 INFO L225 Difference]: With dead ends: 42 [2018-01-21 06:02:46,992 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 06:02:46,993 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 06:02:46,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 06:02:46,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 06:02:46,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 06:02:46,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 06:02:46,996 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 06:02:46,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:46,996 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 06:02:46,996 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 06:02:46,997 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 06:02:46,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 06:02:46,997 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:46,997 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:46,997 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:46,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 06:02:46,998 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:46,998 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:46,999 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:46,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:46,999 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:47,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:47,007 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:47,164 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:47,165 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:47,165 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:47,165 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:47,165 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:47,165 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:47,165 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:47,172 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:02:47,172 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:02:47,179 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,182 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,183 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,185 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,186 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,188 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,189 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,190 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:47,191 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:47,192 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:47,201 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:47,201 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:48,241 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:48,265 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:48,265 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:48,269 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:02:48,269 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:02:48,280 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,287 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,313 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,322 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,332 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,342 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,353 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:48,361 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:48,364 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:48,368 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:48,368 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:48,502 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:48,503 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:48,503 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 06:02:48,503 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:48,504 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 06:02:48,504 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 06:02:48,504 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 06:02:48,505 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 06:02:48,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:48,540 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 06:02:48,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 06:02:48,541 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 06:02:48,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:48,541 INFO L225 Difference]: With dead ends: 43 [2018-01-21 06:02:48,541 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 06:02:48,542 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 06:02:48,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 06:02:48,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 06:02:48,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 06:02:48,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 06:02:48,546 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 06:02:48,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:48,546 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 06:02:48,546 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 06:02:48,546 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 06:02:48,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 06:02:48,547 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:48,547 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:48,547 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:48,547 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 06:02:48,547 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:48,548 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:48,548 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:48,548 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:48,548 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:48,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:48,555 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:48,776 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:48,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:48,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:48,776 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:48,777 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:48,777 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:48,777 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:48,786 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:02:48,786 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:02:48,802 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:48,803 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:48,829 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:48,829 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:49,408 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:49,427 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:49,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:49,430 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:02:49,431 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:02:49,459 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:49,462 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:49,466 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:49,467 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:49,603 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:49,604 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:49,604 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 06:02:49,604 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:49,604 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 06:02:49,604 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 06:02:49,604 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 06:02:49,605 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 06:02:49,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:49,635 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 06:02:49,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 06:02:49,637 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 06:02:49,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:49,638 INFO L225 Difference]: With dead ends: 44 [2018-01-21 06:02:49,638 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 06:02:49,639 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 06:02:49,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 06:02:49,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 06:02:49,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 06:02:49,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 06:02:49,643 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 06:02:49,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:49,643 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 06:02:49,644 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 06:02:49,644 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 06:02:49,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 06:02:49,644 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:49,644 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:49,644 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:49,645 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 06:02:49,645 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:49,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:49,646 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:49,646 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:49,646 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:49,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:49,655 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:49,822 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:49,823 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:49,823 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:49,823 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:49,823 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:49,823 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:49,823 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:49,828 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:02:49,828 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:49,832 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,833 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,834 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,834 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,835 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,836 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,838 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,842 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:49,843 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:49,844 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:49,852 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:49,852 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:50,371 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:50,391 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:50,391 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:50,394 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:02:50,394 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:50,398 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,410 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,414 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,419 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,424 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:50,448 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:50,451 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:50,456 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:50,456 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:50,667 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:50,668 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:50,668 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 06:02:50,668 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:50,668 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 06:02:50,668 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 06:02:50,669 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 06:02:50,669 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 06:02:50,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:50,699 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 06:02:50,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 06:02:50,699 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 06:02:50,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:50,700 INFO L225 Difference]: With dead ends: 45 [2018-01-21 06:02:50,700 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 06:02:50,700 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 06:02:50,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 06:02:50,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 06:02:50,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 06:02:50,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 06:02:50,704 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 06:02:50,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:50,705 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 06:02:50,705 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 06:02:50,705 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 06:02:50,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 06:02:50,705 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:50,705 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:50,706 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:50,706 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 06:02:50,706 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:50,707 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:50,707 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:50,707 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:50,707 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:50,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:50,713 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:51,004 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:51,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:51,005 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:51,005 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:51,005 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:51,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:51,005 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:51,012 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:02:51,012 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:02:51,021 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,024 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,026 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,028 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,029 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,030 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,032 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,033 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,035 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,036 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,037 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:51,038 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:51,047 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:51,047 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:51,651 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:51,669 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:51,670 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:51,673 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:02:51,673 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:02:51,686 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,694 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,701 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,708 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,716 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,724 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,733 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,741 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,761 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:51,768 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:51,771 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:51,775 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:51,775 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:51,914 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:51,914 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:51,915 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 06:02:51,915 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:51,915 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 06:02:51,915 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 06:02:51,915 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 06:02:51,916 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 06:02:51,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:51,944 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 06:02:51,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 06:02:51,944 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 06:02:51,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:51,945 INFO L225 Difference]: With dead ends: 46 [2018-01-21 06:02:51,945 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 06:02:51,945 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 06:02:51,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 06:02:51,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 06:02:51,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 06:02:51,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 06:02:51,949 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 06:02:51,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:51,949 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 06:02:51,950 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 06:02:51,950 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 06:02:51,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 06:02:51,950 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:51,950 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:51,951 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:51,951 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 06:02:51,951 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:51,952 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:51,952 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:51,952 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:51,952 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:51,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:51,958 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:52,103 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:52,103 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:52,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:52,103 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:52,104 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:52,104 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:52,104 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:52,108 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:52,108 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:02:52,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:52,120 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:52,128 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:52,128 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:52,758 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:52,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:52,778 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:52,781 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:52,781 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:02:52,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:52,816 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:52,821 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:52,821 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:52,966 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:52,967 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:52,967 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 06:02:52,968 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:52,968 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 06:02:52,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 06:02:52,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 06:02:52,969 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 06:02:53,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:53,015 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 06:02:53,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 06:02:53,016 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 06:02:53,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:53,016 INFO L225 Difference]: With dead ends: 47 [2018-01-21 06:02:53,016 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 06:02:53,017 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 06:02:53,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 06:02:53,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 06:02:53,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 06:02:53,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 06:02:53,019 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 06:02:53,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:53,019 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 06:02:53,019 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 06:02:53,020 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 06:02:53,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 06:02:53,020 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:53,020 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:53,020 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:53,020 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 06:02:53,020 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:53,021 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:53,021 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:02:53,021 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:53,021 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:53,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:53,027 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:53,220 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:53,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:53,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:53,220 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:53,220 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:53,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:53,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:53,225 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:02:53,226 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:53,233 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:53,239 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:53,240 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:53,242 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:53,251 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:53,251 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:53,945 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:53,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:53,966 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:53,969 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:02:53,969 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:53,978 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:53,991 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:54,001 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:54,005 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:54,010 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:54,010 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:54,176 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:54,178 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:54,178 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 06:02:54,178 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:54,178 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 06:02:54,179 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 06:02:54,179 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 06:02:54,179 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 06:02:54,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:54,214 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 06:02:54,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 06:02:54,214 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 06:02:54,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:54,214 INFO L225 Difference]: With dead ends: 48 [2018-01-21 06:02:54,214 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 06:02:54,215 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 06:02:54,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 06:02:54,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 06:02:54,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 06:02:54,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 06:02:54,217 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 06:02:54,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:54,217 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 06:02:54,217 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 06:02:54,218 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 06:02:54,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 06:02:54,218 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:54,218 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:54,218 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:54,218 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 06:02:54,218 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:54,219 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:54,219 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:54,219 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:54,219 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:54,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:54,227 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:54,426 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:54,426 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:54,426 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:54,426 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:54,426 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:54,426 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:54,426 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:54,431 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:02:54,431 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:02:54,439 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,441 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,442 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,443 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,444 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,445 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,447 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,448 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,450 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,452 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:54,454 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:54,456 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:54,464 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:54,465 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:55,188 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:55,209 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:55,209 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:55,212 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:02:55,212 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:02:55,221 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,228 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,236 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,245 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,263 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,273 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,284 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,306 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,318 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:02:55,339 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:55,342 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:55,348 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:55,348 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:55,523 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:55,524 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:55,524 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 06:02:55,524 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:55,524 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 06:02:55,525 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 06:02:55,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1127, Invalid=1225, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 06:02:55,525 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 06:02:55,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:55,558 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 06:02:55,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 06:02:55,559 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 06:02:55,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:55,559 INFO L225 Difference]: With dead ends: 49 [2018-01-21 06:02:55,559 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 06:02:55,560 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1154, Invalid=1296, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 06:02:55,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 06:02:55,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 06:02:55,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 06:02:55,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 06:02:55,563 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 06:02:55,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:55,564 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 06:02:55,564 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 06:02:55,564 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 06:02:55,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 06:02:55,564 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:55,564 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:55,564 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:55,564 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 06:02:55,565 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:55,565 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:55,565 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:55,565 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:55,565 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:55,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:55,571 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:55,767 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:55,767 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:55,767 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:55,767 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:55,767 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:55,767 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:55,767 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:55,773 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:02:55,774 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:02:55,787 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:55,788 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:55,797 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:55,797 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:56,597 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:56,616 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:56,616 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:56,619 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:02:56,619 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:02:56,655 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:56,658 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:56,664 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:56,664 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:56,840 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:56,841 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:56,842 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 06:02:56,842 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:56,842 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 06:02:56,842 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 06:02:56,843 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1217, Invalid=1333, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 06:02:56,843 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 06:02:56,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:56,886 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 06:02:56,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 06:02:56,887 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 06:02:56,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:56,887 INFO L225 Difference]: With dead ends: 50 [2018-01-21 06:02:56,887 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 06:02:56,888 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1245, Invalid=1407, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 06:02:56,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 06:02:56,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 06:02:56,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 06:02:56,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 06:02:56,891 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 06:02:56,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:56,891 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 06:02:56,891 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 06:02:56,891 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 06:02:56,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 06:02:56,892 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:56,892 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:56,892 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:56,892 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 06:02:56,892 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:56,892 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:56,893 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:56,893 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:56,893 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:56,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:56,898 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:57,118 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:57,119 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:57,119 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:57,119 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:57,119 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:57,119 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:57,119 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:57,124 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:02:57,124 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:57,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,130 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,132 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,134 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,137 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,138 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,139 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,143 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,144 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:57,145 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:57,154 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:57,154 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:57,945 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:57,964 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:57,964 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:57,967 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:02:57,967 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:02:57,972 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,974 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,977 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,981 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,985 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,990 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:57,995 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:58,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:58,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:58,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:58,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:58,027 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:58,040 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:02:58,050 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:58,053 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:58,059 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:58,059 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:58,257 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:58,259 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:58,259 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 06:02:58,259 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:58,259 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 06:02:58,260 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 06:02:58,260 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1307, Invalid=1449, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 06:02:58,261 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 06:02:58,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:58,324 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 06:02:58,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 06:02:58,325 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 06:02:58,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:02:58,326 INFO L225 Difference]: With dead ends: 51 [2018-01-21 06:02:58,326 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 06:02:58,327 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1336, Invalid=1526, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 06:02:58,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 06:02:58,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 06:02:58,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 06:02:58,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 06:02:58,330 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 06:02:58,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:02:58,331 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 06:02:58,333 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 06:02:58,333 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 06:02:58,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 06:02:58,334 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:02:58,334 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:02:58,334 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:02:58,334 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 06:02:58,335 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:02:58,335 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:58,335 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:02:58,335 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:02:58,336 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:02:58,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:02:58,344 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:02:58,629 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:58,629 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:58,670 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:02:58,670 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:02:58,670 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:02:58,670 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:58,670 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:02:58,676 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:02:58,676 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:02:58,683 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,685 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,686 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,687 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,688 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,690 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,691 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,692 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,693 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,694 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,695 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,697 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,698 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:58,698 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:58,700 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:58,710 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:58,711 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:59,553 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:59,573 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:02:59,574 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:02:59,576 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:02:59,576 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:02:59,586 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,592 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,600 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,617 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,626 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,636 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,646 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,656 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,667 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,690 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:02:59,712 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:02:59,716 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:02:59,725 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:59,725 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:02:59,938 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:02:59,939 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:02:59,939 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 06:02:59,939 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:02:59,940 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 06:02:59,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 06:02:59,941 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1397, Invalid=1573, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 06:02:59,941 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 06:02:59,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:02:59,999 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 06:02:59,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 06:02:59,999 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 06:02:59,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:00,000 INFO L225 Difference]: With dead ends: 52 [2018-01-21 06:03:00,000 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 06:03:00,001 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1427, Invalid=1653, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 06:03:00,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 06:03:00,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 06:03:00,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 06:03:00,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 06:03:00,005 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 06:03:00,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:00,005 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 06:03:00,005 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 06:03:00,005 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 06:03:00,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 06:03:00,006 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:00,006 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:00,006 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:00,006 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 06:03:00,006 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:00,007 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:00,007 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:00,007 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:00,007 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:00,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:00,015 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:00,267 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:00,268 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:00,268 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:00,268 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:00,268 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:00,268 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:00,268 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:00,273 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:00,273 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:00,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:00,288 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:00,297 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:00,298 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:01,187 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:01,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:01,207 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:01,209 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:01,210 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:01,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:01,238 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:01,248 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:01,248 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:01,486 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:01,487 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:01,487 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 06:03:01,487 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:01,487 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 06:03:01,487 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 06:03:01,488 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1487, Invalid=1705, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 06:03:01,488 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 06:03:01,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:01,530 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 06:03:01,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 06:03:01,531 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 06:03:01,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:01,531 INFO L225 Difference]: With dead ends: 53 [2018-01-21 06:03:01,531 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 06:03:01,532 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1518, Invalid=1788, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 06:03:01,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 06:03:01,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 06:03:01,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 06:03:01,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 06:03:01,534 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 06:03:01,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:01,534 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 06:03:01,534 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 06:03:01,534 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 06:03:01,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 06:03:01,534 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:01,535 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:01,535 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:01,535 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 06:03:01,535 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:01,535 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:01,535 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:01,535 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:01,535 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:01,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:01,544 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:01,813 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:01,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:01,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:01,814 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:01,814 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:01,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:01,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:01,820 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:01,820 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:01,826 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:01,832 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:01,833 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:01,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:01,849 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:01,849 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:02,774 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:02,794 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:02,794 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:02,797 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:02,797 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:02,807 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:02,820 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:02,833 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:02,836 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:02,842 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:02,842 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:03,072 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:03,073 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:03,073 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 06:03:03,074 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:03,074 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 06:03:03,074 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 06:03:03,074 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1577, Invalid=1845, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 06:03:03,074 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 06:03:03,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:03,117 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 06:03:03,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 06:03:03,117 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 06:03:03,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:03,117 INFO L225 Difference]: With dead ends: 54 [2018-01-21 06:03:03,117 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 06:03:03,118 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1609, Invalid=1931, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 06:03:03,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 06:03:03,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 06:03:03,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 06:03:03,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 06:03:03,121 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 06:03:03,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:03,121 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 06:03:03,121 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 06:03:03,121 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 06:03:03,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 06:03:03,122 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:03,122 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:03,122 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:03,122 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 06:03:03,122 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:03,123 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:03,123 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:03,123 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:03,123 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:03,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:03,129 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:03,483 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:03,483 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:03,483 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:03,483 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:03,484 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:03,484 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:03,484 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:03,489 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:03,489 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:03,497 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,499 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,501 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,502 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,503 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,504 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,507 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,511 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,512 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,513 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,514 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:03,514 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:03,516 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:03,525 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:03,525 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:04,521 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:04,540 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:04,540 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:04,544 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:04,544 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:04,555 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,562 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,570 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,578 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,587 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,596 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,606 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,617 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,628 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,639 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,652 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,664 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,677 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,691 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:04,714 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:04,717 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:04,723 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:04,723 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:04,959 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:04,960 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:04,960 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 06:03:04,960 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:04,960 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 06:03:04,961 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 06:03:04,961 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1667, Invalid=1993, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 06:03:04,961 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 06:03:05,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:05,007 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 06:03:05,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 06:03:05,008 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 06:03:05,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:05,009 INFO L225 Difference]: With dead ends: 55 [2018-01-21 06:03:05,009 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 06:03:05,009 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1700, Invalid=2082, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 06:03:05,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 06:03:05,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 06:03:05,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 06:03:05,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 06:03:05,013 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 06:03:05,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:05,013 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 06:03:05,014 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 06:03:05,014 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 06:03:05,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 06:03:05,014 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:05,014 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:05,014 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:05,015 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 06:03:05,015 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:05,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:05,016 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:05,016 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:05,016 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:05,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:05,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:05,386 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:05,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:05,386 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:05,386 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:05,387 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:05,387 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:05,387 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:05,395 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:05,395 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:05,410 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:05,412 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:05,421 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:05,422 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:06,476 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:06,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:06,496 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:06,499 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:06,500 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:06,540 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:06,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:06,550 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:06,550 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:06,805 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:06,806 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:06,806 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 06:03:06,806 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:06,807 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 06:03:06,807 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 06:03:06,807 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1757, Invalid=2149, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 06:03:06,808 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 06:03:06,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:06,878 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 06:03:06,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 06:03:06,879 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 06:03:06,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:06,879 INFO L225 Difference]: With dead ends: 56 [2018-01-21 06:03:06,879 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 06:03:06,880 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1791, Invalid=2241, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 06:03:06,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 06:03:06,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 06:03:06,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 06:03:06,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 06:03:06,882 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 06:03:06,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:06,882 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 06:03:06,882 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 06:03:06,882 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 06:03:06,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 06:03:06,882 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:06,882 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:06,882 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:06,883 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 06:03:06,883 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:06,883 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:06,883 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:06,883 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:06,883 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:06,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:06,892 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:07,220 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:07,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:07,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:07,221 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:07,221 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:07,221 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:07,221 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:07,225 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:07,226 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:07,230 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,232 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,233 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,237 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,238 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,241 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,242 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,246 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:07,247 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:07,249 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:07,258 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:07,258 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:08,355 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:08,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:08,375 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:08,378 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:08,378 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:08,383 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,385 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,389 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,392 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,401 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,411 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,417 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,423 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,452 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:08,487 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:08,492 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:08,501 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:08,501 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:08,790 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:08,791 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:08,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 06:03:08,791 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:08,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 06:03:08,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 06:03:08,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1847, Invalid=2313, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 06:03:08,792 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 06:03:08,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:08,834 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 06:03:08,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 06:03:08,834 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 06:03:08,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:08,835 INFO L225 Difference]: With dead ends: 57 [2018-01-21 06:03:08,835 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 06:03:08,835 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 699 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1882, Invalid=2408, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 06:03:08,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 06:03:08,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 06:03:08,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 06:03:08,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 06:03:08,838 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 06:03:08,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:08,838 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 06:03:08,838 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 06:03:08,838 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 06:03:08,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 06:03:08,838 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:08,839 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:08,839 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:08,839 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 06:03:08,839 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:08,839 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:08,839 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:08,840 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:08,840 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:08,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:08,846 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:09,205 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:09,205 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:09,205 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:09,205 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:09,205 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:09,205 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:09,205 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:09,210 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:09,210 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:09,217 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,218 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,219 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,220 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,221 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,222 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,223 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,224 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,225 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,226 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,228 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,229 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,231 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,232 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,233 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:09,234 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:09,235 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:09,245 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:09,245 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:10,367 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:10,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:10,386 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:10,389 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:10,389 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:10,400 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,406 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,414 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,422 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,439 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,458 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,468 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,490 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,501 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,513 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,552 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:10,562 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:10,566 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:10,573 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:10,573 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:10,850 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:10,851 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:10,851 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 06:03:10,851 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:10,851 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 06:03:10,851 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 06:03:10,852 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1937, Invalid=2485, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 06:03:10,852 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 06:03:10,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:10,896 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 06:03:10,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 06:03:10,897 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 06:03:10,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:10,897 INFO L225 Difference]: With dead ends: 58 [2018-01-21 06:03:10,897 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 06:03:10,898 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 783 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1973, Invalid=2583, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 06:03:10,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 06:03:10,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 06:03:10,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 06:03:10,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 06:03:10,901 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 06:03:10,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:10,901 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 06:03:10,902 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 06:03:10,902 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 06:03:10,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 06:03:10,902 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:10,902 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:10,903 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:10,903 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 06:03:10,903 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:10,904 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:10,904 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:10,904 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:10,904 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:10,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:10,913 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:11,278 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:11,278 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:11,278 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:11,278 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:11,278 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:11,278 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:11,278 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:11,283 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:11,283 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:11,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:11,299 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:11,324 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:11,325 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:11,437 WARN L143 SmtUtils]: Spent 110ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 06:03:12,642 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:12,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:12,662 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:12,665 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:12,665 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:12,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:12,700 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:12,706 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:12,706 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:13,000 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:13,001 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:13,001 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 06:03:13,001 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:13,002 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 06:03:13,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 06:03:13,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2027, Invalid=2665, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 06:03:13,003 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 06:03:13,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:13,057 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 06:03:13,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 06:03:13,057 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 06:03:13,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:13,058 INFO L225 Difference]: With dead ends: 59 [2018-01-21 06:03:13,058 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 06:03:13,059 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 871 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2064, Invalid=2766, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 06:03:13,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 06:03:13,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 06:03:13,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 06:03:13,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 06:03:13,062 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 06:03:13,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:13,063 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 06:03:13,063 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 06:03:13,063 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 06:03:13,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 06:03:13,063 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:13,063 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:13,064 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:13,064 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 06:03:13,064 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:13,065 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:13,065 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:13,065 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:13,065 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:13,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:13,074 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:13,554 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:13,555 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:13,555 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:13,555 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:13,555 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:13,555 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:13,555 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:13,560 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:13,560 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:13,568 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:13,575 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:13,577 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:13,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:13,588 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:13,588 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:14,819 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:14,839 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:14,839 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:14,842 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:14,842 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:14,852 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:14,868 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:14,881 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:14,885 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:14,891 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:14,892 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:15,184 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:15,185 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:15,185 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 06:03:15,185 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:15,185 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 06:03:15,186 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 06:03:15,186 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2117, Invalid=2853, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 06:03:15,186 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 06:03:15,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:15,249 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 06:03:15,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 06:03:15,249 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 06:03:15,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:15,249 INFO L225 Difference]: With dead ends: 60 [2018-01-21 06:03:15,249 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 06:03:15,250 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 963 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2155, Invalid=2957, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 06:03:15,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 06:03:15,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 06:03:15,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 06:03:15,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 06:03:15,252 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 06:03:15,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:15,252 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 06:03:15,252 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 06:03:15,252 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 06:03:15,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 06:03:15,253 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:15,253 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:15,253 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:15,253 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 06:03:15,253 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:15,254 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:15,254 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:15,254 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:15,254 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:15,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:15,263 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:15,690 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:15,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:15,690 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:15,690 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:15,690 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:15,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:15,690 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:15,695 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:15,695 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:15,702 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,705 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,706 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,707 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,709 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,711 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,713 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,721 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,722 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:15,722 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:15,724 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:15,755 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:15,755 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:17,038 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:17,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:17,058 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:17,061 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:17,061 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:17,070 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,077 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,085 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,092 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,101 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,110 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,119 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,129 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,139 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,150 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,172 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,184 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,197 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,210 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,237 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,251 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:17,261 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:17,266 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:17,273 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:17,273 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:17,572 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:17,573 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:17,573 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 06:03:17,573 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:17,573 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 06:03:17,573 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 06:03:17,574 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2207, Invalid=3049, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 06:03:17,574 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 06:03:17,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:17,622 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 06:03:17,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 06:03:17,622 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 06:03:17,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:17,623 INFO L225 Difference]: With dead ends: 61 [2018-01-21 06:03:17,623 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 06:03:17,623 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2246, Invalid=3156, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 06:03:17,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 06:03:17,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 06:03:17,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 06:03:17,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 06:03:17,626 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 06:03:17,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:17,627 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 06:03:17,627 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 06:03:17,627 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 06:03:17,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 06:03:17,628 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:17,628 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:17,628 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:17,628 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 06:03:17,628 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:17,629 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:17,629 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:17,629 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:17,629 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:17,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:17,635 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:18,282 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:18,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:18,282 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:18,282 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:18,282 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:18,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:18,282 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:18,290 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:18,290 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:18,309 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:18,311 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:18,328 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:18,328 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:19,696 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:19,715 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:19,715 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:19,718 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:19,718 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:19,761 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:19,764 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:19,771 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:19,771 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:20,090 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:20,091 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:20,091 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 06:03:20,091 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:20,091 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 06:03:20,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 06:03:20,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2297, Invalid=3253, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 06:03:20,092 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 06:03:20,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:20,148 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 06:03:20,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 06:03:20,148 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 06:03:20,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:20,148 INFO L225 Difference]: With dead ends: 62 [2018-01-21 06:03:20,149 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 06:03:20,149 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1159 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2337, Invalid=3363, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 06:03:20,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 06:03:20,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 06:03:20,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 06:03:20,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 06:03:20,151 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 06:03:20,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:20,152 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 06:03:20,152 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 06:03:20,152 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 06:03:20,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 06:03:20,152 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:20,153 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:20,153 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:20,153 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 06:03:20,153 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:20,154 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:20,154 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:20,154 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:20,154 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:20,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:20,163 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:20,645 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:20,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:20,645 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:20,645 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:20,645 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:20,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:20,645 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:20,650 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:20,650 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:20,654 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,655 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,656 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,657 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,658 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,659 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,659 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,660 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,661 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,662 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,663 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,664 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,665 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,666 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,667 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,668 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,669 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,671 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,675 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:20,676 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:20,678 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:20,689 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:20,689 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:22,085 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:22,105 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:22,105 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:22,108 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:22,108 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:22,113 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,118 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,121 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,130 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,134 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,139 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,144 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,157 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,163 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,170 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,178 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,187 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,195 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,204 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,213 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,228 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:22,239 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:22,243 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:22,250 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:22,250 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:22,603 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:22,604 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:22,604 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 06:03:22,604 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:22,605 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 06:03:22,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 06:03:22,605 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2387, Invalid=3465, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 06:03:22,605 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 06:03:22,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:22,649 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 06:03:22,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 06:03:22,649 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 06:03:22,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:22,650 INFO L225 Difference]: With dead ends: 63 [2018-01-21 06:03:22,650 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 06:03:22,650 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1263 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2428, Invalid=3578, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 06:03:22,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 06:03:22,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 06:03:22,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 06:03:22,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 06:03:22,653 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 06:03:22,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:22,653 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 06:03:22,654 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 06:03:22,654 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 06:03:22,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 06:03:22,654 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:22,654 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:22,654 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:22,655 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 06:03:22,655 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:22,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:22,655 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:22,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:22,655 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:22,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:22,664 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:23,211 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:23,211 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:23,211 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:23,212 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:23,212 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:23,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:23,212 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:23,217 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:23,217 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:23,224 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,226 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,227 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,228 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,229 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,231 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,232 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,233 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,234 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,235 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,236 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,237 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,239 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,240 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,241 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,242 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,243 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,245 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:23,245 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:23,247 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:23,257 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:23,257 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:24,701 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:24,721 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:24,721 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:24,724 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:24,724 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:24,735 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,742 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,758 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,777 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,787 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,797 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,807 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,828 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,840 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,866 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,879 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,892 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,907 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,922 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:24,950 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:24,954 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:24,962 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:24,962 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:25,310 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:25,311 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:25,311 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 06:03:25,311 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:25,311 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 06:03:25,312 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 06:03:25,312 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2477, Invalid=3685, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 06:03:25,312 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-21 06:03:25,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:25,360 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 06:03:25,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 06:03:25,361 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-21 06:03:25,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:25,361 INFO L225 Difference]: With dead ends: 64 [2018-01-21 06:03:25,361 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 06:03:25,362 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1371 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2519, Invalid=3801, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 06:03:25,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 06:03:25,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 06:03:25,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 06:03:25,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 06:03:25,364 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 06:03:25,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:25,364 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 06:03:25,364 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 06:03:25,364 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 06:03:25,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 06:03:25,365 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:25,365 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:25,365 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:25,365 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 06:03:25,365 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:25,366 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:25,366 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:25,366 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:25,366 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:25,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:25,373 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:25,839 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:25,839 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:25,839 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:25,840 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:25,840 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:25,840 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:25,840 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:25,848 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:25,848 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:25,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:25,867 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:25,878 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:25,878 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:27,392 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:27,412 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:27,412 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:27,415 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:27,416 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:27,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:27,452 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:27,459 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:27,459 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:27,821 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:27,822 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:27,823 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 06:03:27,823 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:27,823 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 06:03:27,823 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 06:03:27,823 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2567, Invalid=3913, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 06:03:27,823 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-21 06:03:27,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:27,877 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 06:03:27,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 06:03:27,877 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-21 06:03:27,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:27,878 INFO L225 Difference]: With dead ends: 65 [2018-01-21 06:03:27,878 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 06:03:27,878 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1483 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2610, Invalid=4032, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 06:03:27,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 06:03:27,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 06:03:27,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 06:03:27,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 06:03:27,880 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 06:03:27,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:27,881 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 06:03:27,881 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 06:03:27,881 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 06:03:27,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 06:03:27,881 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:27,881 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:27,881 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:27,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-21 06:03:27,881 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:27,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:27,882 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:27,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:27,882 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:27,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:27,890 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:28,430 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:28,431 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:28,431 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:28,431 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:28,431 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:28,431 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:28,431 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:28,441 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:28,441 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:28,450 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:28,457 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:28,459 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:28,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:28,471 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:28,471 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:28,658 WARN L143 SmtUtils]: Spent 101ms on a formula simplification that was a NOOP. DAG size: 122 [2018-01-21 06:03:30,095 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:30,114 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:30,114 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:30,117 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:30,117 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:30,128 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:30,145 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:30,160 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:30,164 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:30,171 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:30,171 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:30,542 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:30,543 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:30,543 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-21 06:03:30,543 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:30,543 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-21 06:03:30,543 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-21 06:03:30,544 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2657, Invalid=4149, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 06:03:30,544 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 43 states. [2018-01-21 06:03:30,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:30,592 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 06:03:30,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-21 06:03:30,592 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 55 [2018-01-21 06:03:30,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:30,593 INFO L225 Difference]: With dead ends: 66 [2018-01-21 06:03:30,593 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 06:03:30,593 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 177 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1599 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2701, Invalid=4271, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 06:03:30,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 06:03:30,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 06:03:30,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 06:03:30,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 06:03:30,595 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 06:03:30,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:30,595 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 06:03:30,595 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-21 06:03:30,595 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 06:03:30,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 06:03:30,596 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:30,596 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:30,596 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:30,596 INFO L82 PathProgramCache]: Analyzing trace with hash -1090430805, now seen corresponding path program 39 times [2018-01-21 06:03:30,596 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:30,597 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:30,597 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:30,597 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:30,597 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:30,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:30,605 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:31,133 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:31,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:31,133 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:31,133 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:31,134 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:31,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:31,134 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:31,139 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:31,139 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:31,148 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,150 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,151 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,152 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,153 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,155 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,156 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,157 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,158 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,165 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,166 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,168 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,169 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,171 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,172 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,174 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,175 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:31,176 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:31,178 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:31,189 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:31,190 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:31,301 WARN L143 SmtUtils]: Spent 110ms on a formula simplification that was a NOOP. DAG size: 125 Received shutdown request... [2018-01-21 06:03:32,388 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 06:03:32,388 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:03:32,390 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:03:32,390 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:03:32,390 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:03:32,390 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:03:32,390 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:03:32,390 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:03:32,391 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:03:32,391 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 06:03:32,391 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:03:32,391 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:03:32,391 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:03:32,392 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 06:03:32 BoogieIcfgContainer [2018-01-21 06:03:32,392 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 06:03:32,393 INFO L168 Benchmark]: Toolchain (without parser) took 55536.26 ms. Allocated memory was 305.7 MB in the beginning and 785.4 MB in the end (delta: 479.7 MB). Free memory was 265.0 MB in the beginning and 443.5 MB in the end (delta: -178.5 MB). Peak memory consumption was 301.2 MB. Max. memory is 5.3 GB. [2018-01-21 06:03:32,393 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 305.7 MB. Free memory is still 269.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 06:03:32,393 INFO L168 Benchmark]: CACSL2BoogieTranslator took 159.17 ms. Allocated memory is still 305.7 MB. Free memory was 264.0 MB in the beginning and 256.8 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-21 06:03:32,393 INFO L168 Benchmark]: Boogie Preprocessor took 27.08 ms. Allocated memory is still 305.7 MB. Free memory was 256.8 MB in the beginning and 254.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 06:03:32,394 INFO L168 Benchmark]: RCFGBuilder took 184.74 ms. Allocated memory is still 305.7 MB. Free memory was 254.8 MB in the beginning and 243.2 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 06:03:32,394 INFO L168 Benchmark]: TraceAbstraction took 55158.28 ms. Allocated memory was 305.7 MB in the beginning and 785.4 MB in the end (delta: 479.7 MB). Free memory was 243.2 MB in the beginning and 443.5 MB in the end (delta: -200.2 MB). Peak memory consumption was 279.5 MB. Max. memory is 5.3 GB. [2018-01-21 06:03:32,395 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 305.7 MB. Free memory is still 269.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 159.17 ms. Allocated memory is still 305.7 MB. Free memory was 264.0 MB in the beginning and 256.8 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.08 ms. Allocated memory is still 305.7 MB. Free memory was 256.8 MB in the beginning and 254.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 184.74 ms. Allocated memory is still 305.7 MB. Free memory was 254.8 MB in the beginning and 243.2 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55158.28 ms. Allocated memory was 305.7 MB in the beginning and 785.4 MB in the end (delta: 479.7 MB). Free memory was 243.2 MB in the beginning and 443.5 MB in the end (delta: -200.2 MB). Peak memory consumption was 279.5 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.210454 RENAME_VARIABLES(MILLISECONDS) : 0.095102 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.157033 PROJECTAWAY(MILLISECONDS) : 0.104613 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.227118 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.135097 ADD_EQUALITY(MILLISECONDS) : 0.035521 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.011485 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 57 with TraceHistMax 39, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 70 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 54.9s OverallTime, 40 OverallIterations, 39 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 627 SDtfs, 78 SDslu, 10596 SDs, 0 SdLazy, 1654 SolverSat, 49 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6408 GetRequests, 4619 SyntacticMatches, 76 SemanticMatches, 1713 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15617 ImplicationChecksByTransitivity, 29.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57occurred in iteration=39, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 3.1s SatisfiabilityAnalysisTime, 45.3s InterpolantComputationTime, 4178 NumberOfCodeBlocks, 4178 NumberOfCodeBlocksAsserted, 507 NumberOfCheckSat, 6761 ConstructedInterpolants, 0 QuantifiedInterpolants, 993159 SizeOfPredicates, 76 NumberOfNonLiveVariables, 9082 ConjunctsInSsa, 1710 ConjunctsInUnsatCore, 191 InterpolantComputations, 1 PerfectInterpolantSequences, 0/49400 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_06-03-32-403.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_06-03-32-403.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_06-03-32-403.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_06-03-32-403.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_06-03-32-403.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_06-03-32-403.csv Completed graceful shutdown