java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 06:03:34,927 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 06:03:34,929 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 06:03:34,944 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 06:03:34,944 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 06:03:34,945 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 06:03:34,947 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 06:03:34,948 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 06:03:34,950 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 06:03:34,951 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 06:03:34,952 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 06:03:34,952 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 06:03:34,953 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 06:03:34,954 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 06:03:34,955 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 06:03:34,958 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 06:03:34,960 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 06:03:34,962 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 06:03:34,963 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 06:03:34,965 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 06:03:34,967 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 06:03:34,967 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 06:03:34,968 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 06:03:34,969 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 06:03:34,970 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 06:03:34,971 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 06:03:34,971 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 06:03:34,972 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 06:03:34,972 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 06:03:34,972 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 06:03:34,973 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 06:03:34,973 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf [2018-01-21 06:03:34,982 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 06:03:34,982 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 06:03:34,983 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 06:03:34,983 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 06:03:34,983 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 06:03:34,983 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 06:03:34,984 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 06:03:34,984 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 06:03:34,984 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 06:03:34,984 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 06:03:34,984 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 06:03:34,985 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 06:03:34,985 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 06:03:34,985 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 06:03:34,985 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 06:03:34,985 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 06:03:34,985 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 06:03:34,985 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 06:03:34,986 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 06:03:34,986 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 06:03:34,986 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 06:03:34,986 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 06:03:34,986 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 06:03:34,986 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 06:03:34,987 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 06:03:34,987 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 06:03:34,987 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:03:34,987 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 06:03:34,987 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 06:03:34,987 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 06:03:34,987 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 06:03:34,988 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 06:03:34,988 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 06:03:34,988 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 06:03:34,988 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 06:03:34,988 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 06:03:34,988 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 06:03:34,989 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 06:03:34,989 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 06:03:35,022 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 06:03:35,032 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 06:03:35,035 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 06:03:35,037 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 06:03:35,037 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 06:03:35,038 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero_false-valid-deref-write.c [2018-01-21 06:03:35,149 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 06:03:35,153 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 06:03:35,154 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 06:03:35,154 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 06:03:35,159 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 06:03:35,160 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,163 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47d05f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35, skipping insertion in model container [2018-01-21 06:03:35,163 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,177 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:03:35,191 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:03:35,299 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:03:35,314 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:03:35,319 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35 WrapperNode [2018-01-21 06:03:35,319 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 06:03:35,319 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 06:03:35,320 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 06:03:35,320 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 06:03:35,330 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,331 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,338 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,338 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,341 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,343 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,344 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (1/1) ... [2018-01-21 06:03:35,346 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 06:03:35,347 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 06:03:35,347 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 06:03:35,347 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 06:03:35,348 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:03:35,395 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 06:03:35,396 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 06:03:35,396 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 06:03:35,396 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 06:03:35,396 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 06:03:35,396 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 06:03:35,396 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 06:03:35,397 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 06:03:35,397 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 06:03:35,397 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 06:03:35,397 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 06:03:35,397 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 06:03:35,513 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 06:03:35,513 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:03:35 BoogieIcfgContainer [2018-01-21 06:03:35,514 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 06:03:35,514 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 06:03:35,514 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 06:03:35,516 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 06:03:35,517 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 06:03:35" (1/3) ... [2018-01-21 06:03:35,518 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@743d48d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:03:35, skipping insertion in model container [2018-01-21 06:03:35,518 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:03:35" (2/3) ... [2018-01-21 06:03:35,518 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@743d48d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:03:35, skipping insertion in model container [2018-01-21 06:03:35,519 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:03:35" (3/3) ... [2018-01-21 06:03:35,521 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero_false-valid-deref-write.c [2018-01-21 06:03:35,531 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 06:03:35,539 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 06:03:35,576 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:03:35,576 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:03:35,576 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:03:35,577 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:03:35,577 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:03:35,577 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:03:35,577 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:03:35,577 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 06:03:35,578 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:03:35,600 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:03:35,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 06:03:35,607 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:35,608 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 06:03:35,608 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 06:03:35,613 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 06:03:35,616 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:35,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:35,662 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:35,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:35,662 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:35,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:03:35,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:03:35,720 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 06:03:35,727 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 06:03:35,734 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:03:35,734 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:03:35,734 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:03:35,734 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:03:35,734 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:03:35,734 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:03:35,735 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:03:35,735 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 06:03:35,735 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:03:35,736 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:03:35,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 06:03:35,737 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:35,737 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:35,737 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:35,737 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 06:03:35,737 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:35,738 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:35,739 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:35,739 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:35,739 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:35,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:35,765 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:35,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:35,852 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 06:03:35,853 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 06:03:35,853 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 06:03:35,854 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 06:03:35,865 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 06:03:35,865 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 06:03:35,867 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 06:03:35,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:35,909 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:03:35,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 06:03:35,911 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 06:03:35,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:35,922 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:03:35,922 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 06:03:35,925 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 06:03:36,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 06:03:36,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 06:03:36,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 06:03:36,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 06:03:36,024 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 06:03:36,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:36,024 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 06:03:36,025 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 06:03:36,025 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 06:03:36,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 06:03:36,025 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:36,025 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:36,025 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:36,026 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 06:03:36,026 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:36,027 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:36,027 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:36,027 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:36,027 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:36,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:36,038 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:36,085 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:36,086 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:36,086 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:36,087 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 06:03:36,090 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 06:03:36,137 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 06:03:36,137 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 06:03:36,898 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 06:03:36,900 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 06:03:36,914 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 06:03:36,915 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:36,915 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:36,929 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:36,929 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:36,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:36,958 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:36,988 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:36,989 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:37,129 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,162 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:37,162 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:37,166 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:37,166 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:37,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:37,194 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:37,199 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,200 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:37,274 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,275 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:37,275 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 06:03:37,276 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:37,277 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 06:03:37,277 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 06:03:37,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 06:03:37,278 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 06:03:37,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:37,319 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 06:03:37,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 06:03:37,319 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 06:03:37,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:37,320 INFO L225 Difference]: With dead ends: 29 [2018-01-21 06:03:37,321 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 06:03:37,322 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 06:03:37,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 06:03:37,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 06:03:37,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 06:03:37,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 06:03:37,326 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 06:03:37,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:37,326 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 06:03:37,326 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 06:03:37,327 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 06:03:37,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 06:03:37,327 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:37,328 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:37,328 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:37,328 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 06:03:37,328 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:37,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:37,329 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:37,330 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:37,330 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:37,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:37,344 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:37,391 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,392 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:37,392 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:37,392 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:37,392 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:37,392 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:37,393 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:37,401 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:37,401 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:37,419 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:37,422 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:37,423 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:37,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:37,441 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,442 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:37,587 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,619 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:37,620 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:37,623 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:37,623 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:37,635 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:37,641 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:37,647 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:37,650 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:37,655 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,655 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:37,747 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,753 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:37,753 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 06:03:37,753 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:37,754 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 06:03:37,754 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 06:03:37,754 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 06:03:37,755 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 06:03:37,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:37,786 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 06:03:37,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 06:03:37,786 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 06:03:37,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:37,787 INFO L225 Difference]: With dead ends: 30 [2018-01-21 06:03:37,787 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 06:03:37,788 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 06:03:37,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 06:03:37,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 06:03:37,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 06:03:37,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 06:03:37,792 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 06:03:37,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:37,792 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 06:03:37,792 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 06:03:37,792 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 06:03:37,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 06:03:37,793 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:37,793 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:37,794 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:37,794 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 06:03:37,794 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:37,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:37,795 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:37,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:37,796 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:37,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:37,808 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:37,863 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,863 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:37,863 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:37,863 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:37,864 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:37,864 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:37,864 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:37,870 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:37,870 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:37,880 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:37,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:37,887 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:37,887 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:37,889 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:37,898 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:37,898 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:38,020 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,041 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:38,041 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:38,044 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:38,044 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:38,056 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:38,066 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:38,074 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:38,079 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:38,083 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:38,088 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,089 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:38,156 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,158 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:38,158 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 06:03:38,158 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:38,159 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 06:03:38,159 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 06:03:38,159 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 06:03:38,159 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 06:03:38,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:38,176 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 06:03:38,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 06:03:38,177 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 06:03:38,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:38,177 INFO L225 Difference]: With dead ends: 31 [2018-01-21 06:03:38,177 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 06:03:38,178 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 06:03:38,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 06:03:38,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 06:03:38,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 06:03:38,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 06:03:38,181 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 06:03:38,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:38,181 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 06:03:38,181 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 06:03:38,181 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 06:03:38,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 06:03:38,182 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:38,182 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:38,182 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:38,182 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 06:03:38,182 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:38,183 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:38,183 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:38,183 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:38,183 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:38,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:38,191 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:38,238 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,238 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:38,238 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:38,238 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:38,238 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:38,238 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:38,238 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:38,243 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:38,244 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:38,254 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:38,255 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:38,263 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,263 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:38,383 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,403 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:38,403 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:38,406 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:38,406 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:38,427 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:38,430 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:38,433 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,433 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:38,475 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,476 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:38,477 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 06:03:38,477 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:38,477 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 06:03:38,477 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 06:03:38,477 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 06:03:38,477 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 06:03:38,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:38,501 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 06:03:38,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 06:03:38,502 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 06:03:38,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:38,502 INFO L225 Difference]: With dead ends: 32 [2018-01-21 06:03:38,503 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 06:03:38,503 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 06:03:38,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 06:03:38,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 06:03:38,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 06:03:38,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 06:03:38,507 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 06:03:38,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:38,508 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 06:03:38,508 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 06:03:38,508 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 06:03:38,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 06:03:38,509 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:38,509 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:38,509 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:38,510 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 06:03:38,510 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:38,511 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:38,511 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:38,511 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:38,511 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:38,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:38,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:38,633 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,633 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:38,634 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:38,634 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:38,634 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:38,634 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:38,634 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:38,642 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:38,642 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:38,647 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:38,648 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:38,649 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:38,661 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:38,664 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:38,666 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:38,674 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,674 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:38,796 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,818 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:38,819 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:38,821 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:38,822 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:38,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:38,827 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:38,830 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:38,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:38,846 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:38,849 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:38,855 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,855 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:38,902 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:38,904 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:38,904 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 06:03:38,904 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:38,905 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 06:03:38,905 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 06:03:38,905 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 06:03:38,905 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 06:03:38,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:38,939 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:03:38,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 06:03:38,940 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 06:03:38,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:38,941 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:03:38,941 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 06:03:38,941 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 06:03:38,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 06:03:38,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 06:03:38,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 06:03:38,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 06:03:38,945 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 06:03:38,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:38,945 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 06:03:38,946 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 06:03:38,946 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 06:03:38,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 06:03:38,946 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:38,946 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:38,946 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:38,947 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 06:03:38,947 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:38,947 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:38,948 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:38,948 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:38,948 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:38,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:38,959 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:39,034 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,034 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:39,034 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:39,034 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:39,035 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:39,035 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:39,035 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:39,040 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:39,040 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:39,048 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:39,050 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:39,051 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:39,053 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:39,053 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:39,055 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:39,076 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,076 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:39,226 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:39,247 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:39,250 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:39,250 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:39,259 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:39,266 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:39,273 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:39,281 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:39,286 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:39,289 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:39,295 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,295 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:39,356 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,361 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:39,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 06:03:39,362 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:39,362 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 06:03:39,362 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 06:03:39,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 06:03:39,363 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 06:03:39,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:39,390 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 06:03:39,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 06:03:39,390 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 06:03:39,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:39,391 INFO L225 Difference]: With dead ends: 34 [2018-01-21 06:03:39,391 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 06:03:39,392 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 06:03:39,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 06:03:39,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 06:03:39,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 06:03:39,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 06:03:39,395 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 06:03:39,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:39,395 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 06:03:39,395 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 06:03:39,396 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 06:03:39,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 06:03:39,396 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:39,396 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:39,396 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:39,396 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 06:03:39,396 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:39,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:39,397 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:39,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:39,397 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:39,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:39,409 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:39,562 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,562 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:39,562 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:39,563 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:39,563 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:39,563 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:39,563 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:39,572 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:39,572 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:39,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:39,591 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:39,634 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,634 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:39,830 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,850 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:39,851 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:39,856 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:39,857 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:39,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:39,876 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:39,882 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,882 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:39,953 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:39,954 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:39,954 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 06:03:39,955 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:39,955 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 06:03:39,955 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 06:03:39,955 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 06:03:39,956 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 06:03:39,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:39,976 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 06:03:39,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 06:03:39,977 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 06:03:39,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:39,977 INFO L225 Difference]: With dead ends: 35 [2018-01-21 06:03:39,977 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 06:03:39,978 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 06:03:39,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 06:03:39,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 06:03:39,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 06:03:39,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 06:03:39,980 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 06:03:39,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:39,980 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 06:03:39,981 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 06:03:39,981 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 06:03:39,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 06:03:39,981 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:39,982 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:39,982 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:39,982 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 06:03:39,982 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:39,983 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:39,983 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:39,983 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:39,983 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:39,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:39,992 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:40,132 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:40,132 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:40,132 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:40,132 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:40,132 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:40,132 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:40,132 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:40,139 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:40,139 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:40,146 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:40,149 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:40,150 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:40,151 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:40,166 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:40,166 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:40,349 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:40,369 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:40,369 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:40,372 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:40,372 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:40,381 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:40,389 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:40,396 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:40,399 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:40,403 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:40,403 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:40,481 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:40,483 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:40,483 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 06:03:40,483 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:40,484 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 06:03:40,484 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 06:03:40,484 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 06:03:40,485 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 06:03:40,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:40,517 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 06:03:40,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 06:03:40,518 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 06:03:40,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:40,518 INFO L225 Difference]: With dead ends: 36 [2018-01-21 06:03:40,518 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 06:03:40,519 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 06:03:40,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 06:03:40,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 06:03:40,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 06:03:40,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 06:03:40,521 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 06:03:40,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:40,522 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 06:03:40,522 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 06:03:40,522 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 06:03:40,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 06:03:40,522 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:40,522 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:40,522 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:40,523 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 06:03:40,523 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:40,523 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:40,523 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:40,523 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:40,523 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:40,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:40,531 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:40,663 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:40,664 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:40,664 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:40,664 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:40,664 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:40,664 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:40,664 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:40,677 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:40,677 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:40,686 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:40,688 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:40,689 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:40,690 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:40,691 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:40,692 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:40,692 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:40,694 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:40,708 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:40,708 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:41,001 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,021 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:41,021 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:41,024 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:41,024 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:41,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:41,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:41,047 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:41,055 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:41,063 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:41,071 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:41,077 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:41,080 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:41,084 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,084 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:41,159 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,160 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:41,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 06:03:41,160 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:41,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 06:03:41,161 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 06:03:41,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 06:03:41,161 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 06:03:41,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:41,194 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 06:03:41,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 06:03:41,194 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 06:03:41,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:41,195 INFO L225 Difference]: With dead ends: 37 [2018-01-21 06:03:41,195 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 06:03:41,196 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 06:03:41,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 06:03:41,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 06:03:41,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 06:03:41,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 06:03:41,200 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 06:03:41,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:41,200 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 06:03:41,200 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 06:03:41,200 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 06:03:41,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 06:03:41,201 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:41,201 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:41,201 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:41,201 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 06:03:41,201 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:41,202 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:41,202 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:41,202 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:41,202 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:41,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:41,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:41,323 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,323 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:41,323 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:41,323 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:41,323 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:41,324 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:41,324 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:41,328 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:41,329 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:41,338 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:41,339 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:41,347 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,348 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:41,581 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:41,601 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:41,604 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:41,604 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:41,630 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:41,633 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:41,638 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,638 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:41,727 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,728 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:41,728 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 06:03:41,728 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:41,729 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 06:03:41,729 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 06:03:41,729 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 06:03:41,730 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 06:03:41,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:41,754 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 06:03:41,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 06:03:41,754 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 06:03:41,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:41,755 INFO L225 Difference]: With dead ends: 38 [2018-01-21 06:03:41,755 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 06:03:41,755 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 06:03:41,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 06:03:41,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 06:03:41,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 06:03:41,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 06:03:41,758 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 06:03:41,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:41,758 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 06:03:41,758 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 06:03:41,758 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 06:03:41,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 06:03:41,759 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:41,759 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:41,759 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:41,759 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 06:03:41,759 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:41,760 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:41,760 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:41,760 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:41,760 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:41,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:41,774 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:41,847 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,847 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:41,847 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:41,847 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:41,847 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:41,848 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:41,848 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:41,852 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:41,852 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:41,856 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:41,857 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:41,858 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:41,858 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:41,859 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:41,860 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:41,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:41,864 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:41,865 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:41,872 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:41,873 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:42,126 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:42,146 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:42,146 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:42,149 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:42,149 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:42,153 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:42,154 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:42,157 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:42,161 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:42,164 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:42,169 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:42,178 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:42,185 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:42,188 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:42,194 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:42,194 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:42,282 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:42,283 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:42,283 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 06:03:42,283 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:42,284 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 06:03:42,284 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 06:03:42,284 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 06:03:42,285 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 06:03:42,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:42,310 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 06:03:42,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 06:03:42,310 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 06:03:42,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:42,311 INFO L225 Difference]: With dead ends: 39 [2018-01-21 06:03:42,311 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 06:03:42,311 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 06:03:42,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 06:03:42,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 06:03:42,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 06:03:42,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 06:03:42,314 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 06:03:42,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:42,314 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 06:03:42,314 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 06:03:42,314 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 06:03:42,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 06:03:42,315 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:42,315 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:42,315 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:42,315 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 06:03:42,315 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:42,316 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:42,316 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:42,316 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:42,316 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:42,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:42,323 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:42,418 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:42,419 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:42,419 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:42,419 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:42,419 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:42,419 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:42,419 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:42,429 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:42,429 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:42,435 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,437 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,438 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,439 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,442 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:42,443 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:42,450 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:42,451 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:42,760 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:42,780 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:42,780 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:42,783 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:42,783 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:42,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,799 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,807 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,815 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,833 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,842 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:42,849 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:42,852 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:42,856 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:42,856 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:42,951 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:42,952 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:42,952 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 06:03:42,952 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:42,952 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 06:03:42,952 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 06:03:42,953 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 06:03:42,953 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 06:03:42,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:42,980 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 06:03:42,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 06:03:42,980 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 06:03:42,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:42,980 INFO L225 Difference]: With dead ends: 40 [2018-01-21 06:03:42,980 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 06:03:42,981 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 06:03:42,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 06:03:42,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 06:03:42,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 06:03:42,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 06:03:42,983 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 06:03:42,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:42,983 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 06:03:42,983 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 06:03:42,984 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 06:03:42,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 06:03:42,984 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:42,984 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:42,984 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:42,984 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 06:03:42,984 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:42,985 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:42,985 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:42,985 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:42,985 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:42,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:42,991 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:43,076 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:43,076 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:43,076 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:43,077 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:43,077 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:43,077 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:43,077 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:43,081 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:43,082 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:43,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:43,091 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:43,100 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:43,100 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:43,444 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:43,464 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:43,464 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:43,467 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:43,467 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:43,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:43,488 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:43,493 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:43,493 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:43,609 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:43,610 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:43,610 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 06:03:43,611 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:43,611 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 06:03:43,611 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 06:03:43,612 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 06:03:43,612 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 06:03:43,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:43,647 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 06:03:43,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 06:03:43,648 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 06:03:43,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:43,649 INFO L225 Difference]: With dead ends: 41 [2018-01-21 06:03:43,649 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 06:03:43,649 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 06:03:43,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 06:03:43,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 06:03:43,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 06:03:43,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 06:03:43,653 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 06:03:43,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:43,653 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 06:03:43,653 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 06:03:43,653 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 06:03:43,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 06:03:43,654 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:43,654 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:43,654 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:43,655 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 06:03:43,655 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:43,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:43,656 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:43,656 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:43,656 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:43,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:43,662 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:43,806 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:43,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:43,806 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:43,806 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:43,806 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:43,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:43,806 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:43,822 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:43,822 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:43,830 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:43,838 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:43,846 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:43,847 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:43,896 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:43,896 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:44,269 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:44,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:44,290 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:44,293 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:44,293 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:44,305 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:44,318 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:44,327 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:44,330 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:44,337 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:44,337 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:44,470 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:44,472 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:44,472 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 06:03:44,472 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:44,472 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 06:03:44,472 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 06:03:44,473 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 06:03:44,473 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 06:03:44,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:44,547 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 06:03:44,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 06:03:44,549 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 06:03:44,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:44,550 INFO L225 Difference]: With dead ends: 42 [2018-01-21 06:03:44,550 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 06:03:44,551 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 06:03:44,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 06:03:44,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 06:03:44,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 06:03:44,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 06:03:44,555 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 06:03:44,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:44,555 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 06:03:44,555 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 06:03:44,555 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 06:03:44,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 06:03:44,556 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:44,556 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:44,556 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:44,556 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 06:03:44,557 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:44,557 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:44,557 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:44,558 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:44,558 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:44,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:44,565 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:44,775 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:44,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:44,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:44,776 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:44,776 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:44,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:44,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:44,783 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:44,783 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:44,790 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,797 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,800 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,803 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:44,803 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:44,805 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:44,815 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:44,815 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:45,558 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:45,591 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:45,592 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:45,598 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:45,598 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:45,612 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,622 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,634 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,646 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,659 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,673 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,689 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:45,730 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:45,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:45,738 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:45,738 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:45,851 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:45,852 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:45,852 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 06:03:45,852 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:45,853 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 06:03:45,853 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 06:03:45,853 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 06:03:45,853 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 06:03:45,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:45,885 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 06:03:45,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 06:03:45,885 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 06:03:45,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:45,886 INFO L225 Difference]: With dead ends: 43 [2018-01-21 06:03:45,886 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 06:03:45,886 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 06:03:45,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 06:03:45,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 06:03:45,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 06:03:45,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 06:03:45,889 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 06:03:45,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:45,889 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 06:03:45,889 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 06:03:45,889 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 06:03:45,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 06:03:45,890 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:45,890 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:45,890 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:45,890 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 06:03:45,890 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:45,891 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:45,891 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:45,891 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:45,891 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:45,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:45,898 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:46,052 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:46,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:46,053 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:46,053 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:46,053 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:46,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:46,053 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:46,064 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:46,064 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:46,077 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:46,079 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:46,097 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:46,097 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:46,643 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:46,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:46,664 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:46,667 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:46,667 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:46,698 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:46,701 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:46,705 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:46,705 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:46,817 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:46,819 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:46,819 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 06:03:46,819 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:46,820 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 06:03:46,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 06:03:46,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 06:03:46,820 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 06:03:46,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:46,853 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 06:03:46,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 06:03:46,853 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 06:03:46,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:46,854 INFO L225 Difference]: With dead ends: 44 [2018-01-21 06:03:46,854 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 06:03:46,855 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 06:03:46,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 06:03:46,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 06:03:46,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 06:03:46,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 06:03:46,859 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 06:03:46,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:46,859 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 06:03:46,859 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 06:03:46,860 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 06:03:46,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 06:03:46,860 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:46,860 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:46,860 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:46,861 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 06:03:46,861 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:46,861 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:46,862 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:46,862 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:46,862 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:46,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:46,870 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:47,078 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:47,079 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:47,079 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:47,079 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:47,079 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:47,079 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:47,079 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:47,088 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:47,088 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:47,092 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,093 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,094 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,095 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,096 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,098 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,099 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,107 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:47,109 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:47,118 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:47,119 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:47,638 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:47,657 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:47,657 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:47,661 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:47,661 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:47,667 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,669 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,673 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,676 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,680 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,695 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,700 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:47,722 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:47,725 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:47,730 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:47,730 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:47,891 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:47,893 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:47,893 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 06:03:47,893 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:47,894 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 06:03:47,894 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 06:03:47,894 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 06:03:47,894 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 06:03:47,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:47,926 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 06:03:47,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 06:03:47,927 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 06:03:47,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:47,927 INFO L225 Difference]: With dead ends: 45 [2018-01-21 06:03:47,927 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 06:03:47,928 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 06:03:47,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 06:03:47,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 06:03:47,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 06:03:47,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 06:03:47,930 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 06:03:47,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:47,930 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 06:03:47,930 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 06:03:47,930 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 06:03:47,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 06:03:47,931 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:47,931 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:47,931 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:47,931 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 06:03:47,931 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:47,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:47,932 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:47,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:47,932 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:47,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:47,939 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:48,137 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:48,137 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:48,137 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:48,137 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:48,138 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:48,138 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:48,138 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:48,142 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:48,142 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:48,150 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,153 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,154 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,155 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,156 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,157 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,158 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,159 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,160 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,161 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,162 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:48,163 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:48,170 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:48,170 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:48,323 WARN L143 SmtUtils]: Spent 120ms on a formula simplification that was a NOOP. DAG size: 62 [2018-01-21 06:03:48,828 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:48,850 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:48,850 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:48,853 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:48,853 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:48,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,869 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,885 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,894 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,913 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,923 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,934 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,945 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:48,954 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:48,957 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:48,962 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:48,962 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:49,090 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:49,091 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:49,091 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 06:03:49,091 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:49,091 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 06:03:49,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 06:03:49,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 06:03:49,092 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 06:03:49,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:49,123 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 06:03:49,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 06:03:49,123 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 06:03:49,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:49,124 INFO L225 Difference]: With dead ends: 46 [2018-01-21 06:03:49,124 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 06:03:49,124 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 06:03:49,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 06:03:49,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 06:03:49,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 06:03:49,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 06:03:49,127 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 06:03:49,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:49,128 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 06:03:49,128 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 06:03:49,128 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 06:03:49,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 06:03:49,128 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:49,128 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:49,128 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:49,129 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 06:03:49,129 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:49,129 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:49,129 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:49,129 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:49,129 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:49,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:49,137 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:49,310 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:49,311 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:49,311 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:49,311 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:49,311 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:49,311 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:49,311 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:49,316 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:49,316 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:49,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:49,329 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:49,337 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:49,337 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:49,932 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:49,952 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:49,953 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:49,955 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:49,956 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:49,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:49,982 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:49,987 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:49,987 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:50,126 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:50,127 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:50,127 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 06:03:50,127 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:50,128 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 06:03:50,128 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 06:03:50,129 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 06:03:50,129 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 06:03:50,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:50,182 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 06:03:50,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 06:03:50,182 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 06:03:50,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:50,182 INFO L225 Difference]: With dead ends: 47 [2018-01-21 06:03:50,182 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 06:03:50,183 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 06:03:50,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 06:03:50,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 06:03:50,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 06:03:50,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 06:03:50,186 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 06:03:50,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:50,186 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 06:03:50,186 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 06:03:50,186 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 06:03:50,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 06:03:50,187 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:50,187 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:50,187 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:50,187 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 06:03:50,187 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:50,188 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:50,188 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:50,188 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:50,188 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:50,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:50,193 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:50,355 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:50,355 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:50,355 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:50,355 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:50,355 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:50,355 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:50,355 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:50,360 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:50,360 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:50,367 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:50,372 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:50,373 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:50,375 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:50,383 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:50,383 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:51,018 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:51,038 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:51,038 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:51,041 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:51,041 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:51,050 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:51,062 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:51,072 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:51,075 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:51,081 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:51,081 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:51,236 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:51,238 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:51,238 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 06:03:51,238 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:51,238 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 06:03:51,239 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 06:03:51,239 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 06:03:51,240 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 06:03:51,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:51,274 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 06:03:51,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 06:03:51,275 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 06:03:51,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:51,275 INFO L225 Difference]: With dead ends: 48 [2018-01-21 06:03:51,275 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 06:03:51,276 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 06:03:51,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 06:03:51,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 06:03:51,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 06:03:51,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 06:03:51,278 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 06:03:51,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:51,278 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 06:03:51,278 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 06:03:51,278 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 06:03:51,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 06:03:51,279 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:51,279 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:51,279 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:51,279 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 06:03:51,279 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:51,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:51,280 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:51,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:51,280 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:51,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:51,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:51,485 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:51,485 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:51,485 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:51,485 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:51,485 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:51,485 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:51,485 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:51,497 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:51,498 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:51,505 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,507 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,511 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,512 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,514 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,517 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,519 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,520 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,522 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:51,522 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:51,524 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:51,533 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:51,533 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:52,216 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:52,236 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:52,236 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:52,239 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:03:52,240 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:03:52,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,255 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,263 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,272 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,291 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,311 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,322 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,333 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,345 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,357 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:03:52,367 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:52,370 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:52,376 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:52,376 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:52,544 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:52,545 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:52,546 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 06:03:52,546 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:52,546 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 06:03:52,546 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 06:03:52,547 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1130, Invalid=1222, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 06:03:52,547 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 06:03:52,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:52,579 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 06:03:52,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 06:03:52,579 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 06:03:52,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:52,579 INFO L225 Difference]: With dead ends: 49 [2018-01-21 06:03:52,579 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 06:03:52,580 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1157, Invalid=1293, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 06:03:52,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 06:03:52,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 06:03:52,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 06:03:52,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 06:03:52,584 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 06:03:52,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:52,584 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 06:03:52,584 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 06:03:52,584 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 06:03:52,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 06:03:52,585 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:52,585 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:52,585 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:52,585 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 06:03:52,585 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:52,586 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:52,586 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:52,586 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:52,586 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:52,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:52,592 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:52,779 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:52,780 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:52,780 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:52,780 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:52,780 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:52,780 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:52,780 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:52,785 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:52,785 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:52,799 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:52,800 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:52,809 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:52,809 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:53,538 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:53,558 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:53,558 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:53,560 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:03:53,561 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:03:53,594 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:53,597 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:53,603 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:53,603 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:53,790 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:53,791 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:53,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 06:03:53,792 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:53,792 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 06:03:53,792 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 06:03:53,793 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1227, Invalid=1323, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 06:03:53,793 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 06:03:53,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:53,853 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 06:03:53,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 06:03:53,853 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 06:03:53,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:53,853 INFO L225 Difference]: With dead ends: 50 [2018-01-21 06:03:53,854 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 06:03:53,854 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1255, Invalid=1397, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 06:03:53,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 06:03:53,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 06:03:53,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 06:03:53,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 06:03:53,857 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 06:03:53,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:53,858 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 06:03:53,858 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 06:03:53,858 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 06:03:53,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 06:03:53,858 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:53,858 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:53,858 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:53,858 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 06:03:53,858 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:53,859 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:53,859 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:53,859 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:53,859 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:53,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:53,865 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:54,060 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:54,060 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:54,060 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:54,061 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:54,061 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:54,061 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:54,061 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:54,065 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:54,066 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:54,069 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,070 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,071 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,072 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,072 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,073 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,074 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,075 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,076 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,076 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,077 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,078 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,082 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,083 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:54,084 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:54,093 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:54,093 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:54,882 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:54,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:54,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:54,905 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:03:54,906 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:54,910 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,912 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,915 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,919 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,923 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,928 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,933 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,938 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,944 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,950 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,985 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:54,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:55,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:55,016 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:55,019 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:55,025 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:55,025 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:55,211 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:55,212 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:55,212 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 06:03:55,212 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:55,213 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 06:03:55,213 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 06:03:55,213 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1328, Invalid=1428, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 06:03:55,213 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 06:03:55,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:55,257 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 06:03:55,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 06:03:55,260 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 06:03:55,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:55,261 INFO L225 Difference]: With dead ends: 51 [2018-01-21 06:03:55,261 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 06:03:55,262 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1357, Invalid=1505, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 06:03:55,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 06:03:55,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 06:03:55,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 06:03:55,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 06:03:55,265 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 06:03:55,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:55,266 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 06:03:55,266 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 06:03:55,266 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 06:03:55,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 06:03:55,266 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:55,267 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:55,267 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:55,267 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 06:03:55,267 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:55,268 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:55,268 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:55,268 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:55,268 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:55,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:55,276 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:55,524 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:55,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:55,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:55,525 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:55,525 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:55,525 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:55,525 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:55,530 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:55,530 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:55,536 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,537 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,539 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,540 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,541 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,542 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,544 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:55,549 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:55,551 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:55,559 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:55,559 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:56,418 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:56,438 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:56,438 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:56,441 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:03:56,441 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:03:56,450 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,456 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,464 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,471 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,496 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,506 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,550 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,562 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:03:56,571 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:56,574 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:56,580 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:56,580 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:56,781 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:56,782 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:56,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 06:03:56,782 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:56,783 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 06:03:56,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 06:03:56,784 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1433, Invalid=1537, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 06:03:56,784 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 06:03:56,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:56,841 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 06:03:56,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 06:03:56,841 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 06:03:56,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:56,842 INFO L225 Difference]: With dead ends: 52 [2018-01-21 06:03:56,842 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 06:03:56,843 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1463, Invalid=1617, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 06:03:56,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 06:03:56,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 06:03:56,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 06:03:56,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 06:03:56,847 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 06:03:56,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:56,847 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 06:03:56,847 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 06:03:56,847 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 06:03:56,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 06:03:56,848 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:56,848 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:56,848 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:56,848 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 06:03:56,849 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:56,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:56,849 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:56,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:56,850 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:56,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:56,858 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:57,106 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:57,106 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:57,106 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:57,106 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:57,106 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:57,106 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:57,106 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:57,112 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:57,112 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:57,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:57,126 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:57,135 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:57,136 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:58,044 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:58,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:58,064 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:58,066 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:58,067 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:03:58,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:58,095 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:58,101 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:58,101 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:58,303 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:58,303 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:58,304 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 06:03:58,304 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:58,304 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 06:03:58,304 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 06:03:58,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1542, Invalid=1650, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 06:03:58,305 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 06:03:58,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:58,342 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 06:03:58,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 06:03:58,342 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 06:03:58,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:58,343 INFO L225 Difference]: With dead ends: 53 [2018-01-21 06:03:58,343 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 06:03:58,344 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1573, Invalid=1733, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 06:03:58,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 06:03:58,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 06:03:58,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 06:03:58,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 06:03:58,346 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 06:03:58,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:58,346 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 06:03:58,346 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 06:03:58,346 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 06:03:58,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 06:03:58,347 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:58,347 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:58,347 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:58,347 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 06:03:58,347 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:58,347 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:58,347 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:03:58,347 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:58,348 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:58,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:58,354 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:03:58,608 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:58,609 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:58,609 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:03:58,609 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:03:58,609 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:03:58,609 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:58,609 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:03:58,615 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:58,615 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:58,621 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:58,626 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:58,628 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:58,629 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:58,638 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:58,639 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:59,603 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:59,623 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:03:59,623 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:03:59,625 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:03:59,626 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:03:59,634 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:59,647 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:03:59,659 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:03:59,663 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:03:59,668 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:59,668 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:03:59,872 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:03:59,873 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:03:59,873 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 06:03:59,873 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:03:59,874 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 06:03:59,874 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 06:03:59,874 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1655, Invalid=1767, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 06:03:59,874 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 06:03:59,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:03:59,923 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 06:03:59,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 06:03:59,923 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 06:03:59,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:03:59,924 INFO L225 Difference]: With dead ends: 54 [2018-01-21 06:03:59,924 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 06:03:59,924 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1687, Invalid=1853, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 06:03:59,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 06:03:59,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 06:03:59,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 06:03:59,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 06:03:59,927 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 06:03:59,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:03:59,927 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 06:03:59,927 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 06:03:59,928 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 06:03:59,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 06:03:59,928 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:03:59,928 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:03:59,928 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:03:59,928 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 06:03:59,928 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:03:59,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:59,929 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:03:59,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:03:59,929 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:03:59,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:03:59,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:00,287 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:00,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:00,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:00,287 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:00,287 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:00,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:00,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:00,292 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:04:00,292 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:04:00,299 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,302 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,303 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,305 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,307 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,309 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,310 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,311 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,313 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,314 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,315 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,316 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:00,316 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:00,318 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:00,327 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:00,327 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:01,362 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:01,382 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:01,382 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:01,385 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:04:01,385 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:04:01,395 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,409 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,417 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,425 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,434 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,443 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,453 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,496 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,522 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,535 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:01,545 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:01,548 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:01,554 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:01,554 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:01,774 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:01,775 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:01,775 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 06:04:01,775 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:01,775 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 06:04:01,776 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 06:04:01,776 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1772, Invalid=1888, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 06:04:01,776 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 06:04:01,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:01,819 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 06:04:01,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 06:04:01,819 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 06:04:01,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:01,820 INFO L225 Difference]: With dead ends: 55 [2018-01-21 06:04:01,820 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 06:04:01,821 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1805, Invalid=1977, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 06:04:01,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 06:04:01,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 06:04:01,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 06:04:01,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 06:04:01,825 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 06:04:01,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:01,825 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 06:04:01,825 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 06:04:01,825 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 06:04:01,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 06:04:01,826 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:01,826 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:01,826 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:01,826 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 06:04:01,826 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:01,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:01,827 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:01,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:01,828 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:01,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:01,837 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:02,155 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:02,156 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:02,156 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:02,156 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:02,156 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:02,156 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:02,156 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:02,163 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:04:02,163 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:04:02,177 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:02,179 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:02,188 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:02,188 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:03,297 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:03,318 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:03,318 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:03,321 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:04:03,321 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:04:03,360 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:03,364 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:03,372 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:03,372 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:03,613 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:03,614 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:03,614 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 06:04:03,614 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:03,614 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 06:04:03,614 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 06:04:03,615 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1893, Invalid=2013, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 06:04:03,615 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 06:04:03,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:03,667 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 06:04:03,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 06:04:03,667 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 06:04:03,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:03,668 INFO L225 Difference]: With dead ends: 56 [2018-01-21 06:04:03,668 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 06:04:03,668 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1927, Invalid=2105, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 06:04:03,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 06:04:03,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 06:04:03,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 06:04:03,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 06:04:03,671 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 06:04:03,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:03,671 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 06:04:03,671 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 06:04:03,671 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 06:04:03,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 06:04:03,671 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:03,672 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:03,672 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:03,672 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 06:04:03,672 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:03,672 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:03,672 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:03,673 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:03,673 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:03,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:03,679 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:03,997 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:03,997 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:03,997 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:03,997 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:03,998 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:03,998 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:03,998 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:04,005 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:04:04,005 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:04:04,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,010 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,011 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,012 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,012 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,018 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,020 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,021 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,024 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:04,025 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:04,027 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:04,036 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:04,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:05,206 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:05,226 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:05,226 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:05,229 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:04:05,229 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:04:05,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,243 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,251 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,256 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,273 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,287 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,295 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,303 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,312 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,326 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:05,337 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:05,342 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:05,351 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:05,351 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:05,638 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:05,640 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:05,640 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 06:04:05,640 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:05,640 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 06:04:05,640 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 06:04:05,640 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2018, Invalid=2142, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 06:04:05,641 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 06:04:05,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:05,723 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 06:04:05,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 06:04:05,723 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 06:04:05,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:05,723 INFO L225 Difference]: With dead ends: 57 [2018-01-21 06:04:05,723 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 06:04:05,724 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2053, Invalid=2237, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 06:04:05,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 06:04:05,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 06:04:05,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 06:04:05,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 06:04:05,726 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 06:04:05,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:05,726 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 06:04:05,727 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 06:04:05,727 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 06:04:05,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 06:04:05,727 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:05,727 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:05,727 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:05,727 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 06:04:05,727 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:05,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:05,728 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:05,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:05,728 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:05,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:05,735 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:06,085 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:06,085 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:06,085 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:06,085 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:06,085 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:06,086 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:06,086 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:06,090 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:04:06,090 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:04:06,097 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,099 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,100 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,101 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,102 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,103 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,104 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,105 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,106 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,107 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,108 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,109 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,110 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,111 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,112 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:06,114 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:06,116 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:06,125 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:06,125 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:07,351 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:07,371 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:07,371 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:07,374 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:04:07,374 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:04:07,383 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,389 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,397 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,404 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,412 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,421 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,449 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,460 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,470 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,482 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,493 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,505 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,518 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:07,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:07,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:07,550 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:07,550 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:07,829 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:07,830 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:07,830 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 06:04:07,830 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:07,831 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 06:04:07,831 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 06:04:07,831 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=2275, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 06:04:07,831 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 06:04:07,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:07,868 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 06:04:07,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 06:04:07,868 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 06:04:07,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:07,869 INFO L225 Difference]: With dead ends: 58 [2018-01-21 06:04:07,869 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 06:04:07,869 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2183, Invalid=2373, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 06:04:07,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 06:04:07,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 06:04:07,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 06:04:07,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 06:04:07,871 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 06:04:07,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:07,872 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 06:04:07,872 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 06:04:07,872 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 06:04:07,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 06:04:07,872 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:07,872 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:07,872 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:07,872 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 06:04:07,873 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:07,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:07,873 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:07,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:07,873 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:07,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:07,880 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:08,262 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:08,262 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:08,262 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:08,262 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:08,262 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:08,262 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:08,262 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:08,268 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:04:08,268 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:04:08,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:08,285 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:08,338 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:08,339 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:08,444 WARN L143 SmtUtils]: Spent 104ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 06:04:08,566 WARN L143 SmtUtils]: Spent 120ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 06:04:09,872 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:09,892 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:09,892 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:09,897 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:04:09,897 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:04:09,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:09,929 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:09,935 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:09,935 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:10,192 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:10,193 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:10,193 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 06:04:10,193 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:10,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 06:04:10,193 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 06:04:10,194 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2280, Invalid=2412, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 06:04:10,194 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 06:04:10,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:10,243 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 06:04:10,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 06:04:10,243 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 06:04:10,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:10,243 INFO L225 Difference]: With dead ends: 59 [2018-01-21 06:04:10,243 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 06:04:10,244 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2317, Invalid=2513, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 06:04:10,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 06:04:10,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 06:04:10,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 06:04:10,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 06:04:10,246 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 06:04:10,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:10,246 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 06:04:10,246 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 06:04:10,246 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 06:04:10,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 06:04:10,247 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:10,247 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:10,247 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:10,247 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 06:04:10,247 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:10,248 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:10,248 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:04:10,248 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:10,248 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:10,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:10,258 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:10,667 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:10,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:10,668 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:10,668 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:10,668 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:10,668 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:10,668 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:10,673 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:04:10,673 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:04:10,680 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:10,687 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:10,688 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:10,690 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:10,699 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:10,699 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:12,071 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:12,090 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:12,091 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:12,093 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:04:12,094 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:04:12,104 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:12,119 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:12,133 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:12,136 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:12,143 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:12,143 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:12,409 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:12,410 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:12,410 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 06:04:12,410 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:12,410 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 06:04:12,411 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 06:04:12,411 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2417, Invalid=2553, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 06:04:12,411 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 06:04:12,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:12,475 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 06:04:12,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 06:04:12,475 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 06:04:12,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:12,476 INFO L225 Difference]: With dead ends: 60 [2018-01-21 06:04:12,476 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 06:04:12,476 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2455, Invalid=2657, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 06:04:12,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 06:04:12,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 06:04:12,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 06:04:12,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 06:04:12,480 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 06:04:12,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:12,480 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 06:04:12,480 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 06:04:12,480 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 06:04:12,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 06:04:12,480 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:12,481 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:12,481 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:12,481 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 06:04:12,481 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:12,481 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:12,481 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:12,481 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:12,482 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:12,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:12,488 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:12,902 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:12,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:12,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:12,903 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:12,903 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:12,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:12,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:12,908 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:04:12,908 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:04:12,914 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,917 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,918 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,919 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,920 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,921 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,922 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,924 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,926 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,927 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,928 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,929 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,930 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,932 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:12,933 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:12,934 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:12,945 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:12,945 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:14,390 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:14,410 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:14,410 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:14,413 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:04:14,413 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:04:14,422 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,428 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,436 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,444 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,452 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,461 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,479 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,510 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,522 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,534 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,546 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,558 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,572 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,585 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,599 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:14,609 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:14,613 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:14,620 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:14,620 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:14,917 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:14,918 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:14,918 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 06:04:14,918 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:14,918 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 06:04:14,919 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 06:04:14,919 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2558, Invalid=2698, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 06:04:14,919 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 06:04:14,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:14,964 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 06:04:14,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 06:04:14,964 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 06:04:14,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:14,965 INFO L225 Difference]: With dead ends: 61 [2018-01-21 06:04:14,965 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 06:04:14,965 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2597, Invalid=2805, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 06:04:14,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 06:04:14,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 06:04:14,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 06:04:14,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 06:04:14,968 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 06:04:14,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:14,969 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 06:04:14,969 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 06:04:14,969 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 06:04:14,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 06:04:14,969 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:14,969 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:14,970 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:14,970 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 06:04:14,970 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:14,970 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:14,971 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:14,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:14,971 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:14,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:14,977 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:15,386 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:15,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:15,386 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:15,386 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:15,387 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:15,387 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:15,387 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:15,391 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:04:15,391 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:04:15,407 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:15,409 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:15,418 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:15,418 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:16,939 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:16,958 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:16,958 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:16,961 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:04:16,961 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:04:17,005 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:17,009 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:17,015 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:17,015 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:17,315 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:17,316 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:17,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 06:04:17,316 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:17,316 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 06:04:17,316 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 06:04:17,316 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2703, Invalid=2847, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 06:04:17,317 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 06:04:17,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:17,387 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 06:04:17,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 06:04:17,387 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 06:04:17,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:17,388 INFO L225 Difference]: With dead ends: 62 [2018-01-21 06:04:17,388 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 06:04:17,388 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2743, Invalid=2957, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 06:04:17,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 06:04:17,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 06:04:17,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 06:04:17,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 06:04:17,392 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 06:04:17,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:17,392 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 06:04:17,392 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 06:04:17,392 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 06:04:17,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 06:04:17,393 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:17,393 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:17,393 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:17,393 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 06:04:17,393 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:17,394 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:17,394 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:17,394 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:17,394 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:17,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:17,404 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:17,841 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:17,841 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:17,841 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:17,841 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:17,841 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:17,842 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:17,842 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:17,846 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:04:17,846 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:04:17,850 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,851 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,852 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,853 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,853 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,854 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,855 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,856 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,857 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,858 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,858 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,859 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,860 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,861 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,862 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,864 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,865 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,869 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:17,870 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:17,872 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:17,885 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:17,885 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:19,484 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:19,504 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:19,504 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:19,507 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:04:19,507 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:04:19,511 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,513 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,519 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,527 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,532 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,536 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,542 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,554 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,560 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,567 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,575 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,583 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,591 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,600 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,624 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:19,636 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:19,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:19,651 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:19,651 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:19,983 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:19,984 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:19,984 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 06:04:19,984 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:19,984 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 06:04:19,985 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 06:04:19,985 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2852, Invalid=3000, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 06:04:19,985 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 06:04:20,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:20,027 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 06:04:20,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 06:04:20,028 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 06:04:20,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:20,028 INFO L225 Difference]: With dead ends: 63 [2018-01-21 06:04:20,028 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 06:04:20,029 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2893, Invalid=3113, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 06:04:20,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 06:04:20,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 06:04:20,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 06:04:20,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 06:04:20,032 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 06:04:20,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:20,032 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 06:04:20,032 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 06:04:20,032 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 06:04:20,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 06:04:20,032 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:20,033 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:20,033 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:20,033 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 06:04:20,033 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:20,034 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:20,034 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:20,034 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:20,034 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:20,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:20,044 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:20,529 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:20,529 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:20,529 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:20,529 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:20,529 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:20,529 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:20,529 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:20,534 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:04:20,534 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:04:20,541 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,544 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,546 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,550 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,551 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,552 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,553 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,558 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,560 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,561 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:20,562 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:20,563 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:20,573 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:20,573 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:22,263 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:22,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:22,283 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:22,285 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:04:22,286 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:04:22,296 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,302 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,310 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,317 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,325 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,334 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,343 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,353 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,363 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,373 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,384 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,395 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,407 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,420 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,432 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,445 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,459 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:04:22,500 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:22,503 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:22,511 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:22,511 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:22,842 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:22,843 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:22,843 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 06:04:22,843 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:22,844 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 06:04:22,844 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 06:04:22,844 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=3157, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 06:04:22,844 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-21 06:04:22,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:22,888 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 06:04:22,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 06:04:22,889 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-21 06:04:22,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:22,889 INFO L225 Difference]: With dead ends: 64 [2018-01-21 06:04:22,889 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 06:04:22,890 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3047, Invalid=3273, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 06:04:22,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 06:04:22,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 06:04:22,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 06:04:22,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 06:04:22,892 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 06:04:22,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:22,892 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 06:04:22,892 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 06:04:22,892 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 06:04:22,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 06:04:22,893 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:22,893 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:22,893 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:22,893 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 06:04:22,893 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:22,893 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:22,894 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:22,894 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:22,894 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:22,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:22,903 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:23,341 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:23,341 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:23,341 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:23,341 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:23,341 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:23,341 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:23,341 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:23,347 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:04:23,347 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:04:23,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:23,366 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:23,377 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:23,377 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:25,160 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:25,180 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:25,180 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:25,182 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:04:25,183 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:04:25,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:25,219 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:25,226 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:25,226 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:25,602 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:25,606 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:25,607 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 06:04:25,607 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:25,607 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 06:04:25,607 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 06:04:25,608 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3162, Invalid=3318, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 06:04:25,608 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-21 06:04:25,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:25,667 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 06:04:25,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 06:04:25,667 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-21 06:04:25,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:25,667 INFO L225 Difference]: With dead ends: 65 [2018-01-21 06:04:25,667 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 06:04:25,668 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3205, Invalid=3437, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 06:04:25,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 06:04:25,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 06:04:25,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 06:04:25,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 06:04:25,670 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 06:04:25,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:25,670 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 06:04:25,670 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 06:04:25,670 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 06:04:25,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 06:04:25,671 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:25,671 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:25,671 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:25,671 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-21 06:04:25,671 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:25,671 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:25,671 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:04:25,672 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:25,672 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:25,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:25,678 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:26,382 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:26,383 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:26,383 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:26,383 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:26,383 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:26,383 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:26,383 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:26,388 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:04:26,388 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:04:26,396 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:26,403 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:26,405 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:26,406 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:26,417 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:26,417 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:28,277 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:28,296 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:28,296 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:04:28,299 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:04:28,299 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:04:28,309 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:28,327 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:04:28,341 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:28,345 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:28,352 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:28,353 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:04:28,693 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:28,694 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:04:28,694 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-21 06:04:28,694 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:04:28,695 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-21 06:04:28,695 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-21 06:04:28,695 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3323, Invalid=3483, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 06:04:28,695 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 43 states. [2018-01-21 06:04:28,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:04:28,741 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 06:04:28,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-21 06:04:28,741 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 55 [2018-01-21 06:04:28,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:04:28,742 INFO L225 Difference]: With dead ends: 66 [2018-01-21 06:04:28,742 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 06:04:28,742 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 177 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=3367, Invalid=3605, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 06:04:28,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 06:04:28,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 06:04:28,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 06:04:28,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 06:04:28,744 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 06:04:28,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:04:28,745 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 06:04:28,745 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-21 06:04:28,745 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 06:04:28,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 06:04:28,745 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:04:28,745 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:04:28,745 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:04:28,745 INFO L82 PathProgramCache]: Analyzing trace with hash -1090430805, now seen corresponding path program 39 times [2018-01-21 06:04:28,745 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:04:28,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:28,746 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:04:28,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:04:28,746 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:04:28,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:04:28,755 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:04:29,235 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:29,235 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:29,235 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:04:29,235 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:04:29,235 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:04:29,235 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:04:29,235 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:04:29,241 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:04:29,242 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:04:29,250 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,252 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,254 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,255 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,256 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,257 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,258 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,260 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,261 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,262 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,263 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,265 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,266 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,267 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,269 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,270 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,271 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,273 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,274 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,275 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:04:29,276 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:04:29,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:04:29,289 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:04:29,289 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 06:04:30,591 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 06:04:30,624 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:04:30,627 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:04:30,627 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:04:30,627 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:04:30,627 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:04:30,627 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:04:30,627 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:04:30,627 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:04:30,627 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 06:04:30,627 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:04:30,628 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:04:30,628 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:04:30,629 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 06:04:30 BoogieIcfgContainer [2018-01-21 06:04:30,629 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 06:04:30,630 INFO L168 Benchmark]: Toolchain (without parser) took 55480.25 ms. Allocated memory was 305.1 MB in the beginning and 810.5 MB in the end (delta: 505.4 MB). Free memory was 264.4 MB in the beginning and 436.1 MB in the end (delta: -171.7 MB). Peak memory consumption was 333.8 MB. Max. memory is 5.3 GB. [2018-01-21 06:04:30,630 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 305.1 MB. Free memory is still 269.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 06:04:30,631 INFO L168 Benchmark]: CACSL2BoogieTranslator took 165.08 ms. Allocated memory is still 305.1 MB. Free memory was 263.4 MB in the beginning and 256.4 MB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 5.3 GB. [2018-01-21 06:04:30,631 INFO L168 Benchmark]: Boogie Preprocessor took 26.69 ms. Allocated memory is still 305.1 MB. Free memory was 256.4 MB in the beginning and 254.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 06:04:30,631 INFO L168 Benchmark]: RCFGBuilder took 167.10 ms. Allocated memory is still 305.1 MB. Free memory was 254.4 MB in the beginning and 242.8 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 06:04:30,631 INFO L168 Benchmark]: TraceAbstraction took 55114.73 ms. Allocated memory was 305.1 MB in the beginning and 810.5 MB in the end (delta: 505.4 MB). Free memory was 241.8 MB in the beginning and 436.1 MB in the end (delta: -194.3 MB). Peak memory consumption was 311.1 MB. Max. memory is 5.3 GB. [2018-01-21 06:04:30,633 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 305.1 MB. Free memory is still 269.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 165.08 ms. Allocated memory is still 305.1 MB. Free memory was 263.4 MB in the beginning and 256.4 MB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 26.69 ms. Allocated memory is still 305.1 MB. Free memory was 256.4 MB in the beginning and 254.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 167.10 ms. Allocated memory is still 305.1 MB. Free memory was 254.4 MB in the beginning and 242.8 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55114.73 ms. Allocated memory was 305.1 MB in the beginning and 810.5 MB in the end (delta: 505.4 MB). Free memory was 241.8 MB in the beginning and 436.1 MB in the end (delta: -194.3 MB). Peak memory consumption was 311.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.219178 RENAME_VARIABLES(MILLISECONDS) : 0.080351 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.164682 PROJECTAWAY(MILLISECONDS) : 0.096715 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.199579 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.114399 ADD_EQUALITY(MILLISECONDS) : 0.041162 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.014125 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 57 with TraceHistMax 39, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 71 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 54.8s OverallTime, 40 OverallIterations, 39 TraceHistogramMax, 1.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 627 SDtfs, 78 SDslu, 10596 SDs, 0 SdLazy, 1654 SolverSat, 49 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6408 GetRequests, 4619 SyntacticMatches, 76 SemanticMatches, 1713 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4559 ImplicationChecksByTransitivity, 30.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57occurred in iteration=39, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.1s SatisfiabilityAnalysisTime, 45.3s InterpolantComputationTime, 4178 NumberOfCodeBlocks, 4178 NumberOfCodeBlocksAsserted, 507 NumberOfCheckSat, 6761 ConstructedInterpolants, 0 QuantifiedInterpolants, 993159 SizeOfPredicates, 76 NumberOfNonLiveVariables, 9082 ConjunctsInSsa, 1710 ConjunctsInUnsatCore, 191 InterpolantComputations, 1 PerfectInterpolantSequences, 0/49400 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_06-04-30-643.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_06-04-30-643.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_06-04-30-643.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_06-04-30-643.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_06-04-30-643.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_06-04-30-643.csv Completed graceful shutdown