java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 06:09:32,743 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 06:09:32,744 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 06:09:32,760 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 06:09:32,760 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 06:09:32,761 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 06:09:32,762 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 06:09:32,764 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 06:09:32,766 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 06:09:32,767 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 06:09:32,768 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 06:09:32,768 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 06:09:32,769 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 06:09:32,770 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 06:09:32,771 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 06:09:32,774 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 06:09:32,776 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 06:09:32,778 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 06:09:32,780 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 06:09:32,781 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 06:09:32,783 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 06:09:32,788 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 06:09:32,788 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 06:09:32,789 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf [2018-01-21 06:09:32,797 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 06:09:32,797 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 06:09:32,797 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 06:09:32,798 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 06:09:32,798 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 06:09:32,798 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 06:09:32,798 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 06:09:32,798 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 06:09:32,799 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 06:09:32,799 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 06:09:32,799 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 06:09:32,799 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 06:09:32,799 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 06:09:32,800 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 06:09:32,800 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 06:09:32,800 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 06:09:32,800 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 06:09:32,800 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 06:09:32,800 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 06:09:32,800 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 06:09:32,801 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 06:09:32,801 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 06:09:32,801 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 06:09:32,801 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 06:09:32,801 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 06:09:32,802 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 06:09:32,802 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:09:32,802 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 06:09:32,802 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 06:09:32,802 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 06:09:32,802 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 06:09:32,802 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 06:09:32,802 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 06:09:32,803 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 06:09:32,803 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 06:09:32,803 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 06:09:32,803 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 06:09:32,804 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 06:09:32,804 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 06:09:32,836 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 06:09:32,846 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 06:09:32,850 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 06:09:32,851 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 06:09:32,851 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 06:09:32,852 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset_true-valid-memsafety_true-termination.c [2018-01-21 06:09:32,951 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 06:09:32,954 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 06:09:32,955 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 06:09:32,955 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 06:09:32,960 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 06:09:32,961 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:09:32" (1/1) ... [2018-01-21 06:09:32,964 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47d05f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:32, skipping insertion in model container [2018-01-21 06:09:32,964 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:09:32" (1/1) ... [2018-01-21 06:09:32,979 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:09:32,993 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:09:33,108 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:09:33,124 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:09:33,129 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33 WrapperNode [2018-01-21 06:09:33,129 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 06:09:33,130 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 06:09:33,130 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 06:09:33,130 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 06:09:33,142 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (1/1) ... [2018-01-21 06:09:33,142 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (1/1) ... [2018-01-21 06:09:33,150 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (1/1) ... [2018-01-21 06:09:33,150 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (1/1) ... [2018-01-21 06:09:33,153 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (1/1) ... [2018-01-21 06:09:33,156 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (1/1) ... [2018-01-21 06:09:33,157 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (1/1) ... [2018-01-21 06:09:33,159 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 06:09:33,159 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 06:09:33,160 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 06:09:33,160 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 06:09:33,161 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:09:33,211 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 06:09:33,211 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 06:09:33,211 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 06:09:33,211 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 06:09:33,211 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 06:09:33,211 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 06:09:33,211 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 06:09:33,211 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 06:09:33,212 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 06:09:33,212 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 06:09:33,212 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 06:09:33,212 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 06:09:33,352 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 06:09:33,352 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:09:33 BoogieIcfgContainer [2018-01-21 06:09:33,353 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 06:09:33,353 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 06:09:33,353 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 06:09:33,355 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 06:09:33,355 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 06:09:32" (1/3) ... [2018-01-21 06:09:33,356 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@743d48d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:09:33, skipping insertion in model container [2018-01-21 06:09:33,357 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:09:33" (2/3) ... [2018-01-21 06:09:33,357 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@743d48d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:09:33, skipping insertion in model container [2018-01-21 06:09:33,357 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:09:33" (3/3) ... [2018-01-21 06:09:33,359 INFO L105 eAbstractionObserver]: Analyzing ICFG memset_true-valid-memsafety_true-termination.c [2018-01-21 06:09:33,365 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 06:09:33,371 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 06:09:33,412 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:09:33,412 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:09:33,412 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:09:33,413 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:09:33,413 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:09:33,413 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:09:33,413 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:09:33,413 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 06:09:33,414 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:09:33,430 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:09:33,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 06:09:33,436 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:33,437 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 06:09:33,437 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 06:09:33,442 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 06:09:33,445 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:33,496 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:33,496 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:33,496 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:33,496 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:33,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:09:33,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:09:33,563 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 06:09:33,569 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 06:09:33,576 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:09:33,576 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:09:33,576 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:09:33,576 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:09:33,576 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:09:33,576 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:09:33,577 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:09:33,577 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 06:09:33,577 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:09:33,578 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:09:33,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 06:09:33,579 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:33,579 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:33,579 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:33,579 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 06:09:33,580 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:33,581 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:33,581 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:33,581 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:33,581 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:33,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:33,611 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:33,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:33,713 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 06:09:33,749 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 06:09:33,749 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 06:09:33,751 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 06:09:33,761 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 06:09:33,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 06:09:33,764 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 06:09:33,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:33,808 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:09:33,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 06:09:33,810 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 06:09:33,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:33,819 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:09:33,819 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 06:09:33,881 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 06:09:33,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 06:09:33,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 06:09:33,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 06:09:33,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 06:09:33,914 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 06:09:33,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:33,914 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 06:09:33,914 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 06:09:33,914 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 06:09:33,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 06:09:33,915 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:33,915 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:33,915 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:33,915 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 06:09:33,915 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:33,916 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:33,916 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:33,916 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:33,916 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:33,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:33,930 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:34,006 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:34,006 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:34,006 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:34,007 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 06:09:34,009 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 06:09:34,052 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 06:09:34,052 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 06:09:34,878 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 06:09:34,880 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 06:09:34,891 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 06:09:34,891 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:34,891 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:34,904 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:34,904 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:34,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:34,934 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:35,028 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:35,028 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:35,263 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:35,286 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:35,286 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:35,291 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:35,291 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:35,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:35,323 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:35,328 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:35,328 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:35,459 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:35,461 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:35,461 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 11 [2018-01-21 06:09:35,462 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:35,463 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 06:09:35,463 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 06:09:35,463 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-21 06:09:35,464 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 8 states. [2018-01-21 06:09:35,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:35,511 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 06:09:35,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 06:09:35,512 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 18 [2018-01-21 06:09:35,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:35,513 INFO L225 Difference]: With dead ends: 29 [2018-01-21 06:09:35,513 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 06:09:35,514 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 64 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-21 06:09:35,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 06:09:35,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 06:09:35,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 06:09:35,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 06:09:35,517 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 06:09:35,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:35,517 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 06:09:35,517 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 06:09:35,518 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 06:09:35,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 06:09:35,518 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:35,518 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:35,518 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:35,519 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 06:09:35,519 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:35,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:35,520 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:35,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:35,521 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:35,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:35,535 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:35,615 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:35,616 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:35,616 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:35,616 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:35,616 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:35,616 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:35,616 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:35,630 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:35,630 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:35,645 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:35,648 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:35,648 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:35,650 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:35,709 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:35,709 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:35,819 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:35,844 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:35,844 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:35,847 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:35,848 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:35,860 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:35,867 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:35,873 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:35,877 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:35,882 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:35,882 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:35,998 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,001 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:36,001 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 14 [2018-01-21 06:09:36,001 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:36,001 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 06:09:36,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 06:09:36,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-01-21 06:09:36,002 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 10 states. [2018-01-21 06:09:36,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:36,029 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 06:09:36,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 06:09:36,030 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-01-21 06:09:36,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:36,030 INFO L225 Difference]: With dead ends: 30 [2018-01-21 06:09:36,030 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 06:09:36,031 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2018-01-21 06:09:36,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 06:09:36,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 06:09:36,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 06:09:36,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 06:09:36,034 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 06:09:36,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:36,035 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 06:09:36,035 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 06:09:36,035 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 06:09:36,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 06:09:36,036 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:36,036 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:36,036 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:36,036 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 06:09:36,036 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:36,037 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:36,037 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:36,038 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:36,038 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:36,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:36,050 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:36,122 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,123 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:36,123 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:36,123 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:36,123 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:36,123 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:36,124 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:36,131 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:36,131 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:36,141 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:36,143 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:36,144 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:36,145 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:36,146 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:36,177 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,177 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:36,293 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,314 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:36,314 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:36,317 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:36,317 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:36,328 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:36,334 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:36,342 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:36,347 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:36,350 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:36,355 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,355 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:36,392 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,393 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:36,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 06:09:36,393 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:36,394 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 06:09:36,394 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 06:09:36,394 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 06:09:36,394 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 12 states. [2018-01-21 06:09:36,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:36,415 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 06:09:36,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 06:09:36,416 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 20 [2018-01-21 06:09:36,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:36,416 INFO L225 Difference]: With dead ends: 31 [2018-01-21 06:09:36,416 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 06:09:36,417 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 68 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 06:09:36,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 06:09:36,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 06:09:36,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 06:09:36,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 06:09:36,420 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 06:09:36,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:36,420 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 06:09:36,420 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 06:09:36,420 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 06:09:36,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 06:09:36,421 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:36,421 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:36,421 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:36,421 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 06:09:36,421 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:36,422 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:36,422 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:36,422 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:36,422 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:36,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:36,435 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:36,493 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,494 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:36,494 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:36,494 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:36,494 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:36,494 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:36,494 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:36,501 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:36,501 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:36,515 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:36,517 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:36,557 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,557 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:36,680 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:36,702 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:36,705 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:36,705 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:36,731 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:36,735 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:36,738 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,739 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:36,849 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:36,852 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:36,853 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 20 [2018-01-21 06:09:36,853 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:36,853 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 06:09:36,853 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 06:09:36,854 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=239, Unknown=0, NotChecked=0, Total=380 [2018-01-21 06:09:36,854 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 14 states. [2018-01-21 06:09:36,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:36,901 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 06:09:36,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 06:09:36,902 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-01-21 06:09:36,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:36,903 INFO L225 Difference]: With dead ends: 32 [2018-01-21 06:09:36,903 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 06:09:36,904 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-21 06:09:36,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 06:09:36,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 06:09:36,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 06:09:36,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 06:09:36,907 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 06:09:36,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:36,908 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 06:09:36,908 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 06:09:36,908 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 06:09:36,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 06:09:36,909 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:36,909 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:36,909 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:36,909 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 06:09:36,909 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:36,910 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:36,910 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:36,910 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:36,910 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:36,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:36,923 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:37,011 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:37,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:37,012 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:37,012 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:37,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:37,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:37,021 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:37,022 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:37,026 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:37,029 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:37,030 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:37,034 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:37,035 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:37,037 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:37,083 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,083 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:37,205 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,226 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:37,226 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:37,229 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:37,229 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:37,233 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:37,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:37,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:37,248 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:37,255 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:37,258 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:37,262 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,262 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:37,315 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,316 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:37,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 06:09:37,317 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:37,317 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 06:09:37,317 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 06:09:37,318 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 06:09:37,318 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 16 states. [2018-01-21 06:09:37,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:37,362 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:09:37,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 06:09:37,363 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 22 [2018-01-21 06:09:37,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:37,363 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:09:37,363 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 06:09:37,364 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 06:09:37,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 06:09:37,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 06:09:37,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 06:09:37,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 06:09:37,367 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 06:09:37,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:37,367 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 06:09:37,367 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 06:09:37,368 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 06:09:37,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 06:09:37,368 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:37,368 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:37,368 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:37,368 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 06:09:37,368 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:37,369 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:37,369 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:37,369 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:37,369 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:37,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:37,381 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:37,460 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,460 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:37,460 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:37,460 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:37,460 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:37,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:37,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:37,469 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:37,469 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:37,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:37,478 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:37,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:37,480 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:37,481 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:37,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:37,524 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,524 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:37,670 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:37,690 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:37,693 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:37,693 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:37,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:37,710 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:37,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:37,727 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:37,733 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:37,737 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:37,748 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,748 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:37,857 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:37,859 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:37,859 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 06:09:37,859 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:37,860 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 06:09:37,860 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 06:09:37,860 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 06:09:37,861 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 18 states. [2018-01-21 06:09:37,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:37,932 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 06:09:37,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 06:09:37,935 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 23 [2018-01-21 06:09:37,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:37,936 INFO L225 Difference]: With dead ends: 34 [2018-01-21 06:09:37,937 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 06:09:37,937 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 06:09:37,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 06:09:37,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 06:09:37,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 06:09:37,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 06:09:37,941 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 06:09:37,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:37,942 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 06:09:37,942 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 06:09:37,942 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 06:09:37,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 06:09:37,942 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:37,943 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:37,943 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:37,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 06:09:37,943 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:37,944 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:37,944 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:37,944 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:37,945 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:37,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:37,957 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:38,086 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,086 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:38,086 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:38,087 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:38,087 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:38,087 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:38,087 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:38,094 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:38,095 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:38,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:38,105 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:38,159 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,159 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:38,333 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,353 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:38,353 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:38,356 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:38,356 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:38,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:38,374 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:38,378 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,378 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:38,432 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,433 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:38,433 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 06:09:38,433 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:38,434 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 06:09:38,434 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 06:09:38,434 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 06:09:38,434 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 20 states. [2018-01-21 06:09:38,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:38,461 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 06:09:38,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 06:09:38,461 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 24 [2018-01-21 06:09:38,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:38,462 INFO L225 Difference]: With dead ends: 35 [2018-01-21 06:09:38,462 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 06:09:38,463 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 06:09:38,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 06:09:38,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 06:09:38,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 06:09:38,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 06:09:38,465 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 06:09:38,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:38,465 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 06:09:38,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 06:09:38,466 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 06:09:38,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 06:09:38,466 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:38,466 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:38,466 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:38,466 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 06:09:38,466 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:38,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:38,467 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:38,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:38,467 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:38,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:38,479 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:38,597 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,597 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:38,597 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:38,597 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:38,597 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:38,597 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:38,598 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:38,602 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:38,602 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:38,609 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:38,612 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:38,613 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:38,614 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:38,666 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,666 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:38,883 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:38,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:38,906 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:38,906 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:38,915 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:38,923 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:38,930 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:38,933 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:38,937 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:38,937 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:39,014 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:39,019 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:39,020 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 06:09:39,020 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:39,020 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 06:09:39,020 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 06:09:39,021 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 06:09:39,021 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 22 states. [2018-01-21 06:09:39,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:39,051 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 06:09:39,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 06:09:39,051 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 25 [2018-01-21 06:09:39,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:39,052 INFO L225 Difference]: With dead ends: 36 [2018-01-21 06:09:39,052 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 06:09:39,053 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 06:09:39,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 06:09:39,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 06:09:39,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 06:09:39,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 06:09:39,056 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 06:09:39,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:39,056 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 06:09:39,056 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 06:09:39,056 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 06:09:39,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 06:09:39,057 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:39,057 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:39,057 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:39,057 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 06:09:39,058 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:39,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:39,058 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:39,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:39,058 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:39,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:39,067 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:39,206 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:39,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:39,206 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:39,206 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:39,206 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:39,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:39,206 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:39,217 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:39,217 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:39,225 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,232 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,246 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,250 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,256 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,268 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,269 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:39,271 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:39,361 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:39,361 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:39,598 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:39,618 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:39,618 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:39,621 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:39,621 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:39,630 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,636 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,644 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,652 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,660 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,668 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:39,674 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:39,677 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:39,682 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:39,682 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:39,754 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:39,755 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:39,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 06:09:39,755 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:39,756 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 06:09:39,756 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 06:09:39,756 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 06:09:39,757 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 24 states. [2018-01-21 06:09:39,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:39,785 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 06:09:39,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 06:09:39,786 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 26 [2018-01-21 06:09:39,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:39,786 INFO L225 Difference]: With dead ends: 37 [2018-01-21 06:09:39,786 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 06:09:39,787 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 06:09:39,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 06:09:39,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 06:09:39,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 06:09:39,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 06:09:39,790 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 06:09:39,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:39,791 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 06:09:39,791 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 06:09:39,791 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 06:09:39,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 06:09:39,792 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:39,792 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:39,792 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:39,792 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 06:09:39,792 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:39,793 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:39,793 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:39,793 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:39,793 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:39,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:39,802 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:39,901 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:39,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:39,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:39,901 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:39,902 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:39,902 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:39,902 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:39,907 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:39,907 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:39,917 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:39,919 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:40,004 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:40,004 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:40,245 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:40,265 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:40,265 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:40,268 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:40,268 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:40,294 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:40,297 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:40,302 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:40,302 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:40,385 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:40,386 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:40,387 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-21 06:09:40,387 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:40,387 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 06:09:40,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 06:09:40,388 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 06:09:40,388 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 26 states. [2018-01-21 06:09:40,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:40,418 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 06:09:40,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 06:09:40,418 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 27 [2018-01-21 06:09:40,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:40,419 INFO L225 Difference]: With dead ends: 38 [2018-01-21 06:09:40,419 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 06:09:40,419 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 06:09:40,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 06:09:40,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 06:09:40,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 06:09:40,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 06:09:40,423 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 06:09:40,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:40,423 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 06:09:40,423 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 06:09:40,424 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 06:09:40,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 06:09:40,424 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:40,424 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:40,424 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:40,425 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 06:09:40,425 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:40,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:40,425 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:40,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:40,426 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:40,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:40,435 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:40,564 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:40,564 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:40,564 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:40,564 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:40,564 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:40,564 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:40,564 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:40,570 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:40,570 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:40,573 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,574 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,575 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,576 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,577 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,577 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,581 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,582 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:40,583 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:40,663 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:40,663 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:40,938 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:40,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:40,959 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:40,962 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:40,962 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:40,966 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,967 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,970 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,974 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,978 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,983 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:40,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:41,000 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:41,003 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:41,008 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:41,008 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:41,110 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:41,111 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:41,112 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 06:09:41,112 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:41,112 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 06:09:41,112 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 06:09:41,113 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 06:09:41,113 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 28 states. [2018-01-21 06:09:41,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:41,182 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 06:09:41,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 06:09:41,183 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 28 [2018-01-21 06:09:41,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:41,184 INFO L225 Difference]: With dead ends: 39 [2018-01-21 06:09:41,184 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 06:09:41,185 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 06:09:41,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 06:09:41,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 06:09:41,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 06:09:41,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 06:09:41,188 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 06:09:41,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:41,189 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 06:09:41,189 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 06:09:41,189 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 06:09:41,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 06:09:41,190 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:41,190 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:41,190 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:41,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 06:09:41,190 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:41,191 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:41,191 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:41,191 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:41,192 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:41,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:41,201 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:41,598 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:41,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:41,599 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:41,599 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:41,599 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:41,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:41,599 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:41,604 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:41,604 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:41,610 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:41,612 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:41,613 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:41,614 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:41,615 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:41,616 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:41,617 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:41,618 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:41,619 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:41,700 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:41,700 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:42,093 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:42,114 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:42,114 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:42,118 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:42,118 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:42,129 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:42,136 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:42,144 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:42,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:42,161 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:42,171 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:42,180 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:42,187 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:42,191 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:42,197 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:42,197 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:42,316 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:42,317 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:42,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 06:09:42,318 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:42,318 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 06:09:42,319 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 06:09:42,319 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 06:09:42,319 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 30 states. [2018-01-21 06:09:42,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:42,373 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 06:09:42,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 06:09:42,374 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 29 [2018-01-21 06:09:42,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:42,375 INFO L225 Difference]: With dead ends: 40 [2018-01-21 06:09:42,375 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 06:09:42,376 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 86 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 06:09:42,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 06:09:42,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 06:09:42,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 06:09:42,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 06:09:42,379 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 06:09:42,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:42,379 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 06:09:42,380 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 06:09:42,380 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 06:09:42,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 06:09:42,380 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:42,381 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:42,381 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:42,381 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 06:09:42,381 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:42,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:42,382 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:42,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:42,382 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:42,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:42,392 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:42,552 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:42,552 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:42,552 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:42,552 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:42,553 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:42,553 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:42,553 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:42,559 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:42,559 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:42,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:42,570 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:42,664 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:42,664 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:43,048 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:43,068 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:43,068 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:43,073 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:43,073 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:43,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:43,105 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:43,111 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:43,111 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:43,239 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:43,240 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:43,240 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 47 [2018-01-21 06:09:43,240 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:43,241 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 06:09:43,241 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 06:09:43,242 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=762, Invalid=1400, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 06:09:43,242 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 32 states. [2018-01-21 06:09:43,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:43,279 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 06:09:43,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 06:09:43,280 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 30 [2018-01-21 06:09:43,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:43,281 INFO L225 Difference]: With dead ends: 41 [2018-01-21 06:09:43,281 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 06:09:43,282 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=795, Invalid=1461, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 06:09:43,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 06:09:43,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 06:09:43,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 06:09:43,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 06:09:43,285 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 06:09:43,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:43,286 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 06:09:43,286 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 06:09:43,286 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 06:09:43,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 06:09:43,287 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:43,287 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:43,287 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:43,287 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 06:09:43,287 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:43,288 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:43,288 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:43,288 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:43,288 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:43,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:43,295 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:43,692 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:43,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:43,693 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:43,693 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:43,693 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:43,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:43,693 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:43,702 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:43,702 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:43,710 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:43,718 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:43,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:43,724 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:43,990 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:43,990 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:44,420 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:44,441 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:44,441 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:44,449 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:44,449 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:44,458 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:44,468 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:44,476 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:44,480 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:44,484 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:44,485 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:44,588 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:44,589 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:44,589 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 50 [2018-01-21 06:09:44,590 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:44,590 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 06:09:44,590 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 06:09:44,591 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=1589, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 06:09:44,591 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 34 states. [2018-01-21 06:09:44,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:44,654 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 06:09:44,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 06:09:44,657 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 31 [2018-01-21 06:09:44,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:44,658 INFO L225 Difference]: With dead ends: 42 [2018-01-21 06:09:44,658 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 06:09:44,659 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 992 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=896, Invalid=1654, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 06:09:44,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 06:09:44,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 06:09:44,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 06:09:44,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 06:09:44,663 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 06:09:44,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:44,664 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 06:09:44,664 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 06:09:44,664 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 06:09:44,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 06:09:44,664 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:44,665 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:44,665 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:44,665 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 06:09:44,665 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:44,666 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:44,666 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:44,666 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:44,666 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:44,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:44,676 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:44,861 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:44,862 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:44,862 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:44,862 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:44,862 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:44,862 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:44,862 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:44,872 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:44,872 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:44,879 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,882 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,885 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,887 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,888 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,889 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,891 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,892 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,904 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:44,905 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:44,906 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:45,098 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:45,098 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:45,741 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:45,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:45,774 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:45,778 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:45,778 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:45,789 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,795 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,804 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,812 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,822 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,832 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,843 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,853 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,865 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:45,873 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:45,876 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:45,881 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:45,881 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:46,024 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:46,026 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:46,026 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 06:09:46,026 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:46,026 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 06:09:46,026 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 06:09:46,027 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 06:09:46,027 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 36 states. [2018-01-21 06:09:46,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:46,070 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 06:09:46,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 06:09:46,071 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 32 [2018-01-21 06:09:46,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:46,071 INFO L225 Difference]: With dead ends: 43 [2018-01-21 06:09:46,071 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 06:09:46,072 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 92 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 06:09:46,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 06:09:46,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 06:09:46,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 06:09:46,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 06:09:46,075 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 06:09:46,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:46,075 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 06:09:46,076 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 06:09:46,076 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 06:09:46,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 06:09:46,076 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:46,076 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:46,076 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:46,077 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 06:09:46,077 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:46,078 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:46,078 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:46,078 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:46,078 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:46,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:46,085 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:46,259 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:46,259 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:46,259 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:46,259 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:46,260 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:46,260 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:46,260 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:46,264 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:46,265 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:46,277 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:46,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:46,401 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:46,401 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:46,859 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:46,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:46,879 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:46,882 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:46,882 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:46,909 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:46,912 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:46,917 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:46,917 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:47,045 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:47,046 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:47,047 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 06:09:47,047 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:47,047 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 06:09:47,047 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 06:09:47,048 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 06:09:47,048 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 38 states. [2018-01-21 06:09:47,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:47,156 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 06:09:47,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 06:09:47,157 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 33 [2018-01-21 06:09:47,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:47,157 INFO L225 Difference]: With dead ends: 44 [2018-01-21 06:09:47,157 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 06:09:47,158 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 06:09:47,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 06:09:47,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 06:09:47,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 06:09:47,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 06:09:47,161 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 06:09:47,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:47,161 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 06:09:47,162 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 06:09:47,162 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 06:09:47,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 06:09:47,162 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:47,162 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:47,162 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:47,162 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 06:09:47,162 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:47,163 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:47,163 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:47,163 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:47,163 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:47,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:47,173 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:47,450 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:47,451 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:47,451 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:47,451 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:47,451 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:47,451 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:47,451 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:47,459 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:47,459 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:47,463 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,464 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,465 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,467 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,468 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,471 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,472 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,473 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,478 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:47,479 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:47,481 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:47,658 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:47,659 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:48,203 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:48,222 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:48,222 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:48,225 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:48,225 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:48,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,230 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,233 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,237 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,249 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,254 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,271 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:48,279 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:48,282 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:48,287 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:48,287 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:48,431 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:48,432 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:48,432 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 59 [2018-01-21 06:09:48,432 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:48,432 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 06:09:48,432 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 06:09:48,433 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1194, Invalid=2228, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 06:09:48,433 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 40 states. [2018-01-21 06:09:48,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:48,491 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 06:09:48,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 06:09:48,491 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 34 [2018-01-21 06:09:48,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:48,491 INFO L225 Difference]: With dead ends: 45 [2018-01-21 06:09:48,492 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 06:09:48,492 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1235, Invalid=2305, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 06:09:48,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 06:09:48,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 06:09:48,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 06:09:48,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 06:09:48,495 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 06:09:48,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:48,495 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 06:09:48,495 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 06:09:48,495 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 06:09:48,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 06:09:48,496 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:48,496 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:48,496 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:48,496 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 06:09:48,496 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:48,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:48,497 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:48,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:48,497 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:48,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:48,506 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:48,752 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:48,753 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:48,753 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:48,753 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:48,753 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:48,753 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:48,753 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:48,758 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:48,793 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:48,799 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,802 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,803 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,804 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,806 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,807 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:48,809 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:48,811 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:48,962 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:48,962 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:49,518 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:49,537 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:49,538 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:49,540 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:49,540 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:49,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,564 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,571 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,580 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,589 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,598 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,607 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,617 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,628 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:49,635 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:49,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:49,644 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:49,644 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:49,774 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:49,775 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:49,775 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 62 [2018-01-21 06:09:49,776 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:49,776 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 06:09:49,776 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 06:09:49,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1317, Invalid=2465, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 06:09:49,777 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 42 states. [2018-01-21 06:09:49,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:49,829 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 06:09:49,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 06:09:49,830 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 35 [2018-01-21 06:09:49,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:49,830 INFO L225 Difference]: With dead ends: 46 [2018-01-21 06:09:49,830 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 06:09:49,831 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 98 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1360, Invalid=2546, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 06:09:49,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 06:09:49,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 06:09:49,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 06:09:49,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 06:09:49,834 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 06:09:49,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:49,834 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 06:09:49,834 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 06:09:49,834 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 06:09:49,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 06:09:49,834 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:49,834 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:49,835 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:49,835 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 06:09:49,835 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:49,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:49,835 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:49,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:49,836 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:49,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:49,843 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:50,151 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:50,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:50,151 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:50,151 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:50,151 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:50,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:50,151 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:50,156 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:50,156 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:50,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:50,170 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:50,336 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:50,336 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:50,923 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:50,942 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:50,943 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:50,945 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:50,945 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:50,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:50,971 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:50,976 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:50,976 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:51,113 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:51,114 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:51,114 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 65 [2018-01-21 06:09:51,114 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:51,115 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 06:09:51,115 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 06:09:51,116 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=2714, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 06:09:51,116 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 44 states. [2018-01-21 06:09:51,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:51,158 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 06:09:51,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 06:09:51,159 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 36 [2018-01-21 06:09:51,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:51,159 INFO L225 Difference]: With dead ends: 47 [2018-01-21 06:09:51,159 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 06:09:51,160 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1727 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1491, Invalid=2799, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 06:09:51,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 06:09:51,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 06:09:51,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 06:09:51,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 06:09:51,162 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 06:09:51,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:51,162 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 06:09:51,162 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 06:09:51,162 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 06:09:51,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 06:09:51,163 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:51,163 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:51,163 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:51,163 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 06:09:51,163 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:51,164 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:51,164 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:51,164 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:51,164 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:51,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:51,171 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:51,425 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:51,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:51,425 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:51,426 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:51,426 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:51,426 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:51,426 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:51,431 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:51,431 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:51,439 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:51,447 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:51,449 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:51,451 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:51,631 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:51,631 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:52,272 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:52,292 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:52,292 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:52,295 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:52,295 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:52,304 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:52,315 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:52,325 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:52,328 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:52,333 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:52,334 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:52,486 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:52,487 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:52,487 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 68 [2018-01-21 06:09:52,487 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:52,487 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-21 06:09:52,488 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-21 06:09:52,488 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1581, Invalid=2975, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 06:09:52,488 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 46 states. [2018-01-21 06:09:52,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:52,529 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 06:09:52,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 06:09:52,529 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 37 [2018-01-21 06:09:52,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:52,530 INFO L225 Difference]: With dead ends: 48 [2018-01-21 06:09:52,530 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 06:09:52,530 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1898 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1628, Invalid=3064, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 06:09:52,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 06:09:52,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 06:09:52,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 06:09:52,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 06:09:52,533 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 06:09:52,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:52,533 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 06:09:52,533 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-21 06:09:52,533 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 06:09:52,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 06:09:52,533 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:52,533 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:52,533 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:52,533 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 06:09:52,534 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:52,534 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:52,534 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:52,534 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:52,534 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:52,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:52,542 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:52,784 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:52,784 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:52,784 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:52,784 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:52,785 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:52,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:52,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:52,790 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:52,790 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:52,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,800 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,801 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,803 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,804 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,805 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,806 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,807 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:52,808 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:52,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:53,000 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:53,000 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:53,696 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:53,716 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:53,716 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:53,719 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:53,719 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:53,727 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,734 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,742 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,749 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,758 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,776 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,814 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,824 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,835 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,846 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,857 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:53,865 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:53,868 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:53,873 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:53,873 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:54,034 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:54,035 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:54,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 71 [2018-01-21 06:09:54,035 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:54,036 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-21 06:09:54,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-21 06:09:54,037 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1722, Invalid=3248, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 06:09:54,037 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 48 states. [2018-01-21 06:09:54,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:54,092 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 06:09:54,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 06:09:54,092 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 38 [2018-01-21 06:09:54,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:54,093 INFO L225 Difference]: With dead ends: 49 [2018-01-21 06:09:54,093 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 06:09:54,094 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2077 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1771, Invalid=3341, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 06:09:54,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 06:09:54,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 06:09:54,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 06:09:54,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 06:09:54,097 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 06:09:54,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:54,097 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 06:09:54,097 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-21 06:09:54,097 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 06:09:54,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 06:09:54,098 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:54,098 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:54,098 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:54,098 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 06:09:54,098 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:54,099 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:54,099 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:54,099 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:54,099 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:54,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:54,106 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:54,351 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:54,351 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:54,351 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:54,351 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:54,352 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:54,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:54,352 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:54,356 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:54,357 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:54,369 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:54,370 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:54,571 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:54,571 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:55,367 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:55,387 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:55,387 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:55,390 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:55,390 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:55,424 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:55,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:55,432 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:55,432 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:55,605 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:55,606 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:55,606 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 74 [2018-01-21 06:09:55,606 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:55,606 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-21 06:09:55,607 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-21 06:09:55,607 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1869, Invalid=3533, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 06:09:55,607 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 50 states. [2018-01-21 06:09:55,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:55,685 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 06:09:55,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 06:09:55,685 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 39 [2018-01-21 06:09:55,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:55,686 INFO L225 Difference]: With dead ends: 50 [2018-01-21 06:09:55,686 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 06:09:55,687 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2264 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1920, Invalid=3630, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 06:09:55,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 06:09:55,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 06:09:55,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 06:09:55,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 06:09:55,691 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 06:09:55,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:55,692 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 06:09:55,692 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-21 06:09:55,692 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 06:09:55,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 06:09:55,692 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:55,692 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:55,693 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:55,693 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 06:09:55,693 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:55,693 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:55,694 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:55,694 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:55,694 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:55,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:55,703 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:56,006 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:56,007 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:56,007 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:56,007 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:56,007 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:56,007 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:56,007 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:56,012 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:56,012 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:56,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,018 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,020 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,021 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,022 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,023 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,023 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,024 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,028 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:56,029 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:56,030 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:56,241 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:56,241 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:57,049 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:57,069 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:57,069 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:57,071 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:57,072 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:57,076 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,078 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,081 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,087 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,092 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,102 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,107 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,112 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,118 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,124 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,143 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:57,153 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:57,156 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:57,161 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:57,162 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:57,358 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:57,359 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:57,359 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 77 [2018-01-21 06:09:57,359 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:57,360 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-21 06:09:57,360 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-21 06:09:57,360 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2022, Invalid=3830, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 06:09:57,360 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 52 states. [2018-01-21 06:09:57,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:57,449 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 06:09:57,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 06:09:57,449 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 40 [2018-01-21 06:09:57,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:57,449 INFO L225 Difference]: With dead ends: 51 [2018-01-21 06:09:57,449 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 06:09:57,450 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2459 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2075, Invalid=3931, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 06:09:57,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 06:09:57,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 06:09:57,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 06:09:57,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 06:09:57,452 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 06:09:57,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:57,452 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 06:09:57,453 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-21 06:09:57,453 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 06:09:57,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 06:09:57,453 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:57,453 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:57,453 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:57,454 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 06:09:57,454 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:57,454 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:57,454 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:57,454 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:57,455 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:57,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:57,461 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:57,737 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:57,737 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:57,737 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:57,737 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:57,737 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:57,737 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:57,738 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:57,742 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:57,743 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:57,749 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,751 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,752 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,753 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,754 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,755 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,756 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,757 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,759 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,760 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,761 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,762 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,763 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:57,764 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:57,766 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:57,996 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:57,997 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:58,859 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:58,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:58,879 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:58,882 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:58,882 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:58,891 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,897 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,905 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,912 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,920 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,929 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,957 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,968 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,979 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:58,991 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:59,003 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:59,012 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:59,015 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:59,020 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:59,020 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:59,218 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:59,219 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:59,219 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 80 [2018-01-21 06:09:59,219 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:59,220 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-21 06:09:59,220 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-21 06:09:59,221 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2181, Invalid=4139, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 06:09:59,221 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 54 states. [2018-01-21 06:09:59,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:59,332 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 06:09:59,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 06:09:59,332 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 41 [2018-01-21 06:09:59,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:59,333 INFO L225 Difference]: With dead ends: 52 [2018-01-21 06:09:59,333 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 06:09:59,333 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 110 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2662 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2236, Invalid=4244, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 06:09:59,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 06:09:59,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 06:09:59,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 06:09:59,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 06:09:59,336 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 06:09:59,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:59,336 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 06:09:59,336 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-21 06:09:59,336 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 06:09:59,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 06:09:59,336 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:59,337 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:59,337 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:59,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 06:09:59,337 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:59,337 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:59,337 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:59,338 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:59,338 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:59,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:59,347 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:59,674 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:59,675 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:59,675 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:59,675 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:59,675 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:59,675 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:59,675 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:59,680 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:59,680 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:59,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:59,694 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:59,935 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:59,935 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:00,877 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:00,897 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:00,897 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:00,900 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:10:00,901 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:10:00,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:00,929 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:00,935 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:00,935 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:01,147 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:01,148 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:01,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 83 [2018-01-21 06:10:01,148 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:01,148 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-21 06:10:01,149 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-21 06:10:01,149 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2346, Invalid=4460, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 06:10:01,149 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 56 states. [2018-01-21 06:10:01,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:01,227 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 06:10:01,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 06:10:01,227 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 42 [2018-01-21 06:10:01,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:01,227 INFO L225 Difference]: With dead ends: 53 [2018-01-21 06:10:01,227 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 06:10:01,228 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2873 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2403, Invalid=4569, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 06:10:01,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 06:10:01,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 06:10:01,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 06:10:01,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 06:10:01,230 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 06:10:01,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:01,231 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 06:10:01,231 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-21 06:10:01,231 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 06:10:01,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 06:10:01,231 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:01,231 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:01,231 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:01,231 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 06:10:01,231 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:01,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:01,232 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:10:01,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:01,232 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:01,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:01,241 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:01,686 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:01,686 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:01,686 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:01,686 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:01,686 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:01,687 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:01,687 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:01,702 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:10:01,702 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:10:01,710 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:01,717 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:01,719 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:01,721 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:02,019 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:02,019 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:03,039 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:03,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:03,058 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:03,061 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:10:03,061 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:10:03,071 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:03,084 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:03,096 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:03,100 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:03,105 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:03,106 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:03,314 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:03,315 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:03,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 86 [2018-01-21 06:10:03,316 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:03,316 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-21 06:10:03,316 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-21 06:10:03,316 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2517, Invalid=4793, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 06:10:03,317 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 58 states. [2018-01-21 06:10:03,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:03,384 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 06:10:03,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 06:10:03,384 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 43 [2018-01-21 06:10:03,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:03,385 INFO L225 Difference]: With dead ends: 54 [2018-01-21 06:10:03,385 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 06:10:03,385 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3092 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2576, Invalid=4906, Unknown=0, NotChecked=0, Total=7482 [2018-01-21 06:10:03,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 06:10:03,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 06:10:03,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 06:10:03,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 06:10:03,395 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 06:10:03,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:03,395 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 06:10:03,395 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-21 06:10:03,395 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 06:10:03,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 06:10:03,395 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:03,395 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:03,395 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:03,396 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 06:10:03,396 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:03,396 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:03,396 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:10:03,396 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:03,396 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:03,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:03,406 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:03,782 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:03,782 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:03,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:03,783 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:03,783 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:03,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:03,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:03,788 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:10:03,788 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:10:03,795 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,801 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,804 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,805 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,806 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,807 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,809 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,810 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,811 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,812 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,813 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:03,814 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:03,815 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:04,142 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:04,142 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:05,245 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:05,266 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:05,266 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:05,269 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:10:05,269 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:10:05,279 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,287 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,303 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,312 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,321 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,339 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,350 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,362 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,373 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,384 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,396 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,410 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,423 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:05,432 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:05,435 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:05,441 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:05,442 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:05,672 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:05,673 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:05,673 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 89 [2018-01-21 06:10:05,673 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:05,673 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-21 06:10:05,673 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-21 06:10:05,674 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2694, Invalid=5138, Unknown=0, NotChecked=0, Total=7832 [2018-01-21 06:10:05,674 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 60 states. [2018-01-21 06:10:05,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:05,738 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 06:10:05,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 06:10:05,738 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 44 [2018-01-21 06:10:05,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:05,739 INFO L225 Difference]: With dead ends: 55 [2018-01-21 06:10:05,739 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 06:10:05,739 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3319 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2755, Invalid=5255, Unknown=0, NotChecked=0, Total=8010 [2018-01-21 06:10:05,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 06:10:05,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 06:10:05,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 06:10:05,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 06:10:05,742 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 06:10:05,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:05,743 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 06:10:05,743 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-21 06:10:05,743 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 06:10:05,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 06:10:05,743 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:05,743 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:05,743 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:05,744 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 06:10:05,744 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:05,744 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:05,744 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:10:05,744 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:05,744 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:05,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:05,752 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:06,102 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:06,102 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:06,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:06,103 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:06,103 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:06,103 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:06,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:06,108 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:10:06,108 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:10:06,123 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:06,124 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:06,425 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:06,426 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:06,765 WARN L143 SmtUtils]: Spent 179ms on a formula simplification that was a NOOP. DAG size: 92 [2018-01-21 06:10:07,765 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:07,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:07,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:07,788 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:10:07,788 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:10:07,827 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:07,830 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:07,836 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:07,837 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:08,068 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:08,069 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:08,069 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 92 [2018-01-21 06:10:08,069 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:08,069 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-21 06:10:08,069 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-21 06:10:08,070 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2877, Invalid=5495, Unknown=0, NotChecked=0, Total=8372 [2018-01-21 06:10:08,070 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 62 states. [2018-01-21 06:10:08,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:08,131 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 06:10:08,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 06:10:08,132 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 45 [2018-01-21 06:10:08,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:08,132 INFO L225 Difference]: With dead ends: 56 [2018-01-21 06:10:08,132 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 06:10:08,133 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3554 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2940, Invalid=5616, Unknown=0, NotChecked=0, Total=8556 [2018-01-21 06:10:08,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 06:10:08,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 06:10:08,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 06:10:08,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 06:10:08,135 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 06:10:08,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:08,135 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 06:10:08,135 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-21 06:10:08,135 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 06:10:08,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 06:10:08,135 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:08,135 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:08,135 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:08,135 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 06:10:08,136 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:08,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:08,136 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:10:08,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:08,136 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:08,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:08,147 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:08,532 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:08,532 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:08,533 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:08,533 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:08,533 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:08,533 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:08,533 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:08,537 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:10:08,538 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:10:08,541 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,542 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,543 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,545 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,547 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,549 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,550 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,551 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,551 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,552 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,553 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,557 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:08,558 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:08,560 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:08,870 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:08,870 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:10,054 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:10,074 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:10,074 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:10,077 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:10:10,077 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:10:10,082 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,084 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,089 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,095 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,101 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,108 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,115 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,124 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,142 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,149 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,164 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,181 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,195 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:10,206 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:10,210 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:10,216 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:10,216 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:10,495 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:10,496 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:10,496 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 95 [2018-01-21 06:10:10,496 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:10,496 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-21 06:10:10,497 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-21 06:10:10,497 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3066, Invalid=5864, Unknown=0, NotChecked=0, Total=8930 [2018-01-21 06:10:10,497 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 64 states. [2018-01-21 06:10:10,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:10,567 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 06:10:10,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 06:10:10,567 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 46 [2018-01-21 06:10:10,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:10,568 INFO L225 Difference]: With dead ends: 57 [2018-01-21 06:10:10,568 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 06:10:10,568 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3797 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=3131, Invalid=5989, Unknown=0, NotChecked=0, Total=9120 [2018-01-21 06:10:10,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 06:10:10,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 06:10:10,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 06:10:10,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 06:10:10,570 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 06:10:10,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:10,571 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 06:10:10,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-21 06:10:10,571 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 06:10:10,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 06:10:10,571 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:10,571 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:10,571 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:10,571 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 06:10:10,571 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:10,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:10,572 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:10:10,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:10,572 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:10,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:10,582 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:10,965 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:10,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:10,965 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:10,965 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:10,965 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:10,966 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:10,966 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:10,970 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:10:10,970 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:10:10,977 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,979 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,980 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,981 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,982 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,983 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,984 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,985 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,986 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,987 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,988 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,989 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,991 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,992 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,993 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,994 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:10,995 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:10,996 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:11,317 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:11,317 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:12,583 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:12,602 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:12,602 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:12,605 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:10:12,605 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:10:12,614 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,621 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,628 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,636 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,644 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,653 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,662 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,672 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,682 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,692 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,714 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,726 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,738 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:10:12,774 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:12,777 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:12,784 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:12,784 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:13,038 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:13,039 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:13,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 98 [2018-01-21 06:10:13,039 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:13,040 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-21 06:10:13,040 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-21 06:10:13,041 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3261, Invalid=6245, Unknown=0, NotChecked=0, Total=9506 [2018-01-21 06:10:13,041 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 66 states. [2018-01-21 06:10:13,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:13,099 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 06:10:13,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 06:10:13,099 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 47 [2018-01-21 06:10:13,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:13,099 INFO L225 Difference]: With dead ends: 58 [2018-01-21 06:10:13,099 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 06:10:13,100 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4048 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=3328, Invalid=6374, Unknown=0, NotChecked=0, Total=9702 [2018-01-21 06:10:13,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 06:10:13,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 06:10:13,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 06:10:13,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 06:10:13,102 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 06:10:13,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:13,102 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 06:10:13,102 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-21 06:10:13,102 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 06:10:13,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 06:10:13,103 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:13,103 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:13,103 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:13,103 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 06:10:13,103 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:13,104 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:13,104 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:10:13,104 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:13,104 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:13,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:13,116 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:13,516 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:13,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:13,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:13,516 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:13,516 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:13,517 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:13,517 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:13,522 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:10:13,522 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:10:13,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:13,537 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:14,285 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:14,285 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:15,661 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:15,680 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:15,680 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:15,683 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:10:15,684 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:10:15,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:15,718 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:15,724 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:15,724 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:15,986 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:15,987 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:15,987 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 101 [2018-01-21 06:10:15,987 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:15,987 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-21 06:10:15,988 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-21 06:10:15,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3462, Invalid=6638, Unknown=0, NotChecked=0, Total=10100 [2018-01-21 06:10:15,988 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 68 states. [2018-01-21 06:10:16,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:16,070 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 06:10:16,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 06:10:16,071 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 48 [2018-01-21 06:10:16,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:16,071 INFO L225 Difference]: With dead ends: 59 [2018-01-21 06:10:16,071 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 06:10:16,072 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4307 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=3531, Invalid=6771, Unknown=0, NotChecked=0, Total=10302 [2018-01-21 06:10:16,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 06:10:16,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 06:10:16,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 06:10:16,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 06:10:16,075 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 06:10:16,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:16,075 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 06:10:16,076 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-21 06:10:16,076 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 06:10:16,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 06:10:16,076 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:16,076 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:16,076 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:16,076 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 06:10:16,076 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:16,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:16,077 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:10:16,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:16,077 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:16,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:16,090 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:16,633 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:16,633 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:16,633 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:16,633 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:16,633 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:16,633 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:16,633 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:16,638 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:10:16,638 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:10:16,645 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:16,651 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:16,653 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:16,654 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:17,017 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:17,017 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:18,434 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:18,453 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:18,454 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:18,456 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:10:18,457 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:10:18,466 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:18,480 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:18,494 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:18,497 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:18,504 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:18,504 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:18,775 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:18,776 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:18,776 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 104 [2018-01-21 06:10:18,776 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:18,777 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-21 06:10:18,777 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-21 06:10:18,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3669, Invalid=7043, Unknown=0, NotChecked=0, Total=10712 [2018-01-21 06:10:18,778 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 70 states. [2018-01-21 06:10:18,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:18,899 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 06:10:18,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 06:10:18,899 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 49 [2018-01-21 06:10:18,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:18,900 INFO L225 Difference]: With dead ends: 60 [2018-01-21 06:10:18,900 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 06:10:18,901 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4574 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3740, Invalid=7180, Unknown=0, NotChecked=0, Total=10920 [2018-01-21 06:10:18,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 06:10:18,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 06:10:18,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 06:10:18,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 06:10:18,904 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 06:10:18,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:18,904 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 06:10:18,905 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-21 06:10:18,905 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 06:10:18,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 06:10:18,905 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:18,905 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:18,905 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:18,906 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 06:10:18,906 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:18,906 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:18,906 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:10:18,907 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:18,907 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:18,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:18,918 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:19,402 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:19,403 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:19,403 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:19,403 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:19,403 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:19,403 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:19,403 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:19,408 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:10:19,408 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:10:19,414 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,416 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,417 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,418 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,419 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,420 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,421 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,422 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,423 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,424 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,425 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,426 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,427 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,428 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,429 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,431 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,432 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,433 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:19,433 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:19,435 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:19,813 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:19,813 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:21,321 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:21,340 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:21,340 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:21,343 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:10:21,344 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:10:21,352 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,359 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,366 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,374 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,382 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,391 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,409 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,419 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,430 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,441 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,452 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,476 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,503 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,530 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:10:21,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:21,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:21,551 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:21,551 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:21,838 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:21,838 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:21,839 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 107 [2018-01-21 06:10:21,839 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:21,839 INFO L409 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-01-21 06:10:21,839 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-01-21 06:10:21,840 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3882, Invalid=7460, Unknown=0, NotChecked=0, Total=11342 [2018-01-21 06:10:21,840 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 72 states. [2018-01-21 06:10:21,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:21,910 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 06:10:21,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 06:10:21,910 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 50 [2018-01-21 06:10:21,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:21,911 INFO L225 Difference]: With dead ends: 61 [2018-01-21 06:10:21,911 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 06:10:21,911 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 128 SyntacticMatches, 2 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4849 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3955, Invalid=7601, Unknown=0, NotChecked=0, Total=11556 [2018-01-21 06:10:21,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 06:10:21,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 06:10:21,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 06:10:21,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 06:10:21,913 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 06:10:21,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:21,913 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 06:10:21,913 INFO L433 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-01-21 06:10:21,914 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 06:10:21,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 06:10:21,914 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:21,914 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:21,914 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:21,914 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 06:10:21,914 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:21,915 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:21,915 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:10:21,915 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:21,915 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:21,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:21,923 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:22,414 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:22,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:22,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:22,414 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:22,414 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:22,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:22,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:22,419 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:10:22,419 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:10:22,434 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:22,436 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:22,833 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:22,833 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:24,413 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:24,433 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:24,450 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:10:24,452 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:10:24,453 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:10:24,496 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:24,500 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:24,506 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:24,507 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:10:24,809 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:24,810 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:10:24,810 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 110 [2018-01-21 06:10:24,810 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:10:24,810 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-21 06:10:24,811 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-21 06:10:24,811 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4101, Invalid=7889, Unknown=0, NotChecked=0, Total=11990 [2018-01-21 06:10:24,811 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 74 states. [2018-01-21 06:10:24,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:10:24,975 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 06:10:24,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 06:10:24,975 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 51 [2018-01-21 06:10:24,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:10:24,975 INFO L225 Difference]: With dead ends: 62 [2018-01-21 06:10:24,976 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 06:10:24,976 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5132 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=4176, Invalid=8034, Unknown=0, NotChecked=0, Total=12210 [2018-01-21 06:10:24,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 06:10:24,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 06:10:24,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 06:10:24,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 06:10:24,978 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 06:10:24,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:10:24,978 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 06:10:24,979 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-21 06:10:24,979 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 06:10:24,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 06:10:24,979 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:10:24,979 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:10:24,979 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:10:24,979 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 06:10:24,979 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:10:24,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:24,980 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:10:24,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:10:24,980 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:10:24,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:10:24,990 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:10:25,782 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:25,782 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:25,782 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:10:25,782 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:10:25,782 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:10:25,782 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:10:25,782 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:10:25,788 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:10:25,788 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:10:25,792 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,793 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,800 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,801 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,808 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,810 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,816 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,817 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,818 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,819 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,820 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,821 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,823 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,824 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,827 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,828 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,841 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,845 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:10:25,847 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:10:25,850 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:10:26,277 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:10:26,277 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 06:10:26,942 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 06:10:26,943 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:10:26,944 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:10:26,944 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:10:26,944 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:10:26,945 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:10:26,945 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:10:26,945 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:10:26,945 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:10:26,945 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 06:10:26,945 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:10:26,945 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:10:26,945 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:10:26,946 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 06:10:26 BoogieIcfgContainer [2018-01-21 06:10:26,946 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 06:10:26,946 INFO L168 Benchmark]: Toolchain (without parser) took 53995.24 ms. Allocated memory was 303.0 MB in the beginning and 806.9 MB in the end (delta: 503.8 MB). Free memory was 262.3 MB in the beginning and 345.9 MB in the end (delta: -83.5 MB). Peak memory consumption was 420.3 MB. Max. memory is 5.3 GB. [2018-01-21 06:10:26,947 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 303.0 MB. Free memory is still 267.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 06:10:26,947 INFO L168 Benchmark]: CACSL2BoogieTranslator took 175.10 ms. Allocated memory is still 303.0 MB. Free memory was 261.3 MB in the beginning and 254.3 MB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 5.3 GB. [2018-01-21 06:10:26,948 INFO L168 Benchmark]: Boogie Preprocessor took 28.72 ms. Allocated memory is still 303.0 MB. Free memory was 254.3 MB in the beginning and 252.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 06:10:26,948 INFO L168 Benchmark]: RCFGBuilder took 193.29 ms. Allocated memory is still 303.0 MB. Free memory was 252.3 MB in the beginning and 240.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 06:10:26,948 INFO L168 Benchmark]: TraceAbstraction took 53592.80 ms. Allocated memory was 303.0 MB in the beginning and 806.9 MB in the end (delta: 503.8 MB). Free memory was 239.7 MB in the beginning and 345.9 MB in the end (delta: -106.2 MB). Peak memory consumption was 397.7 MB. Max. memory is 5.3 GB. [2018-01-21 06:10:26,950 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 303.0 MB. Free memory is still 267.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 175.10 ms. Allocated memory is still 303.0 MB. Free memory was 261.3 MB in the beginning and 254.3 MB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 28.72 ms. Allocated memory is still 303.0 MB. Free memory was 254.3 MB in the beginning and 252.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 193.29 ms. Allocated memory is still 303.0 MB. Free memory was 252.3 MB in the beginning and 240.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 53592.80 ms. Allocated memory was 303.0 MB in the beginning and 806.9 MB in the end (delta: 503.8 MB). Free memory was 239.7 MB in the beginning and 345.9 MB in the end (delta: -106.2 MB). Peak memory consumption was 397.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.220873 RENAME_VARIABLES(MILLISECONDS) : 0.067151 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.168345 PROJECTAWAY(MILLISECONDS) : 0.101923 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.221653 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.100477 ADD_EQUALITY(MILLISECONDS) : 0.036366 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.016470 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 35, while TraceCheckSpWp was constructing backward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 8. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 53.3s OverallTime, 36 OverallIterations, 35 TraceHistogramMax, 2.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 563 SDtfs, 111 SDslu, 11554 SDs, 0 SdLazy, 2545 SolverSat, 128 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5394 GetRequests, 3300 SyntacticMatches, 68 SemanticMatches, 2026 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63597 ImplicationChecksByTransitivity, 31.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=53occurred in iteration=35, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 35 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 2.7s SatisfiabilityAnalysisTime, 43.6s InterpolantComputationTime, 3536 NumberOfCodeBlocks, 3536 NumberOfCodeBlocksAsserted, 421 NumberOfCheckSat, 5711 ConstructedInterpolants, 0 QuantifiedInterpolants, 879624 SizeOfPredicates, 68 NumberOfNonLiveVariables, 7718 ConjunctsInSsa, 1394 ConjunctsInUnsatCore, 171 InterpolantComputations, 1 PerfectInterpolantSequences, 0/35700 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_06-10-26-959.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_06-10-26-959.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_06-10-26-959.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_06-10-26-959.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_06-10-26-959.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_06-10-26-959.csv Completed graceful shutdown