java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 08:19:46,483 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 08:19:46,518 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 08:19:46,534 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 08:19:46,535 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 08:19:46,536 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 08:19:46,537 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 08:19:46,539 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 08:19:46,541 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 08:19:46,542 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 08:19:46,543 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 08:19:46,543 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 08:19:46,544 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 08:19:46,545 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 08:19:46,546 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 08:19:46,549 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 08:19:46,551 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 08:19:46,553 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 08:19:46,555 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 08:19:46,556 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 08:19:46,559 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 08:19:46,564 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 08:19:46,565 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 08:19:46,565 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-21 08:19:46,574 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 08:19:46,575 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 08:19:46,576 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 08:19:46,576 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 08:19:46,576 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 08:19:46,576 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 08:19:46,576 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-21 08:19:46,576 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 08:19:46,576 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 08:19:46,577 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 08:19:46,577 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 08:19:46,577 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 08:19:46,577 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 08:19:46,578 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 08:19:46,578 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 08:19:46,578 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 08:19:46,578 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 08:19:46,578 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 08:19:46,578 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 08:19:46,578 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 08:19:46,579 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 08:19:46,579 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 08:19:46,579 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 08:19:46,579 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 08:19:46,579 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 08:19:46,580 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 08:19:46,580 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 08:19:46,580 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:19:46,580 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 08:19:46,580 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 08:19:46,580 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 08:19:46,581 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 08:19:46,581 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 08:19:46,581 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 08:19:46,581 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 08:19:46,581 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 08:19:46,581 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 08:19:46,581 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 08:19:46,582 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 08:19:46,582 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 08:19:46,617 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 08:19:46,628 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 08:19:46,631 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 08:19:46,633 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 08:19:46,633 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 08:19:46,633 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i [2018-01-21 08:19:46,806 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 08:19:46,811 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 08:19:46,812 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 08:19:46,812 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 08:19:46,817 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 08:19:46,818 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:19:46" (1/1) ... [2018-01-21 08:19:46,820 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3adf5c24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:46, skipping insertion in model container [2018-01-21 08:19:46,821 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:19:46" (1/1) ... [2018-01-21 08:19:46,834 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:19:46,874 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:19:47,005 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:19:47,034 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:19:47,042 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47 WrapperNode [2018-01-21 08:19:47,042 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 08:19:47,043 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 08:19:47,043 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 08:19:47,043 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 08:19:47,054 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (1/1) ... [2018-01-21 08:19:47,055 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (1/1) ... [2018-01-21 08:19:47,064 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (1/1) ... [2018-01-21 08:19:47,065 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (1/1) ... [2018-01-21 08:19:47,069 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (1/1) ... [2018-01-21 08:19:47,072 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (1/1) ... [2018-01-21 08:19:47,073 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (1/1) ... [2018-01-21 08:19:47,075 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 08:19:47,075 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 08:19:47,075 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 08:19:47,075 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 08:19:47,076 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:19:47,123 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 08:19:47,123 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 08:19:47,123 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum [2018-01-21 08:19:47,124 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum2 [2018-01-21 08:19:47,124 INFO L136 BoogieDeclarations]: Found implementation of procedure dummy_abort [2018-01-21 08:19:47,124 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 08:19:47,124 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-21 08:19:47,124 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-21 08:19:47,124 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 08:19:47,124 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 08:19:47,124 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 08:19:47,124 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 08:19:47,124 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 08:19:47,125 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 08:19:47,125 INFO L128 BoogieDeclarations]: Found specification of procedure Sum [2018-01-21 08:19:47,125 INFO L128 BoogieDeclarations]: Found specification of procedure Sum2 [2018-01-21 08:19:47,125 INFO L128 BoogieDeclarations]: Found specification of procedure dummy_abort [2018-01-21 08:19:47,125 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 08:19:47,125 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 08:19:47,125 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 08:19:47,343 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 08:19:47,344 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:19:47 BoogieIcfgContainer [2018-01-21 08:19:47,344 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 08:19:47,345 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 08:19:47,345 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 08:19:47,348 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 08:19:47,348 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 08:19:46" (1/3) ... [2018-01-21 08:19:47,349 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74f68a3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:19:47, skipping insertion in model container [2018-01-21 08:19:47,349 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:19:47" (2/3) ... [2018-01-21 08:19:47,349 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74f68a3e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:19:47, skipping insertion in model container [2018-01-21 08:19:47,350 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:19:47" (3/3) ... [2018-01-21 08:19:47,352 INFO L105 eAbstractionObserver]: Analyzing ICFG 20051113-1.c_false-valid-memtrack.i [2018-01-21 08:19:47,358 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 08:19:47,364 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-01-21 08:19:47,409 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:19:47,409 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:19:47,410 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:19:47,410 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:19:47,410 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:19:47,410 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:19:47,410 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:19:47,410 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == Sum2Err0EnsuresViolation======== [2018-01-21 08:19:47,411 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:19:47,428 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 08:19:47,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 08:19:47,434 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:47,435 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:47,435 INFO L371 AbstractCegarLoop]: === Iteration 1 === [Sum2Err0EnsuresViolation]=== [2018-01-21 08:19:47,440 INFO L82 PathProgramCache]: Analyzing trace with hash -1865297126, now seen corresponding path program 1 times [2018-01-21 08:19:47,442 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:47,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:47,487 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:47,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:47,487 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:47,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:47,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:47,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:47,610 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:47,610 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 08:19:47,610 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:47,614 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 08:19:47,627 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 08:19:47,627 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:47,629 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 08:19:47,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:47,742 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 08:19:47,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 08:19:47,744 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 32 [2018-01-21 08:19:47,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:47,750 INFO L225 Difference]: With dead ends: 88 [2018-01-21 08:19:47,750 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 08:19:47,753 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:47,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 08:19:47,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 08:19:47,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 08:19:47,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 08:19:47,774 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 32 [2018-01-21 08:19:47,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:47,774 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 08:19:47,774 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 08:19:47,774 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 08:19:47,774 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 08:19:47,778 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2018-01-21 08:19:47,827 INFO L401 ceAbstractionStarter]: For program point Sum2FINAL(lines 658 666) no Hoare annotation was computed. [2018-01-21 08:19:47,827 INFO L401 ceAbstractionStarter]: For program point Sum2Err0EnsuresViolation(line 657) no Hoare annotation was computed. [2018-01-21 08:19:47,828 INFO L401 ceAbstractionStarter]: For program point L663(line 663) no Hoare annotation was computed. [2018-01-21 08:19:47,828 INFO L404 ceAbstractionStarter]: At program point L662''''(lines 662 664) the Hoare annotation is: true [2018-01-21 08:19:47,828 INFO L401 ceAbstractionStarter]: For program point L662(line 662) no Hoare annotation was computed. [2018-01-21 08:19:47,828 INFO L401 ceAbstractionStarter]: For program point L663'(line 663) no Hoare annotation was computed. [2018-01-21 08:19:47,828 INFO L401 ceAbstractionStarter]: For program point L662'(line 662) no Hoare annotation was computed. [2018-01-21 08:19:47,829 INFO L401 ceAbstractionStarter]: For program point L662'''''(lines 662 664) no Hoare annotation was computed. [2018-01-21 08:19:47,829 INFO L401 ceAbstractionStarter]: For program point L662'''(lines 662 664) no Hoare annotation was computed. [2018-01-21 08:19:47,829 INFO L404 ceAbstractionStarter]: At program point Sum2ENTRY(lines 658 666) the Hoare annotation is: true [2018-01-21 08:19:47,829 INFO L401 ceAbstractionStarter]: For program point Sum2EXIT(lines 658 666) no Hoare annotation was computed. [2018-01-21 08:19:47,829 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.initErr0EnsuresViolation(lines 1 686) no Hoare annotation was computed. [2018-01-21 08:19:47,829 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.initEXIT(lines 1 686) no Hoare annotation was computed. [2018-01-21 08:19:47,830 INFO L404 ceAbstractionStarter]: At program point ULTIMATE.initENTRY(lines 1 686) the Hoare annotation is: true [2018-01-21 08:19:47,830 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.initFINAL(lines 1 686) no Hoare annotation was computed. [2018-01-21 08:19:47,830 INFO L404 ceAbstractionStarter]: At program point #Ultimate.C_memsetENTRY(line -1) the Hoare annotation is: true [2018-01-21 08:19:47,830 INFO L404 ceAbstractionStarter]: At program point L-1(line -1) the Hoare annotation is: true [2018-01-21 08:19:47,830 INFO L401 ceAbstractionStarter]: For program point #Ultimate.C_memsetFINAL(line -1) no Hoare annotation was computed. [2018-01-21 08:19:47,830 INFO L401 ceAbstractionStarter]: For program point #Ultimate.C_memsetEXIT(line -1) no Hoare annotation was computed. [2018-01-21 08:19:47,831 INFO L404 ceAbstractionStarter]: At program point dummy_abortFINAL(lines 667 669) the Hoare annotation is: true [2018-01-21 08:19:47,831 INFO L401 ceAbstractionStarter]: For program point dummy_abortEXIT(lines 667 669) no Hoare annotation was computed. [2018-01-21 08:19:47,831 INFO L401 ceAbstractionStarter]: For program point dummy_abortErr0EnsuresViolation(lines 667 669) no Hoare annotation was computed. [2018-01-21 08:19:47,831 INFO L404 ceAbstractionStarter]: At program point ULTIMATE.startENTRY(lines 1 686) the Hoare annotation is: true [2018-01-21 08:19:47,831 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.startFINAL(lines 1 686) no Hoare annotation was computed. [2018-01-21 08:19:47,831 INFO L404 ceAbstractionStarter]: At program point L1(lines 1 686) the Hoare annotation is: true [2018-01-21 08:19:47,831 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.startErr0EnsuresViolation(lines 1 686) no Hoare annotation was computed. [2018-01-21 08:19:47,832 INFO L401 ceAbstractionStarter]: For program point ULTIMATE.startEXIT(lines 1 686) no Hoare annotation was computed. [2018-01-21 08:19:47,832 INFO L401 ceAbstractionStarter]: For program point L652'''(lines 652 654) no Hoare annotation was computed. [2018-01-21 08:19:47,832 INFO L401 ceAbstractionStarter]: For program point L652(line 652) no Hoare annotation was computed. [2018-01-21 08:19:47,832 INFO L401 ceAbstractionStarter]: For program point L652'''''(lines 652 654) no Hoare annotation was computed. [2018-01-21 08:19:47,832 INFO L401 ceAbstractionStarter]: For program point SumEXIT(lines 648 656) no Hoare annotation was computed. [2018-01-21 08:19:47,832 INFO L401 ceAbstractionStarter]: For program point L652'(line 652) no Hoare annotation was computed. [2018-01-21 08:19:47,833 INFO L404 ceAbstractionStarter]: At program point L652''''(lines 652 654) the Hoare annotation is: true [2018-01-21 08:19:47,833 INFO L401 ceAbstractionStarter]: For program point L653(line 653) no Hoare annotation was computed. [2018-01-21 08:19:47,833 INFO L404 ceAbstractionStarter]: At program point SumENTRY(lines 648 656) the Hoare annotation is: true [2018-01-21 08:19:47,833 INFO L401 ceAbstractionStarter]: For program point SumErr0EnsuresViolation(line 647) no Hoare annotation was computed. [2018-01-21 08:19:47,833 INFO L401 ceAbstractionStarter]: For program point L653'(line 653) no Hoare annotation was computed. [2018-01-21 08:19:47,833 INFO L401 ceAbstractionStarter]: For program point SumFINAL(lines 648 656) no Hoare annotation was computed. [2018-01-21 08:19:47,833 INFO L404 ceAbstractionStarter]: At program point L681(line 681) the Hoare annotation is: true [2018-01-21 08:19:47,834 INFO L401 ceAbstractionStarter]: For program point L680(line 680) no Hoare annotation was computed. [2018-01-21 08:19:47,834 INFO L404 ceAbstractionStarter]: At program point L683(line 683) the Hoare annotation is: true [2018-01-21 08:19:47,834 INFO L401 ceAbstractionStarter]: For program point L682(line 682) no Hoare annotation was computed. [2018-01-21 08:19:47,834 INFO L401 ceAbstractionStarter]: For program point L682''(lines 682 683) no Hoare annotation was computed. [2018-01-21 08:19:47,834 INFO L401 ceAbstractionStarter]: For program point L672'(line 672) no Hoare annotation was computed. [2018-01-21 08:19:47,834 INFO L401 ceAbstractionStarter]: For program point L682'(lines 682 683) no Hoare annotation was computed. [2018-01-21 08:19:47,835 INFO L404 ceAbstractionStarter]: At program point L680'(lines 680 681) the Hoare annotation is: true [2018-01-21 08:19:47,835 INFO L401 ceAbstractionStarter]: For program point mainErr0EnsuresViolation(lines 670 686) no Hoare annotation was computed. [2018-01-21 08:19:47,835 INFO L401 ceAbstractionStarter]: For program point L674(line 674) no Hoare annotation was computed. [2018-01-21 08:19:47,835 INFO L401 ceAbstractionStarter]: For program point L673(line 673) no Hoare annotation was computed. [2018-01-21 08:19:47,835 INFO L404 ceAbstractionStarter]: At program point L672(line 672) the Hoare annotation is: true [2018-01-21 08:19:47,835 INFO L401 ceAbstractionStarter]: For program point L671(line 671) no Hoare annotation was computed. [2018-01-21 08:19:47,835 INFO L401 ceAbstractionStarter]: For program point L678(line 678) no Hoare annotation was computed. [2018-01-21 08:19:47,836 INFO L401 ceAbstractionStarter]: For program point mainFINAL(lines 670 686) no Hoare annotation was computed. [2018-01-21 08:19:47,836 INFO L401 ceAbstractionStarter]: For program point L673'(line 673) no Hoare annotation was computed. [2018-01-21 08:19:47,836 INFO L401 ceAbstractionStarter]: For program point L677(line 677) no Hoare annotation was computed. [2018-01-21 08:19:47,836 INFO L401 ceAbstractionStarter]: For program point L676(line 676) no Hoare annotation was computed. [2018-01-21 08:19:47,836 INFO L401 ceAbstractionStarter]: For program point L675(line 675) no Hoare annotation was computed. [2018-01-21 08:19:47,836 INFO L404 ceAbstractionStarter]: At program point L679(line 679) the Hoare annotation is: true [2018-01-21 08:19:47,836 INFO L401 ceAbstractionStarter]: For program point mainEXIT(lines 670 686) no Hoare annotation was computed. [2018-01-21 08:19:47,837 INFO L404 ceAbstractionStarter]: At program point mainENTRY(lines 670 686) the Hoare annotation is: true [2018-01-21 08:19:47,841 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:19:47,841 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:19:47,841 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:19:47,841 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:19:47,841 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:19:47,842 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:19:47,842 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:19:47,842 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 08:19:47,842 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:19:47,844 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 08:19:47,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 08:19:47,845 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:47,845 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 08:19:47,845 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 08:19:47,846 INFO L82 PathProgramCache]: Analyzing trace with hash 128549, now seen corresponding path program 1 times [2018-01-21 08:19:47,846 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:47,847 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:47,847 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:47,847 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:47,848 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:47,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:19:47,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:19:47,877 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 08:19:47,881 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 08:19:47,886 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:19:47,886 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:19:47,886 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:19:47,886 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:19:47,886 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:19:47,887 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:19:47,887 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:19:47,887 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == dummy_abortErr0EnsuresViolation======== [2018-01-21 08:19:47,887 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:19:47,889 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 08:19:47,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 08:19:47,891 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:47,891 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:47,892 INFO L371 AbstractCegarLoop]: === Iteration 1 === [dummy_abortErr0EnsuresViolation]=== [2018-01-21 08:19:47,892 INFO L82 PathProgramCache]: Analyzing trace with hash 1195103445, now seen corresponding path program 1 times [2018-01-21 08:19:47,892 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:47,893 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:47,893 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:47,893 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:47,894 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:47,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:47,917 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:47,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:47,943 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:47,943 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 08:19:47,943 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:47,944 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 08:19:47,944 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 08:19:47,944 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:47,944 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 08:19:47,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:47,952 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 08:19:47,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 08:19:47,953 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 29 [2018-01-21 08:19:47,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:47,953 INFO L225 Difference]: With dead ends: 88 [2018-01-21 08:19:47,954 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 08:19:47,955 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:47,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 08:19:47,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 08:19:47,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 08:19:47,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 08:19:47,955 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 29 [2018-01-21 08:19:47,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:47,955 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 08:19:47,956 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 08:19:47,956 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 08:19:47,956 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 08:19:47,958 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:19:47,958 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:19:47,958 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:19:47,959 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:19:47,959 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:19:47,959 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:19:47,959 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:19:47,959 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 08:19:47,959 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:19:47,961 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 08:19:47,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 08:19:47,963 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:47,964 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:47,964 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:19:47,964 INFO L82 PathProgramCache]: Analyzing trace with hash 1502761729, now seen corresponding path program 1 times [2018-01-21 08:19:47,964 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:47,965 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:47,966 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:47,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:47,966 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:47,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:47,985 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:48,012 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:48,012 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:48,012 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 08:19:48,012 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:48,013 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 08:19:48,013 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 08:19:48,013 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:48,013 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 08:19:48,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:48,021 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 08:19:48,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 08:19:48,022 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 39 [2018-01-21 08:19:48,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:48,025 INFO L225 Difference]: With dead ends: 88 [2018-01-21 08:19:48,025 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 08:19:48,026 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:48,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 08:19:48,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 08:19:48,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 08:19:48,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 59 transitions. [2018-01-21 08:19:48,045 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 59 transitions. Word has length 39 [2018-01-21 08:19:48,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:48,046 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 59 transitions. [2018-01-21 08:19:48,046 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 08:19:48,046 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 59 transitions. [2018-01-21 08:19:48,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 08:19:48,049 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:48,049 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:48,049 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:19:48,050 INFO L82 PathProgramCache]: Analyzing trace with hash -809322687, now seen corresponding path program 1 times [2018-01-21 08:19:48,050 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:48,051 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,051 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:48,051 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,051 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:48,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:48,078 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:48,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:48,164 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:48,164 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-21 08:19:48,164 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:48,166 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-21 08:19:48,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-21 08:19:48,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-21 08:19:48,167 INFO L87 Difference]: Start difference. First operand 54 states and 59 transitions. Second operand 5 states. [2018-01-21 08:19:48,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:48,245 INFO L93 Difference]: Finished difference Result 69 states and 75 transitions. [2018-01-21 08:19:48,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 08:19:48,245 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-01-21 08:19:48,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:48,247 INFO L225 Difference]: With dead ends: 69 [2018-01-21 08:19:48,247 INFO L226 Difference]: Without dead ends: 64 [2018-01-21 08:19:48,248 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-21 08:19:48,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-01-21 08:19:48,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2018-01-21 08:19:48,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-21 08:19:48,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 68 transitions. [2018-01-21 08:19:48,254 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 68 transitions. Word has length 43 [2018-01-21 08:19:48,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:48,254 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 68 transitions. [2018-01-21 08:19:48,254 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-21 08:19:48,254 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 68 transitions. [2018-01-21 08:19:48,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 08:19:48,256 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:48,256 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:48,256 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:19:48,256 INFO L82 PathProgramCache]: Analyzing trace with hash 2078335056, now seen corresponding path program 1 times [2018-01-21 08:19:48,256 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:48,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,257 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:48,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,257 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:48,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:48,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:48,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:48,332 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:48,332 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 08:19:48,333 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:48,333 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 08:19:48,333 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 08:19:48,333 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 08:19:48,334 INFO L87 Difference]: Start difference. First operand 62 states and 68 transitions. Second operand 4 states. [2018-01-21 08:19:48,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:48,448 INFO L93 Difference]: Finished difference Result 62 states and 68 transitions. [2018-01-21 08:19:48,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 08:19:48,448 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 46 [2018-01-21 08:19:48,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:48,449 INFO L225 Difference]: With dead ends: 62 [2018-01-21 08:19:48,449 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 08:19:48,450 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 08:19:48,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 08:19:48,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 08:19:48,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 08:19:48,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 08:19:48,451 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 46 [2018-01-21 08:19:48,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:48,451 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 08:19:48,452 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 08:19:48,452 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 08:19:48,452 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 08:19:48,454 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:19:48,457 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:19:48,457 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:19:48,457 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:19:48,457 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:19:48,458 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:19:48,458 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:19:48,458 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == SumErr0EnsuresViolation======== [2018-01-21 08:19:48,458 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:19:48,459 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 08:19:48,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 08:19:48,461 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:48,461 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:48,461 INFO L371 AbstractCegarLoop]: === Iteration 1 === [SumErr0EnsuresViolation]=== [2018-01-21 08:19:48,461 INFO L82 PathProgramCache]: Analyzing trace with hash 112235281, now seen corresponding path program 1 times [2018-01-21 08:19:48,461 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:48,462 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,463 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:48,463 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,463 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:48,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:48,474 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:48,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:48,488 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:48,488 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 08:19:48,488 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:48,489 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 08:19:48,489 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 08:19:48,489 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:48,490 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 08:19:48,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:48,496 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 08:19:48,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 08:19:48,496 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 25 [2018-01-21 08:19:48,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:48,497 INFO L225 Difference]: With dead ends: 88 [2018-01-21 08:19:48,497 INFO L226 Difference]: Without dead ends: 0 [2018-01-21 08:19:48,497 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:48,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-01-21 08:19:48,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-01-21 08:19:48,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-01-21 08:19:48,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-01-21 08:19:48,499 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 25 [2018-01-21 08:19:48,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:48,499 INFO L432 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-01-21 08:19:48,499 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 08:19:48,499 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-01-21 08:19:48,499 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-01-21 08:19:48,501 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:19:48,501 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:19:48,502 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:19:48,502 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:19:48,502 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:19:48,502 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:19:48,502 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:19:48,502 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 08:19:48,502 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:19:48,504 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2018-01-21 08:19:48,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 08:19:48,506 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:48,506 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:48,506 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:48,506 INFO L82 PathProgramCache]: Analyzing trace with hash -2005137936, now seen corresponding path program 1 times [2018-01-21 08:19:48,506 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:48,507 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,508 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:48,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,508 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:48,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:48,519 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:48,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:48,534 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:48,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-21 08:19:48,534 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:48,534 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-21 08:19:48,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-21 08:19:48,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:48,535 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 2 states. [2018-01-21 08:19:48,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:48,540 INFO L93 Difference]: Finished difference Result 88 states and 103 transitions. [2018-01-21 08:19:48,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-21 08:19:48,540 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 37 [2018-01-21 08:19:48,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:48,541 INFO L225 Difference]: With dead ends: 88 [2018-01-21 08:19:48,541 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 08:19:48,541 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-21 08:19:48,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 08:19:48,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 08:19:48,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 08:19:48,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2018-01-21 08:19:48,548 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 37 [2018-01-21 08:19:48,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:48,548 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2018-01-21 08:19:48,548 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-21 08:19:48,548 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2018-01-21 08:19:48,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 08:19:48,549 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:48,549 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:48,549 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:48,550 INFO L82 PathProgramCache]: Analyzing trace with hash -336037328, now seen corresponding path program 1 times [2018-01-21 08:19:48,550 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:48,550 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,551 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:48,551 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,551 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:48,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:48,564 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:48,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:48,612 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:48,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-21 08:19:48,612 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:48,612 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-21 08:19:48,612 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-21 08:19:48,612 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-21 08:19:48,613 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand 5 states. [2018-01-21 08:19:48,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:48,638 INFO L93 Difference]: Finished difference Result 65 states and 71 transitions. [2018-01-21 08:19:48,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 08:19:48,638 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2018-01-21 08:19:48,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:48,639 INFO L225 Difference]: With dead ends: 65 [2018-01-21 08:19:48,639 INFO L226 Difference]: Without dead ends: 62 [2018-01-21 08:19:48,640 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-21 08:19:48,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-01-21 08:19:48,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 60. [2018-01-21 08:19:48,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-21 08:19:48,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 66 transitions. [2018-01-21 08:19:48,645 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 66 transitions. Word has length 41 [2018-01-21 08:19:48,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:48,645 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 66 transitions. [2018-01-21 08:19:48,645 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-21 08:19:48,645 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 66 transitions. [2018-01-21 08:19:48,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 08:19:48,646 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:48,646 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:48,646 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:48,646 INFO L82 PathProgramCache]: Analyzing trace with hash 609983231, now seen corresponding path program 1 times [2018-01-21 08:19:48,646 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:48,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,647 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:48,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,647 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:48,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:48,661 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:48,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:19:48,709 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:48,709 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-21 08:19:48,709 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:48,709 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-21 08:19:48,709 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-21 08:19:48,709 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-21 08:19:48,710 INFO L87 Difference]: Start difference. First operand 60 states and 66 transitions. Second operand 5 states. [2018-01-21 08:19:48,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:48,751 INFO L93 Difference]: Finished difference Result 96 states and 106 transitions. [2018-01-21 08:19:48,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 08:19:48,752 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2018-01-21 08:19:48,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:48,753 INFO L225 Difference]: With dead ends: 96 [2018-01-21 08:19:48,753 INFO L226 Difference]: Without dead ends: 69 [2018-01-21 08:19:48,754 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-21 08:19:48,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-01-21 08:19:48,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 67. [2018-01-21 08:19:48,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-01-21 08:19:48,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 74 transitions. [2018-01-21 08:19:48,760 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 74 transitions. Word has length 44 [2018-01-21 08:19:48,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:48,761 INFO L432 AbstractCegarLoop]: Abstraction has 67 states and 74 transitions. [2018-01-21 08:19:48,761 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-21 08:19:48,761 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 74 transitions. [2018-01-21 08:19:48,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 08:19:48,762 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:48,762 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:48,763 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:48,763 INFO L82 PathProgramCache]: Analyzing trace with hash 1680046266, now seen corresponding path program 1 times [2018-01-21 08:19:48,763 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:48,764 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,764 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:48,764 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:48,764 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:48,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:48,783 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:49,029 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 08:19:49,029 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:19:49,030 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-21 08:19:49,030 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:49,030 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 08:19:49,030 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 08:19:49,031 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-21 08:19:49,031 INFO L87 Difference]: Start difference. First operand 67 states and 74 transitions. Second operand 6 states. [2018-01-21 08:19:49,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:49,214 INFO L93 Difference]: Finished difference Result 76 states and 82 transitions. [2018-01-21 08:19:49,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 08:19:49,214 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 47 [2018-01-21 08:19:49,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:49,216 INFO L225 Difference]: With dead ends: 76 [2018-01-21 08:19:49,216 INFO L226 Difference]: Without dead ends: 65 [2018-01-21 08:19:49,217 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 6 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-21 08:19:49,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-01-21 08:19:49,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 62. [2018-01-21 08:19:49,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-21 08:19:49,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 68 transitions. [2018-01-21 08:19:49,225 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 68 transitions. Word has length 47 [2018-01-21 08:19:49,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:49,227 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 68 transitions. [2018-01-21 08:19:49,227 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 08:19:49,228 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 68 transitions. [2018-01-21 08:19:49,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 08:19:49,229 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:49,229 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:49,229 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:49,230 INFO L82 PathProgramCache]: Analyzing trace with hash 1025820889, now seen corresponding path program 1 times [2018-01-21 08:19:49,230 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:49,231 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:49,231 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:49,231 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:49,231 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:49,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:49,248 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:49,483 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-21 08:19:49,484 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:49,484 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:19:49,485 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 51 with the following transitions: [2018-01-21 08:19:49,486 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [8], [10], [11], [12], [14], [18], [19], [21], [27], [28], [29], [31], [35], [36], [39], [49], [50], [52], [53], [55], [56], [57], [58], [59], [60], [61], [62], [66], [72], [78], [80], [82], [83], [84], [90], [91], [92], [93], [94], [95], [96], [97], [100], [101], [102] [2018-01-21 08:19:49,542 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:19:49,542 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:19:51,022 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:19:51,023 INFO L268 AbstractInterpreter]: Visited 48 different actions 60 times. Merged at 11 different actions 11 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 20 variables. [2018-01-21 08:19:51,032 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:19:51,032 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:51,032 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:19:51,042 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:51,042 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:19:51,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:51,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:19:51,128 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 08:19:51,129 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:19:51,212 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 08:19:51,233 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-21 08:19:51,234 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [8] total 12 [2018-01-21 08:19:51,234 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:19:51,234 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 08:19:51,234 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 08:19:51,235 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2018-01-21 08:19:51,235 INFO L87 Difference]: Start difference. First operand 62 states and 68 transitions. Second operand 4 states. [2018-01-21 08:19:51,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:51,252 INFO L93 Difference]: Finished difference Result 115 states and 127 transitions. [2018-01-21 08:19:51,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 08:19:51,253 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 50 [2018-01-21 08:19:51,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:51,254 INFO L225 Difference]: With dead ends: 115 [2018-01-21 08:19:51,254 INFO L226 Difference]: Without dead ends: 63 [2018-01-21 08:19:51,255 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 96 SyntacticMatches, 10 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-01-21 08:19:51,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-21 08:19:51,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-01-21 08:19:51,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-01-21 08:19:51,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 69 transitions. [2018-01-21 08:19:51,261 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 69 transitions. Word has length 50 [2018-01-21 08:19:51,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:51,262 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 69 transitions. [2018-01-21 08:19:51,262 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 08:19:51,262 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 69 transitions. [2018-01-21 08:19:51,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 08:19:51,263 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:51,263 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:51,263 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:51,263 INFO L82 PathProgramCache]: Analyzing trace with hash -1453151358, now seen corresponding path program 1 times [2018-01-21 08:19:51,263 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:51,264 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:51,264 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:51,264 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:51,264 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:51,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:51,281 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:51,533 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 08:19:51,533 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:51,557 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:19:51,558 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 52 with the following transitions: [2018-01-21 08:19:51,558 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [8], [10], [11], [12], [14], [18], [19], [21], [25], [27], [28], [29], [31], [35], [36], [39], [49], [50], [52], [53], [55], [56], [57], [58], [59], [60], [61], [62], [66], [72], [78], [80], [82], [83], [84], [90], [91], [92], [93], [94], [95], [96], [97], [100], [101], [102] [2018-01-21 08:19:51,560 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:19:51,560 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:19:55,254 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:19:55,254 INFO L268 AbstractInterpreter]: Visited 49 different actions 69 times. Merged at 14 different actions 17 times. Never widened. Found 4 fixpoints after 3 different actions. Largest state had 20 variables. [2018-01-21 08:19:55,256 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:19:55,256 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:55,256 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:19:55,288 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:55,288 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:19:55,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:55,327 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:19:55,366 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 08:19:55,367 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:19:55,483 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 08:19:55,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:55,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 4 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:19:55,521 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:55,521 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:19:55,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:55,573 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:19:55,579 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 08:19:55,579 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:19:55,598 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-21 08:19:55,600 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:19:55,600 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 5, 5, 5, 5] total 14 [2018-01-21 08:19:55,600 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:19:55,600 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 08:19:55,600 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 08:19:55,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-01-21 08:19:55,601 INFO L87 Difference]: Start difference. First operand 63 states and 69 transitions. Second operand 11 states. [2018-01-21 08:19:55,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:55,751 INFO L93 Difference]: Finished difference Result 118 states and 130 transitions. [2018-01-21 08:19:55,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 08:19:55,751 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 51 [2018-01-21 08:19:55,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:55,752 INFO L225 Difference]: With dead ends: 118 [2018-01-21 08:19:55,752 INFO L226 Difference]: Without dead ends: 63 [2018-01-21 08:19:55,752 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 222 GetRequests, 196 SyntacticMatches, 11 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=52, Invalid=220, Unknown=0, NotChecked=0, Total=272 [2018-01-21 08:19:55,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-21 08:19:55,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 60. [2018-01-21 08:19:55,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-21 08:19:55,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 65 transitions. [2018-01-21 08:19:55,756 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 65 transitions. Word has length 51 [2018-01-21 08:19:55,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:55,756 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 65 transitions. [2018-01-21 08:19:55,757 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 08:19:55,757 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 65 transitions. [2018-01-21 08:19:55,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 08:19:55,757 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:55,757 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:55,757 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:55,758 INFO L82 PathProgramCache]: Analyzing trace with hash 1200306608, now seen corresponding path program 1 times [2018-01-21 08:19:55,758 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:55,759 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:55,759 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:55,759 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:55,759 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:55,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:55,775 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:56,000 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 08:19:56,001 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:56,001 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:19:56,001 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 56 with the following transitions: [2018-01-21 08:19:56,001 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [8], [10], [11], [12], [14], [18], [19], [21], [25], [27], [28], [31], [35], [36], [39], [41], [42], [43], [45], [49], [50], [52], [53], [55], [56], [57], [58], [59], [60], [61], [62], [69], [72], [78], [80], [82], [83], [84], [90], [91], [92], [93], [96], [97], [100], [101], [102] [2018-01-21 08:19:56,003 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:19:56,003 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:19:58,224 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:19:58,224 INFO L268 AbstractInterpreter]: Visited 50 different actions 81 times. Merged at 24 different actions 27 times. Never widened. Found 6 fixpoints after 5 different actions. Largest state had 20 variables. [2018-01-21 08:19:58,233 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:19:58,234 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:58,234 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:19:58,245 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:58,245 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:19:58,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:58,268 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:19:58,320 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 08:19:58,321 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:19:58,407 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 08:19:58,427 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:58,427 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:19:58,434 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:58,434 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:19:58,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:58,470 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:19:58,477 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 08:19:58,477 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:19:58,499 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-21 08:19:58,500 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:19:58,500 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6, 6, 6, 6] total 17 [2018-01-21 08:19:58,500 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:19:58,501 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 08:19:58,501 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 08:19:58,501 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-01-21 08:19:58,501 INFO L87 Difference]: Start difference. First operand 60 states and 65 transitions. Second operand 13 states. [2018-01-21 08:19:58,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:58,734 INFO L93 Difference]: Finished difference Result 121 states and 132 transitions. [2018-01-21 08:19:58,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 08:19:58,734 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2018-01-21 08:19:58,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:58,735 INFO L225 Difference]: With dead ends: 121 [2018-01-21 08:19:58,735 INFO L226 Difference]: Without dead ends: 70 [2018-01-21 08:19:58,735 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 210 SyntacticMatches, 8 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=87, Invalid=333, Unknown=0, NotChecked=0, Total=420 [2018-01-21 08:19:58,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-01-21 08:19:58,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 67. [2018-01-21 08:19:58,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-01-21 08:19:58,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 72 transitions. [2018-01-21 08:19:58,740 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 72 transitions. Word has length 55 [2018-01-21 08:19:58,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:58,741 INFO L432 AbstractCegarLoop]: Abstraction has 67 states and 72 transitions. [2018-01-21 08:19:58,741 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 08:19:58,741 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 72 transitions. [2018-01-21 08:19:58,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-21 08:19:58,742 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:58,742 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:58,742 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:58,742 INFO L82 PathProgramCache]: Analyzing trace with hash -2066944597, now seen corresponding path program 2 times [2018-01-21 08:19:58,743 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:58,743 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:58,744 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:19:58,744 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:58,744 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:58,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:58,761 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:58,843 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 08:19:58,844 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:58,844 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:19:58,844 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:19:58,844 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:19:58,844 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:58,844 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:19:58,850 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:19:58,850 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:19:58,867 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:19:58,878 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:19:58,879 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:19:58,881 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:19:58,905 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 08:19:58,906 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:19:58,978 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 08:19:58,999 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:58,999 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:19:59,002 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:19:59,002 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:19:59,019 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:19:59,045 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:19:59,058 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:19:59,063 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:19:59,068 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 08:19:59,068 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:19:59,091 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 08:19:59,093 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:19:59,093 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 08:19:59,093 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:19:59,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 08:19:59,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 08:19:59,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 08:19:59,094 INFO L87 Difference]: Start difference. First operand 67 states and 72 transitions. Second operand 12 states. [2018-01-21 08:19:59,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:19:59,118 INFO L93 Difference]: Finished difference Result 122 states and 132 transitions. [2018-01-21 08:19:59,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 08:19:59,118 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 62 [2018-01-21 08:19:59,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:19:59,119 INFO L225 Difference]: With dead ends: 122 [2018-01-21 08:19:59,119 INFO L226 Difference]: Without dead ends: 68 [2018-01-21 08:19:59,119 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 236 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 08:19:59,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-01-21 08:19:59,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2018-01-21 08:19:59,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-01-21 08:19:59,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 73 transitions. [2018-01-21 08:19:59,125 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 73 transitions. Word has length 62 [2018-01-21 08:19:59,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:19:59,125 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 73 transitions. [2018-01-21 08:19:59,125 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 08:19:59,125 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 73 transitions. [2018-01-21 08:19:59,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-21 08:19:59,126 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:19:59,126 INFO L322 BasicCegarLoop]: trace histogram [4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:19:59,126 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0EnsuresViolation]=== [2018-01-21 08:19:59,126 INFO L82 PathProgramCache]: Analyzing trace with hash -1647895852, now seen corresponding path program 3 times [2018-01-21 08:19:59,127 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:19:59,127 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:59,127 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:19:59,128 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:19:59,128 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:19:59,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:19:59,144 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:19:59,266 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-21 08:19:59,266 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:59,266 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:19:59,266 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:19:59,266 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:19:59,266 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:19:59,267 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:19:59,275 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:19:59,275 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:19:59,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:19:59,309 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:19:59,312 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:19:59,316 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:19:59,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 08:19:59,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 08:19:59,353 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,377 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,378 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 08:19:59,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 08:19:59,475 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,476 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 08:19:59,477 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,509 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,539 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,539 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 08:19:59,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 08:19:59,594 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,594 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,595 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,604 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,607 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,608 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 08:19:59,609 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,622 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,627 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,627 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 08:19:59,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 08:19:59,675 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,676 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,677 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,677 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,678 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,680 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,680 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,681 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,682 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,683 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,683 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,684 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 08:19:59,686 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,702 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,708 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,708 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 08:19:59,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 08:19:59,731 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,731 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,732 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,732 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,733 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,733 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,734 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,735 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,735 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,736 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,737 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,737 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,738 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,739 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,739 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 08:19:59,741 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,766 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,773 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 08:19:59,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 08:19:59,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,802 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,806 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,806 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,807 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,807 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,808 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,809 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,810 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,810 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,811 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 08:19:59,813 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,858 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,867 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,867 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 08:19:59,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 08:19:59,895 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,896 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,896 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,897 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,897 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,898 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,898 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,899 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,899 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,900 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,901 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,901 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,902 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,902 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,903 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,903 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,904 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,904 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,905 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,907 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,907 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,908 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,909 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,909 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,910 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:19:59,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 08:19:59,912 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,963 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:19:59,974 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 08:20:00,242 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-01-21 08:20:00,242 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,243 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,243 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:121, output treesize:1 [2018-01-21 08:20:00,256 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-01-21 08:20:00,256 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:00,513 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-01-21 08:20:00,534 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:00,534 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:00,537 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:20:00,537 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:20:00,556 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:00,580 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:00,605 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:00,611 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:00,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 08:20:00,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 08:20:00,616 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,617 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,620 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,620 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 08:20:00,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 08:20:00,628 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,628 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 08:20:00,632 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,651 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,665 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,666 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 08:20:00,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 08:20:00,671 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,672 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,672 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,673 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,674 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,674 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 08:20:00,675 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,685 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,690 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 08:20:00,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 08:20:00,696 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,697 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,697 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,698 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,698 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,699 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,700 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,700 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,701 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,701 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,702 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,702 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 08:20:00,703 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,719 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,725 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,725 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 08:20:00,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 08:20:00,733 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,733 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,734 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,735 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,735 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,736 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,736 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,737 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,738 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,738 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,739 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,741 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,742 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,742 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 08:20:00,743 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,768 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,775 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,775 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 08:20:00,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 08:20:00,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,787 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,788 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,789 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,790 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,791 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,792 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,793 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,794 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,795 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,795 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,796 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,802 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 08:20:00,803 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,859 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,869 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,869 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 08:20:00,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 08:20:00,876 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,878 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,878 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,879 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,879 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,880 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,880 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,881 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,883 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,883 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,884 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,885 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,885 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,886 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,886 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,887 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,887 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,888 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,888 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,889 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,889 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,890 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,891 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:00,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 08:20:00,892 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,934 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:00,944 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 08:20:01,017 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-01-21 08:20:01,017 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:01,134 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-01-21 08:20:01,135 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:01,136 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 16, 7, 16, 7] total 28 [2018-01-21 08:20:01,136 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:01,136 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 08:20:01,136 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 08:20:01,136 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=633, Unknown=0, NotChecked=0, Total=756 [2018-01-21 08:20:01,137 INFO L87 Difference]: Start difference. First operand 68 states and 73 transitions. Second operand 22 states. [2018-01-21 08:20:01,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:01,544 INFO L93 Difference]: Finished difference Result 135 states and 146 transitions. [2018-01-21 08:20:01,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 08:20:01,545 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 63 [2018-01-21 08:20:01,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:01,545 INFO L225 Difference]: With dead ends: 135 [2018-01-21 08:20:01,546 INFO L226 Difference]: Without dead ends: 78 [2018-01-21 08:20:01,546 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 217 SyntacticMatches, 16 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 730 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=252, Invalid=1308, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 08:20:01,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-01-21 08:20:01,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 75. [2018-01-21 08:20:01,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-01-21 08:20:01,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 80 transitions. [2018-01-21 08:20:01,553 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 80 transitions. Word has length 63 [2018-01-21 08:20:01,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:01,553 INFO L432 AbstractCegarLoop]: Abstraction has 75 states and 80 transitions. [2018-01-21 08:20:01,553 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 08:20:01,553 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 80 transitions. [2018-01-21 08:20:01,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-21 08:20:01,554 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:01,555 INFO L322 BasicCegarLoop]: trace histogram [5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:01,555 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:01,555 INFO L82 PathProgramCache]: Analyzing trace with hash 1961550311, now seen corresponding path program 4 times [2018-01-21 08:20:01,555 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:01,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:01,556 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:01,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:01,557 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:01,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:01,575 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:01,681 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:01,682 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:01,682 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:01,682 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:01,682 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:01,682 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:01,682 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:01,698 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:20:01,698 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:20:01,747 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:01,750 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:01,840 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:01,840 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:01,940 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:01,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:01,961 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:01,964 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:20:01,964 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:20:02,020 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:02,025 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:02,030 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,030 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:02,061 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,062 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:02,062 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 08:20:02,063 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:02,063 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 08:20:02,063 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 08:20:02,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 08:20:02,064 INFO L87 Difference]: Start difference. First operand 75 states and 80 transitions. Second operand 16 states. [2018-01-21 08:20:02,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:02,110 INFO L93 Difference]: Finished difference Result 136 states and 146 transitions. [2018-01-21 08:20:02,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 08:20:02,111 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 70 [2018-01-21 08:20:02,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:02,112 INFO L225 Difference]: With dead ends: 136 [2018-01-21 08:20:02,112 INFO L226 Difference]: Without dead ends: 76 [2018-01-21 08:20:02,113 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 288 GetRequests, 264 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 08:20:02,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-01-21 08:20:02,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2018-01-21 08:20:02,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-01-21 08:20:02,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 81 transitions. [2018-01-21 08:20:02,119 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 81 transitions. Word has length 70 [2018-01-21 08:20:02,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:02,120 INFO L432 AbstractCegarLoop]: Abstraction has 76 states and 81 transitions. [2018-01-21 08:20:02,120 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 08:20:02,120 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2018-01-21 08:20:02,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-01-21 08:20:02,121 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:02,121 INFO L322 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:02,121 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:02,121 INFO L82 PathProgramCache]: Analyzing trace with hash -1168255472, now seen corresponding path program 5 times [2018-01-21 08:20:02,121 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:02,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:02,122 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:02,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:02,122 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:02,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:02,135 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:02,258 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,258 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:02,296 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:02,296 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:02,296 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:02,296 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:02,296 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:02,302 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:20:02,302 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:20:02,311 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:02,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:02,322 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:02,334 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:02,336 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:02,338 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:02,386 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,386 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:02,515 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,536 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:02,536 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:02,541 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:20:02,542 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:20:02,550 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:02,555 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:02,567 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:02,612 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:02,629 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:02,634 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:02,639 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,639 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:02,681 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,683 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:02,683 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 08:20:02,683 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:02,683 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 08:20:02,684 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 08:20:02,684 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 08:20:02,684 INFO L87 Difference]: Start difference. First operand 76 states and 81 transitions. Second operand 18 states. [2018-01-21 08:20:02,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:02,715 INFO L93 Difference]: Finished difference Result 137 states and 147 transitions. [2018-01-21 08:20:02,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 08:20:02,717 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 71 [2018-01-21 08:20:02,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:02,718 INFO L225 Difference]: With dead ends: 137 [2018-01-21 08:20:02,718 INFO L226 Difference]: Without dead ends: 77 [2018-01-21 08:20:02,719 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 266 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 08:20:02,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-01-21 08:20:02,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-01-21 08:20:02,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-21 08:20:02,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 82 transitions. [2018-01-21 08:20:02,727 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 82 transitions. Word has length 71 [2018-01-21 08:20:02,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:02,727 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 82 transitions. [2018-01-21 08:20:02,727 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 08:20:02,727 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 82 transitions. [2018-01-21 08:20:02,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-21 08:20:02,728 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:02,728 INFO L322 BasicCegarLoop]: trace histogram [7, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:02,728 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:02,729 INFO L82 PathProgramCache]: Analyzing trace with hash 592013063, now seen corresponding path program 6 times [2018-01-21 08:20:02,729 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:02,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:02,730 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:02,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:02,730 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:02,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:02,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:02,836 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:02,836 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:02,836 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:02,836 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:02,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:02,836 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:02,841 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:20:02,842 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:20:02,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:02,865 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:02,872 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:02,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:02,917 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:02,918 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:02,921 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:02,971 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:02,971 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:03,109 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:03,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:03,130 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:03,133 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:20:03,133 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:20:03,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:03,173 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:03,200 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:03,330 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:03,613 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:03,634 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:03,640 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:03,646 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:03,646 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:03,691 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:03,693 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:03,693 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 08:20:03,693 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:03,694 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 08:20:03,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 08:20:03,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 08:20:03,694 INFO L87 Difference]: Start difference. First operand 77 states and 82 transitions. Second operand 20 states. [2018-01-21 08:20:03,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:03,723 INFO L93 Difference]: Finished difference Result 138 states and 148 transitions. [2018-01-21 08:20:03,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 08:20:03,724 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 72 [2018-01-21 08:20:03,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:03,724 INFO L225 Difference]: With dead ends: 138 [2018-01-21 08:20:03,724 INFO L226 Difference]: Without dead ends: 78 [2018-01-21 08:20:03,725 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 298 GetRequests, 268 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 08:20:03,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-01-21 08:20:03,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-01-21 08:20:03,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-01-21 08:20:03,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2018-01-21 08:20:03,730 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 83 transitions. Word has length 72 [2018-01-21 08:20:03,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:03,730 INFO L432 AbstractCegarLoop]: Abstraction has 78 states and 83 transitions. [2018-01-21 08:20:03,730 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 08:20:03,730 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 83 transitions. [2018-01-21 08:20:03,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-21 08:20:03,730 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:03,731 INFO L322 BasicCegarLoop]: trace histogram [8, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:03,731 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:03,731 INFO L82 PathProgramCache]: Analyzing trace with hash -674237200, now seen corresponding path program 7 times [2018-01-21 08:20:03,731 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:03,732 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:03,732 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:03,732 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:03,732 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:03,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:03,748 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:03,888 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:03,888 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:03,888 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:03,888 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:03,888 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:03,888 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:03,889 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:03,893 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:20:03,894 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:20:03,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:03,913 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:03,964 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:03,964 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:04,149 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:04,170 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:04,170 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:04,172 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:20:04,173 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:20:04,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:04,243 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:04,271 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:04,271 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:04,324 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:04,325 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:04,325 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 08:20:04,325 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:04,325 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 08:20:04,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 08:20:04,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 08:20:04,326 INFO L87 Difference]: Start difference. First operand 78 states and 83 transitions. Second operand 22 states. [2018-01-21 08:20:04,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:04,358 INFO L93 Difference]: Finished difference Result 139 states and 149 transitions. [2018-01-21 08:20:04,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 08:20:04,359 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 73 [2018-01-21 08:20:04,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:04,360 INFO L225 Difference]: With dead ends: 139 [2018-01-21 08:20:04,360 INFO L226 Difference]: Without dead ends: 79 [2018-01-21 08:20:04,361 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 303 GetRequests, 270 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 08:20:04,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-01-21 08:20:04,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-01-21 08:20:04,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-21 08:20:04,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 84 transitions. [2018-01-21 08:20:04,365 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 84 transitions. Word has length 73 [2018-01-21 08:20:04,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:04,366 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 84 transitions. [2018-01-21 08:20:04,366 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 08:20:04,366 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 84 transitions. [2018-01-21 08:20:04,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-01-21 08:20:04,367 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:04,367 INFO L322 BasicCegarLoop]: trace histogram [9, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:04,367 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:04,367 INFO L82 PathProgramCache]: Analyzing trace with hash -1273289689, now seen corresponding path program 8 times [2018-01-21 08:20:04,367 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:04,368 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:04,368 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:20:04,368 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:04,368 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:04,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:04,381 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:04,515 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:04,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:04,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:04,516 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:04,516 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:04,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:04,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:04,525 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:20:04,525 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:20:04,542 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:04,561 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:04,563 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:04,566 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:04,643 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:04,643 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:04,834 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:04,855 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:04,856 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:04,858 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:20:04,859 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:20:04,878 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:04,907 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:04,923 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:04,928 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:04,934 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:04,934 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:04,974 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:04,975 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:04,975 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 08:20:04,975 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:04,976 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 08:20:04,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 08:20:04,976 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 08:20:04,976 INFO L87 Difference]: Start difference. First operand 79 states and 84 transitions. Second operand 24 states. [2018-01-21 08:20:05,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:05,016 INFO L93 Difference]: Finished difference Result 140 states and 150 transitions. [2018-01-21 08:20:05,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 08:20:05,016 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 74 [2018-01-21 08:20:05,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:05,017 INFO L225 Difference]: With dead ends: 140 [2018-01-21 08:20:05,017 INFO L226 Difference]: Without dead ends: 80 [2018-01-21 08:20:05,018 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 308 GetRequests, 272 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 08:20:05,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-21 08:20:05,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2018-01-21 08:20:05,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-01-21 08:20:05,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 85 transitions. [2018-01-21 08:20:05,022 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 85 transitions. Word has length 74 [2018-01-21 08:20:05,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:05,022 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 85 transitions. [2018-01-21 08:20:05,022 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 08:20:05,022 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 85 transitions. [2018-01-21 08:20:05,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-21 08:20:05,023 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:05,023 INFO L322 BasicCegarLoop]: trace histogram [10, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:05,023 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:05,023 INFO L82 PathProgramCache]: Analyzing trace with hash 1630919632, now seen corresponding path program 9 times [2018-01-21 08:20:05,023 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:05,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:05,024 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:05,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:05,024 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:05,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:05,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:05,159 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:05,160 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:05,160 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:05,160 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:05,160 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:05,160 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:05,160 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:05,168 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:20:05,168 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:20:05,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:05,191 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:05,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:05,207 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:05,210 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:05,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-21 08:20:05,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-21 08:20:05,227 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,228 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,231 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-01-21 08:20:05,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-01-21 08:20:05,245 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 37 [2018-01-21 08:20:05,246 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,251 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,254 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,254 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:26, output treesize:22 [2018-01-21 08:20:05,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2018-01-21 08:20:05,271 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,272 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,272 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,273 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,273 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 88 [2018-01-21 08:20:05,275 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,284 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,288 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,288 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-01-21 08:20:05,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 48 [2018-01-21 08:20:05,630 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,631 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,632 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:05,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 3 [2018-01-21 08:20:05,633 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,637 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,638 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:05,638 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:56, output treesize:3 [2018-01-21 08:20:05,673 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-01-21 08:20:05,673 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:06,069 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-01-21 08:20:06,069 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,070 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:1 [2018-01-21 08:20:06,086 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-01-21 08:20:06,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:06,108 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:06,112 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:20:06,112 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:20:06,134 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:06,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:06,233 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:06,269 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:06,277 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:06,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 08:20:06,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 08:20:06,283 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,284 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,288 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,288 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 08:20:06,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 08:20:06,346 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 08:20:06,348 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,355 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,361 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,361 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 08:20:06,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 08:20:06,399 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,400 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,400 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,401 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,402 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,402 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 08:20:06,403 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,415 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,420 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,420 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 08:20:06,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 08:20:06,476 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,477 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,477 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,478 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,478 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,479 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,480 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,480 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,481 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,482 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,482 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,483 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 08:20:06,484 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,503 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,511 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 08:20:06,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 08:20:06,557 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,558 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,559 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,559 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,560 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,560 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,561 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,561 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,562 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,562 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,563 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,564 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,564 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,565 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,566 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,566 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 08:20:06,568 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,604 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,611 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 08:20:06,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 08:20:06,652 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,653 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,654 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,654 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,655 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,655 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,656 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,656 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,657 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,657 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,658 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,658 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,659 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,659 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,660 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,663 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,664 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,664 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,665 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,665 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,666 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 08:20:06,667 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,724 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,724 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 08:20:06,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 08:20:06,768 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,770 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,771 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,773 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,776 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,776 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,782 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,782 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:06,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 08:20:06,786 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,825 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,835 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:06,836 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 08:20:07,523 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-01-21 08:20:07,523 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:07,902 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-01-21 08:20:07,903 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:07,903 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 16, 12, 17, 8] total 57 [2018-01-21 08:20:07,903 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:07,904 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 08:20:07,904 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 08:20:07,905 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=2893, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 08:20:07,905 INFO L87 Difference]: Start difference. First operand 80 states and 85 transitions. Second operand 28 states. [2018-01-21 08:20:08,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:08,470 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-01-21 08:20:08,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 08:20:08,470 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 75 [2018-01-21 08:20:08,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:08,471 INFO L225 Difference]: With dead ends: 154 [2018-01-21 08:20:08,471 INFO L226 Difference]: Without dead ends: 94 [2018-01-21 08:20:08,472 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 321 GetRequests, 245 SyntacticMatches, 13 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1830 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=373, Invalid=3787, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 08:20:08,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-21 08:20:08,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 92. [2018-01-21 08:20:08,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-01-21 08:20:08,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 98 transitions. [2018-01-21 08:20:08,480 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 98 transitions. Word has length 75 [2018-01-21 08:20:08,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:08,480 INFO L432 AbstractCegarLoop]: Abstraction has 92 states and 98 transitions. [2018-01-21 08:20:08,480 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 08:20:08,480 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 98 transitions. [2018-01-21 08:20:08,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-01-21 08:20:08,481 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:08,481 INFO L322 BasicCegarLoop]: trace histogram [11, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:08,481 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:08,482 INFO L82 PathProgramCache]: Analyzing trace with hash 580128904, now seen corresponding path program 1 times [2018-01-21 08:20:08,482 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:08,482 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:08,483 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:08,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:08,483 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:08,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:08,497 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:08,626 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:08,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:08,626 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:08,626 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 80 with the following transitions: [2018-01-21 08:20:08,626 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [8], [10], [11], [12], [14], [18], [19], [21], [25], [27], [28], [29], [31], [35], [36], [39], [41], [42], [43], [45], [49], [50], [52], [53], [55], [56], [57], [58], [59], [60], [61], [62], [69], [72], [75], [80], [82], [83], [84], [90], [91], [92], [93], [96], [97], [98], [99], [100], [101], [102] [2018-01-21 08:20:08,628 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:20:08,628 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:20:10,116 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:20:10,116 INFO L268 AbstractInterpreter]: Visited 53 different actions 84 times. Merged at 24 different actions 27 times. Never widened. Found 7 fixpoints after 6 different actions. Largest state had 20 variables. [2018-01-21 08:20:10,117 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:20:10,118 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:10,118 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:10,122 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:20:10,122 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:20:10,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:10,145 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:10,225 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:10,226 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:10,510 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:10,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:10,544 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:10,548 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:20:10,548 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:20:10,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:10,602 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:10,610 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:10,610 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:10,664 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:10,665 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:10,665 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 08:20:10,665 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:10,666 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 08:20:10,666 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 08:20:10,666 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 08:20:10,666 INFO L87 Difference]: Start difference. First operand 92 states and 98 transitions. Second operand 28 states. [2018-01-21 08:20:10,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:10,710 INFO L93 Difference]: Finished difference Result 164 states and 176 transitions. [2018-01-21 08:20:10,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 08:20:10,711 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 79 [2018-01-21 08:20:10,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:10,712 INFO L225 Difference]: With dead ends: 164 [2018-01-21 08:20:10,712 INFO L226 Difference]: Without dead ends: 93 [2018-01-21 08:20:10,713 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 330 GetRequests, 288 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 08:20:10,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-01-21 08:20:10,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2018-01-21 08:20:10,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-01-21 08:20:10,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 99 transitions. [2018-01-21 08:20:10,722 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 99 transitions. Word has length 79 [2018-01-21 08:20:10,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:10,722 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 99 transitions. [2018-01-21 08:20:10,722 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 08:20:10,722 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 99 transitions. [2018-01-21 08:20:10,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-01-21 08:20:10,723 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:10,723 INFO L322 BasicCegarLoop]: trace histogram [12, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:10,723 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:10,724 INFO L82 PathProgramCache]: Analyzing trace with hash -50939265, now seen corresponding path program 2 times [2018-01-21 08:20:10,724 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:10,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:10,724 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:20:10,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:10,725 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:10,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:10,740 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:11,046 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:11,046 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:11,047 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:11,047 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:11,047 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:11,047 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:11,047 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:11,054 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:20:11,055 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:20:11,074 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:11,094 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:11,097 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:11,100 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:11,227 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:11,227 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:11,726 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:11,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:11,761 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:11,764 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:20:11,765 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:20:11,792 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:11,833 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:11,852 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:11,856 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:11,862 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:11,862 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:11,922 INFO L134 CoverageAnalysis]: Checked inductivity of 102 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:11,924 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:11,924 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 08:20:11,924 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:11,924 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 08:20:11,924 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 08:20:11,925 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 08:20:11,925 INFO L87 Difference]: Start difference. First operand 93 states and 99 transitions. Second operand 30 states. [2018-01-21 08:20:11,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:11,963 INFO L93 Difference]: Finished difference Result 165 states and 177 transitions. [2018-01-21 08:20:11,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 08:20:11,963 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 80 [2018-01-21 08:20:11,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:11,964 INFO L225 Difference]: With dead ends: 165 [2018-01-21 08:20:11,964 INFO L226 Difference]: Without dead ends: 94 [2018-01-21 08:20:11,965 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 335 GetRequests, 290 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 08:20:11,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-21 08:20:11,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2018-01-21 08:20:11,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-01-21 08:20:11,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 100 transitions. [2018-01-21 08:20:11,971 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 100 transitions. Word has length 80 [2018-01-21 08:20:11,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:11,971 INFO L432 AbstractCegarLoop]: Abstraction has 94 states and 100 transitions. [2018-01-21 08:20:11,971 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 08:20:11,971 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 100 transitions. [2018-01-21 08:20:11,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-01-21 08:20:11,972 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:11,972 INFO L322 BasicCegarLoop]: trace histogram [13, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:11,972 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:11,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1860783976, now seen corresponding path program 3 times [2018-01-21 08:20:11,972 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:11,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:11,973 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:11,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:11,973 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:11,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:11,988 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:12,143 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-21 08:20:12,143 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:12,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:12,144 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:12,144 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:12,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:12,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:12,153 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:20:12,154 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:20:12,168 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:12,178 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:12,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:12,194 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:12,197 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:12,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 08:20:12,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 08:20:12,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,218 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,220 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,221 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 08:20:12,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 08:20:12,237 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,237 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 08:20:12,238 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,242 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,247 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 08:20:12,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 08:20:12,266 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,266 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,267 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,267 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,268 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,268 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 08:20:12,269 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,278 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,284 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,284 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 08:20:12,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 08:20:12,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 08:20:12,314 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,331 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,337 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 08:20:12,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 08:20:12,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,365 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,367 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,368 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,368 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,369 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,370 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,370 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,371 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 08:20:12,373 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,423 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,431 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,431 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 08:20:12,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 08:20:12,462 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,463 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,464 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,465 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,465 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,466 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,466 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,467 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,468 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,468 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,469 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,469 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,470 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,471 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,471 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,472 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,473 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,473 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,474 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,475 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,475 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 08:20:12,476 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,511 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,520 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,520 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 08:20:12,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 08:20:12,552 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,570 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,571 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,571 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,572 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,573 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,573 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,574 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,574 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,575 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,576 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,576 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,577 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,578 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,578 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,579 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,580 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,580 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,581 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,581 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,582 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,583 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,584 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,584 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,585 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,586 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,586 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:12,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 08:20:12,588 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,641 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:12,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 08:20:12,925 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2018-01-21 08:20:12,925 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:13,164 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2018-01-21 08:20:13,184 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:13,184 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:13,187 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:20:13,187 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:20:13,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:13,229 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:13,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:20:13,327 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:13,334 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:13,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-21 08:20:13,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-21 08:20:13,339 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,342 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,346 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,346 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-21 08:20:13,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-21 08:20:13,350 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,351 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-21 08:20:13,351 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,355 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,359 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-21 08:20:13,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-21 08:20:13,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,365 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,365 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-21 08:20:13,367 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,375 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,379 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-21 08:20:13,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-21 08:20:13,384 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,384 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,385 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,385 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,386 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,386 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,387 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,387 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,388 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,388 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,389 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,389 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-21 08:20:13,390 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,405 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,411 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-21 08:20:13,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-21 08:20:13,416 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,417 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,425 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,426 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,427 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,428 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,428 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,429 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,429 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,429 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,430 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,431 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,431 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,432 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,432 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,433 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-21 08:20:13,434 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,455 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,461 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,462 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-21 08:20:13,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-21 08:20:13,466 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,467 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,467 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,468 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,468 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,469 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,469 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,470 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,470 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,471 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,471 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,472 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,472 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,473 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,473 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,474 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,475 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,475 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,476 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,476 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,477 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-21 08:20:13,478 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,508 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,515 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,516 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-21 08:20:13,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-21 08:20:13,521 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,522 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,522 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,523 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,524 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,524 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,525 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,526 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,526 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,527 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,528 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,528 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,529 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,529 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,530 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,530 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,531 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,532 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,532 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,533 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,533 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,534 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,535 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,535 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,540 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,540 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,541 INFO L700 Elim1Store]: detected not equals via solver [2018-01-21 08:20:13,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-21 08:20:13,543 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,592 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,601 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:13,601 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-21 08:20:13,891 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2018-01-21 08:20:13,891 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:14,179 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 103 trivial. 0 not checked. [2018-01-21 08:20:14,180 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:14,180 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 8, 17, 8] total 48 [2018-01-21 08:20:14,181 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:14,181 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 08:20:14,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 08:20:14,181 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=287, Invalid=1969, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 08:20:14,182 INFO L87 Difference]: Start difference. First operand 94 states and 100 transitions. Second operand 32 states. [2018-01-21 08:20:14,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:14,822 INFO L93 Difference]: Finished difference Result 178 states and 191 transitions. [2018-01-21 08:20:14,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 08:20:14,822 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 81 [2018-01-21 08:20:14,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:14,823 INFO L225 Difference]: With dead ends: 178 [2018-01-21 08:20:14,823 INFO L226 Difference]: Without dead ends: 104 [2018-01-21 08:20:14,824 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 353 GetRequests, 277 SyntacticMatches, 17 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1657 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=430, Invalid=3230, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 08:20:14,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-01-21 08:20:14,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 101. [2018-01-21 08:20:14,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-01-21 08:20:14,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 107 transitions. [2018-01-21 08:20:14,831 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 107 transitions. Word has length 81 [2018-01-21 08:20:14,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:14,832 INFO L432 AbstractCegarLoop]: Abstraction has 101 states and 107 transitions. [2018-01-21 08:20:14,832 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 08:20:14,832 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 107 transitions. [2018-01-21 08:20:14,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-21 08:20:14,833 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:14,833 INFO L322 BasicCegarLoop]: trace histogram [14, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:14,833 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:14,833 INFO L82 PathProgramCache]: Analyzing trace with hash -777231677, now seen corresponding path program 4 times [2018-01-21 08:20:14,833 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:14,834 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:14,834 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:14,834 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:14,834 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:14,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:14,849 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:15,014 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2018-01-21 08:20:15,014 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:15,014 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:15,014 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:15,015 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:15,015 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:15,015 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:15,020 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:20:15,020 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:20:15,038 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:15,041 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:15,225 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 10 proven. 29 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-01-21 08:20:15,225 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:15,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 21 [2018-01-21 08:20:15,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2018-01-21 08:20:15,413 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-01-21 08:20:15,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-01-21 08:20:15,420 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:15,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-21 08:20:15,425 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:15,429 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-21 08:20:15,432 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-01-21 08:20:15,432 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:17, output treesize:10 [2018-01-21 08:20:15,466 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 11 proven. 28 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-01-21 08:20:15,486 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:15,486 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:15,488 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:20:15,489 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:20:15,529 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:15,534 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:15,577 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 10 proven. 29 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-01-21 08:20:15,577 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:15,676 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-01-21 08:20:15,676 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:15,677 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-21 08:20:15,677 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:1 [2018-01-21 08:20:15,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 21 [2018-01-21 08:20:15,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2018-01-21 08:20:15,748 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:15,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-21 08:20:15,756 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-21 08:20:15,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2018-01-21 08:20:15,766 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-01-21 08:20:15,772 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-21 08:20:15,775 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-01-21 08:20:15,776 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 1 variables, input treesize:17, output treesize:12 [2018-01-21 08:20:15,795 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 19 proven. 20 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-01-21 08:20:15,797 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:15,797 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 14, 13, 14, 14] total 39 [2018-01-21 08:20:15,797 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:15,797 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 08:20:15,797 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 08:20:15,798 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=240, Invalid=1242, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 08:20:15,798 INFO L87 Difference]: Start difference. First operand 101 states and 107 transitions. Second operand 30 states. [2018-01-21 08:20:20,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:20,343 INFO L93 Difference]: Finished difference Result 180 states and 192 transitions. [2018-01-21 08:20:20,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 08:20:20,343 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 88 [2018-01-21 08:20:20,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:20,344 INFO L225 Difference]: With dead ends: 180 [2018-01-21 08:20:20,344 INFO L226 Difference]: Without dead ends: 100 [2018-01-21 08:20:20,345 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 322 SyntacticMatches, 9 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=328, Invalid=1834, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 08:20:20,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-01-21 08:20:20,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 97. [2018-01-21 08:20:20,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-01-21 08:20:20,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 102 transitions. [2018-01-21 08:20:20,352 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 102 transitions. Word has length 88 [2018-01-21 08:20:20,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:20,352 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 102 transitions. [2018-01-21 08:20:20,352 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 08:20:20,352 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 102 transitions. [2018-01-21 08:20:20,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-21 08:20:20,352 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:20,353 INFO L322 BasicCegarLoop]: trace histogram [15, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:20,353 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:20,353 INFO L82 PathProgramCache]: Analyzing trace with hash -468179545, now seen corresponding path program 10 times [2018-01-21 08:20:20,353 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:20,354 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:20,354 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:20,354 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:20,354 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:20,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:20,371 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:20,584 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:20,584 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:20,584 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:20,584 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:20,584 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:20,585 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:20,585 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:20,589 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:20:20,590 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:20:20,667 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:20,670 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:20,780 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:20,781 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:21,140 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:21,160 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:21,160 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:21,163 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:20:21,163 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:20:21,272 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:21,277 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:21,284 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:21,285 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:21,417 WARN L143 SmtUtils]: Spent 109ms on a formula simplification that was a NOOP. DAG size: 53 [2018-01-21 08:20:21,455 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:21,456 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:21,457 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 08:20:21,457 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:21,457 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 08:20:21,457 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 08:20:21,458 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 08:20:21,459 INFO L87 Difference]: Start difference. First operand 97 states and 102 transitions. Second operand 36 states. [2018-01-21 08:20:21,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:21,524 INFO L93 Difference]: Finished difference Result 170 states and 180 transitions. [2018-01-21 08:20:21,524 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 08:20:21,524 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 92 [2018-01-21 08:20:21,524 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:21,524 INFO L225 Difference]: With dead ends: 170 [2018-01-21 08:20:21,525 INFO L226 Difference]: Without dead ends: 98 [2018-01-21 08:20:21,526 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 386 GetRequests, 332 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 08:20:21,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-01-21 08:20:21,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-01-21 08:20:21,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-01-21 08:20:21,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 103 transitions. [2018-01-21 08:20:21,536 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 103 transitions. Word has length 92 [2018-01-21 08:20:21,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:21,536 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 103 transitions. [2018-01-21 08:20:21,536 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 08:20:21,536 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 103 transitions. [2018-01-21 08:20:21,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-21 08:20:21,537 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:21,537 INFO L322 BasicCegarLoop]: trace histogram [16, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:21,537 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:21,538 INFO L82 PathProgramCache]: Analyzing trace with hash -804412144, now seen corresponding path program 11 times [2018-01-21 08:20:21,538 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:21,538 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:21,538 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:21,539 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:21,539 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:21,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:21,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:21,749 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:21,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:21,749 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:21,749 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:21,749 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:21,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:21,749 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:21,754 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:20:21,754 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:20:21,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,769 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,772 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,780 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,787 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,813 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,852 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,890 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:21,894 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:21,898 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:22,057 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:22,057 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:22,459 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:22,479 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:22,479 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:22,482 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:20:22,482 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:20:22,491 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:22,493 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:22,500 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:22,510 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:22,525 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:22,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:22,593 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:22,732 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:23,170 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:20:23,204 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:23,210 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:23,219 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:23,219 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:23,295 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:23,297 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:20:23,297 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 08:20:23,297 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:20:23,297 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 08:20:23,297 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 08:20:23,298 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 08:20:23,298 INFO L87 Difference]: Start difference. First operand 98 states and 103 transitions. Second operand 38 states. [2018-01-21 08:20:23,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:20:23,340 INFO L93 Difference]: Finished difference Result 171 states and 181 transitions. [2018-01-21 08:20:23,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 08:20:23,341 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 93 [2018-01-21 08:20:23,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:20:23,341 INFO L225 Difference]: With dead ends: 171 [2018-01-21 08:20:23,341 INFO L226 Difference]: Without dead ends: 99 [2018-01-21 08:20:23,342 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 391 GetRequests, 334 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 08:20:23,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-21 08:20:23,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-01-21 08:20:23,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-01-21 08:20:23,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 104 transitions. [2018-01-21 08:20:23,349 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 104 transitions. Word has length 93 [2018-01-21 08:20:23,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:20:23,350 INFO L432 AbstractCegarLoop]: Abstraction has 99 states and 104 transitions. [2018-01-21 08:20:23,350 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 08:20:23,350 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 104 transitions. [2018-01-21 08:20:23,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-01-21 08:20:23,351 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:20:23,351 INFO L322 BasicCegarLoop]: trace histogram [17, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:20:23,351 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0EnsuresViolation]=== [2018-01-21 08:20:23,351 INFO L82 PathProgramCache]: Analyzing trace with hash 1657279175, now seen corresponding path program 12 times [2018-01-21 08:20:23,351 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:20:23,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:23,352 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:20:23,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:20:23,352 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:20:23,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:20:23,366 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:20:23,690 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:23,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:23,691 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:20:23,691 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:20:23,691 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:20:23,691 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:23,691 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:20:23,696 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:20:23,696 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:20:23,709 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:23,716 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:23,724 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:23,742 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:23,763 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:23,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:23,940 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:24,141 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:24,633 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:25,067 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:25,069 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:20:25,074 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:20:25,217 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:25,217 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:20:25,669 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-21 08:20:25,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:20:25,705 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:20:25,708 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:20:25,708 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:20:25,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:25,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:25,778 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:25,917 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:26,343 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:27,067 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:20:28,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown