java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset2_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 08:43:56,183 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 08:43:56,185 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 08:43:56,200 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 08:43:56,201 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 08:43:56,202 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 08:43:56,203 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 08:43:56,204 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 08:43:56,207 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 08:43:56,208 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 08:43:56,208 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 08:43:56,209 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 08:43:56,210 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 08:43:56,211 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 08:43:56,212 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 08:43:56,214 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 08:43:56,217 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 08:43:56,219 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 08:43:56,220 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 08:43:56,221 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 08:43:56,224 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 08:43:56,224 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 08:43:56,224 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 08:43:56,225 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 08:43:56,226 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 08:43:56,227 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 08:43:56,228 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 08:43:56,228 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 08:43:56,229 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 08:43:56,229 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 08:43:56,230 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 08:43:56,230 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-21 08:43:56,238 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 08:43:56,239 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 08:43:56,239 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 08:43:56,240 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 08:43:56,240 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 08:43:56,240 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 08:43:56,240 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-21 08:43:56,240 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 08:43:56,240 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 08:43:56,241 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 08:43:56,241 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 08:43:56,241 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 08:43:56,241 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 08:43:56,241 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 08:43:56,241 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 08:43:56,242 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 08:43:56,242 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 08:43:56,242 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 08:43:56,242 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 08:43:56,242 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 08:43:56,242 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 08:43:56,242 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 08:43:56,243 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 08:43:56,243 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 08:43:56,243 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 08:43:56,243 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 08:43:56,243 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 08:43:56,243 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:43:56,244 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 08:43:56,244 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 08:43:56,244 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 08:43:56,244 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 08:43:56,244 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 08:43:56,244 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 08:43:56,244 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 08:43:56,244 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 08:43:56,244 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 08:43:56,245 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 08:43:56,245 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 08:43:56,245 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 08:43:56,278 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 08:43:56,288 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 08:43:56,291 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 08:43:56,292 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 08:43:56,293 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 08:43:56,293 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset2_false-valid-deref-write.c [2018-01-21 08:43:56,427 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 08:43:56,432 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 08:43:56,433 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 08:43:56,434 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 08:43:56,439 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 08:43:56,440 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,444 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7337ecc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56, skipping insertion in model container [2018-01-21 08:43:56,444 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,461 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:43:56,481 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:43:56,605 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:43:56,619 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:43:56,623 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56 WrapperNode [2018-01-21 08:43:56,623 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 08:43:56,624 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 08:43:56,624 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 08:43:56,624 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 08:43:56,635 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,635 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,642 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,642 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,644 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,646 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,647 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (1/1) ... [2018-01-21 08:43:56,648 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 08:43:56,649 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 08:43:56,649 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 08:43:56,649 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 08:43:56,650 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:43:56,701 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 08:43:56,702 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 08:43:56,702 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 08:43:56,702 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 08:43:56,702 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 08:43:56,702 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 08:43:56,702 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 08:43:56,703 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 08:43:56,703 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 08:43:56,703 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 08:43:56,703 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 08:43:56,703 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 08:43:56,822 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 08:43:56,822 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:43:56 BoogieIcfgContainer [2018-01-21 08:43:56,822 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 08:43:56,823 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 08:43:56,823 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 08:43:56,825 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 08:43:56,825 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 08:43:56" (1/3) ... [2018-01-21 08:43:56,826 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@171c61b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:43:56, skipping insertion in model container [2018-01-21 08:43:56,827 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:43:56" (2/3) ... [2018-01-21 08:43:56,827 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@171c61b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:43:56, skipping insertion in model container [2018-01-21 08:43:56,827 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:43:56" (3/3) ... [2018-01-21 08:43:56,828 INFO L105 eAbstractionObserver]: Analyzing ICFG memset2_false-valid-deref-write.c [2018-01-21 08:43:56,835 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 08:43:56,840 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 08:43:56,873 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:43:56,873 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:43:56,873 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:43:56,874 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:43:56,874 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:43:56,874 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:43:56,874 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:43:56,874 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 08:43:56,874 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:43:56,888 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:43:56,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 08:43:56,893 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:43:56,894 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 08:43:56,894 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 08:43:56,899 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 08:43:56,902 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:43:56,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:56,956 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:43:56,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:56,956 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:43:56,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:43:56,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:43:57,006 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 08:43:57,013 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 08:43:57,019 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:43:57,019 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:43:57,019 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:43:57,019 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:43:57,019 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:43:57,020 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:43:57,020 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:43:57,020 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 08:43:57,020 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:43:57,021 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:43:57,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 08:43:57,022 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:43:57,022 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:43:57,022 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:43:57,022 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 08:43:57,022 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:43:57,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:57,023 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:43:57,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:57,024 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:43:57,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:43:57,049 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:43:57,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:57,121 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:43:57,121 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 08:43:57,121 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:43:57,123 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 08:43:57,138 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 08:43:57,139 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 08:43:57,141 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 08:43:57,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:43:57,206 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:43:57,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 08:43:57,208 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 08:43:57,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:43:57,216 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:43:57,216 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 08:43:57,220 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 08:43:57,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 08:43:57,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 08:43:57,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 08:43:57,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 08:43:57,305 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 08:43:57,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:43:57,306 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 08:43:57,306 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 08:43:57,306 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 08:43:57,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 08:43:57,306 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:43:57,306 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:43:57,306 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:43:57,307 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 08:43:57,307 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:43:57,308 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:57,308 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:43:57,308 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:57,308 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:43:57,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:43:57,320 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:43:57,370 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:57,370 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:57,370 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:43:57,371 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 08:43:57,373 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 08:43:57,417 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:43:57,418 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:43:58,150 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:43:58,151 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 08:43:58,188 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:43:58,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:58,188 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:43:58,196 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:43:58,197 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:43:58,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:43:58,227 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:58,257 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:58,257 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:43:58,419 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:58,444 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:58,445 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:43:58,449 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:43:58,449 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:43:58,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:43:58,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:58,488 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:58,488 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:43:58,550 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:58,551 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:43:58,551 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 08:43:58,552 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:43:58,552 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 08:43:58,553 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 08:43:58,553 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 08:43:58,553 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 08:43:58,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:43:58,625 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 08:43:58,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 08:43:58,626 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 08:43:58,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:43:58,627 INFO L225 Difference]: With dead ends: 29 [2018-01-21 08:43:58,627 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 08:43:58,628 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 08:43:58,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 08:43:58,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 08:43:58,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 08:43:58,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 08:43:58,632 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 08:43:58,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:43:58,633 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 08:43:58,633 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 08:43:58,633 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 08:43:58,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 08:43:58,634 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:43:58,634 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:43:58,634 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:43:58,634 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 08:43:58,634 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:43:58,635 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:58,635 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:43:58,636 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:58,636 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:43:58,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:43:58,649 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:43:58,709 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:58,710 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:58,710 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:43:58,710 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:43:58,710 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:43:58,710 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:58,710 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:43:58,715 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:43:58,715 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:43:58,729 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:43:58,743 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:43:58,756 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:43:58,758 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:58,830 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:58,830 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:43:58,965 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:58,998 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:58,998 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:43:59,001 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:43:59,001 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:43:59,013 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:43:59,021 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:43:59,029 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:43:59,032 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:59,036 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,037 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:43:59,118 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,120 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:43:59,120 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 08:43:59,120 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:43:59,121 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 08:43:59,121 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 08:43:59,121 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 08:43:59,121 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 08:43:59,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:43:59,155 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 08:43:59,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 08:43:59,157 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 08:43:59,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:43:59,158 INFO L225 Difference]: With dead ends: 30 [2018-01-21 08:43:59,158 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 08:43:59,158 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 08:43:59,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 08:43:59,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 08:43:59,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 08:43:59,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 08:43:59,162 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 08:43:59,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:43:59,164 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 08:43:59,164 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 08:43:59,164 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 08:43:59,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 08:43:59,165 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:43:59,165 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:43:59,165 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:43:59,166 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 08:43:59,167 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:43:59,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:59,168 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:43:59,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:59,168 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:43:59,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:43:59,179 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:43:59,219 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:59,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:43:59,220 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:43:59,220 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:43:59,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:59,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:43:59,227 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:43:59,227 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:43:59,238 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:43:59,240 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:43:59,241 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:43:59,242 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:43:59,243 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:59,251 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,251 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:43:59,342 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,362 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:59,362 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:43:59,365 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:43:59,365 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:43:59,379 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:43:59,385 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:43:59,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:43:59,398 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:43:59,401 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:59,406 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,406 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:43:59,462 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,463 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:43:59,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 08:43:59,463 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:43:59,464 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 08:43:59,464 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 08:43:59,464 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 08:43:59,464 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 08:43:59,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:43:59,480 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 08:43:59,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 08:43:59,481 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 08:43:59,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:43:59,481 INFO L225 Difference]: With dead ends: 31 [2018-01-21 08:43:59,481 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 08:43:59,482 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 08:43:59,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 08:43:59,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 08:43:59,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 08:43:59,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 08:43:59,484 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 08:43:59,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:43:59,485 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 08:43:59,485 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 08:43:59,485 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 08:43:59,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 08:43:59,485 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:43:59,485 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:43:59,485 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:43:59,486 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 08:43:59,486 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:43:59,486 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:59,486 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:43:59,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:59,487 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:43:59,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:43:59,495 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:43:59,540 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,541 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:59,541 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:43:59,541 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:43:59,541 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:43:59,541 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:59,541 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:43:59,546 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:43:59,547 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:43:59,556 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:43:59,558 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:59,566 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,566 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:43:59,679 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,699 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:59,699 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:43:59,702 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:43:59,702 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:43:59,724 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:43:59,727 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:59,754 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,754 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:43:59,802 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,803 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:43:59,803 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 08:43:59,803 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:43:59,803 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 08:43:59,803 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 08:43:59,804 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 08:43:59,804 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 08:43:59,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:43:59,822 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 08:43:59,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 08:43:59,823 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 08:43:59,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:43:59,824 INFO L225 Difference]: With dead ends: 32 [2018-01-21 08:43:59,824 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 08:43:59,825 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 08:43:59,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 08:43:59,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 08:43:59,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 08:43:59,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 08:43:59,829 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 08:43:59,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:43:59,830 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 08:43:59,830 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 08:43:59,830 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 08:43:59,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 08:43:59,831 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:43:59,831 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:43:59,831 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:43:59,831 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 08:43:59,831 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:43:59,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:59,833 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:43:59,833 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:43:59,833 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:43:59,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:43:59,845 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:43:59,915 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,915 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:59,915 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:43:59,915 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:43:59,916 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:43:59,916 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:43:59,916 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:43:59,924 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:43:59,924 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:43:59,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:43:59,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:43:59,933 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:43:59,948 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:43:59,949 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:43:59,951 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:43:59,961 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:43:59,961 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:00,070 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,091 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:00,091 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:00,095 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:00,096 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:00,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:00,101 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:00,104 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:00,113 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:00,120 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:00,122 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:00,126 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,126 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:00,181 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,182 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:00,182 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 08:44:00,183 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:00,183 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 08:44:00,183 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 08:44:00,183 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 08:44:00,183 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 08:44:00,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:00,200 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:44:00,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 08:44:00,200 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 08:44:00,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:00,201 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:44:00,201 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 08:44:00,201 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 08:44:00,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 08:44:00,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 08:44:00,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 08:44:00,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 08:44:00,204 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 08:44:00,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:00,204 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 08:44:00,204 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 08:44:00,204 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 08:44:00,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 08:44:00,204 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:00,205 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:00,205 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:00,205 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 08:44:00,205 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:00,205 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:00,206 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:00,206 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:00,206 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:00,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:00,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:00,271 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,271 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:00,271 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:00,271 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:00,271 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:00,271 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:00,271 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:00,277 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:00,277 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:00,283 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:00,285 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:00,286 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:00,287 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:00,288 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:00,289 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:00,297 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,297 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:00,468 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:00,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:00,492 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:00,492 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:00,505 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:00,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:00,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:00,535 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:00,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:00,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:00,550 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,550 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:00,624 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,625 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:00,625 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 08:44:00,625 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:00,626 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 08:44:00,626 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 08:44:00,626 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 08:44:00,626 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 08:44:00,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:00,652 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 08:44:00,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 08:44:00,656 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 08:44:00,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:00,657 INFO L225 Difference]: With dead ends: 34 [2018-01-21 08:44:00,657 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 08:44:00,657 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 08:44:00,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 08:44:00,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 08:44:00,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 08:44:00,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 08:44:00,661 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 08:44:00,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:00,661 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 08:44:00,662 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 08:44:00,662 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 08:44:00,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 08:44:00,662 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:00,663 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:00,663 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:00,663 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 08:44:00,663 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:00,663 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:00,664 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:00,664 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:00,664 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:00,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:00,674 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:00,760 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:00,760 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:00,761 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:00,761 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:00,761 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:00,761 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:00,771 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:00,771 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:00,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:00,783 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:00,795 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,795 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:00,974 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:00,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:00,994 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:01,000 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:01,000 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:01,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:01,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:01,025 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,025 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:01,082 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,084 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:01,084 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 08:44:01,084 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:01,084 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 08:44:01,084 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 08:44:01,084 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 08:44:01,085 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 08:44:01,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:01,102 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 08:44:01,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 08:44:01,102 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 08:44:01,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:01,103 INFO L225 Difference]: With dead ends: 35 [2018-01-21 08:44:01,103 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 08:44:01,104 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 08:44:01,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 08:44:01,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 08:44:01,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 08:44:01,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 08:44:01,108 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 08:44:01,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:01,108 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 08:44:01,108 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 08:44:01,108 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 08:44:01,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 08:44:01,109 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:01,109 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:01,109 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:01,109 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 08:44:01,109 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:01,110 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:01,110 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:01,110 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:01,110 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:01,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:01,120 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:01,199 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,199 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:01,199 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:01,199 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:01,199 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:01,199 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:01,199 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:01,206 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:01,206 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:01,214 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:01,217 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:01,218 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:01,219 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:01,229 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,229 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:01,418 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,438 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:01,438 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:01,441 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:01,441 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:01,450 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:01,458 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:01,464 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:01,467 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:01,471 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,471 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:01,550 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,551 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:01,551 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 08:44:01,551 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:01,552 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 08:44:01,552 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 08:44:01,552 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 08:44:01,552 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 08:44:01,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:01,594 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 08:44:01,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 08:44:01,595 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 08:44:01,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:01,596 INFO L225 Difference]: With dead ends: 36 [2018-01-21 08:44:01,596 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 08:44:01,596 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 08:44:01,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 08:44:01,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 08:44:01,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 08:44:01,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 08:44:01,600 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 08:44:01,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:01,600 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 08:44:01,600 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 08:44:01,601 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 08:44:01,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 08:44:01,601 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:01,601 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:01,601 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:01,602 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 08:44:01,602 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:01,603 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:01,603 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:01,603 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:01,603 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:01,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:01,612 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:01,696 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,696 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:01,696 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:01,696 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:01,696 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:01,697 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:01,697 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:01,705 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:01,705 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:01,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:01,729 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:01,731 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:01,743 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:01,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:01,746 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:01,746 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:01,748 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:01,760 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:01,760 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:02,062 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,082 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:02,082 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:02,085 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:02,085 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:02,094 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:02,100 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:02,107 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:02,115 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:02,122 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:02,130 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:02,136 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:02,138 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:02,143 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,143 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:02,205 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,206 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:02,207 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 08:44:02,207 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:02,207 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 08:44:02,207 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 08:44:02,207 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 08:44:02,207 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 08:44:02,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:02,231 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 08:44:02,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 08:44:02,231 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 08:44:02,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:02,232 INFO L225 Difference]: With dead ends: 37 [2018-01-21 08:44:02,232 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 08:44:02,232 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 08:44:02,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 08:44:02,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 08:44:02,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 08:44:02,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 08:44:02,235 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 08:44:02,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:02,235 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 08:44:02,235 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 08:44:02,235 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 08:44:02,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 08:44:02,235 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:02,235 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:02,236 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:02,236 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 08:44:02,236 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:02,236 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:02,236 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:02,236 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:02,236 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:02,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:02,244 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:02,333 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,333 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:02,333 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:02,333 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:02,333 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:02,334 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:02,334 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:02,338 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:02,339 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:02,349 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:02,350 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:02,358 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,358 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:02,588 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,607 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:02,607 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:02,610 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:02,610 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:02,636 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:02,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:02,645 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,645 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:02,730 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,731 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:02,731 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 08:44:02,731 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:02,732 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 08:44:02,732 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 08:44:02,732 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 08:44:02,732 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 08:44:02,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:02,765 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 08:44:02,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 08:44:02,766 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 08:44:02,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:02,766 INFO L225 Difference]: With dead ends: 38 [2018-01-21 08:44:02,766 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 08:44:02,767 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 08:44:02,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 08:44:02,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 08:44:02,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 08:44:02,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 08:44:02,769 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 08:44:02,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:02,769 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 08:44:02,770 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 08:44:02,770 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 08:44:02,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 08:44:02,770 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:02,770 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:02,770 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:02,770 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 08:44:02,770 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:02,771 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:02,771 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:02,771 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:02,771 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:02,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:02,778 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:02,858 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,858 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:02,858 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:02,858 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:02,858 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:02,858 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:02,859 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:02,863 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:02,864 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:02,867 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:02,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:02,869 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:02,870 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:02,871 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:02,872 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:02,875 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:02,876 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:02,877 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:02,885 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:02,885 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:03,139 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:03,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:03,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:03,161 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:03,161 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:03,165 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:03,166 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:03,169 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:03,173 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:03,177 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:03,181 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:03,190 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:03,197 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:03,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:03,206 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:03,206 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:03,290 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:03,292 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:03,292 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 08:44:03,292 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:03,292 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 08:44:03,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 08:44:03,293 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 08:44:03,293 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 08:44:03,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:03,326 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 08:44:03,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 08:44:03,326 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 08:44:03,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:03,327 INFO L225 Difference]: With dead ends: 39 [2018-01-21 08:44:03,327 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 08:44:03,327 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 08:44:03,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 08:44:03,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 08:44:03,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 08:44:03,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 08:44:03,331 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 08:44:03,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:03,331 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 08:44:03,331 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 08:44:03,331 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 08:44:03,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 08:44:03,332 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:03,332 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:03,332 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:03,332 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 08:44:03,332 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:03,333 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:03,333 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:03,333 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:03,333 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:03,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:03,341 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:03,428 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:03,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:03,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:03,428 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:03,428 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:03,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:03,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:03,433 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:03,433 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:03,439 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,443 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,444 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,445 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,446 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:03,447 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:03,454 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:03,454 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:03,752 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:03,771 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:03,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:03,774 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:03,774 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:03,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,797 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,813 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,832 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:03,838 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:03,841 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:03,846 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:03,846 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:03,932 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:03,933 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:03,933 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 08:44:03,933 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:03,934 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 08:44:03,934 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 08:44:03,934 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 08:44:03,934 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 08:44:03,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:03,956 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 08:44:03,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 08:44:03,956 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 08:44:03,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:03,957 INFO L225 Difference]: With dead ends: 40 [2018-01-21 08:44:03,957 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 08:44:03,957 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 08:44:03,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 08:44:03,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 08:44:03,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 08:44:03,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 08:44:03,960 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 08:44:03,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:03,960 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 08:44:03,960 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 08:44:03,960 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 08:44:03,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 08:44:03,960 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:03,960 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:03,960 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:03,961 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 08:44:03,961 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:03,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:03,961 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:03,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:03,961 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:03,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:03,967 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:04,056 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:04,057 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:04,057 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:04,057 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:04,057 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:04,057 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:04,057 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:04,062 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:04,062 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:04,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:04,072 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:04,080 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:04,081 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:04,413 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:04,438 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:04,438 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:04,441 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:04,441 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:04,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:04,462 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:04,467 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:04,467 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:04,587 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:04,588 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:04,588 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 08:44:04,588 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:04,588 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 08:44:04,588 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 08:44:04,589 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 08:44:04,589 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 08:44:04,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:04,619 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 08:44:04,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 08:44:04,619 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 08:44:04,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:04,620 INFO L225 Difference]: With dead ends: 41 [2018-01-21 08:44:04,620 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 08:44:04,620 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 08:44:04,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 08:44:04,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 08:44:04,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 08:44:04,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 08:44:04,623 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 08:44:04,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:04,623 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 08:44:04,623 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 08:44:04,623 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 08:44:04,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 08:44:04,623 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:04,623 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:04,624 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:04,624 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 08:44:04,624 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:04,624 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:04,624 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:04,625 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:04,625 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:04,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:04,630 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:04,745 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:04,745 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:04,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:04,784 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:04,784 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:04,784 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:04,784 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:04,791 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:04,791 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:04,800 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:04,805 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:04,807 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:04,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:04,820 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:04,820 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:05,180 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:05,200 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:05,201 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:05,205 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:05,205 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:05,217 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:05,227 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:05,235 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:05,238 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:05,244 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:05,245 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:05,438 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:05,439 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:05,439 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 08:44:05,439 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:05,440 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 08:44:05,440 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 08:44:05,440 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 08:44:05,440 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 08:44:05,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:05,601 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 08:44:05,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 08:44:05,603 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 08:44:05,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:05,604 INFO L225 Difference]: With dead ends: 42 [2018-01-21 08:44:05,604 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 08:44:05,605 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 08:44:05,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 08:44:05,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 08:44:05,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 08:44:05,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 08:44:05,608 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 08:44:05,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:05,609 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 08:44:05,609 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 08:44:05,609 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 08:44:05,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 08:44:05,610 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:05,610 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:05,610 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:05,610 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 08:44:05,610 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:05,611 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:05,611 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:05,611 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:05,611 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:05,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:05,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:05,813 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:05,813 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:05,813 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:05,813 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:05,814 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:05,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:05,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:05,819 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:05,819 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:05,825 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,827 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,828 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,829 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,831 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,832 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,833 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,835 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,836 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:05,836 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:05,838 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:05,849 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:05,849 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:06,570 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:06,603 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:06,603 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:06,606 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:06,607 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:06,620 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,629 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,641 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,653 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,662 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,671 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,681 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,691 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,701 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:06,709 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:06,713 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:06,717 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:06,718 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:06,831 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:06,832 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:06,833 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 08:44:06,833 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:06,833 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 08:44:06,833 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 08:44:06,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 08:44:06,834 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 08:44:06,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:06,861 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 08:44:06,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 08:44:06,862 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 08:44:06,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:06,862 INFO L225 Difference]: With dead ends: 43 [2018-01-21 08:44:06,863 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 08:44:06,863 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 08:44:06,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 08:44:06,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 08:44:06,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 08:44:06,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 08:44:06,867 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 08:44:06,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:06,868 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 08:44:06,868 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 08:44:06,868 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 08:44:06,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 08:44:06,868 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:06,868 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:06,869 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:06,869 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 08:44:06,869 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:06,870 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:06,870 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:06,870 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:06,870 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:06,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:06,876 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:07,070 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:07,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:07,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:07,071 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:07,071 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:07,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:07,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:07,081 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:07,081 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:07,095 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:07,097 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:07,111 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:07,111 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:07,630 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:07,650 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:07,651 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:07,654 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:07,654 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:07,693 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:07,696 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:07,702 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:07,703 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:07,816 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:07,818 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:07,818 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 08:44:07,818 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:07,818 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 08:44:07,818 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 08:44:07,819 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 08:44:07,819 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 08:44:07,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:07,849 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 08:44:07,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 08:44:07,849 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 08:44:07,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:07,850 INFO L225 Difference]: With dead ends: 44 [2018-01-21 08:44:07,850 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 08:44:07,851 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 08:44:07,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 08:44:07,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 08:44:07,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 08:44:07,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 08:44:07,855 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 08:44:07,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:07,855 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 08:44:07,855 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 08:44:07,856 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 08:44:07,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 08:44:07,856 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:07,856 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:07,856 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:07,857 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 08:44:07,857 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:07,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:07,857 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:07,858 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:07,858 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:07,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:07,866 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:08,030 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:08,030 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:08,030 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:08,031 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:08,031 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:08,031 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:08,031 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:08,043 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:08,043 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:08,047 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,049 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,050 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,051 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,052 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,053 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,057 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,059 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,060 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,065 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,068 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:08,070 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:08,079 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:08,079 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:08,628 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:08,647 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:08,647 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:08,650 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:08,650 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:08,654 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,655 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,658 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,662 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,666 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,670 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,674 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,679 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,684 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,694 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:08,702 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:08,705 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:08,710 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:08,710 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:08,895 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:08,897 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:08,897 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 08:44:08,897 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:08,897 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 08:44:08,898 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 08:44:08,898 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 08:44:08,898 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 08:44:08,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:08,958 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 08:44:08,958 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 08:44:08,958 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 08:44:08,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:08,959 INFO L225 Difference]: With dead ends: 45 [2018-01-21 08:44:08,959 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 08:44:08,959 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 08:44:08,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 08:44:08,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 08:44:08,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 08:44:08,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 08:44:08,963 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 08:44:08,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:08,963 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 08:44:08,963 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 08:44:08,963 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 08:44:08,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 08:44:08,964 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:08,964 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:08,964 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:08,964 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 08:44:08,964 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:08,965 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:08,965 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:08,965 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:08,966 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:08,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:08,972 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:09,166 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:09,166 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:09,166 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:09,166 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:09,166 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:09,166 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:09,166 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:09,173 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:09,173 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:09,180 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,183 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,184 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,185 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,186 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,187 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,188 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,189 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,190 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,191 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,191 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:09,193 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:09,200 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:09,200 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:09,356 WARN L143 SmtUtils]: Spent 121ms on a formula simplification that was a NOOP. DAG size: 62 [2018-01-21 08:44:09,828 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:09,856 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:09,861 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:09,864 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:09,864 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:09,874 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,880 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,887 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,895 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,920 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,929 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,939 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,949 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:09,957 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:09,960 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:09,964 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:09,965 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:10,090 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:10,091 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:10,091 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 08:44:10,092 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:10,092 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 08:44:10,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 08:44:10,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 08:44:10,092 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 08:44:10,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:10,120 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 08:44:10,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 08:44:10,120 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 08:44:10,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:10,120 INFO L225 Difference]: With dead ends: 46 [2018-01-21 08:44:10,121 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 08:44:10,121 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 08:44:10,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 08:44:10,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 08:44:10,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 08:44:10,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 08:44:10,125 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 08:44:10,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:10,125 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 08:44:10,125 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 08:44:10,126 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 08:44:10,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 08:44:10,126 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:10,126 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:10,126 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:10,127 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 08:44:10,127 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:10,127 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:10,128 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:10,128 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:10,128 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:10,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:10,134 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:10,284 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:10,284 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:10,284 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:10,284 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:10,285 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:10,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:10,285 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:10,289 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:10,289 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:10,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:10,301 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:10,308 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:10,309 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:10,881 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:10,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:10,900 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:10,903 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:10,903 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:10,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:10,927 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:10,932 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:10,932 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:11,067 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:11,068 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:11,068 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 08:44:11,068 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:11,068 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 08:44:11,068 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 08:44:11,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 08:44:11,069 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 08:44:11,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:11,117 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 08:44:11,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 08:44:11,117 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 08:44:11,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:11,117 INFO L225 Difference]: With dead ends: 47 [2018-01-21 08:44:11,117 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 08:44:11,118 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 08:44:11,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 08:44:11,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 08:44:11,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 08:44:11,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 08:44:11,120 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 08:44:11,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:11,121 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 08:44:11,121 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 08:44:11,121 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 08:44:11,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 08:44:11,121 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:11,121 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:11,121 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:11,122 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 08:44:11,122 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:11,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:11,122 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:11,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:11,122 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:11,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:11,128 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:11,300 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:11,300 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:11,300 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:11,301 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:11,301 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:11,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:11,301 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:11,305 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:11,306 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:11,312 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:11,317 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:11,318 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:11,320 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:11,328 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:11,328 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:11,943 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:11,962 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:11,963 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:11,965 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:11,966 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:11,974 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:11,985 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:11,995 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:11,998 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:12,003 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:12,003 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:12,145 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:12,147 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:12,147 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 08:44:12,147 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:12,147 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 08:44:12,147 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 08:44:12,148 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 08:44:12,148 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 08:44:12,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:12,177 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 08:44:12,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 08:44:12,177 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 08:44:12,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:12,177 INFO L225 Difference]: With dead ends: 48 [2018-01-21 08:44:12,177 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 08:44:12,178 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 08:44:12,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 08:44:12,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 08:44:12,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 08:44:12,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 08:44:12,180 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 08:44:12,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:12,180 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 08:44:12,180 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 08:44:12,180 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 08:44:12,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 08:44:12,181 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:12,181 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:12,181 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:12,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 08:44:12,181 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:12,181 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:12,182 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:12,182 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:12,182 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:12,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:12,189 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:12,378 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:12,378 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:12,378 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:12,378 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:12,378 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:12,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:12,379 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:12,383 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:12,383 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:12,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,392 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,394 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,396 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,397 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,399 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,403 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,405 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,406 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:12,406 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:12,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:12,417 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:12,417 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:13,064 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:13,083 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:13,083 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:13,086 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:13,087 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:13,095 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,102 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,110 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,118 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,127 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,146 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,154 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,163 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,172 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,182 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:13,200 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:13,203 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:13,211 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:13,211 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:13,360 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:13,361 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:13,361 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 08:44:13,361 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:13,361 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 08:44:13,361 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 08:44:13,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1127, Invalid=1225, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 08:44:13,362 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 08:44:13,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:13,390 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 08:44:13,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 08:44:13,391 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 08:44:13,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:13,391 INFO L225 Difference]: With dead ends: 49 [2018-01-21 08:44:13,391 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 08:44:13,392 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1154, Invalid=1296, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 08:44:13,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 08:44:13,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 08:44:13,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 08:44:13,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 08:44:13,395 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 08:44:13,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:13,395 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 08:44:13,395 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 08:44:13,395 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 08:44:13,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 08:44:13,396 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:13,396 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:13,396 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:13,396 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 08:44:13,396 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:13,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:13,397 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:13,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:13,397 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:13,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:13,402 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:13,567 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:13,567 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:13,567 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:13,567 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:13,568 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:13,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:13,568 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:13,572 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:13,572 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:13,584 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:13,585 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:13,593 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:13,593 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:14,305 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:14,326 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:14,326 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:14,329 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:14,329 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:14,362 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:14,365 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:14,370 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:14,370 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:14,532 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:14,533 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:14,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 08:44:14,534 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:14,534 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 08:44:14,534 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 08:44:14,534 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1217, Invalid=1333, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 08:44:14,535 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 08:44:14,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:14,571 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 08:44:14,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 08:44:14,571 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 08:44:14,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:14,572 INFO L225 Difference]: With dead ends: 50 [2018-01-21 08:44:14,572 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 08:44:14,573 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1245, Invalid=1407, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 08:44:14,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 08:44:14,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 08:44:14,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 08:44:14,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 08:44:14,575 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 08:44:14,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:14,576 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 08:44:14,576 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 08:44:14,576 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 08:44:14,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 08:44:14,576 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:14,577 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:14,577 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:14,577 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 08:44:14,577 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:14,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:14,577 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:14,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:14,578 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:14,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:14,584 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:14,789 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:14,789 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:14,790 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:14,790 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:14,790 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:14,790 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:14,790 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:14,795 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:14,795 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:14,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,800 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,801 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,802 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,802 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,803 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,804 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,805 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,806 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,806 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,807 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,808 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,812 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:14,813 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:14,815 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:14,823 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:14,824 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:15,567 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:15,587 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:15,587 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:15,590 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:15,590 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:15,595 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,596 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,600 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,612 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,622 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,628 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,634 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,640 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,647 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,660 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:15,670 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:15,673 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:15,678 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:15,678 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:15,853 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:15,854 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:15,854 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 08:44:15,854 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:15,855 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 08:44:15,855 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 08:44:15,855 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1307, Invalid=1449, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 08:44:15,856 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 08:44:15,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:15,910 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 08:44:15,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 08:44:15,911 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 08:44:15,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:15,911 INFO L225 Difference]: With dead ends: 51 [2018-01-21 08:44:15,911 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 08:44:15,912 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1336, Invalid=1526, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 08:44:15,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 08:44:15,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 08:44:15,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 08:44:15,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 08:44:15,914 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 08:44:15,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:15,915 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 08:44:15,915 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 08:44:15,915 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 08:44:15,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 08:44:15,915 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:15,915 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:15,915 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:15,916 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 08:44:15,916 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:15,916 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:15,916 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:15,916 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:15,916 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:15,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:15,923 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:16,166 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:16,166 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:16,166 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:16,166 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:16,167 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:16,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:16,167 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:16,172 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:16,172 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:16,179 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,181 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,182 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,184 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,185 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,186 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,187 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,189 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,190 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,191 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,192 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,194 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,195 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:16,196 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:16,197 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:16,207 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:16,208 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:17,009 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:17,030 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:17,030 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:17,033 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:17,033 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:17,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,050 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,058 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,066 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,084 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,094 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,105 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,116 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,127 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,139 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,151 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,164 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:17,173 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:17,177 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:17,183 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:17,183 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:17,390 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:17,391 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:17,391 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 08:44:17,391 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:17,392 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 08:44:17,392 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 08:44:17,393 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1397, Invalid=1573, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 08:44:17,393 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 08:44:17,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:17,456 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 08:44:17,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 08:44:17,457 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 08:44:17,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:17,457 INFO L225 Difference]: With dead ends: 52 [2018-01-21 08:44:17,457 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 08:44:17,458 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1427, Invalid=1653, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 08:44:17,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 08:44:17,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 08:44:17,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 08:44:17,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 08:44:17,461 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 08:44:17,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:17,461 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 08:44:17,461 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 08:44:17,461 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 08:44:17,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 08:44:17,461 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:17,461 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:17,462 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:17,462 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 08:44:17,462 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:17,462 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:17,462 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:17,462 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:17,463 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:17,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:17,474 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:17,694 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:17,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:17,694 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:17,694 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:17,694 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:17,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:17,695 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:17,699 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:17,700 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:17,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:17,714 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:17,723 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:17,723 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:18,581 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:18,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:18,601 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:18,604 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:18,604 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:18,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:18,633 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:18,642 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:18,643 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:18,874 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:18,875 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:18,876 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 08:44:18,876 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:18,876 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 08:44:18,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 08:44:18,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1487, Invalid=1705, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 08:44:18,877 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 08:44:18,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:18,913 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 08:44:18,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 08:44:18,913 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 08:44:18,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:18,914 INFO L225 Difference]: With dead ends: 53 [2018-01-21 08:44:18,914 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 08:44:18,914 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1518, Invalid=1788, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 08:44:18,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 08:44:18,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 08:44:18,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 08:44:18,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 08:44:18,917 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 08:44:18,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:18,917 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 08:44:18,917 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 08:44:18,917 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 08:44:18,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 08:44:18,917 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:18,917 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:18,918 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:18,918 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 08:44:18,918 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:18,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:18,918 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:18,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:18,918 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:18,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:18,926 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:19,180 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:19,180 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:19,180 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:19,180 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:19,180 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:19,180 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:19,180 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:19,186 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:19,186 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:19,192 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:19,197 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:19,199 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:19,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:19,209 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:19,209 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:20,090 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:20,110 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:20,110 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:20,113 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:20,113 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:20,122 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:20,135 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:20,148 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:20,151 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:20,157 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:20,157 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:20,373 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:20,374 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:20,374 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 08:44:20,374 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:20,374 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 08:44:20,375 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 08:44:20,375 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1577, Invalid=1845, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 08:44:20,375 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 08:44:20,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:20,411 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 08:44:20,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 08:44:20,411 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 08:44:20,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:20,411 INFO L225 Difference]: With dead ends: 54 [2018-01-21 08:44:20,411 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 08:44:20,412 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1609, Invalid=1931, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 08:44:20,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 08:44:20,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 08:44:20,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 08:44:20,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 08:44:20,415 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 08:44:20,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:20,415 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 08:44:20,415 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 08:44:20,415 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 08:44:20,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 08:44:20,416 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:20,416 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:20,416 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:20,416 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 08:44:20,416 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:20,417 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:20,417 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:20,417 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:20,417 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:20,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:20,423 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:20,756 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:20,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:20,756 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:20,756 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:20,756 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:20,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:20,756 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:20,761 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:20,761 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:20,768 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,771 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,772 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,773 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,774 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,775 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,776 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,778 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,779 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,783 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,784 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:20,784 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:20,785 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:20,794 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:20,794 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:21,716 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:21,736 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:21,736 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:21,738 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:21,739 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:21,749 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,757 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,765 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,773 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,781 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,790 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,800 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,809 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,819 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,830 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,840 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,852 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,864 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,876 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,889 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:21,899 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:21,903 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:21,909 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:21,909 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:22,120 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:22,121 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:22,121 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 08:44:22,121 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:22,121 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 08:44:22,121 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 08:44:22,122 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1667, Invalid=1993, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 08:44:22,122 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 08:44:22,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:22,163 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 08:44:22,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 08:44:22,163 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 08:44:22,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:22,163 INFO L225 Difference]: With dead ends: 55 [2018-01-21 08:44:22,163 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 08:44:22,164 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1700, Invalid=2082, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 08:44:22,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 08:44:22,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 08:44:22,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 08:44:22,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 08:44:22,167 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 08:44:22,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:22,167 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 08:44:22,167 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 08:44:22,167 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 08:44:22,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 08:44:22,167 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:22,167 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:22,168 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:22,168 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 08:44:22,168 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:22,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:22,168 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:22,169 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:22,169 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:22,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:22,175 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:22,470 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:22,471 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:22,471 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:22,471 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:22,471 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:22,471 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:22,471 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:22,476 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:22,476 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:22,490 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:22,492 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:22,502 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:22,502 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:23,454 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:23,474 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:23,474 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:23,476 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:23,477 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:23,515 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:23,518 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:23,524 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:23,524 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:23,768 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:23,769 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:23,769 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 08:44:23,769 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:23,769 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 08:44:23,770 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 08:44:23,770 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1757, Invalid=2149, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 08:44:23,770 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 08:44:23,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:23,824 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 08:44:23,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 08:44:23,825 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 08:44:23,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:23,825 INFO L225 Difference]: With dead ends: 56 [2018-01-21 08:44:23,825 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 08:44:23,826 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1791, Invalid=2241, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 08:44:23,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 08:44:23,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 08:44:23,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 08:44:23,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 08:44:23,828 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 08:44:23,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:23,829 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 08:44:23,829 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 08:44:23,829 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 08:44:23,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 08:44:23,829 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:23,829 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:23,829 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:23,829 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 08:44:23,829 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:23,830 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:23,830 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:23,830 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:23,830 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:23,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:23,837 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:24,215 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:24,215 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:24,215 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:24,215 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:24,216 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:24,216 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:24,216 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:24,220 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:24,220 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:24,224 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,225 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,226 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,227 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,227 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,228 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,230 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,230 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,232 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,233 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:24,240 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:24,242 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:24,251 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:24,251 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:25,267 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:25,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:25,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:25,321 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:25,321 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:25,326 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,329 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,334 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,340 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,346 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,351 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,356 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,362 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,368 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,375 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,382 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,389 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,415 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:25,441 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:25,446 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:25,455 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:25,455 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:25,766 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:25,767 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:25,768 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 08:44:25,768 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:25,768 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 08:44:25,768 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 08:44:25,768 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1847, Invalid=2313, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 08:44:25,768 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 08:44:25,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:25,812 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 08:44:25,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 08:44:25,813 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 08:44:25,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:25,813 INFO L225 Difference]: With dead ends: 57 [2018-01-21 08:44:25,813 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 08:44:25,814 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 699 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1882, Invalid=2408, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 08:44:25,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 08:44:25,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 08:44:25,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 08:44:25,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 08:44:25,816 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 08:44:25,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:25,816 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 08:44:25,816 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 08:44:25,816 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 08:44:25,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 08:44:25,817 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:25,817 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:25,817 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:25,817 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 08:44:25,817 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:25,817 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:25,818 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:25,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:25,818 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:25,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:25,826 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:26,156 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:26,156 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:26,156 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:26,156 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:26,156 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:26,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:26,157 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:26,161 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:26,162 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:26,169 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,170 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,172 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,173 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,174 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,175 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,176 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,177 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,178 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,179 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,181 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,182 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,183 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,184 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,185 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,186 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:26,187 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:26,189 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:26,198 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:26,198 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:27,258 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:27,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:27,279 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:27,282 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:27,282 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:27,291 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,298 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,306 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,323 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,333 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,343 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,353 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,364 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,375 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,386 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,398 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,410 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,423 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,435 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,449 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:27,460 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:27,464 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:27,474 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:27,474 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:27,783 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:27,785 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:27,785 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 08:44:27,785 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:27,785 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 08:44:27,785 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 08:44:27,786 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1937, Invalid=2485, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 08:44:27,786 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 08:44:27,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:27,844 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 08:44:27,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 08:44:27,844 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 08:44:27,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:27,845 INFO L225 Difference]: With dead ends: 58 [2018-01-21 08:44:27,845 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 08:44:27,845 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 783 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1973, Invalid=2583, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 08:44:27,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 08:44:27,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 08:44:27,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 08:44:27,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 08:44:27,847 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 08:44:27,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:27,848 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 08:44:27,848 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 08:44:27,848 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 08:44:27,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 08:44:27,848 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:27,848 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:27,848 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:27,849 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 08:44:27,849 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:27,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:27,849 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:27,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:27,850 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:27,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:27,856 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:28,176 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:28,177 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:28,177 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:28,177 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:28,177 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:28,177 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:28,177 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:28,182 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:28,182 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:28,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:28,196 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:28,211 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:28,211 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:29,406 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:29,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:29,425 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:29,428 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:29,428 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:29,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:29,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:29,466 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:29,467 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:29,726 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:29,727 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:29,727 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 08:44:29,728 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:29,728 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 08:44:29,728 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 08:44:29,728 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2027, Invalid=2665, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 08:44:29,728 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 08:44:29,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:29,783 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 08:44:29,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 08:44:29,784 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 08:44:29,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:29,784 INFO L225 Difference]: With dead ends: 59 [2018-01-21 08:44:29,784 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 08:44:29,785 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 871 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2064, Invalid=2766, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 08:44:29,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 08:44:29,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 08:44:29,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 08:44:29,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 08:44:29,788 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 08:44:29,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:29,789 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 08:44:29,789 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 08:44:29,789 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 08:44:29,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 08:44:29,789 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:29,789 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:29,789 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:29,789 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 08:44:29,789 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:29,790 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:29,790 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:29,790 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:29,790 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:29,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:29,800 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:30,194 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:30,195 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:30,195 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:30,195 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:30,195 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:30,195 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:30,195 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:30,200 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:30,200 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:30,207 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:30,213 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:30,214 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:30,216 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:30,225 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:30,225 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:31,376 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:31,395 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:31,396 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:31,398 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:31,398 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:31,407 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:31,422 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:31,435 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:31,439 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:31,446 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:31,446 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:31,714 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:31,715 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:31,715 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 08:44:31,715 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:31,716 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 08:44:31,716 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 08:44:31,716 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2117, Invalid=2853, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 08:44:31,716 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 08:44:31,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:31,782 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 08:44:31,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 08:44:31,782 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 08:44:31,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:31,783 INFO L225 Difference]: With dead ends: 60 [2018-01-21 08:44:31,783 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 08:44:31,784 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 963 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2155, Invalid=2957, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 08:44:31,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 08:44:31,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 08:44:31,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 08:44:31,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 08:44:31,786 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 08:44:31,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:31,787 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 08:44:31,787 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 08:44:31,787 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 08:44:31,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 08:44:31,787 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:31,787 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:31,787 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:31,787 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 08:44:31,788 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:31,788 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:31,788 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:31,788 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:31,788 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:31,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:31,795 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:32,209 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:32,210 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:32,210 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:32,210 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:32,210 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:32,210 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:32,210 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:32,215 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:32,215 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:32,221 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,224 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,225 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,226 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,227 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,228 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,229 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,230 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,231 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,232 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,233 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,234 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,235 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,236 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,238 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,239 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,240 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:32,240 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:32,242 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:32,252 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:32,252 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:33,437 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:33,457 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:33,457 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:33,459 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:33,460 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:33,469 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,475 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,483 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,490 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,499 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,517 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,527 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,537 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,549 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,559 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,571 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,583 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,595 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,608 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,621 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,635 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,649 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:33,659 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:33,663 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:33,676 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:33,676 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:33,968 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:33,970 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:33,970 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 08:44:33,970 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:33,970 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 08:44:33,970 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 08:44:33,970 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2207, Invalid=3049, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 08:44:33,970 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 08:44:34,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:34,016 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 08:44:34,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 08:44:34,017 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 08:44:34,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:34,017 INFO L225 Difference]: With dead ends: 61 [2018-01-21 08:44:34,017 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 08:44:34,018 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2246, Invalid=3156, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 08:44:34,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 08:44:34,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 08:44:34,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 08:44:34,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 08:44:34,021 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 08:44:34,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:34,021 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 08:44:34,021 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 08:44:34,021 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 08:44:34,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 08:44:34,022 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:34,022 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:34,022 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:34,022 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 08:44:34,022 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:34,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:34,023 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:34,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:34,023 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:34,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:34,030 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:34,425 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:34,426 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:34,426 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:34,426 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:34,426 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:34,426 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:34,426 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:34,430 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:34,431 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:34,446 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:34,448 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:34,458 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:34,458 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:35,709 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:35,729 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:35,729 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:35,732 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:35,732 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:35,775 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:35,779 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:35,786 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:35,786 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:36,083 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:36,084 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:36,085 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 08:44:36,085 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:36,085 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 08:44:36,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 08:44:36,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2297, Invalid=3253, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 08:44:36,086 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 08:44:36,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:36,140 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 08:44:36,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 08:44:36,140 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 08:44:36,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:36,141 INFO L225 Difference]: With dead ends: 62 [2018-01-21 08:44:36,141 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 08:44:36,142 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1159 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2337, Invalid=3363, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 08:44:36,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 08:44:36,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 08:44:36,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 08:44:36,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 08:44:36,145 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 08:44:36,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:36,145 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 08:44:36,145 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 08:44:36,145 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 08:44:36,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 08:44:36,146 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:36,146 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:36,146 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:36,146 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 08:44:36,146 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:36,147 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:36,147 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:36,147 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:36,147 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:36,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:36,157 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:36,727 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:36,727 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:36,727 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:36,727 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:36,728 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:36,728 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:36,728 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:36,732 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:36,732 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:36,736 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,738 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,739 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,739 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,740 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,741 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,742 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,743 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,743 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,744 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,745 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,747 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,748 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,749 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,750 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,755 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:36,756 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:36,758 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:36,768 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:36,769 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:38,071 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:38,090 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:38,091 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:38,093 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:38,093 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:38,098 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,099 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,102 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,106 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,110 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,118 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,123 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,147 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,155 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,163 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,171 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,179 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,189 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,198 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,212 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:38,224 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:38,228 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:38,235 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:38,235 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:38,549 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:38,551 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:38,551 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 08:44:38,551 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:38,551 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 08:44:38,551 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 08:44:38,551 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2387, Invalid=3465, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 08:44:38,551 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 08:44:38,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:38,594 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 08:44:38,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 08:44:38,594 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 08:44:38,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:38,595 INFO L225 Difference]: With dead ends: 63 [2018-01-21 08:44:38,595 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 08:44:38,595 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1263 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2428, Invalid=3578, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 08:44:38,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 08:44:38,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 08:44:38,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 08:44:38,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 08:44:38,598 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 08:44:38,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:38,598 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 08:44:38,598 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 08:44:38,598 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 08:44:38,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 08:44:38,599 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:38,599 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:38,599 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:38,599 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 08:44:38,599 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:38,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:38,599 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:38,600 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:38,600 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:38,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:38,609 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:39,062 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:39,062 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:39,062 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:39,062 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:39,063 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:39,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:39,063 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:39,068 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:39,068 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:39,074 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,076 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,077 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,078 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,079 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,079 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,080 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,081 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,084 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,085 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,086 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,087 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,088 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,089 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,090 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,091 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,093 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,094 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:39,094 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:39,096 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:39,106 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:39,106 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:40,454 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:40,474 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:40,474 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:40,477 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:40,477 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:40,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,494 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,502 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,510 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,519 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,528 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,537 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,570 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,581 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,593 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,621 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,634 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,647 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,661 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,675 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,690 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:40,701 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:40,705 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:40,712 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:40,712 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:41,037 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:41,038 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:41,038 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 08:44:41,038 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:41,038 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 08:44:41,038 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 08:44:41,039 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2477, Invalid=3685, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 08:44:41,039 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-21 08:44:41,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:41,085 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 08:44:41,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 08:44:41,085 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-21 08:44:41,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:41,086 INFO L225 Difference]: With dead ends: 64 [2018-01-21 08:44:41,086 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 08:44:41,087 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1371 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2519, Invalid=3801, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 08:44:41,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 08:44:41,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 08:44:41,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 08:44:41,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 08:44:41,090 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 08:44:41,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:41,090 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 08:44:41,091 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 08:44:41,091 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 08:44:41,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 08:44:41,091 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:41,091 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:41,091 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:41,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 08:44:41,092 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:41,092 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:41,092 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:41,093 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:41,093 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:41,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:41,102 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:41,669 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:41,669 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:41,669 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:41,669 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:41,670 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:41,670 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:41,670 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:41,678 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:41,679 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:41,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:41,699 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:41,710 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:41,710 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:43,138 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:43,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:43,157 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:43,161 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:43,161 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:43,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:43,195 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:43,203 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:43,203 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:43,538 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:43,539 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:43,539 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 08:44:43,539 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:43,539 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 08:44:43,539 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 08:44:43,539 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2567, Invalid=3913, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 08:44:43,540 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-21 08:44:43,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:43,590 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 08:44:43,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 08:44:43,590 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-21 08:44:43,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:43,591 INFO L225 Difference]: With dead ends: 65 [2018-01-21 08:44:43,591 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 08:44:43,591 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1483 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2610, Invalid=4032, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 08:44:43,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 08:44:43,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 08:44:43,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 08:44:43,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 08:44:43,594 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 08:44:43,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:43,594 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 08:44:43,594 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 08:44:43,594 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 08:44:43,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 08:44:43,594 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:43,594 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:43,594 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:43,594 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-21 08:44:43,595 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:43,595 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:43,595 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:43,595 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:43,595 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:43,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:43,605 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:44,194 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:44,194 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:44,194 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:44,194 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:44,194 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:44,194 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:44,194 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:44,202 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:44,202 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:44,211 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:44,222 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:44,224 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:44,226 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:44,242 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:44,242 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:44,445 WARN L143 SmtUtils]: Spent 115ms on a formula simplification that was a NOOP. DAG size: 122 [2018-01-21 08:44:45,796 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:45,815 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:45,815 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:45,818 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:45,818 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:45,828 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:45,845 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:45,860 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:45,863 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:45,871 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:45,871 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:46,228 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:46,229 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:46,229 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-21 08:44:46,230 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:46,230 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-21 08:44:46,230 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-21 08:44:46,230 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2657, Invalid=4149, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 08:44:46,230 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 43 states. [2018-01-21 08:44:46,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:46,276 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 08:44:46,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-21 08:44:46,277 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 55 [2018-01-21 08:44:46,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:46,277 INFO L225 Difference]: With dead ends: 66 [2018-01-21 08:44:46,277 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 08:44:46,277 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 177 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1599 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2701, Invalid=4271, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 08:44:46,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 08:44:46,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 08:44:46,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 08:44:46,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 08:44:46,280 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 08:44:46,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:46,280 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 08:44:46,281 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-21 08:44:46,281 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 08:44:46,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 08:44:46,281 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:46,281 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:46,281 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:46,281 INFO L82 PathProgramCache]: Analyzing trace with hash -1090430805, now seen corresponding path program 39 times [2018-01-21 08:44:46,282 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:46,282 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:46,282 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:46,282 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:46,282 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:46,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:46,291 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:46,809 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:46,810 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:46,810 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:46,810 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:46,810 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:46,810 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:46,810 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:46,817 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:46,817 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:46,825 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,827 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,828 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,829 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,830 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,832 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,833 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,835 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,837 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,838 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,839 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,840 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,842 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,843 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,844 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,846 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,848 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,850 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,851 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,853 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:46,853 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:46,855 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:46,870 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:46,870 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:48,409 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:48,429 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:48,429 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:48,432 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:48,432 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:48,441 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,448 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,456 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,482 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,492 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,502 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,513 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,524 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,536 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,548 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,561 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,574 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,587 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,602 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,616 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,631 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,663 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,679 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:48,692 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:48,695 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:48,703 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:48,703 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:49,067 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:49,068 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:49,068 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 85 [2018-01-21 08:44:49,068 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:49,068 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 08:44:49,069 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 08:44:49,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2747, Invalid=4393, Unknown=0, NotChecked=0, Total=7140 [2018-01-21 08:44:49,069 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 44 states. [2018-01-21 08:44:49,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:49,124 INFO L93 Difference]: Finished difference Result 67 states and 67 transitions. [2018-01-21 08:44:49,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-01-21 08:44:49,125 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 56 [2018-01-21 08:44:49,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:49,126 INFO L225 Difference]: With dead ends: 67 [2018-01-21 08:44:49,126 INFO L226 Difference]: Without dead ends: 58 [2018-01-21 08:44:49,126 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 180 SyntacticMatches, 2 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1719 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2792, Invalid=4518, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 08:44:49,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-21 08:44:49,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-21 08:44:49,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-21 08:44:49,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-01-21 08:44:49,130 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 56 [2018-01-21 08:44:49,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:49,130 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-01-21 08:44:49,130 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 08:44:49,130 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-01-21 08:44:49,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-21 08:44:49,131 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:49,131 INFO L322 BasicCegarLoop]: trace histogram [40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:49,131 INFO L371 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:49,131 INFO L82 PathProgramCache]: Analyzing trace with hash -845591728, now seen corresponding path program 40 times [2018-01-21 08:44:49,131 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:49,132 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:49,132 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:49,132 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:49,132 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:49,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:49,141 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:49,653 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:49,654 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:49,654 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:49,654 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:49,654 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:49,654 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:49,654 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:49,659 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:49,659 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:49,675 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:49,677 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:49,703 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:49,703 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:51,404 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:51,437 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:51,438 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 81 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:51,441 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:51,441 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:51,493 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:51,497 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:51,505 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:51,505 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:51,612 WARN L143 SmtUtils]: Spent 105ms on a formula simplification that was a NOOP. DAG size: 128 Received shutdown request... [2018-01-21 08:44:51,823 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 08:44:51,824 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:44:51,825 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:44:51,826 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:44:51,826 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:44:51,826 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:44:51,826 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:44:51,826 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:44:51,826 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:44:51,826 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 08:44:51,826 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:44:51,826 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:44:51,827 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:44:51,827 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 08:44:51 BoogieIcfgContainer [2018-01-21 08:44:51,827 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 08:44:51,828 INFO L168 Benchmark]: Toolchain (without parser) took 55400.65 ms. Allocated memory was 297.8 MB in the beginning and 833.1 MB in the end (delta: 535.3 MB). Free memory was 257.1 MB in the beginning and 546.3 MB in the end (delta: -289.2 MB). Peak memory consumption was 246.1 MB. Max. memory is 5.3 GB. [2018-01-21 08:44:51,829 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 297.8 MB. Free memory is still 261.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 08:44:51,829 INFO L168 Benchmark]: CACSL2BoogieTranslator took 190.02 ms. Allocated memory is still 297.8 MB. Free memory was 257.1 MB in the beginning and 249.2 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:44:51,829 INFO L168 Benchmark]: Boogie Preprocessor took 24.68 ms. Allocated memory is still 297.8 MB. Free memory was 249.2 MB in the beginning and 247.2 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:44:51,829 INFO L168 Benchmark]: RCFGBuilder took 173.81 ms. Allocated memory is still 297.8 MB. Free memory was 247.2 MB in the beginning and 234.6 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. [2018-01-21 08:44:51,829 INFO L168 Benchmark]: TraceAbstraction took 55004.34 ms. Allocated memory was 297.8 MB in the beginning and 833.1 MB in the end (delta: 535.3 MB). Free memory was 234.6 MB in the beginning and 546.3 MB in the end (delta: -311.7 MB). Peak memory consumption was 223.6 MB. Max. memory is 5.3 GB. [2018-01-21 08:44:51,831 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 297.8 MB. Free memory is still 261.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 190.02 ms. Allocated memory is still 297.8 MB. Free memory was 257.1 MB in the beginning and 249.2 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 24.68 ms. Allocated memory is still 297.8 MB. Free memory was 249.2 MB in the beginning and 247.2 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 173.81 ms. Allocated memory is still 297.8 MB. Free memory was 247.2 MB in the beginning and 234.6 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55004.34 ms. Allocated memory was 297.8 MB in the beginning and 833.1 MB in the end (delta: 535.3 MB). Free memory was 234.6 MB in the beginning and 546.3 MB in the end (delta: -311.7 MB). Peak memory consumption was 223.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.186504 RENAME_VARIABLES(MILLISECONDS) : 0.069657 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.139292 PROJECTAWAY(MILLISECONDS) : 0.086896 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.214429 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.100188 ADD_EQUALITY(MILLISECONDS) : 0.031149 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.010094 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 58 with TraceHistMax 40, while TraceCheckSpWp was constructing backward predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 128. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 54.8s OverallTime, 41 OverallIterations, 40 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 643 SDtfs, 80 SDslu, 10896 SDs, 0 SdLazy, 1719 SolverSat, 51 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6674 GetRequests, 4799 SyntacticMatches, 78 SemanticMatches, 1797 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17336 ImplicationChecksByTransitivity, 28.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=58occurred in iteration=40, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 40 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.4s SatisfiabilityAnalysisTime, 43.9s InterpolantComputationTime, 4346 NumberOfCodeBlocks, 4346 NumberOfCodeBlocksAsserted, 550 NumberOfCheckSat, 7036 ConstructedInterpolants, 0 QuantifiedInterpolants, 1057564 SizeOfPredicates, 78 NumberOfNonLiveVariables, 9438 ConjunctsInSsa, 1794 ConjunctsInUnsatCore, 196 InterpolantComputations, 1 PerfectInterpolantSequences, 0/53300 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_08-44-51-838.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_08-44-51-838.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_08-44-51-838.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_08-44-51-838.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_08-44-51-838.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_08-44-51-838.csv Completed graceful shutdown