java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 08:44:54,306 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 08:44:54,308 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 08:44:54,322 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 08:44:54,323 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 08:44:54,324 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 08:44:54,325 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 08:44:54,326 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 08:44:54,328 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 08:44:54,329 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 08:44:54,330 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 08:44:54,330 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 08:44:54,331 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 08:44:54,333 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 08:44:54,334 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 08:44:54,336 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 08:44:54,338 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 08:44:54,340 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 08:44:54,341 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 08:44:54,343 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 08:44:54,345 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 08:44:54,350 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 08:44:54,350 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 08:44:54,351 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-21 08:44:54,361 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 08:44:54,361 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 08:44:54,362 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 08:44:54,362 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 08:44:54,362 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 08:44:54,362 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 08:44:54,363 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-21 08:44:54,363 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 08:44:54,363 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 08:44:54,364 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 08:44:54,364 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 08:44:54,364 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 08:44:54,364 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 08:44:54,364 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 08:44:54,365 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 08:44:54,365 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 08:44:54,365 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 08:44:54,365 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 08:44:54,365 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 08:44:54,365 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 08:44:54,366 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 08:44:54,366 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 08:44:54,366 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 08:44:54,366 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 08:44:54,366 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 08:44:54,367 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 08:44:54,367 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 08:44:54,367 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:44:54,367 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 08:44:54,368 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 08:44:54,368 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 08:44:54,368 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 08:44:54,368 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 08:44:54,368 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 08:44:54,368 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 08:44:54,369 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 08:44:54,369 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 08:44:54,369 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 08:44:54,370 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 08:44:54,370 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 08:44:54,404 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 08:44:54,413 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 08:44:54,417 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 08:44:54,419 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 08:44:54,419 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 08:44:54,420 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_false-valid-deref-write.c [2018-01-21 08:44:54,537 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 08:44:54,543 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 08:44:54,544 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 08:44:54,544 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 08:44:54,549 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 08:44:54,550 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,552 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@664a5116 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54, skipping insertion in model container [2018-01-21 08:44:54,553 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,570 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:44:54,589 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:44:54,706 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:44:54,720 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:44:54,724 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54 WrapperNode [2018-01-21 08:44:54,725 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 08:44:54,725 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 08:44:54,725 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 08:44:54,726 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 08:44:54,736 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,737 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,744 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,744 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,746 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,749 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,749 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (1/1) ... [2018-01-21 08:44:54,750 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 08:44:54,751 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 08:44:54,751 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 08:44:54,751 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 08:44:54,752 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:44:54,797 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 08:44:54,797 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 08:44:54,798 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 08:44:54,798 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 08:44:54,798 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 08:44:54,798 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 08:44:54,798 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 08:44:54,798 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 08:44:54,799 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 08:44:54,799 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 08:44:54,799 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 08:44:54,799 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 08:44:54,908 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 08:44:54,909 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:44:54 BoogieIcfgContainer [2018-01-21 08:44:54,909 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 08:44:54,909 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 08:44:54,909 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 08:44:54,911 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 08:44:54,911 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 08:44:54" (1/3) ... [2018-01-21 08:44:54,912 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14a2a8cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:44:54, skipping insertion in model container [2018-01-21 08:44:54,912 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:44:54" (2/3) ... [2018-01-21 08:44:54,913 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@14a2a8cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:44:54, skipping insertion in model container [2018-01-21 08:44:54,913 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:44:54" (3/3) ... [2018-01-21 08:44:54,914 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero2_false-valid-deref-write.c [2018-01-21 08:44:54,921 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 08:44:54,927 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 08:44:54,960 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:44:54,960 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:44:54,960 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:44:54,960 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:44:54,960 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:44:54,961 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:44:54,961 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:44:54,961 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 08:44:54,961 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:44:54,975 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:44:54,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 08:44:54,979 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:54,980 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 08:44:54,980 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 08:44:54,985 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 08:44:54,989 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:55,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:55,043 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:55,044 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:55,044 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:55,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:44:55,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:44:55,095 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 08:44:55,100 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 08:44:55,105 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:44:55,105 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:44:55,105 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:44:55,106 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:44:55,106 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:44:55,106 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:44:55,106 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:44:55,106 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 08:44:55,106 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:44:55,107 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:44:55,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 08:44:55,108 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:55,108 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:55,108 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:55,108 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 08:44:55,108 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:55,109 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:55,109 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:55,109 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:55,109 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:55,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:55,136 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:55,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:55,228 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:44:55,229 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 08:44:55,229 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:44:55,230 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 08:44:55,241 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 08:44:55,242 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 08:44:55,244 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 08:44:55,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:55,311 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:44:55,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 08:44:55,312 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 08:44:55,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:55,323 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:44:55,323 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 08:44:55,385 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 08:44:55,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 08:44:55,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 08:44:55,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 08:44:55,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 08:44:55,415 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 08:44:55,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:55,416 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 08:44:55,416 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 08:44:55,416 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 08:44:55,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 08:44:55,416 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:55,417 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:55,417 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:55,417 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 08:44:55,417 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:55,418 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:55,418 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:55,418 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:55,418 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:55,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:55,435 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:55,497 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:55,497 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:55,497 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:55,498 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 08:44:55,501 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 08:44:55,549 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:44:55,549 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:44:56,253 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:44:56,255 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 08:44:56,269 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:44:56,270 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:56,270 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:56,282 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:56,283 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:56,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:56,309 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:56,372 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:56,372 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:56,634 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:56,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:56,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:56,667 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:56,667 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:56,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:56,690 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:56,696 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:56,696 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:56,790 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:56,792 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:56,792 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 08:44:56,793 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:56,793 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 08:44:56,794 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 08:44:56,794 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 08:44:56,794 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 08:44:56,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:56,829 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 08:44:56,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 08:44:56,829 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 08:44:56,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:56,830 INFO L225 Difference]: With dead ends: 29 [2018-01-21 08:44:56,831 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 08:44:56,832 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 08:44:56,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 08:44:56,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 08:44:56,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 08:44:56,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 08:44:56,836 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 08:44:56,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:56,837 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 08:44:56,837 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 08:44:56,837 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 08:44:56,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 08:44:56,838 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:56,838 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:56,838 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:56,838 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 08:44:56,839 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:56,840 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:56,847 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:56,848 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:56,848 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:56,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:56,860 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:56,918 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:56,918 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:56,918 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:56,918 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:56,918 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:56,918 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:56,919 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:56,927 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:56,927 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:56,940 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:56,942 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:56,942 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:56,944 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:56,966 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:56,966 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:57,169 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,200 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:57,200 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:57,204 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:57,204 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:57,217 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:57,224 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:57,232 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:57,236 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:57,240 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,240 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:57,329 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,332 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:57,332 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 08:44:57,332 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:57,333 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 08:44:57,333 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 08:44:57,333 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 08:44:57,333 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 08:44:57,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:57,356 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 08:44:57,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 08:44:57,356 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 08:44:57,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:57,357 INFO L225 Difference]: With dead ends: 30 [2018-01-21 08:44:57,357 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 08:44:57,358 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 08:44:57,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 08:44:57,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 08:44:57,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 08:44:57,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 08:44:57,362 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 08:44:57,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:57,362 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 08:44:57,362 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 08:44:57,363 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 08:44:57,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 08:44:57,363 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:57,364 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:57,364 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:57,364 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 08:44:57,364 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:57,365 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:57,365 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:57,366 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:57,366 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:57,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:57,380 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:57,433 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,433 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:57,434 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:57,434 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:57,434 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:57,434 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:57,434 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:57,439 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:57,439 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:57,448 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:57,450 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:57,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:57,451 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:57,453 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:57,468 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,468 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:57,568 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,588 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:57,588 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:57,591 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:44:57,591 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:44:57,605 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:57,611 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:57,619 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:44:57,624 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:57,627 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:57,633 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,633 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:57,699 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,701 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:57,701 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 08:44:57,701 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:57,702 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 08:44:57,702 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 08:44:57,702 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 08:44:57,702 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 08:44:57,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:57,722 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 08:44:57,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 08:44:57,722 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 08:44:57,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:57,723 INFO L225 Difference]: With dead ends: 31 [2018-01-21 08:44:57,723 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 08:44:57,723 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 08:44:57,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 08:44:57,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 08:44:57,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 08:44:57,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 08:44:57,726 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 08:44:57,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:57,726 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 08:44:57,726 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 08:44:57,727 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 08:44:57,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 08:44:57,727 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:57,727 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:57,727 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:57,727 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 08:44:57,727 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:57,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:57,728 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:57,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:57,728 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:57,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:57,737 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:57,773 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:57,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:57,773 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:57,773 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:57,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:57,774 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:57,779 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:57,779 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:57,789 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:57,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:57,799 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,799 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:57,910 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,931 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:57,931 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:57,934 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:44:57,934 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:44:57,955 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:57,958 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:57,961 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:57,962 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:58,013 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,014 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:58,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 08:44:58,014 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:58,015 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 08:44:58,015 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 08:44:58,015 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 08:44:58,015 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 08:44:58,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:58,045 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 08:44:58,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 08:44:58,045 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 08:44:58,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:58,046 INFO L225 Difference]: With dead ends: 32 [2018-01-21 08:44:58,046 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 08:44:58,047 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 08:44:58,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 08:44:58,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 08:44:58,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 08:44:58,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 08:44:58,050 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 08:44:58,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:58,050 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 08:44:58,050 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 08:44:58,050 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 08:44:58,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 08:44:58,051 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:58,051 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:58,051 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:58,051 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 08:44:58,051 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:58,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:58,052 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:58,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:58,052 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:58,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:58,064 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:58,134 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:58,135 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:58,135 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:58,135 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:58,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:58,135 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:58,152 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:58,152 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:58,157 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:58,160 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:58,161 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:58,166 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:58,168 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:58,170 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:58,181 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,181 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:58,299 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,320 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:58,320 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:58,324 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:44:58,325 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:58,328 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:58,330 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:58,333 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:58,342 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:58,348 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:58,352 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:58,357 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,357 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:58,413 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,415 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:58,415 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 08:44:58,415 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:58,415 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 08:44:58,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 08:44:58,416 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 08:44:58,416 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 08:44:58,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:58,443 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:44:58,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 08:44:58,443 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 08:44:58,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:58,444 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:44:58,444 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 08:44:58,445 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 08:44:58,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 08:44:58,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 08:44:58,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 08:44:58,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 08:44:58,449 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 08:44:58,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:58,449 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 08:44:58,449 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 08:44:58,449 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 08:44:58,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 08:44:58,450 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:58,450 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:58,450 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:58,450 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 08:44:58,450 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:58,451 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:58,451 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:58,451 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:58,451 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:58,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:58,462 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:58,525 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,525 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:58,526 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:58,526 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:58,526 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:58,526 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:58,526 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:58,531 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:58,531 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:58,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:58,540 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:58,541 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:58,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:58,543 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:58,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:58,565 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,565 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:58,715 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,739 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:58,739 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:58,743 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:44:58,743 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:44:58,754 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:58,763 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:58,775 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:58,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:44:58,790 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:58,793 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:58,800 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,800 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:58,887 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:58,888 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:58,888 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 08:44:58,889 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:58,889 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 08:44:58,889 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 08:44:58,889 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 08:44:58,889 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 08:44:58,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:58,923 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 08:44:58,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 08:44:58,923 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 08:44:58,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:58,924 INFO L225 Difference]: With dead ends: 34 [2018-01-21 08:44:58,924 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 08:44:58,925 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 08:44:58,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 08:44:58,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 08:44:58,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 08:44:58,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 08:44:58,929 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 08:44:58,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:58,929 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 08:44:58,929 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 08:44:58,929 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 08:44:58,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 08:44:58,930 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:58,930 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:58,930 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:58,930 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 08:44:58,930 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:58,931 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:58,931 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:58,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:58,932 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:58,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:58,942 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:59,017 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,017 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:59,017 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:59,018 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:59,018 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:59,018 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:59,018 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:59,023 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:59,023 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:59,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:59,035 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:59,048 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,048 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:59,250 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,270 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:59,270 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:59,275 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:59,275 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:44:59,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:59,294 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:59,299 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,300 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:59,361 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,363 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:59,363 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 08:44:59,363 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:59,363 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 08:44:59,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 08:44:59,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 08:44:59,364 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 08:44:59,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:59,381 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 08:44:59,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 08:44:59,381 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 08:44:59,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:59,382 INFO L225 Difference]: With dead ends: 35 [2018-01-21 08:44:59,382 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 08:44:59,382 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 08:44:59,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 08:44:59,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 08:44:59,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 08:44:59,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 08:44:59,385 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 08:44:59,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:59,385 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 08:44:59,385 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 08:44:59,385 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 08:44:59,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 08:44:59,386 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:59,386 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:59,386 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:59,386 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 08:44:59,386 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:59,387 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:59,387 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:44:59,387 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:59,387 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:59,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:59,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:44:59,495 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:59,495 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:44:59,496 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:44:59,496 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:44:59,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:59,496 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:44:59,503 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:59,503 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:59,511 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:59,514 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:59,514 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:59,516 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:59,529 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,529 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:59,727 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,759 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:44:59,760 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:44:59,766 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:44:59,766 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:44:59,777 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:59,785 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:44:59,792 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:44:59,795 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:44:59,800 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,800 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:44:59,896 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:44:59,897 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:44:59,897 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 08:44:59,897 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:44:59,898 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 08:44:59,898 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 08:44:59,898 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 08:44:59,898 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 08:44:59,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:44:59,965 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 08:44:59,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 08:44:59,965 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 08:44:59,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:44:59,966 INFO L225 Difference]: With dead ends: 36 [2018-01-21 08:44:59,966 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 08:44:59,967 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 08:44:59,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 08:44:59,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 08:44:59,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 08:44:59,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 08:44:59,971 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 08:44:59,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:44:59,971 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 08:44:59,971 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 08:44:59,971 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 08:44:59,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 08:44:59,972 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:44:59,972 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:44:59,972 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:44:59,972 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 08:44:59,972 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:44:59,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:59,973 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:44:59,974 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:44:59,974 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:44:59,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:44:59,983 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:00,090 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:00,091 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:00,091 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:00,091 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:00,091 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:00,091 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:00,091 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:00,100 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:00,100 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:00,111 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,114 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,118 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,120 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,121 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,123 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,124 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:00,125 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:00,155 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:00,156 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:00,454 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:00,474 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:00,474 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:00,477 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:00,477 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:00,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,492 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,499 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,507 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,515 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,523 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:00,529 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:00,532 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:00,537 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:00,537 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:00,604 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:00,606 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:00,606 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 08:45:00,606 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:00,606 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 08:45:00,607 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 08:45:00,607 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 08:45:00,607 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 08:45:00,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:00,644 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 08:45:00,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 08:45:00,644 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 08:45:00,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:00,645 INFO L225 Difference]: With dead ends: 37 [2018-01-21 08:45:00,645 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 08:45:00,646 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 08:45:00,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 08:45:00,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 08:45:00,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 08:45:00,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 08:45:00,648 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 08:45:00,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:00,648 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 08:45:00,649 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 08:45:00,649 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 08:45:00,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 08:45:00,649 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:00,649 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:00,649 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:00,649 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 08:45:00,649 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:00,650 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:00,650 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:00,650 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:00,650 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:00,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:00,657 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:00,743 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:00,744 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:00,744 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:00,744 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:00,744 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:00,744 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:00,744 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:00,752 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:00,752 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:00,762 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:00,764 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:00,773 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:00,773 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:01,010 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,029 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:01,030 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:01,033 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:01,033 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:01,059 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:01,062 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:01,068 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,068 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:01,158 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,159 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:01,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 08:45:01,160 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:01,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 08:45:01,160 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 08:45:01,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 08:45:01,161 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 08:45:01,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:01,190 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 08:45:01,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 08:45:01,190 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 08:45:01,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:01,191 INFO L225 Difference]: With dead ends: 38 [2018-01-21 08:45:01,191 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 08:45:01,192 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 08:45:01,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 08:45:01,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 08:45:01,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 08:45:01,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 08:45:01,195 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 08:45:01,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:01,196 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 08:45:01,196 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 08:45:01,196 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 08:45:01,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 08:45:01,196 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:01,196 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:01,196 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:01,196 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 08:45:01,197 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:01,197 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:01,197 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:01,197 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:01,197 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:01,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:01,205 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:01,286 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,286 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:01,286 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:01,287 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:01,287 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:01,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:01,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:01,291 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:01,292 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:01,295 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,296 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,296 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,297 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,298 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,299 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,302 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,303 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:01,304 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:01,312 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,312 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:01,569 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,589 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:01,589 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:01,593 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:01,593 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:01,597 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,599 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,612 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,616 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,626 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:01,634 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:01,637 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:01,643 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,643 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:01,732 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,733 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:01,733 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 08:45:01,733 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:01,733 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 08:45:01,734 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 08:45:01,734 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 08:45:01,734 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 08:45:01,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:01,781 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 08:45:01,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 08:45:01,782 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 08:45:01,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:01,782 INFO L225 Difference]: With dead ends: 39 [2018-01-21 08:45:01,782 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 08:45:01,783 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 08:45:01,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 08:45:01,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 08:45:01,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 08:45:01,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 08:45:01,785 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 08:45:01,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:01,785 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 08:45:01,785 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 08:45:01,785 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 08:45:01,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 08:45:01,786 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:01,786 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:01,786 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:01,786 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 08:45:01,786 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:01,787 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:01,787 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:01,787 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:01,787 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:01,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:01,793 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:01,884 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,885 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:01,885 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:01,885 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:01,885 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:01,885 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:01,885 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:01,891 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:01,891 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:01,897 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:01,899 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:01,900 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:01,901 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:01,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:01,904 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:01,905 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:01,905 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:01,907 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:01,916 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:01,916 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:02,257 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:02,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:02,279 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:02,282 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:02,282 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:02,290 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:02,297 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:02,305 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:02,313 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:02,322 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:02,331 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:02,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:02,347 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:02,350 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:02,357 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:02,357 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:02,464 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:02,465 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:02,465 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 08:45:02,465 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:02,466 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 08:45:02,466 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 08:45:02,466 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 08:45:02,466 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 08:45:02,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:02,489 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 08:45:02,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 08:45:02,489 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 08:45:02,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:02,490 INFO L225 Difference]: With dead ends: 40 [2018-01-21 08:45:02,490 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 08:45:02,490 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 08:45:02,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 08:45:02,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 08:45:02,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 08:45:02,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 08:45:02,493 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 08:45:02,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:02,493 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 08:45:02,493 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 08:45:02,493 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 08:45:02,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 08:45:02,494 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:02,494 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:02,494 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:02,494 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 08:45:02,494 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:02,495 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:02,495 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:02,495 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:02,495 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:02,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:02,504 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:02,680 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:02,680 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:02,680 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:02,680 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:02,680 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:02,680 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:02,680 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:02,691 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:02,691 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:02,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:02,705 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:02,719 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:02,719 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:03,178 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:03,198 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:03,199 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:03,201 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:03,201 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:03,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:03,223 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:03,232 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:03,232 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:03,360 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:03,361 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:03,361 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 08:45:03,361 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:03,362 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 08:45:03,362 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 08:45:03,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 08:45:03,362 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 08:45:03,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:03,413 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 08:45:03,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 08:45:03,413 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 08:45:03,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:03,414 INFO L225 Difference]: With dead ends: 41 [2018-01-21 08:45:03,414 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 08:45:03,415 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 08:45:03,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 08:45:03,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 08:45:03,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 08:45:03,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 08:45:03,417 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 08:45:03,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:03,418 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 08:45:03,418 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 08:45:03,418 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 08:45:03,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 08:45:03,418 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:03,418 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:03,418 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:03,418 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 08:45:03,418 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:03,419 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:03,419 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:03,419 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:03,419 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:03,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:03,427 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:03,550 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:03,550 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:03,550 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:03,551 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:03,551 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:03,551 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:03,551 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:03,567 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:03,567 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:03,575 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:03,584 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:03,593 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:03,595 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:03,604 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:03,605 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:03,974 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:03,995 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:03,995 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:03,999 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:03,999 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:04,011 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:04,024 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:04,033 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:04,036 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:04,041 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:04,041 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:04,214 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:04,215 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:04,215 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 08:45:04,215 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:04,215 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 08:45:04,216 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 08:45:04,216 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 08:45:04,216 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 08:45:04,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:04,314 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 08:45:04,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 08:45:04,316 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 08:45:04,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:04,317 INFO L225 Difference]: With dead ends: 42 [2018-01-21 08:45:04,317 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 08:45:04,318 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 08:45:04,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 08:45:04,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 08:45:04,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 08:45:04,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 08:45:04,322 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 08:45:04,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:04,322 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 08:45:04,322 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 08:45:04,322 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 08:45:04,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 08:45:04,323 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:04,323 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:04,323 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:04,324 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 08:45:04,324 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:04,324 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:04,325 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:04,325 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:04,325 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:04,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:04,335 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:04,531 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:04,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:04,531 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:04,531 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:04,531 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:04,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:04,531 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:04,543 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:04,543 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:04,551 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,552 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,554 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,555 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,556 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,557 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,558 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,559 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,560 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:04,560 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:04,562 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:04,571 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:04,571 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:05,577 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:05,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:05,598 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:05,601 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:05,602 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:05,612 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,619 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,629 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,637 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,646 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,656 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,666 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,679 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,697 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:05,710 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:05,715 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:05,722 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:05,723 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:05,840 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:05,841 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:05,842 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 08:45:05,842 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:05,842 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 08:45:05,842 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 08:45:05,843 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 08:45:05,843 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 08:45:05,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:05,872 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 08:45:05,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 08:45:05,872 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 08:45:05,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:05,873 INFO L225 Difference]: With dead ends: 43 [2018-01-21 08:45:05,873 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 08:45:05,873 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 08:45:05,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 08:45:05,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 08:45:05,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 08:45:05,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 08:45:05,876 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 08:45:05,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:05,876 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 08:45:05,876 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 08:45:05,876 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 08:45:05,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 08:45:05,877 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:05,877 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:05,877 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:05,877 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 08:45:05,877 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:05,878 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:05,878 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:05,878 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:05,878 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:05,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:05,884 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:06,092 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:06,097 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:06,097 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:06,097 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:06,097 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:06,098 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:06,098 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:06,120 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:06,121 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:06,140 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:06,142 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:06,160 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:06,160 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:06,700 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:06,721 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:06,721 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:06,725 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:06,725 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:06,766 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:06,770 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:06,775 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:06,775 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:06,903 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:06,907 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:06,908 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 08:45:06,908 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:06,908 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 08:45:06,908 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 08:45:06,909 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 08:45:06,909 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 08:45:06,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:06,977 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 08:45:06,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 08:45:06,982 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 08:45:06,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:06,983 INFO L225 Difference]: With dead ends: 44 [2018-01-21 08:45:06,983 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 08:45:06,984 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 08:45:06,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 08:45:06,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 08:45:06,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 08:45:06,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 08:45:06,995 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 08:45:06,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:06,995 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 08:45:06,995 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 08:45:06,995 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 08:45:06,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 08:45:06,996 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:06,996 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:06,996 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:06,996 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 08:45:06,996 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:06,997 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:06,997 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:06,997 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:06,997 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:07,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:07,021 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:07,293 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:07,293 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:07,293 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:07,293 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:07,293 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:07,293 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:07,293 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:07,298 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:07,299 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:07,303 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,304 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,305 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,306 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,306 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,307 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,308 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,310 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,315 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,316 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:07,317 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:07,326 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:07,326 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:07,824 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:07,843 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:07,843 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:07,846 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:07,846 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:07,850 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,851 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,855 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,859 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,867 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,872 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,877 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,883 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,893 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:07,902 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:07,905 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:07,910 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:07,910 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:08,083 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:08,084 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:08,084 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 08:45:08,084 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:08,085 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 08:45:08,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 08:45:08,085 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 08:45:08,086 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 08:45:08,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:08,121 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 08:45:08,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 08:45:08,121 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 08:45:08,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:08,122 INFO L225 Difference]: With dead ends: 45 [2018-01-21 08:45:08,122 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 08:45:08,123 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 08:45:08,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 08:45:08,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 08:45:08,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 08:45:08,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 08:45:08,127 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 08:45:08,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:08,127 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 08:45:08,127 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 08:45:08,127 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 08:45:08,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 08:45:08,128 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:08,128 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:08,128 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:08,128 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 08:45:08,128 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:08,129 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:08,129 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:08,129 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:08,129 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:08,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:08,136 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:08,330 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:08,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:08,330 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:08,330 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:08,330 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:08,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:08,330 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:08,335 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:08,335 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:08,342 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,346 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,347 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,348 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,349 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,350 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,351 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,352 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,353 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:08,354 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:08,355 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:08,363 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:08,363 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:08,965 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:08,984 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:08,985 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:08,987 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:08,987 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:08,997 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,003 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,011 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,019 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,027 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,036 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,045 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,054 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,064 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:09,083 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:09,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:09,091 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:09,091 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:09,216 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:09,217 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:09,218 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 08:45:09,218 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:09,218 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 08:45:09,218 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 08:45:09,218 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 08:45:09,219 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 08:45:09,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:09,247 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 08:45:09,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 08:45:09,247 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 08:45:09,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:09,248 INFO L225 Difference]: With dead ends: 46 [2018-01-21 08:45:09,248 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 08:45:09,248 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 08:45:09,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 08:45:09,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 08:45:09,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 08:45:09,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 08:45:09,251 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 08:45:09,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:09,251 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 08:45:09,251 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 08:45:09,251 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 08:45:09,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 08:45:09,252 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:09,252 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:09,252 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:09,252 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 08:45:09,253 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:09,253 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:09,253 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:09,253 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:09,253 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:09,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:09,261 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:09,482 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:09,482 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:09,482 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:09,482 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:09,483 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:09,483 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:09,483 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:09,487 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:09,488 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:09,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:09,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:09,507 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:09,507 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:10,091 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:10,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:10,113 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:10,115 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:10,115 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:10,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:10,140 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:10,145 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:10,145 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:10,279 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:10,279 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:10,279 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 08:45:10,280 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:10,280 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 08:45:10,280 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 08:45:10,280 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 08:45:10,280 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 08:45:10,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:10,320 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 08:45:10,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 08:45:10,320 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 08:45:10,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:10,320 INFO L225 Difference]: With dead ends: 47 [2018-01-21 08:45:10,320 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 08:45:10,321 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 08:45:10,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 08:45:10,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 08:45:10,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 08:45:10,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 08:45:10,323 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 08:45:10,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:10,324 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 08:45:10,324 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 08:45:10,324 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 08:45:10,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 08:45:10,325 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:10,325 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:10,325 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:10,325 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 08:45:10,325 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:10,326 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:10,326 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:10,326 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:10,326 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:10,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:10,331 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:10,494 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:10,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:10,495 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:10,495 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:10,495 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:10,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:10,495 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:10,499 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:10,499 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:10,505 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:10,511 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:10,513 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:10,514 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:10,523 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:10,523 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:11,118 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:11,137 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:11,137 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:11,140 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:11,140 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:11,152 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:11,163 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:11,172 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:11,175 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:11,181 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:11,182 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:11,354 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:11,355 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:11,356 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 08:45:11,356 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:11,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 08:45:11,357 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 08:45:11,357 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 08:45:11,357 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 08:45:11,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:11,390 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 08:45:11,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 08:45:11,390 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 08:45:11,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:11,390 INFO L225 Difference]: With dead ends: 48 [2018-01-21 08:45:11,390 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 08:45:11,391 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 08:45:11,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 08:45:11,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 08:45:11,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 08:45:11,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 08:45:11,393 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 08:45:11,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:11,394 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 08:45:11,394 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 08:45:11,394 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 08:45:11,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 08:45:11,394 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:11,394 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:11,394 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:11,394 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 08:45:11,395 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:11,395 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:11,395 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:11,395 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:11,396 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:11,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:11,401 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:11,594 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:11,594 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:11,594 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:11,595 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:11,595 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:11,595 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:11,595 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:11,600 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:11,600 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:11,608 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,609 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,611 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,612 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,614 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,615 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,617 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,618 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,620 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,621 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,623 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,625 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:11,625 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:11,627 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:11,651 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:11,651 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:12,328 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:12,349 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:12,349 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:12,352 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:12,352 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:12,362 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,368 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,377 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,386 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,394 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,404 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,414 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,424 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,435 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,446 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,457 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,469 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:12,478 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:12,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:12,487 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:12,487 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:12,645 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:12,646 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:12,646 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 08:45:12,646 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:12,647 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 08:45:12,647 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 08:45:12,647 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1127, Invalid=1225, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 08:45:12,648 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 08:45:12,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:12,679 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 08:45:12,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 08:45:12,679 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 08:45:12,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:12,680 INFO L225 Difference]: With dead ends: 49 [2018-01-21 08:45:12,680 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 08:45:12,680 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1154, Invalid=1296, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 08:45:12,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 08:45:12,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 08:45:12,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 08:45:12,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 08:45:12,683 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 08:45:12,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:12,683 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 08:45:12,683 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 08:45:12,683 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 08:45:12,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 08:45:12,684 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:12,684 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:12,684 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:12,684 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 08:45:12,684 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:12,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:12,685 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:12,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:12,685 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:12,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:12,691 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:12,883 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:12,883 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:12,883 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:12,883 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:12,883 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:12,883 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:12,884 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:12,888 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:12,889 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:12,901 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:12,902 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:12,911 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:12,911 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:13,643 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:13,664 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:13,664 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:13,667 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:13,667 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:13,701 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:13,705 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:13,710 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:13,710 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:13,877 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:13,878 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:13,878 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 08:45:13,878 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:13,878 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 08:45:13,879 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 08:45:13,879 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1217, Invalid=1333, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 08:45:13,879 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 08:45:13,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:13,925 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 08:45:13,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 08:45:13,926 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 08:45:13,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:13,926 INFO L225 Difference]: With dead ends: 50 [2018-01-21 08:45:13,926 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 08:45:13,927 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1245, Invalid=1407, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 08:45:13,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 08:45:13,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 08:45:13,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 08:45:13,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 08:45:13,930 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 08:45:13,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:13,930 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 08:45:13,930 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 08:45:13,931 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 08:45:13,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 08:45:13,931 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:13,931 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:13,931 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:13,931 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 08:45:13,931 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:13,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:13,932 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:13,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:13,932 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:13,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:13,938 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:14,141 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:14,141 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:14,141 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:14,142 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:14,142 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:14,142 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:14,142 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:14,147 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:14,147 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:14,151 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,152 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,153 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,154 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,154 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,155 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,157 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,158 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,159 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,160 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,161 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,165 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,166 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:14,167 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:14,176 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:14,176 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:14,931 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:14,951 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:14,951 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:14,954 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:14,954 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:14,959 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,961 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,964 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,968 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,973 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,977 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,982 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,988 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:14,994 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,007 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,027 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,037 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:15,041 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:15,046 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,047 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:15,235 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,236 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:15,236 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 08:45:15,236 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:15,236 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 08:45:15,237 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 08:45:15,237 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1307, Invalid=1449, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 08:45:15,237 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 08:45:15,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:15,303 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 08:45:15,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 08:45:15,303 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 08:45:15,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:15,304 INFO L225 Difference]: With dead ends: 51 [2018-01-21 08:45:15,304 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 08:45:15,305 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1336, Invalid=1526, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 08:45:15,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 08:45:15,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 08:45:15,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 08:45:15,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 08:45:15,309 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 08:45:15,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:15,309 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 08:45:15,309 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 08:45:15,310 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 08:45:15,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 08:45:15,310 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:15,310 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:15,310 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:15,311 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 08:45:15,311 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:15,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:15,312 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:15,312 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:15,312 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:15,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:15,321 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:15,543 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,543 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:15,543 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:15,543 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:15,544 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:15,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:15,544 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:15,549 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:15,549 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:15,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,557 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,558 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,560 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,562 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,563 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,564 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,565 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,567 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,568 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,569 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:15,570 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:15,571 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:15,582 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,582 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:16,397 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,423 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:16,423 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:16,426 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:16,426 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:16,434 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,449 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,457 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,465 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,484 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,494 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,505 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,539 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,551 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:16,560 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:16,564 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:16,569 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,569 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:16,774 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,775 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:16,776 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 08:45:16,776 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:16,776 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 08:45:16,776 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 08:45:16,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1397, Invalid=1573, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 08:45:16,777 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 08:45:16,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:16,828 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 08:45:16,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 08:45:16,828 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 08:45:16,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:16,829 INFO L225 Difference]: With dead ends: 52 [2018-01-21 08:45:16,829 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 08:45:16,830 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1427, Invalid=1653, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 08:45:16,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 08:45:16,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 08:45:16,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 08:45:16,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 08:45:16,833 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 08:45:16,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:16,833 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 08:45:16,833 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 08:45:16,833 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 08:45:16,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 08:45:16,834 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:16,834 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:16,834 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:16,834 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 08:45:16,834 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:16,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:16,835 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:16,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:16,835 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:16,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:16,843 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:17,087 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,088 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,088 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:17,088 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:17,088 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:17,088 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,088 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:17,093 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:17,093 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:17,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:17,108 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:17,117 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,117 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:17,968 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,987 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,988 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:17,990 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:17,990 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:18,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:18,019 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:18,028 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,028 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:18,231 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,232 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:18,233 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 08:45:18,233 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:18,233 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 08:45:18,233 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 08:45:18,234 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1487, Invalid=1705, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 08:45:18,234 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 08:45:18,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:18,275 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 08:45:18,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 08:45:18,275 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 08:45:18,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:18,276 INFO L225 Difference]: With dead ends: 53 [2018-01-21 08:45:18,276 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 08:45:18,276 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1518, Invalid=1788, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 08:45:18,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 08:45:18,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 08:45:18,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 08:45:18,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 08:45:18,279 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 08:45:18,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:18,279 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 08:45:18,279 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 08:45:18,279 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 08:45:18,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 08:45:18,279 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:18,280 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:18,280 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:18,280 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 08:45:18,280 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:18,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:18,280 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:18,281 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:18,281 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:18,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:18,289 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:18,572 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:18,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:18,572 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:18,572 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:18,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:18,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:18,578 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:18,578 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:18,584 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:18,590 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:18,591 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:18,593 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:18,602 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,602 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:19,479 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,499 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:19,499 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:19,502 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:19,502 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:19,511 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,525 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,537 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:19,541 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:19,547 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,547 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:19,751 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,752 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:19,753 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 08:45:19,753 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:19,753 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 08:45:19,753 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 08:45:19,753 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1577, Invalid=1845, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 08:45:19,754 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 08:45:19,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:19,793 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 08:45:19,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 08:45:19,793 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 08:45:19,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:19,793 INFO L225 Difference]: With dead ends: 54 [2018-01-21 08:45:19,793 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 08:45:19,794 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1609, Invalid=1931, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 08:45:19,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 08:45:19,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 08:45:19,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 08:45:19,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 08:45:19,797 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 08:45:19,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:19,797 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 08:45:19,797 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 08:45:19,797 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 08:45:19,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 08:45:19,798 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:19,798 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:19,798 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:19,798 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 08:45:19,798 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:19,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:19,799 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:19,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:19,800 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:19,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:19,806 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:20,058 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:20,058 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:20,059 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:20,059 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:20,059 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:20,059 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:20,064 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:20,064 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:20,071 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,073 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,074 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,075 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,076 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,077 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,078 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,079 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,080 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,081 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,082 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,083 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,085 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,086 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,087 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:20,087 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:20,089 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:20,103 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,103 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:21,008 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:21,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:21,031 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:21,031 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:21,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,047 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,054 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,062 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,070 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,079 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,088 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,098 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,108 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,119 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,130 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,142 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,154 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,167 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,209 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:21,219 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:21,223 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:21,229 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,229 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:21,450 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,451 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:21,451 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 08:45:21,451 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:21,451 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 08:45:21,451 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 08:45:21,452 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1667, Invalid=1993, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 08:45:21,452 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 08:45:21,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:21,491 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 08:45:21,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 08:45:21,491 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 08:45:21,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:21,491 INFO L225 Difference]: With dead ends: 55 [2018-01-21 08:45:21,492 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 08:45:21,492 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1700, Invalid=2082, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 08:45:21,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 08:45:21,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 08:45:21,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 08:45:21,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 08:45:21,495 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 08:45:21,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:21,496 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 08:45:21,496 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 08:45:21,496 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 08:45:21,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 08:45:21,496 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:21,496 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:21,496 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:21,496 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 08:45:21,496 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:21,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:21,497 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:21,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:21,497 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:21,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:21,503 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:21,826 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,826 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:21,826 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:21,827 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:21,827 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:21,827 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:21,827 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:21,832 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:21,832 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:21,847 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:21,849 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:21,858 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,858 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:22,822 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:22,843 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:22,843 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:22,851 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:22,851 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:22,890 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:22,894 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:22,900 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:22,900 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:23,129 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:23,130 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:23,130 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 08:45:23,130 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:23,130 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 08:45:23,130 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 08:45:23,131 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1757, Invalid=2149, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 08:45:23,131 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 08:45:23,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:23,185 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 08:45:23,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 08:45:23,185 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 08:45:23,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:23,185 INFO L225 Difference]: With dead ends: 56 [2018-01-21 08:45:23,186 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 08:45:23,186 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1791, Invalid=2241, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 08:45:23,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 08:45:23,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 08:45:23,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 08:45:23,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 08:45:23,188 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 08:45:23,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:23,188 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 08:45:23,188 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 08:45:23,189 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 08:45:23,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 08:45:23,189 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:23,189 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:23,189 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:23,189 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 08:45:23,189 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:23,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:23,190 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:23,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:23,190 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:23,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:23,199 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:23,504 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:23,505 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:23,505 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:23,505 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:23,505 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:23,505 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:23,505 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:23,510 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:23,510 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:23,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,517 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,518 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,518 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,519 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,520 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,522 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,524 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,525 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:23,530 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:23,532 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:23,541 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:23,541 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:24,561 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:24,581 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:24,581 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:24,585 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:24,585 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:24,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,591 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,595 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,599 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,614 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,620 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,626 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,632 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,639 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,647 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,655 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,663 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,677 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,695 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:24,707 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:24,710 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:24,720 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:24,721 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:24,983 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:24,984 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:24,984 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 08:45:24,984 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:24,985 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 08:45:24,985 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 08:45:24,985 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1847, Invalid=2313, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 08:45:24,985 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 08:45:25,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:25,044 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 08:45:25,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 08:45:25,044 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 08:45:25,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:25,045 INFO L225 Difference]: With dead ends: 57 [2018-01-21 08:45:25,045 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 08:45:25,045 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 699 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1882, Invalid=2408, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 08:45:25,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 08:45:25,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 08:45:25,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 08:45:25,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 08:45:25,048 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 08:45:25,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:25,049 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 08:45:25,049 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 08:45:25,049 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 08:45:25,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 08:45:25,049 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:25,049 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:25,050 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:25,050 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 08:45:25,050 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:25,050 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:25,050 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:25,050 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:25,051 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:25,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:25,059 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:25,546 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:25,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:25,546 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:25,546 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:25,546 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:25,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:25,546 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:25,551 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:25,551 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:25,558 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,560 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,561 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,562 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,563 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,564 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,567 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,568 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,569 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,570 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,572 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,573 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,574 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,575 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,577 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:25,577 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:25,579 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:25,588 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:25,588 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:26,645 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:26,665 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:26,665 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:26,668 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:26,668 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:26,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,685 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,692 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,700 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,709 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,717 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,727 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,737 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,747 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,758 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,770 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,782 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,794 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,807 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,820 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,835 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,845 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:26,849 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:26,855 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:26,855 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:27,114 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:27,115 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:27,116 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 08:45:27,116 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:27,116 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 08:45:27,116 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 08:45:27,116 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1937, Invalid=2485, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 08:45:27,117 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 08:45:27,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:27,156 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 08:45:27,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 08:45:27,156 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 08:45:27,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:27,157 INFO L225 Difference]: With dead ends: 58 [2018-01-21 08:45:27,157 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 08:45:27,157 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 783 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1973, Invalid=2583, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 08:45:27,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 08:45:27,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 08:45:27,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 08:45:27,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 08:45:27,160 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 08:45:27,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:27,160 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 08:45:27,160 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 08:45:27,160 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 08:45:27,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 08:45:27,160 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:27,160 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:27,161 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:27,161 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 08:45:27,161 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:27,161 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:27,161 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:27,162 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:27,162 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:27,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:27,168 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:27,494 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:27,494 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:27,495 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:27,495 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:27,495 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:27,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:27,495 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:27,500 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:27,500 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:27,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:27,515 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:27,530 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:27,530 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:27,658 WARN L143 SmtUtils]: Spent 126ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 08:45:28,800 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:28,831 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:28,831 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:28,834 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:28,834 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:28,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:28,867 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:28,873 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:28,873 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:29,128 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:29,129 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:29,129 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 08:45:29,129 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:29,130 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 08:45:29,130 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 08:45:29,131 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2027, Invalid=2665, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 08:45:29,131 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 08:45:29,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:29,175 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 08:45:29,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 08:45:29,176 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 08:45:29,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:29,176 INFO L225 Difference]: With dead ends: 59 [2018-01-21 08:45:29,176 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 08:45:29,177 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 871 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2064, Invalid=2766, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 08:45:29,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 08:45:29,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 08:45:29,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 08:45:29,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 08:45:29,180 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 08:45:29,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:29,181 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 08:45:29,181 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 08:45:29,181 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 08:45:29,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 08:45:29,181 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:29,181 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:29,181 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:29,181 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 08:45:29,181 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:29,182 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:29,182 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:29,182 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:29,182 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:29,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:29,192 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:29,639 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:29,639 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:29,639 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:29,639 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:29,639 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:29,639 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:29,639 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:29,644 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:29,644 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:29,651 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:29,657 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:29,659 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:29,660 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:29,670 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:29,670 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:30,832 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:30,851 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:30,851 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:30,854 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:30,854 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:30,865 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:30,880 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:30,893 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:30,896 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:30,903 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:30,903 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:31,179 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:31,180 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:31,180 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 08:45:31,180 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:31,181 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 08:45:31,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 08:45:31,181 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2117, Invalid=2853, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 08:45:31,181 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 08:45:31,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:31,230 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 08:45:31,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 08:45:31,231 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 08:45:31,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:31,231 INFO L225 Difference]: With dead ends: 60 [2018-01-21 08:45:31,231 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 08:45:31,232 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 963 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2155, Invalid=2957, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 08:45:31,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 08:45:31,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 08:45:31,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 08:45:31,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 08:45:31,235 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 08:45:31,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:31,236 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 08:45:31,236 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 08:45:31,236 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 08:45:31,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 08:45:31,236 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:31,236 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:31,236 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:31,237 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 08:45:31,237 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:31,237 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:31,237 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:31,237 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:31,237 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:31,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:31,244 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:31,644 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:31,644 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:31,644 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:31,645 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:31,645 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:31,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:31,645 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:31,649 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:31,649 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:31,656 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,657 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,658 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,659 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,660 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,661 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,662 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,663 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,664 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,665 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,666 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,668 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,669 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,670 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,671 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,672 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,673 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,674 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,675 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:31,676 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:31,690 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:31,691 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:32,884 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:32,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:32,904 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:32,907 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:32,907 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:32,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,930 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,955 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,964 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,974 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,984 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:32,994 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,005 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,016 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,052 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,065 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,079 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,092 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:33,103 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:33,106 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:33,113 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:33,113 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:33,403 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:33,404 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:33,405 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 08:45:33,405 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:33,405 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 08:45:33,405 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 08:45:33,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2207, Invalid=3049, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 08:45:33,406 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 08:45:33,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:33,451 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 08:45:33,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 08:45:33,451 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 08:45:33,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:33,451 INFO L225 Difference]: With dead ends: 61 [2018-01-21 08:45:33,451 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 08:45:33,452 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2246, Invalid=3156, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 08:45:33,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 08:45:33,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 08:45:33,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 08:45:33,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 08:45:33,454 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 08:45:33,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:33,454 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 08:45:33,454 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 08:45:33,454 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 08:45:33,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 08:45:33,454 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:33,455 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:33,455 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:33,455 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 08:45:33,455 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:33,455 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:33,455 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:33,455 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:33,456 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:33,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:33,461 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:33,833 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:33,833 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:33,833 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:33,834 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:33,834 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:33,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:33,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:33,839 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:33,839 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:33,853 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:33,855 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:33,865 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:33,865 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:35,122 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:35,142 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:35,142 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:35,145 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:35,145 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:35,187 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:35,190 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:35,197 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:35,197 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:35,491 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:35,492 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:35,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 08:45:35,492 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:35,492 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 08:45:35,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 08:45:35,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2297, Invalid=3253, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 08:45:35,493 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 08:45:35,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:35,550 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 08:45:35,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 08:45:35,551 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 08:45:35,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:35,551 INFO L225 Difference]: With dead ends: 62 [2018-01-21 08:45:35,551 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 08:45:35,552 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1159 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2337, Invalid=3363, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 08:45:35,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 08:45:35,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 08:45:35,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 08:45:35,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 08:45:35,554 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 08:45:35,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:35,554 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 08:45:35,554 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 08:45:35,554 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 08:45:35,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 08:45:35,554 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:35,555 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:35,555 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:35,555 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 08:45:35,555 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:35,555 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:35,556 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:35,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:35,556 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:35,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:35,563 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:36,081 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:36,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:36,081 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:36,081 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:36,082 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:36,082 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:36,082 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:36,092 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:36,092 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:36,096 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,098 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,099 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,101 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,102 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,103 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,104 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,104 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,106 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,107 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,108 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,109 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,110 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:36,115 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:36,117 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:36,127 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:36,127 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:37,421 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:37,441 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:37,441 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:37,444 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:37,444 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:37,448 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,450 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,457 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,465 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,470 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,475 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,486 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,492 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,499 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,506 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,522 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,539 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,549 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,564 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,575 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:37,579 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:37,586 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:37,586 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:37,916 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:37,917 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:37,917 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 08:45:37,917 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:37,917 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 08:45:37,918 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 08:45:37,918 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2387, Invalid=3465, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 08:45:37,918 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 08:45:37,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:37,962 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 08:45:37,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 08:45:37,962 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 08:45:37,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:37,962 INFO L225 Difference]: With dead ends: 63 [2018-01-21 08:45:37,962 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 08:45:37,963 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1263 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2428, Invalid=3578, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 08:45:37,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 08:45:37,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 08:45:37,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 08:45:37,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 08:45:37,965 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 08:45:37,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:37,965 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 08:45:37,965 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 08:45:37,966 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 08:45:37,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 08:45:37,966 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:37,966 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:37,966 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:37,966 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 08:45:37,966 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:37,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:37,967 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:37,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:37,967 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:37,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:37,974 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:38,420 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:38,420 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:38,420 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:38,420 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:38,420 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:38,420 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:38,420 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:38,425 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:38,425 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:38,432 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,433 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,434 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,435 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,436 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,437 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,438 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,439 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,443 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,444 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,445 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,447 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,449 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,450 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,452 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:38,452 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:38,454 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:38,464 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:38,464 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:39,818 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:39,838 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:39,838 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:39,840 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:39,841 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:39,851 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,865 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,874 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,882 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,891 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,901 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,910 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,920 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,931 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,943 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,954 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,966 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,979 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:39,992 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:40,005 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:40,019 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:40,033 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:40,048 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:40,059 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:40,063 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:40,070 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:40,070 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:40,406 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:40,407 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:40,407 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 08:45:40,407 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:40,408 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 08:45:40,408 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 08:45:40,408 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2477, Invalid=3685, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 08:45:40,408 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-21 08:45:40,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:40,455 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 08:45:40,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 08:45:40,455 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-21 08:45:40,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:40,456 INFO L225 Difference]: With dead ends: 64 [2018-01-21 08:45:40,456 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 08:45:40,456 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1371 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2519, Invalid=3801, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 08:45:40,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 08:45:40,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 08:45:40,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 08:45:40,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 08:45:40,459 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 08:45:40,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:40,459 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 08:45:40,459 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 08:45:40,459 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 08:45:40,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 08:45:40,459 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:40,459 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:40,459 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:40,460 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 08:45:40,460 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:40,460 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:40,460 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:40,460 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:40,460 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:40,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:40,470 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:40,935 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:40,935 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:40,935 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:40,935 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:40,935 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:40,935 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:40,935 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:40,940 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:40,940 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:40,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:40,959 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:40,981 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:40,981 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:42,383 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:42,403 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:42,418 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:42,426 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:42,427 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:42,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:42,462 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:42,469 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:42,470 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:42,806 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:42,807 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:42,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 08:45:42,808 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:42,808 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 08:45:42,808 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 08:45:42,808 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2567, Invalid=3913, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 08:45:42,808 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-21 08:45:42,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:42,859 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 08:45:42,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 08:45:42,860 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-21 08:45:42,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:42,860 INFO L225 Difference]: With dead ends: 65 [2018-01-21 08:45:42,860 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 08:45:42,861 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1483 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2610, Invalid=4032, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 08:45:42,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 08:45:42,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 08:45:42,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 08:45:42,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 08:45:42,863 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 08:45:42,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:42,863 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 08:45:42,863 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 08:45:42,863 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 08:45:42,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 08:45:42,863 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:42,864 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:42,864 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:42,864 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-21 08:45:42,864 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:42,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:42,864 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:42,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:42,865 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:42,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:42,874 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:43,476 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:43,476 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:43,476 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:43,476 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:43,476 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:43,477 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:43,477 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:43,483 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:43,483 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:43,492 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,502 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,505 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:43,507 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:43,518 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:43,518 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:43,741 WARN L143 SmtUtils]: Spent 127ms on a formula simplification that was a NOOP. DAG size: 122 [2018-01-21 08:45:45,147 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:45,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:45,167 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:45,170 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:45,170 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:45,180 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:45,196 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:45,211 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:45,215 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:45,223 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:45,223 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:45,576 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:45,577 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:45,577 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-21 08:45:45,577 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:45,578 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-21 08:45:45,578 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-21 08:45:45,578 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2657, Invalid=4149, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 08:45:45,578 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 43 states. [2018-01-21 08:45:45,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:45,624 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 08:45:45,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-21 08:45:45,624 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 55 [2018-01-21 08:45:45,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:45,625 INFO L225 Difference]: With dead ends: 66 [2018-01-21 08:45:45,625 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 08:45:45,625 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 177 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1599 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2701, Invalid=4271, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 08:45:45,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 08:45:45,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 08:45:45,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 08:45:45,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 08:45:45,627 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 08:45:45,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:45,627 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 08:45:45,627 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-21 08:45:45,627 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 08:45:45,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 08:45:45,628 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:45,628 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:45,628 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:45,628 INFO L82 PathProgramCache]: Analyzing trace with hash -1090430805, now seen corresponding path program 39 times [2018-01-21 08:45:45,628 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:45,629 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:45,629 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:45,629 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:45,629 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:45,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:45,638 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:46,163 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:46,163 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:46,163 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:46,164 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:46,164 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:46,164 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:46,164 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:46,170 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:46,170 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:46,179 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,182 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,183 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,184 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,185 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,186 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,187 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,189 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,190 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,193 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,195 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,198 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,200 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,202 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,203 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,207 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,208 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:46,209 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:46,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:46,222 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:46,222 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:47,751 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:47,771 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:47,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:47,774 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:47,774 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:47,784 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,817 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,826 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,836 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,858 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,869 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,881 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,893 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,905 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,917 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,930 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,943 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,957 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,971 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:47,986 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:48,002 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:48,017 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:48,029 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:48,032 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:48,040 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:48,040 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:48,402 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:48,403 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:48,404 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 85 [2018-01-21 08:45:48,404 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:48,404 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 08:45:48,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 08:45:48,404 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2747, Invalid=4393, Unknown=0, NotChecked=0, Total=7140 [2018-01-21 08:45:48,404 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 44 states. [2018-01-21 08:45:48,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:48,459 INFO L93 Difference]: Finished difference Result 67 states and 67 transitions. [2018-01-21 08:45:48,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-01-21 08:45:48,459 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 56 [2018-01-21 08:45:48,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:48,460 INFO L225 Difference]: With dead ends: 67 [2018-01-21 08:45:48,460 INFO L226 Difference]: Without dead ends: 58 [2018-01-21 08:45:48,460 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 180 SyntacticMatches, 2 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1719 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2792, Invalid=4518, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 08:45:48,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-21 08:45:48,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-21 08:45:48,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-21 08:45:48,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-01-21 08:45:48,463 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 56 [2018-01-21 08:45:48,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:48,464 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-01-21 08:45:48,464 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 08:45:48,464 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-01-21 08:45:48,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-21 08:45:48,464 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:48,464 INFO L322 BasicCegarLoop]: trace histogram [40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:48,465 INFO L371 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:48,465 INFO L82 PathProgramCache]: Analyzing trace with hash -845591728, now seen corresponding path program 40 times [2018-01-21 08:45:48,465 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:48,466 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:48,466 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:48,466 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:48,466 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:48,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:48,476 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-01-21 08:45:48,937 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:45:48,939 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:45:48,939 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:45:48,939 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:45:48,939 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:45:48,939 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:45:48,939 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:45:48,939 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:45:48,939 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 08:45:48,939 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:45:48,939 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:45:48,940 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:45:48,940 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 08:45:48 BoogieIcfgContainer [2018-01-21 08:45:48,940 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 08:45:48,941 INFO L168 Benchmark]: Toolchain (without parser) took 54403.78 ms. Allocated memory was 301.5 MB in the beginning and 846.7 MB in the end (delta: 545.3 MB). Free memory was 260.8 MB in the beginning and 311.1 MB in the end (delta: -50.4 MB). Peak memory consumption was 494.9 MB. Max. memory is 5.3 GB. [2018-01-21 08:45:48,942 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 301.5 MB. Free memory is still 264.8 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 08:45:48,942 INFO L168 Benchmark]: CACSL2BoogieTranslator took 181.40 ms. Allocated memory is still 301.5 MB. Free memory was 260.8 MB in the beginning and 252.8 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:45:48,942 INFO L168 Benchmark]: Boogie Preprocessor took 25.26 ms. Allocated memory is still 301.5 MB. Free memory was 252.8 MB in the beginning and 250.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:45:48,942 INFO L168 Benchmark]: RCFGBuilder took 157.83 ms. Allocated memory is still 301.5 MB. Free memory was 250.8 MB in the beginning and 238.3 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. [2018-01-21 08:45:48,942 INFO L168 Benchmark]: TraceAbstraction took 54031.27 ms. Allocated memory was 301.5 MB in the beginning and 846.7 MB in the end (delta: 545.3 MB). Free memory was 238.3 MB in the beginning and 311.1 MB in the end (delta: -72.9 MB). Peak memory consumption was 472.4 MB. Max. memory is 5.3 GB. [2018-01-21 08:45:48,944 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 301.5 MB. Free memory is still 264.8 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 181.40 ms. Allocated memory is still 301.5 MB. Free memory was 260.8 MB in the beginning and 252.8 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 25.26 ms. Allocated memory is still 301.5 MB. Free memory was 252.8 MB in the beginning and 250.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 157.83 ms. Allocated memory is still 301.5 MB. Free memory was 250.8 MB in the beginning and 238.3 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 54031.27 ms. Allocated memory was 301.5 MB in the beginning and 846.7 MB in the end (delta: 545.3 MB). Free memory was 238.3 MB in the beginning and 311.1 MB in the end (delta: -72.9 MB). Peak memory consumption was 472.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.208315 RENAME_VARIABLES(MILLISECONDS) : 0.130144 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.158664 PROJECTAWAY(MILLISECONDS) : 0.106055 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.142279 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.166797 ADD_EQUALITY(MILLISECONDS) : 0.031169 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.012294 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 58 with TraceHistMax 40, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 41 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 53.8s OverallTime, 41 OverallIterations, 40 TraceHistogramMax, 1.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 643 SDtfs, 80 SDslu, 10896 SDs, 0 SdLazy, 1719 SolverSat, 51 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6674 GetRequests, 4799 SyntacticMatches, 78 SemanticMatches, 1797 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17336 ImplicationChecksByTransitivity, 29.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=58occurred in iteration=40, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.7s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 40 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.4s SatisfiabilityAnalysisTime, 45.2s InterpolantComputationTime, 4346 NumberOfCodeBlocks, 4346 NumberOfCodeBlocksAsserted, 550 NumberOfCheckSat, 7036 ConstructedInterpolants, 0 QuantifiedInterpolants, 1057564 SizeOfPredicates, 78 NumberOfNonLiveVariables, 9438 ConjunctsInSsa, 1794 ConjunctsInUnsatCore, 196 InterpolantComputations, 1 PerfectInterpolantSequences, 0/53300 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_08-45-48-952.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_08-45-48-952.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_08-45-48-952.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_08-45-48-952.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_08-45-48-952.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_08-45-48-952.csv Completed graceful shutdown